smp.h 2.9 KB

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  1. /* MN10300 SMP support
  2. *
  3. * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. *
  6. * Modified by Matsushita Electric Industrial Co., Ltd.
  7. * Modifications:
  8. * 13-Nov-2006 MEI Define IPI-IRQ number and add inline/macro function
  9. * for SMP support.
  10. * 22-Jan-2007 MEI Add the define related to SMP_BOOT_IRQ.
  11. * 23-Feb-2007 MEI Add the define related to SMP icahce invalidate.
  12. * 23-Jun-2008 MEI Delete INTC_IPI.
  13. * 22-Jul-2008 MEI Add smp_nmi_call_function and related defines.
  14. * 04-Aug-2008 MEI Delete USE_DOIRQ_CACHE_IPI.
  15. *
  16. * This program is free software; you can redistribute it and/or
  17. * modify it under the terms of the GNU General Public Licence
  18. * as published by the Free Software Foundation; either version
  19. * 2 of the Licence, or (at your option) any later version.
  20. */
  21. #ifndef _ASM_SMP_H
  22. #define _ASM_SMP_H
  23. #ifndef __ASSEMBLY__
  24. #include <linux/threads.h>
  25. #include <linux/cpumask.h>
  26. #endif
  27. #ifdef CONFIG_SMP
  28. #include <proc/smp-regs.h>
  29. #define RESCHEDULE_IPI 63
  30. #define CALL_FUNC_SINGLE_IPI 192
  31. #define LOCAL_TIMER_IPI 193
  32. #define FLUSH_CACHE_IPI 194
  33. #define CALL_FUNCTION_NMI_IPI 195
  34. #define GDB_NMI_IPI 196
  35. #define SMP_BOOT_IRQ 195
  36. #define RESCHEDULE_GxICR_LV GxICR_LEVEL_6
  37. #define CALL_FUNCTION_GxICR_LV GxICR_LEVEL_4
  38. #define LOCAL_TIMER_GxICR_LV GxICR_LEVEL_4
  39. #define FLUSH_CACHE_GxICR_LV GxICR_LEVEL_0
  40. #define SMP_BOOT_GxICR_LV GxICR_LEVEL_0
  41. #define TIME_OUT_COUNT_BOOT_IPI 100
  42. #define DELAY_TIME_BOOT_IPI 75000
  43. #ifndef __ASSEMBLY__
  44. /**
  45. * raw_smp_processor_id - Determine the raw CPU ID of the CPU running it
  46. *
  47. * What we really want to do is to use the CPUID hardware CPU register to get
  48. * this information, but accesses to that aren't cached, and run at system bus
  49. * speed, not CPU speed. A copy of this value is, however, stored in the
  50. * thread_info struct, and that can be cached.
  51. *
  52. * An alternate way of dealing with this could be to use the EPSW.S bits to
  53. * cache this information for systems with up to four CPUs.
  54. */
  55. #if 0
  56. #define raw_smp_processor_id() (CPUID)
  57. #else
  58. #define raw_smp_processor_id() (current_thread_info()->cpu)
  59. #endif
  60. static inline int cpu_logical_map(int cpu)
  61. {
  62. return cpu;
  63. }
  64. static inline int cpu_number_map(int cpu)
  65. {
  66. return cpu;
  67. }
  68. extern cpumask_t cpu_boot_map;
  69. extern void smp_init_cpus(void);
  70. extern void smp_cache_interrupt(void);
  71. extern void send_IPI_allbutself(int irq);
  72. extern int smp_nmi_call_function(smp_call_func_t func, void *info, int wait);
  73. extern void arch_send_call_function_single_ipi(int cpu);
  74. extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
  75. #ifdef CONFIG_HOTPLUG_CPU
  76. extern int __cpu_disable(void);
  77. extern void __cpu_die(unsigned int cpu);
  78. #endif /* CONFIG_HOTPLUG_CPU */
  79. #endif /* __ASSEMBLY__ */
  80. #else /* CONFIG_SMP */
  81. #ifndef __ASSEMBLY__
  82. static inline void smp_init_cpus(void) {}
  83. #endif /* __ASSEMBLY__ */
  84. #endif /* CONFIG_SMP */
  85. #endif /* _ASM_SMP_H */