dma-default.c 8.1 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
  7. * Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org>
  8. * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
  9. */
  10. #include <linux/types.h>
  11. #include <linux/dma-mapping.h>
  12. #include <linux/mm.h>
  13. #include <linux/module.h>
  14. #include <linux/scatterlist.h>
  15. #include <linux/string.h>
  16. #include <linux/gfp.h>
  17. #include <asm/cache.h>
  18. #include <asm/io.h>
  19. #include <dma-coherence.h>
  20. static inline unsigned long dma_addr_to_virt(struct device *dev,
  21. dma_addr_t dma_addr)
  22. {
  23. unsigned long addr = plat_dma_addr_to_phys(dev, dma_addr);
  24. return (unsigned long)phys_to_virt(addr);
  25. }
  26. /*
  27. * Warning on the terminology - Linux calls an uncached area coherent;
  28. * MIPS terminology calls memory areas with hardware maintained coherency
  29. * coherent.
  30. */
  31. static inline int cpu_is_noncoherent_r10000(struct device *dev)
  32. {
  33. return !plat_device_is_coherent(dev) &&
  34. (current_cpu_type() == CPU_R10000 ||
  35. current_cpu_type() == CPU_R12000);
  36. }
  37. static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
  38. {
  39. gfp_t dma_flag;
  40. /* ignore region specifiers */
  41. gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
  42. #ifdef CONFIG_ISA
  43. if (dev == NULL)
  44. dma_flag = __GFP_DMA;
  45. else
  46. #endif
  47. #if defined(CONFIG_ZONE_DMA32) && defined(CONFIG_ZONE_DMA)
  48. if (dev->coherent_dma_mask < DMA_BIT_MASK(32))
  49. dma_flag = __GFP_DMA;
  50. else if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
  51. dma_flag = __GFP_DMA32;
  52. else
  53. #endif
  54. #if defined(CONFIG_ZONE_DMA32) && !defined(CONFIG_ZONE_DMA)
  55. if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
  56. dma_flag = __GFP_DMA32;
  57. else
  58. #endif
  59. #if defined(CONFIG_ZONE_DMA) && !defined(CONFIG_ZONE_DMA32)
  60. if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
  61. dma_flag = __GFP_DMA;
  62. else
  63. #endif
  64. dma_flag = 0;
  65. /* Don't invoke OOM killer */
  66. gfp |= __GFP_NORETRY;
  67. return gfp | dma_flag;
  68. }
  69. void *dma_alloc_noncoherent(struct device *dev, size_t size,
  70. dma_addr_t * dma_handle, gfp_t gfp)
  71. {
  72. void *ret;
  73. gfp = massage_gfp_flags(dev, gfp);
  74. ret = (void *) __get_free_pages(gfp, get_order(size));
  75. if (ret != NULL) {
  76. memset(ret, 0, size);
  77. *dma_handle = plat_map_dma_mem(dev, ret, size);
  78. }
  79. return ret;
  80. }
  81. EXPORT_SYMBOL(dma_alloc_noncoherent);
  82. static void *mips_dma_alloc_coherent(struct device *dev, size_t size,
  83. dma_addr_t * dma_handle, gfp_t gfp)
  84. {
  85. void *ret;
  86. if (dma_alloc_from_coherent(dev, size, dma_handle, &ret))
  87. return ret;
  88. gfp = massage_gfp_flags(dev, gfp);
  89. ret = (void *) __get_free_pages(gfp, get_order(size));
  90. if (ret) {
  91. memset(ret, 0, size);
  92. *dma_handle = plat_map_dma_mem(dev, ret, size);
  93. if (!plat_device_is_coherent(dev)) {
  94. dma_cache_wback_inv((unsigned long) ret, size);
  95. ret = UNCAC_ADDR(ret);
  96. }
  97. }
  98. return ret;
  99. }
  100. void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
  101. dma_addr_t dma_handle)
  102. {
  103. plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
  104. free_pages((unsigned long) vaddr, get_order(size));
  105. }
  106. EXPORT_SYMBOL(dma_free_noncoherent);
  107. static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
  108. dma_addr_t dma_handle)
  109. {
  110. unsigned long addr = (unsigned long) vaddr;
  111. int order = get_order(size);
  112. if (dma_release_from_coherent(dev, order, vaddr))
  113. return;
  114. plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
  115. if (!plat_device_is_coherent(dev))
  116. addr = CAC_ADDR(addr);
  117. free_pages(addr, get_order(size));
  118. }
  119. static inline void __dma_sync(unsigned long addr, size_t size,
  120. enum dma_data_direction direction)
  121. {
  122. switch (direction) {
  123. case DMA_TO_DEVICE:
  124. dma_cache_wback(addr, size);
  125. break;
  126. case DMA_FROM_DEVICE:
  127. dma_cache_inv(addr, size);
  128. break;
  129. case DMA_BIDIRECTIONAL:
  130. dma_cache_wback_inv(addr, size);
  131. break;
  132. default:
  133. BUG();
  134. }
  135. }
  136. static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
  137. size_t size, enum dma_data_direction direction, struct dma_attrs *attrs)
  138. {
  139. if (cpu_is_noncoherent_r10000(dev))
  140. __dma_sync(dma_addr_to_virt(dev, dma_addr), size,
  141. direction);
  142. plat_unmap_dma_mem(dev, dma_addr, size, direction);
  143. }
  144. static int mips_dma_map_sg(struct device *dev, struct scatterlist *sg,
  145. int nents, enum dma_data_direction direction, struct dma_attrs *attrs)
  146. {
  147. int i;
  148. for (i = 0; i < nents; i++, sg++) {
  149. unsigned long addr;
  150. addr = (unsigned long) sg_virt(sg);
  151. if (!plat_device_is_coherent(dev) && addr)
  152. __dma_sync(addr, sg->length, direction);
  153. sg->dma_address = plat_map_dma_mem(dev,
  154. (void *)addr, sg->length);
  155. }
  156. return nents;
  157. }
  158. static dma_addr_t mips_dma_map_page(struct device *dev, struct page *page,
  159. unsigned long offset, size_t size, enum dma_data_direction direction,
  160. struct dma_attrs *attrs)
  161. {
  162. unsigned long addr;
  163. addr = (unsigned long) page_address(page) + offset;
  164. if (!plat_device_is_coherent(dev))
  165. __dma_sync(addr, size, direction);
  166. return plat_map_dma_mem(dev, (void *)addr, size);
  167. }
  168. static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
  169. int nhwentries, enum dma_data_direction direction,
  170. struct dma_attrs *attrs)
  171. {
  172. unsigned long addr;
  173. int i;
  174. for (i = 0; i < nhwentries; i++, sg++) {
  175. if (!plat_device_is_coherent(dev) &&
  176. direction != DMA_TO_DEVICE) {
  177. addr = (unsigned long) sg_virt(sg);
  178. if (addr)
  179. __dma_sync(addr, sg->length, direction);
  180. }
  181. plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction);
  182. }
  183. }
  184. static void mips_dma_sync_single_for_cpu(struct device *dev,
  185. dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
  186. {
  187. if (cpu_is_noncoherent_r10000(dev)) {
  188. unsigned long addr;
  189. addr = dma_addr_to_virt(dev, dma_handle);
  190. __dma_sync(addr, size, direction);
  191. }
  192. }
  193. static void mips_dma_sync_single_for_device(struct device *dev,
  194. dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
  195. {
  196. plat_extra_sync_for_device(dev);
  197. if (!plat_device_is_coherent(dev)) {
  198. unsigned long addr;
  199. addr = dma_addr_to_virt(dev, dma_handle);
  200. __dma_sync(addr, size, direction);
  201. }
  202. }
  203. static void mips_dma_sync_sg_for_cpu(struct device *dev,
  204. struct scatterlist *sg, int nelems, enum dma_data_direction direction)
  205. {
  206. int i;
  207. /* Make sure that gcc doesn't leave the empty loop body. */
  208. for (i = 0; i < nelems; i++, sg++) {
  209. if (cpu_is_noncoherent_r10000(dev))
  210. __dma_sync((unsigned long)page_address(sg_page(sg)),
  211. sg->length, direction);
  212. }
  213. }
  214. static void mips_dma_sync_sg_for_device(struct device *dev,
  215. struct scatterlist *sg, int nelems, enum dma_data_direction direction)
  216. {
  217. int i;
  218. /* Make sure that gcc doesn't leave the empty loop body. */
  219. for (i = 0; i < nelems; i++, sg++) {
  220. if (!plat_device_is_coherent(dev))
  221. __dma_sync((unsigned long)page_address(sg_page(sg)),
  222. sg->length, direction);
  223. }
  224. }
  225. int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  226. {
  227. return plat_dma_mapping_error(dev, dma_addr);
  228. }
  229. int mips_dma_supported(struct device *dev, u64 mask)
  230. {
  231. return plat_dma_supported(dev, mask);
  232. }
  233. void mips_dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  234. enum dma_data_direction direction)
  235. {
  236. BUG_ON(direction == DMA_NONE);
  237. plat_extra_sync_for_device(dev);
  238. if (!plat_device_is_coherent(dev))
  239. __dma_sync((unsigned long)vaddr, size, direction);
  240. }
  241. static struct dma_map_ops mips_default_dma_map_ops = {
  242. .alloc_coherent = mips_dma_alloc_coherent,
  243. .free_coherent = mips_dma_free_coherent,
  244. .map_page = mips_dma_map_page,
  245. .unmap_page = mips_dma_unmap_page,
  246. .map_sg = mips_dma_map_sg,
  247. .unmap_sg = mips_dma_unmap_sg,
  248. .sync_single_for_cpu = mips_dma_sync_single_for_cpu,
  249. .sync_single_for_device = mips_dma_sync_single_for_device,
  250. .sync_sg_for_cpu = mips_dma_sync_sg_for_cpu,
  251. .sync_sg_for_device = mips_dma_sync_sg_for_device,
  252. .mapping_error = mips_dma_mapping_error,
  253. .dma_supported = mips_dma_supported
  254. };
  255. struct dma_map_ops *mips_dma_map_ops = &mips_default_dma_map_ops;
  256. EXPORT_SYMBOL(mips_dma_map_ops);
  257. #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
  258. static int __init mips_dma_init(void)
  259. {
  260. dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
  261. return 0;
  262. }
  263. fs_initcall(mips_dma_init);