irq.c 4.3 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1992 Linus Torvalds
  7. * Copyright (C) 1994 - 2001, 2003, 07 Ralf Baechle
  8. */
  9. #include <linux/clockchips.h>
  10. #include <linux/init.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/kernel.h>
  13. #include <linux/smp.h>
  14. #include <linux/spinlock.h>
  15. #include <linux/irq.h>
  16. #include <asm/irq_cpu.h>
  17. #include <asm/i8253.h>
  18. #include <asm/i8259.h>
  19. #include <asm/io.h>
  20. #include <asm/jazz.h>
  21. #include <asm/pgtable.h>
  22. static DEFINE_RAW_SPINLOCK(r4030_lock);
  23. static void enable_r4030_irq(unsigned int irq)
  24. {
  25. unsigned int mask = 1 << (irq - JAZZ_IRQ_START);
  26. unsigned long flags;
  27. raw_spin_lock_irqsave(&r4030_lock, flags);
  28. mask |= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE);
  29. r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask);
  30. raw_spin_unlock_irqrestore(&r4030_lock, flags);
  31. }
  32. void disable_r4030_irq(unsigned int irq)
  33. {
  34. unsigned int mask = ~(1 << (irq - JAZZ_IRQ_START));
  35. unsigned long flags;
  36. raw_spin_lock_irqsave(&r4030_lock, flags);
  37. mask &= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE);
  38. r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask);
  39. raw_spin_unlock_irqrestore(&r4030_lock, flags);
  40. }
  41. static struct irq_chip r4030_irq_type = {
  42. .name = "R4030",
  43. .ack = disable_r4030_irq,
  44. .mask = disable_r4030_irq,
  45. .mask_ack = disable_r4030_irq,
  46. .unmask = enable_r4030_irq,
  47. };
  48. void __init init_r4030_ints(void)
  49. {
  50. int i;
  51. for (i = JAZZ_IRQ_START; i <= JAZZ_IRQ_END; i++)
  52. set_irq_chip_and_handler(i, &r4030_irq_type, handle_level_irq);
  53. r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0);
  54. r4030_read_reg16(JAZZ_IO_IRQ_SOURCE); /* clear pending IRQs */
  55. r4030_read_reg32(JAZZ_R4030_INVAL_ADDR); /* clear error bits */
  56. }
  57. /*
  58. * On systems with i8259-style interrupt controllers we assume for
  59. * driver compatibility reasons interrupts 0 - 15 to be the i8259
  60. * interrupts even if the hardware uses a different interrupt numbering.
  61. */
  62. void __init arch_init_irq(void)
  63. {
  64. /*
  65. * this is a hack to get back the still needed wired mapping
  66. * killed by init_mm()
  67. */
  68. /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */
  69. add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K);
  70. /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */
  71. add_wired_entry(0x02400017, 0x02440017, 0xe2000000, PM_16M);
  72. /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */
  73. add_wired_entry(0x01800017, 0x01000017, 0xe4000000, PM_4M);
  74. init_i8259_irqs(); /* Integrated i8259 */
  75. mips_cpu_irq_init();
  76. init_r4030_ints();
  77. change_c0_status(ST0_IM, IE_IRQ2 | IE_IRQ1);
  78. }
  79. asmlinkage void plat_irq_dispatch(void)
  80. {
  81. unsigned int pending = read_c0_cause() & read_c0_status();
  82. unsigned int irq;
  83. if (pending & IE_IRQ4) {
  84. r4030_read_reg32(JAZZ_TIMER_REGISTER);
  85. do_IRQ(JAZZ_TIMER_IRQ);
  86. } else if (pending & IE_IRQ2) {
  87. irq = *(volatile u8 *)JAZZ_EISA_IRQ_ACK;
  88. do_IRQ(irq);
  89. } else if (pending & IE_IRQ1) {
  90. irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2;
  91. if (likely(irq > 0))
  92. do_IRQ(irq + JAZZ_IRQ_START - 1);
  93. else
  94. panic("Unimplemented loc_no_irq handler");
  95. }
  96. }
  97. static void r4030_set_mode(enum clock_event_mode mode,
  98. struct clock_event_device *evt)
  99. {
  100. /* Nothing to do ... */
  101. }
  102. struct clock_event_device r4030_clockevent = {
  103. .name = "r4030",
  104. .features = CLOCK_EVT_FEAT_PERIODIC,
  105. .rating = 300,
  106. .irq = JAZZ_TIMER_IRQ,
  107. .set_mode = r4030_set_mode,
  108. };
  109. static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id)
  110. {
  111. struct clock_event_device *cd = dev_id;
  112. cd->event_handler(cd);
  113. return IRQ_HANDLED;
  114. }
  115. static struct irqaction r4030_timer_irqaction = {
  116. .handler = r4030_timer_interrupt,
  117. .flags = IRQF_DISABLED | IRQF_TIMER,
  118. .name = "R4030 timer",
  119. };
  120. void __init plat_time_init(void)
  121. {
  122. struct clock_event_device *cd = &r4030_clockevent;
  123. struct irqaction *action = &r4030_timer_irqaction;
  124. unsigned int cpu = smp_processor_id();
  125. BUG_ON(HZ != 100);
  126. cd->cpumask = cpumask_of(cpu);
  127. clockevents_register_device(cd);
  128. action->dev_id = cd;
  129. setup_irq(JAZZ_TIMER_IRQ, action);
  130. /*
  131. * Set clock to 100Hz.
  132. *
  133. * The R4030 timer receives an input clock of 1kHz which is divieded by
  134. * a programmable 4-bit divider. This makes it fairly inflexible.
  135. */
  136. r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
  137. setup_pit_timer();
  138. }