display.h 15 KB

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  1. /*
  2. * linux/include/asm-arm/arch-omap/display.h
  3. *
  4. * Copyright (C) 2008 Nokia Corporation
  5. * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #ifndef __ASM_ARCH_OMAP_DISPLAY_H
  20. #define __ASM_ARCH_OMAP_DISPLAY_H
  21. #include <linux/list.h>
  22. #include <linux/kobject.h>
  23. #include <linux/device.h>
  24. #include <asm/atomic.h>
  25. #define DISPC_IRQ_FRAMEDONE (1 << 0)
  26. #define DISPC_IRQ_VSYNC (1 << 1)
  27. #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
  28. #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
  29. #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
  30. #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
  31. #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
  32. #define DISPC_IRQ_GFX_END_WIN (1 << 7)
  33. #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
  34. #define DISPC_IRQ_OCP_ERR (1 << 9)
  35. #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
  36. #define DISPC_IRQ_VID1_END_WIN (1 << 11)
  37. #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
  38. #define DISPC_IRQ_VID2_END_WIN (1 << 13)
  39. #define DISPC_IRQ_SYNC_LOST (1 << 14)
  40. #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
  41. #define DISPC_IRQ_WAKEUP (1 << 16)
  42. struct omap_dss_device;
  43. struct omap_overlay_manager;
  44. enum omap_display_type {
  45. OMAP_DISPLAY_TYPE_NONE = 0,
  46. OMAP_DISPLAY_TYPE_DPI = 1 << 0,
  47. OMAP_DISPLAY_TYPE_DBI = 1 << 1,
  48. OMAP_DISPLAY_TYPE_SDI = 1 << 2,
  49. OMAP_DISPLAY_TYPE_DSI = 1 << 3,
  50. OMAP_DISPLAY_TYPE_VENC = 1 << 4,
  51. };
  52. enum omap_plane {
  53. OMAP_DSS_GFX = 0,
  54. OMAP_DSS_VIDEO1 = 1,
  55. OMAP_DSS_VIDEO2 = 2
  56. };
  57. enum omap_channel {
  58. OMAP_DSS_CHANNEL_LCD = 0,
  59. OMAP_DSS_CHANNEL_DIGIT = 1,
  60. };
  61. enum omap_color_mode {
  62. OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
  63. OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
  64. OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
  65. OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
  66. OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
  67. OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
  68. OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
  69. OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
  70. OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
  71. OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
  72. OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
  73. OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
  74. OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
  75. OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
  76. };
  77. enum omap_lcd_display_type {
  78. OMAP_DSS_LCD_DISPLAY_STN,
  79. OMAP_DSS_LCD_DISPLAY_TFT,
  80. };
  81. enum omap_dss_load_mode {
  82. OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
  83. OMAP_DSS_LOAD_CLUT_ONLY = 1,
  84. OMAP_DSS_LOAD_FRAME_ONLY = 2,
  85. OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
  86. };
  87. enum omap_dss_trans_key_type {
  88. OMAP_DSS_COLOR_KEY_GFX_DST = 0,
  89. OMAP_DSS_COLOR_KEY_VID_SRC = 1,
  90. };
  91. enum omap_rfbi_te_mode {
  92. OMAP_DSS_RFBI_TE_MODE_1 = 1,
  93. OMAP_DSS_RFBI_TE_MODE_2 = 2,
  94. };
  95. enum omap_panel_config {
  96. OMAP_DSS_LCD_IVS = 1<<0,
  97. OMAP_DSS_LCD_IHS = 1<<1,
  98. OMAP_DSS_LCD_IPC = 1<<2,
  99. OMAP_DSS_LCD_IEO = 1<<3,
  100. OMAP_DSS_LCD_RF = 1<<4,
  101. OMAP_DSS_LCD_ONOFF = 1<<5,
  102. OMAP_DSS_LCD_TFT = 1<<20,
  103. };
  104. enum omap_dss_venc_type {
  105. OMAP_DSS_VENC_TYPE_COMPOSITE,
  106. OMAP_DSS_VENC_TYPE_SVIDEO,
  107. };
  108. enum omap_display_caps {
  109. OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
  110. OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
  111. };
  112. enum omap_dss_update_mode {
  113. OMAP_DSS_UPDATE_DISABLED = 0,
  114. OMAP_DSS_UPDATE_AUTO,
  115. OMAP_DSS_UPDATE_MANUAL,
  116. };
  117. enum omap_dss_display_state {
  118. OMAP_DSS_DISPLAY_DISABLED = 0,
  119. OMAP_DSS_DISPLAY_ACTIVE,
  120. OMAP_DSS_DISPLAY_SUSPENDED,
  121. };
  122. /* XXX perhaps this should be removed */
  123. enum omap_dss_overlay_managers {
  124. OMAP_DSS_OVL_MGR_LCD,
  125. OMAP_DSS_OVL_MGR_TV,
  126. };
  127. enum omap_dss_rotation_type {
  128. OMAP_DSS_ROT_DMA = 0,
  129. OMAP_DSS_ROT_VRFB = 1,
  130. };
  131. /* clockwise rotation angle */
  132. enum omap_dss_rotation_angle {
  133. OMAP_DSS_ROT_0 = 0,
  134. OMAP_DSS_ROT_90 = 1,
  135. OMAP_DSS_ROT_180 = 2,
  136. OMAP_DSS_ROT_270 = 3,
  137. };
  138. enum omap_overlay_caps {
  139. OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
  140. OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
  141. };
  142. enum omap_overlay_manager_caps {
  143. OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
  144. };
  145. /* RFBI */
  146. struct rfbi_timings {
  147. int cs_on_time;
  148. int cs_off_time;
  149. int we_on_time;
  150. int we_off_time;
  151. int re_on_time;
  152. int re_off_time;
  153. int we_cycle_time;
  154. int re_cycle_time;
  155. int cs_pulse_width;
  156. int access_time;
  157. int clk_div;
  158. u32 tim[5]; /* set by rfbi_convert_timings() */
  159. int converted;
  160. };
  161. void omap_rfbi_write_command(const void *buf, u32 len);
  162. void omap_rfbi_read_data(void *buf, u32 len);
  163. void omap_rfbi_write_data(const void *buf, u32 len);
  164. void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
  165. u16 x, u16 y,
  166. u16 w, u16 h);
  167. int omap_rfbi_enable_te(bool enable, unsigned line);
  168. int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
  169. unsigned hs_pulse_time, unsigned vs_pulse_time,
  170. int hs_pol_inv, int vs_pol_inv, int extif_div);
  171. /* DSI */
  172. void dsi_bus_lock(void);
  173. void dsi_bus_unlock(void);
  174. int dsi_vc_dcs_write(int channel, u8 *data, int len);
  175. int dsi_vc_dcs_write_0(int channel, u8 dcs_cmd);
  176. int dsi_vc_dcs_write_1(int channel, u8 dcs_cmd, u8 param);
  177. int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len);
  178. int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen);
  179. int dsi_vc_dcs_read_1(int channel, u8 dcs_cmd, u8 *data);
  180. int dsi_vc_dcs_read_2(int channel, u8 dcs_cmd, u8 *data1, u8 *data2);
  181. int dsi_vc_set_max_rx_packet_size(int channel, u16 len);
  182. int dsi_vc_send_null(int channel);
  183. int dsi_vc_send_bta_sync(int channel);
  184. /* Board specific data */
  185. struct omap_dss_board_info {
  186. int (*get_last_off_on_transaction_id)(struct device *dev);
  187. int num_devices;
  188. struct omap_dss_device **devices;
  189. struct omap_dss_device *default_device;
  190. };
  191. struct omap_video_timings {
  192. /* Unit: pixels */
  193. u16 x_res;
  194. /* Unit: pixels */
  195. u16 y_res;
  196. /* Unit: KHz */
  197. u32 pixel_clock;
  198. /* Unit: pixel clocks */
  199. u16 hsw; /* Horizontal synchronization pulse width */
  200. /* Unit: pixel clocks */
  201. u16 hfp; /* Horizontal front porch */
  202. /* Unit: pixel clocks */
  203. u16 hbp; /* Horizontal back porch */
  204. /* Unit: line clocks */
  205. u16 vsw; /* Vertical synchronization pulse width */
  206. /* Unit: line clocks */
  207. u16 vfp; /* Vertical front porch */
  208. /* Unit: line clocks */
  209. u16 vbp; /* Vertical back porch */
  210. };
  211. #ifdef CONFIG_OMAP2_DSS_VENC
  212. /* Hardcoded timings for tv modes. Venc only uses these to
  213. * identify the mode, and does not actually use the configs
  214. * itself. However, the configs should be something that
  215. * a normal monitor can also show */
  216. extern const struct omap_video_timings omap_dss_pal_timings;
  217. extern const struct omap_video_timings omap_dss_ntsc_timings;
  218. #endif
  219. struct omap_overlay_info {
  220. bool enabled;
  221. u32 paddr;
  222. void __iomem *vaddr;
  223. u16 screen_width;
  224. u16 width;
  225. u16 height;
  226. enum omap_color_mode color_mode;
  227. u8 rotation;
  228. enum omap_dss_rotation_type rotation_type;
  229. bool mirror;
  230. u16 pos_x;
  231. u16 pos_y;
  232. u16 out_width; /* if 0, out_width == width */
  233. u16 out_height; /* if 0, out_height == height */
  234. u8 global_alpha;
  235. };
  236. struct omap_overlay {
  237. struct kobject kobj;
  238. struct list_head list;
  239. /* static fields */
  240. const char *name;
  241. int id;
  242. enum omap_color_mode supported_modes;
  243. enum omap_overlay_caps caps;
  244. /* dynamic fields */
  245. struct omap_overlay_manager *manager;
  246. struct omap_overlay_info info;
  247. /* if true, info has been changed, but not applied() yet */
  248. bool info_dirty;
  249. int (*set_manager)(struct omap_overlay *ovl,
  250. struct omap_overlay_manager *mgr);
  251. int (*unset_manager)(struct omap_overlay *ovl);
  252. int (*set_overlay_info)(struct omap_overlay *ovl,
  253. struct omap_overlay_info *info);
  254. void (*get_overlay_info)(struct omap_overlay *ovl,
  255. struct omap_overlay_info *info);
  256. int (*wait_for_go)(struct omap_overlay *ovl);
  257. };
  258. struct omap_overlay_manager_info {
  259. u32 default_color;
  260. enum omap_dss_trans_key_type trans_key_type;
  261. u32 trans_key;
  262. bool trans_enabled;
  263. bool alpha_enabled;
  264. };
  265. struct omap_overlay_manager {
  266. struct kobject kobj;
  267. struct list_head list;
  268. /* static fields */
  269. const char *name;
  270. int id;
  271. enum omap_overlay_manager_caps caps;
  272. int num_overlays;
  273. struct omap_overlay **overlays;
  274. enum omap_display_type supported_displays;
  275. /* dynamic fields */
  276. struct omap_dss_device *device;
  277. struct omap_overlay_manager_info info;
  278. bool device_changed;
  279. /* if true, info has been changed but not applied() yet */
  280. bool info_dirty;
  281. int (*set_device)(struct omap_overlay_manager *mgr,
  282. struct omap_dss_device *dssdev);
  283. int (*unset_device)(struct omap_overlay_manager *mgr);
  284. int (*set_manager_info)(struct omap_overlay_manager *mgr,
  285. struct omap_overlay_manager_info *info);
  286. void (*get_manager_info)(struct omap_overlay_manager *mgr,
  287. struct omap_overlay_manager_info *info);
  288. int (*apply)(struct omap_overlay_manager *mgr);
  289. int (*wait_for_go)(struct omap_overlay_manager *mgr);
  290. int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
  291. int (*enable)(struct omap_overlay_manager *mgr);
  292. int (*disable)(struct omap_overlay_manager *mgr);
  293. };
  294. struct omap_dss_device {
  295. struct device dev;
  296. enum omap_display_type type;
  297. union {
  298. struct {
  299. u8 data_lines;
  300. } dpi;
  301. struct {
  302. u8 channel;
  303. u8 data_lines;
  304. } rfbi;
  305. struct {
  306. u8 datapairs;
  307. } sdi;
  308. struct {
  309. u8 clk_lane;
  310. u8 clk_pol;
  311. u8 data1_lane;
  312. u8 data1_pol;
  313. u8 data2_lane;
  314. u8 data2_pol;
  315. struct {
  316. u16 regn;
  317. u16 regm;
  318. u16 regm3;
  319. u16 regm4;
  320. u16 lp_clk_div;
  321. u16 lck_div;
  322. u16 pck_div;
  323. } div;
  324. bool ext_te;
  325. u8 ext_te_gpio;
  326. } dsi;
  327. struct {
  328. enum omap_dss_venc_type type;
  329. bool invert_polarity;
  330. } venc;
  331. } phy;
  332. struct {
  333. struct omap_video_timings timings;
  334. int acbi; /* ac-bias pin transitions per interrupt */
  335. /* Unit: line clocks */
  336. int acb; /* ac-bias pin frequency */
  337. enum omap_panel_config config;
  338. } panel;
  339. struct {
  340. u8 pixel_size;
  341. struct rfbi_timings rfbi_timings;
  342. } ctrl;
  343. int reset_gpio;
  344. int max_backlight_level;
  345. const char *name;
  346. /* used to match device to driver */
  347. const char *driver_name;
  348. void *data;
  349. struct omap_dss_driver *driver;
  350. /* helper variable for driver suspend/resume */
  351. bool activate_after_resume;
  352. enum omap_display_caps caps;
  353. struct omap_overlay_manager *manager;
  354. enum omap_dss_display_state state;
  355. /* platform specific */
  356. int (*platform_enable)(struct omap_dss_device *dssdev);
  357. void (*platform_disable)(struct omap_dss_device *dssdev);
  358. int (*set_backlight)(struct omap_dss_device *dssdev, int level);
  359. int (*get_backlight)(struct omap_dss_device *dssdev);
  360. };
  361. struct omap_dss_driver {
  362. struct device_driver driver;
  363. int (*probe)(struct omap_dss_device *);
  364. void (*remove)(struct omap_dss_device *);
  365. int (*enable)(struct omap_dss_device *display);
  366. void (*disable)(struct omap_dss_device *display);
  367. int (*suspend)(struct omap_dss_device *display);
  368. int (*resume)(struct omap_dss_device *display);
  369. int (*run_test)(struct omap_dss_device *display, int test);
  370. int (*set_update_mode)(struct omap_dss_device *dssdev,
  371. enum omap_dss_update_mode);
  372. enum omap_dss_update_mode (*get_update_mode)(
  373. struct omap_dss_device *dssdev);
  374. int (*update)(struct omap_dss_device *dssdev,
  375. u16 x, u16 y, u16 w, u16 h);
  376. int (*sync)(struct omap_dss_device *dssdev);
  377. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  378. int (*get_te)(struct omap_dss_device *dssdev);
  379. u8 (*get_rotate)(struct omap_dss_device *dssdev);
  380. int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
  381. bool (*get_mirror)(struct omap_dss_device *dssdev);
  382. int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
  383. int (*memory_read)(struct omap_dss_device *dssdev,
  384. void *buf, size_t size,
  385. u16 x, u16 y, u16 w, u16 h);
  386. void (*get_resolution)(struct omap_dss_device *dssdev,
  387. u16 *xres, u16 *yres);
  388. int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
  389. int (*check_timings)(struct omap_dss_device *dssdev,
  390. struct omap_video_timings *timings);
  391. void (*set_timings)(struct omap_dss_device *dssdev,
  392. struct omap_video_timings *timings);
  393. void (*get_timings)(struct omap_dss_device *dssdev,
  394. struct omap_video_timings *timings);
  395. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  396. u32 (*get_wss)(struct omap_dss_device *dssdev);
  397. };
  398. int omap_dss_register_driver(struct omap_dss_driver *);
  399. void omap_dss_unregister_driver(struct omap_dss_driver *);
  400. int omap_dss_register_device(struct omap_dss_device *);
  401. void omap_dss_unregister_device(struct omap_dss_device *);
  402. void omap_dss_get_device(struct omap_dss_device *dssdev);
  403. void omap_dss_put_device(struct omap_dss_device *dssdev);
  404. #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
  405. struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
  406. struct omap_dss_device *omap_dss_find_device(void *data,
  407. int (*match)(struct omap_dss_device *dssdev, void *data));
  408. int omap_dss_start_device(struct omap_dss_device *dssdev);
  409. void omap_dss_stop_device(struct omap_dss_device *dssdev);
  410. int omap_dss_get_num_overlay_managers(void);
  411. struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
  412. int omap_dss_get_num_overlays(void);
  413. struct omap_overlay *omap_dss_get_overlay(int num);
  414. void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
  415. u16 *xres, u16 *yres);
  416. int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
  417. typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
  418. int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  419. int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  420. int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
  421. int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
  422. unsigned long timeout);
  423. #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
  424. #define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
  425. void omapdss_dsi_vc_enable_hs(int channel, bool enable);
  426. int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
  427. int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
  428. u16 *x, u16 *y, u16 *w, u16 *h,
  429. bool enlarge_update_area);
  430. int omap_dsi_update(struct omap_dss_device *dssdev,
  431. int channel,
  432. u16 x, u16 y, u16 w, u16 h,
  433. void (*callback)(int, void *), void *data);
  434. int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
  435. void omapdss_dsi_display_disable(struct omap_dss_device *dssdev);
  436. int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
  437. void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
  438. void dpi_set_timings(struct omap_dss_device *dssdev,
  439. struct omap_video_timings *timings);
  440. int dpi_check_timings(struct omap_dss_device *dssdev,
  441. struct omap_video_timings *timings);
  442. int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
  443. void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
  444. int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
  445. void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
  446. int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
  447. u16 *x, u16 *y, u16 *w, u16 *h);
  448. int omap_rfbi_update(struct omap_dss_device *dssdev,
  449. u16 x, u16 y, u16 w, u16 h,
  450. void (*callback)(void *), void *data);
  451. #endif