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arch
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arm
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mach-ux500
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include
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mach
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irqs.h

irqs.h 3.7 KB
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  1. /*
    2. 

  2.  *  Copyright (C) 2008 STMicroelectronics
    3. 

  3.  *  Copyright (C) 2009 ST-Ericsson.
    4. 

  4.  *
    5. 

  5.  * This program is free software; you can redistribute it and/or modify
    6. 

  6.  * it under the terms of the GNU General Public License as published by
    7. 

  7.  * the Free Software Foundation; either version 2 of the License, or
    8. 

  8.  * (at your option) any later version.
    9. 

  9.  */
    10. 

  10. #ifndef ASM_ARCH_IRQS_H
    11. 

  11. #define ASM_ARCH_IRQS_H
    12. 

  12. 

  13. #include <mach/irqs-db5500.h>
    14. 

  14. #include <mach/irqs-db8500.h>
    15. 

  15. 

  16. #define IRQ_LOCALTIMER                  29
    17. 

  17. #define IRQ_LOCALWDOG                   30
    18. 

  18. 

  19. /* Shared Peripheral Interrupt (SHPI) */
    20. 

  20. #define IRQ_SHPI_START			32
    21. 

  21. 

  22. /* Interrupt numbers generic for shared peripheral */
    23. 

  23. #define IRQ_MTU0		(IRQ_SHPI_START + 4)
    24. 

  24. #define IRQ_SPI2		(IRQ_SHPI_START + 6)
    25. 

  25. #define IRQ_SPI0		(IRQ_SHPI_START + 8)
    26. 

  26. #define IRQ_UART0		(IRQ_SHPI_START + 11)
    27. 

  27. #define IRQ_I2C3		(IRQ_SHPI_START + 12)
    28. 

  28. #define IRQ_SSP0		(IRQ_SHPI_START + 14)
    29. 

  29. #define IRQ_MTU1		(IRQ_SHPI_START + 17)
    30. 

  30. #define IRQ_RTC_RTT		(IRQ_SHPI_START + 18)
    31. 

  31. #define IRQ_UART1		(IRQ_SHPI_START + 19)
    32. 

  32. #define IRQ_I2C0		(IRQ_SHPI_START + 21)
    33. 

  33. #define IRQ_I2C1		(IRQ_SHPI_START + 22)
    34. 

  34. #define IRQ_USBOTG		(IRQ_SHPI_START + 23)
    35. 

  35. #define IRQ_DMA			(IRQ_SHPI_START + 25)
    36. 

  36. #define IRQ_UART2		(IRQ_SHPI_START + 26)
    37. 

  37. #define IRQ_HSIR_EXCEP		(IRQ_SHPI_START + 29)
    38. 

  38. #define IRQ_MSP0		(IRQ_SHPI_START + 31)
    39. 

  39. #define IRQ_HSIR_CH0_OVRRUN	(IRQ_SHPI_START + 32)
    40. 

  40. #define IRQ_HSIR_CH1_OVRRUN	(IRQ_SHPI_START + 33)
    41. 

  41. #define IRQ_HSIR_CH2_OVRRUN	(IRQ_SHPI_START + 34)
    42. 

  42. #define IRQ_HSIR_CH3_OVRRUN	(IRQ_SHPI_START + 35)
    43. 

  43. #define IRQ_AB8500		(IRQ_SHPI_START + 40)
    44. 

  44. #define IRQ_PRCMU               (IRQ_SHPI_START + 47)
    45. 

  45. #define IRQ_DISP		(IRQ_SHPI_START + 48)
    46. 

  46. #define IRQ_SiPI3		(IRQ_SHPI_START + 49)
    47. 

  47. #define IRQ_I2C4		(IRQ_SHPI_START + 51)
    48. 

  48. #define IRQ_SSP1		(IRQ_SHPI_START + 52)
    49. 

  49. #define IRQ_I2C2		(IRQ_SHPI_START + 55)
    50. 

  50. #define IRQ_SDMMC0		(IRQ_SHPI_START + 60)
    51. 

  51. #define IRQ_MSP1		(IRQ_SHPI_START + 62)
    52. 

  52. #define IRQ_SPI1		(IRQ_SHPI_START + 96)
    53. 

  53. #define IRQ_MSP2		(IRQ_SHPI_START + 98)
    54. 

  54. #define IRQ_SDMMC4		(IRQ_SHPI_START + 99)
    55. 

  55. #define IRQ_HSIRD0		(IRQ_SHPI_START + 104)
    56. 

  56. #define IRQ_HSIRD1		(IRQ_SHPI_START + 105)
    57. 

  57. #define IRQ_HSITD0		(IRQ_SHPI_START + 106)
    58. 

  58. #define IRQ_HSITD1		(IRQ_SHPI_START + 107)
    59. 

  59. #define IRQ_GPIO0		(IRQ_SHPI_START + 119)
    60. 

  60. #define IRQ_GPIO1		(IRQ_SHPI_START + 120)
    61. 

  61. #define IRQ_GPIO2		(IRQ_SHPI_START + 121)
    62. 

  62. #define IRQ_GPIO3		(IRQ_SHPI_START + 122)
    63. 

  63. #define IRQ_GPIO4		(IRQ_SHPI_START + 123)
    64. 

  64. #define IRQ_GPIO5		(IRQ_SHPI_START + 124)
    65. 

  65. #define IRQ_GPIO6		(IRQ_SHPI_START + 125)
    66. 

  66. #define IRQ_GPIO7		(IRQ_SHPI_START + 126)
    67. 

  67. #define IRQ_GPIO8		(IRQ_SHPI_START + 127)
    68. 

  68. 

  69. /* There are 128 shared peripheral interrupts assigned to
    70. 

  70.  * INTID[160:32]. The first 32 interrupts are reserved.
    71. 

  71.  */
    72. 

  72. #define DBX500_NR_INTERNAL_IRQS		161
    73. 

  73. 

  74. /* After chip-specific IRQ numbers we have the GPIO ones */
    75. 

  75. #define NOMADIK_NR_GPIO			288
    76. 

  76. #define NOMADIK_GPIO_TO_IRQ(gpio)	((gpio) + DBX500_NR_INTERNAL_IRQS)
    77. 

  77. #define NOMADIK_IRQ_TO_GPIO(irq)	((irq) - DBX500_NR_INTERNAL_IRQS)
    78. 

  78. #define IRQ_BOARD_START			NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO)
    79. 

  79. 

  80. /* This will be overridden by board-specific irq headers */
    81. 

  81. #define IRQ_BOARD_END			IRQ_BOARD_START
    82. 

  82. 

  83. #ifdef CONFIG_MACH_U8500_MOP
    84. 

  84. #include <mach/irqs-board-mop500.h>
    85. 

  85. #endif
    86. 

  86. 

  87. /*
    88. 

  88.  * After the board specific IRQ:s we reserve a range of IRQ:s in which virtual
    89. 

  89.  * IRQ:s representing modem IRQ:s can be allocated
    90. 

  90.  */
    91. 

  91. #define IRQ_MODEM_EVENTS_BASE (IRQ_BOARD_END + 1)
    92. 

  92. #define IRQ_MODEM_EVENTS_NBR 72
    93. 

  93. #define IRQ_MODEM_EVENTS_END (IRQ_MODEM_EVENTS_BASE + IRQ_MODEM_EVENTS_NBR)
    94. 

  94. 

  95. /* List of virtual IRQ:s that are allocated from the range above */
    96. 

  96. #define MBOX_PAIR0_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 43)
    97. 

  97. #define MBOX_PAIR1_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 45)
    98. 

  98. #define MBOX_PAIR2_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 41)
    99. 

  99. 

  100. #define NR_IRQS				IRQ_MODEM_EVENTS_END
    101. 

  101. 

  102. #endif /* ASM_ARCH_IRQS_H */
    103.