lpd270.c 12 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/lpd270.c
  3. *
  4. * Support for the LogicPD PXA270 Card Engine.
  5. * Derived from the mainstone code, which carries these notices:
  6. *
  7. * Author: Nicolas Pitre
  8. * Created: Nov 05, 2002
  9. * Copyright: MontaVista Software Inc.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/sysdev.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/sched.h>
  20. #include <linux/bitops.h>
  21. #include <linux/fb.h>
  22. #include <linux/ioport.h>
  23. #include <linux/mtd/mtd.h>
  24. #include <linux/mtd/partitions.h>
  25. #include <linux/pwm_backlight.h>
  26. #include <asm/types.h>
  27. #include <asm/setup.h>
  28. #include <asm/memory.h>
  29. #include <asm/mach-types.h>
  30. #include <mach/hardware.h>
  31. #include <asm/irq.h>
  32. #include <asm/sizes.h>
  33. #include <asm/mach/arch.h>
  34. #include <asm/mach/map.h>
  35. #include <asm/mach/irq.h>
  36. #include <asm/mach/flash.h>
  37. #include <mach/pxa27x.h>
  38. #include <mach/gpio.h>
  39. #include <mach/lpd270.h>
  40. #include <mach/audio.h>
  41. #include <mach/pxafb.h>
  42. #include <mach/mmc.h>
  43. #include <mach/irda.h>
  44. #include <mach/ohci.h>
  45. #include "generic.h"
  46. #include "devices.h"
  47. static unsigned long lpd270_pin_config[] __initdata = {
  48. /* Chip Selects */
  49. GPIO15_nCS_1, /* Mainboard Flash */
  50. GPIO78_nCS_2, /* CPLD + Ethernet */
  51. /* LCD - 16bpp Active TFT */
  52. GPIO58_LCD_LDD_0,
  53. GPIO59_LCD_LDD_1,
  54. GPIO60_LCD_LDD_2,
  55. GPIO61_LCD_LDD_3,
  56. GPIO62_LCD_LDD_4,
  57. GPIO63_LCD_LDD_5,
  58. GPIO64_LCD_LDD_6,
  59. GPIO65_LCD_LDD_7,
  60. GPIO66_LCD_LDD_8,
  61. GPIO67_LCD_LDD_9,
  62. GPIO68_LCD_LDD_10,
  63. GPIO69_LCD_LDD_11,
  64. GPIO70_LCD_LDD_12,
  65. GPIO71_LCD_LDD_13,
  66. GPIO72_LCD_LDD_14,
  67. GPIO73_LCD_LDD_15,
  68. GPIO74_LCD_FCLK,
  69. GPIO75_LCD_LCLK,
  70. GPIO76_LCD_PCLK,
  71. GPIO77_LCD_BIAS,
  72. GPIO16_PWM0_OUT, /* Backlight */
  73. /* USB Host */
  74. GPIO88_USBH1_PWR,
  75. GPIO89_USBH1_PEN,
  76. /* AC97 */
  77. GPIO28_AC97_BITCLK,
  78. GPIO29_AC97_SDATA_IN_0,
  79. GPIO30_AC97_SDATA_OUT,
  80. GPIO31_AC97_SYNC,
  81. GPIO45_AC97_SYSCLK,
  82. GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
  83. };
  84. static unsigned int lpd270_irq_enabled;
  85. static void lpd270_mask_irq(unsigned int irq)
  86. {
  87. int lpd270_irq = irq - LPD270_IRQ(0);
  88. __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
  89. lpd270_irq_enabled &= ~(1 << lpd270_irq);
  90. __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
  91. }
  92. static void lpd270_unmask_irq(unsigned int irq)
  93. {
  94. int lpd270_irq = irq - LPD270_IRQ(0);
  95. lpd270_irq_enabled |= 1 << lpd270_irq;
  96. __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
  97. }
  98. static struct irq_chip lpd270_irq_chip = {
  99. .name = "CPLD",
  100. .ack = lpd270_mask_irq,
  101. .mask = lpd270_mask_irq,
  102. .unmask = lpd270_unmask_irq,
  103. };
  104. static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
  105. {
  106. unsigned long pending;
  107. pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
  108. do {
  109. desc->chip->ack(irq); /* clear useless edge notification */
  110. if (likely(pending)) {
  111. irq = LPD270_IRQ(0) + __ffs(pending);
  112. generic_handle_irq(irq);
  113. pending = __raw_readw(LPD270_INT_STATUS) &
  114. lpd270_irq_enabled;
  115. }
  116. } while (pending);
  117. }
  118. static void __init lpd270_init_irq(void)
  119. {
  120. int irq;
  121. pxa27x_init_irq();
  122. __raw_writew(0, LPD270_INT_MASK);
  123. __raw_writew(0, LPD270_INT_STATUS);
  124. /* setup extra LogicPD PXA270 irqs */
  125. for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
  126. set_irq_chip(irq, &lpd270_irq_chip);
  127. set_irq_handler(irq, handle_level_irq);
  128. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  129. }
  130. set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
  131. set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
  132. }
  133. #ifdef CONFIG_PM
  134. static int lpd270_irq_resume(struct sys_device *dev)
  135. {
  136. __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
  137. return 0;
  138. }
  139. static struct sysdev_class lpd270_irq_sysclass = {
  140. .name = "cpld_irq",
  141. .resume = lpd270_irq_resume,
  142. };
  143. static struct sys_device lpd270_irq_device = {
  144. .cls = &lpd270_irq_sysclass,
  145. };
  146. static int __init lpd270_irq_device_init(void)
  147. {
  148. int ret = -ENODEV;
  149. if (machine_is_logicpd_pxa270()) {
  150. ret = sysdev_class_register(&lpd270_irq_sysclass);
  151. if (ret == 0)
  152. ret = sysdev_register(&lpd270_irq_device);
  153. }
  154. return ret;
  155. }
  156. device_initcall(lpd270_irq_device_init);
  157. #endif
  158. static struct resource smc91x_resources[] = {
  159. [0] = {
  160. .start = LPD270_ETH_PHYS,
  161. .end = (LPD270_ETH_PHYS + 0xfffff),
  162. .flags = IORESOURCE_MEM,
  163. },
  164. [1] = {
  165. .start = LPD270_ETHERNET_IRQ,
  166. .end = LPD270_ETHERNET_IRQ,
  167. .flags = IORESOURCE_IRQ,
  168. },
  169. };
  170. static struct platform_device smc91x_device = {
  171. .name = "smc91x",
  172. .id = 0,
  173. .num_resources = ARRAY_SIZE(smc91x_resources),
  174. .resource = smc91x_resources,
  175. };
  176. static struct resource lpd270_flash_resources[] = {
  177. [0] = {
  178. .start = PXA_CS0_PHYS,
  179. .end = PXA_CS0_PHYS + SZ_64M - 1,
  180. .flags = IORESOURCE_MEM,
  181. },
  182. [1] = {
  183. .start = PXA_CS1_PHYS,
  184. .end = PXA_CS1_PHYS + SZ_64M - 1,
  185. .flags = IORESOURCE_MEM,
  186. },
  187. };
  188. static struct mtd_partition lpd270_flash0_partitions[] = {
  189. {
  190. .name = "Bootloader",
  191. .size = 0x00040000,
  192. .offset = 0,
  193. .mask_flags = MTD_WRITEABLE /* force read-only */
  194. }, {
  195. .name = "Kernel",
  196. .size = 0x00400000,
  197. .offset = 0x00040000,
  198. }, {
  199. .name = "Filesystem",
  200. .size = MTDPART_SIZ_FULL,
  201. .offset = 0x00440000
  202. },
  203. };
  204. static struct flash_platform_data lpd270_flash_data[2] = {
  205. {
  206. .name = "processor-flash",
  207. .map_name = "cfi_probe",
  208. .parts = lpd270_flash0_partitions,
  209. .nr_parts = ARRAY_SIZE(lpd270_flash0_partitions),
  210. }, {
  211. .name = "mainboard-flash",
  212. .map_name = "cfi_probe",
  213. .parts = NULL,
  214. .nr_parts = 0,
  215. }
  216. };
  217. static struct platform_device lpd270_flash_device[2] = {
  218. {
  219. .name = "pxa2xx-flash",
  220. .id = 0,
  221. .dev = {
  222. .platform_data = &lpd270_flash_data[0],
  223. },
  224. .resource = &lpd270_flash_resources[0],
  225. .num_resources = 1,
  226. }, {
  227. .name = "pxa2xx-flash",
  228. .id = 1,
  229. .dev = {
  230. .platform_data = &lpd270_flash_data[1],
  231. },
  232. .resource = &lpd270_flash_resources[1],
  233. .num_resources = 1,
  234. },
  235. };
  236. static struct platform_pwm_backlight_data lpd270_backlight_data = {
  237. .pwm_id = 0,
  238. .max_brightness = 1,
  239. .dft_brightness = 1,
  240. .pwm_period_ns = 78770,
  241. };
  242. static struct platform_device lpd270_backlight_device = {
  243. .name = "pwm-backlight",
  244. .dev = {
  245. .parent = &pxa27x_device_pwm0.dev,
  246. .platform_data = &lpd270_backlight_data,
  247. },
  248. };
  249. /* 5.7" TFT QVGA (LoLo display number 1) */
  250. static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
  251. .pixclock = 150000,
  252. .xres = 320,
  253. .yres = 240,
  254. .bpp = 16,
  255. .hsync_len = 0x14,
  256. .left_margin = 0x28,
  257. .right_margin = 0x0a,
  258. .vsync_len = 0x02,
  259. .upper_margin = 0x08,
  260. .lower_margin = 0x14,
  261. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  262. };
  263. static struct pxafb_mach_info sharp_lq057q3dc02 = {
  264. .modes = &sharp_lq057q3dc02_mode,
  265. .num_modes = 1,
  266. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
  267. LCD_ALTERNATE_MAPPING,
  268. };
  269. /* 12.1" TFT SVGA (LoLo display number 2) */
  270. static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
  271. .pixclock = 50000,
  272. .xres = 800,
  273. .yres = 600,
  274. .bpp = 16,
  275. .hsync_len = 0x05,
  276. .left_margin = 0x52,
  277. .right_margin = 0x05,
  278. .vsync_len = 0x04,
  279. .upper_margin = 0x14,
  280. .lower_margin = 0x0a,
  281. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  282. };
  283. static struct pxafb_mach_info sharp_lq121s1dg31 = {
  284. .modes = &sharp_lq121s1dg31_mode,
  285. .num_modes = 1,
  286. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
  287. LCD_ALTERNATE_MAPPING,
  288. };
  289. /* 3.6" TFT QVGA (LoLo display number 3) */
  290. static struct pxafb_mode_info sharp_lq036q1da01_mode = {
  291. .pixclock = 150000,
  292. .xres = 320,
  293. .yres = 240,
  294. .bpp = 16,
  295. .hsync_len = 0x0e,
  296. .left_margin = 0x04,
  297. .right_margin = 0x0a,
  298. .vsync_len = 0x03,
  299. .upper_margin = 0x03,
  300. .lower_margin = 0x03,
  301. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  302. };
  303. static struct pxafb_mach_info sharp_lq036q1da01 = {
  304. .modes = &sharp_lq036q1da01_mode,
  305. .num_modes = 1,
  306. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
  307. LCD_ALTERNATE_MAPPING,
  308. };
  309. /* 6.4" TFT VGA (LoLo display number 5) */
  310. static struct pxafb_mode_info sharp_lq64d343_mode = {
  311. .pixclock = 25000,
  312. .xres = 640,
  313. .yres = 480,
  314. .bpp = 16,
  315. .hsync_len = 0x31,
  316. .left_margin = 0x89,
  317. .right_margin = 0x19,
  318. .vsync_len = 0x12,
  319. .upper_margin = 0x22,
  320. .lower_margin = 0x00,
  321. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  322. };
  323. static struct pxafb_mach_info sharp_lq64d343 = {
  324. .modes = &sharp_lq64d343_mode,
  325. .num_modes = 1,
  326. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
  327. LCD_ALTERNATE_MAPPING,
  328. };
  329. /* 10.4" TFT VGA (LoLo display number 7) */
  330. static struct pxafb_mode_info sharp_lq10d368_mode = {
  331. .pixclock = 25000,
  332. .xres = 640,
  333. .yres = 480,
  334. .bpp = 16,
  335. .hsync_len = 0x31,
  336. .left_margin = 0x89,
  337. .right_margin = 0x19,
  338. .vsync_len = 0x12,
  339. .upper_margin = 0x22,
  340. .lower_margin = 0x00,
  341. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  342. };
  343. static struct pxafb_mach_info sharp_lq10d368 = {
  344. .modes = &sharp_lq10d368_mode,
  345. .num_modes = 1,
  346. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
  347. LCD_ALTERNATE_MAPPING,
  348. };
  349. /* 3.5" TFT QVGA (LoLo display number 8) */
  350. static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
  351. .pixclock = 150000,
  352. .xres = 240,
  353. .yres = 320,
  354. .bpp = 16,
  355. .hsync_len = 0x0e,
  356. .left_margin = 0x0a,
  357. .right_margin = 0x0a,
  358. .vsync_len = 0x03,
  359. .upper_margin = 0x05,
  360. .lower_margin = 0x14,
  361. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  362. };
  363. static struct pxafb_mach_info sharp_lq035q7db02_20 = {
  364. .modes = &sharp_lq035q7db02_20_mode,
  365. .num_modes = 1,
  366. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
  367. LCD_ALTERNATE_MAPPING,
  368. };
  369. static struct pxafb_mach_info *lpd270_lcd_to_use;
  370. static int __init lpd270_set_lcd(char *str)
  371. {
  372. if (!strnicmp(str, "lq057q3dc02", 11)) {
  373. lpd270_lcd_to_use = &sharp_lq057q3dc02;
  374. } else if (!strnicmp(str, "lq121s1dg31", 11)) {
  375. lpd270_lcd_to_use = &sharp_lq121s1dg31;
  376. } else if (!strnicmp(str, "lq036q1da01", 11)) {
  377. lpd270_lcd_to_use = &sharp_lq036q1da01;
  378. } else if (!strnicmp(str, "lq64d343", 8)) {
  379. lpd270_lcd_to_use = &sharp_lq64d343;
  380. } else if (!strnicmp(str, "lq10d368", 8)) {
  381. lpd270_lcd_to_use = &sharp_lq10d368;
  382. } else if (!strnicmp(str, "lq035q7db02-20", 14)) {
  383. lpd270_lcd_to_use = &sharp_lq035q7db02_20;
  384. } else {
  385. printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
  386. }
  387. return 1;
  388. }
  389. __setup("lcd=", lpd270_set_lcd);
  390. static struct platform_device *platform_devices[] __initdata = {
  391. &smc91x_device,
  392. &lpd270_backlight_device,
  393. &lpd270_flash_device[0],
  394. &lpd270_flash_device[1],
  395. };
  396. static struct pxaohci_platform_data lpd270_ohci_platform_data = {
  397. .port_mode = PMM_PERPORT_MODE,
  398. .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
  399. };
  400. static void __init lpd270_init(void)
  401. {
  402. pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
  403. pxa_set_ffuart_info(NULL);
  404. pxa_set_btuart_info(NULL);
  405. pxa_set_stuart_info(NULL);
  406. lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
  407. lpd270_flash_data[1].width = 4;
  408. /*
  409. * System bus arbiter setting:
  410. * - Core_Park
  411. * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
  412. */
  413. ARB_CNTRL = ARB_CORE_PARK | 0x234;
  414. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  415. pxa_set_ac97_info(NULL);
  416. if (lpd270_lcd_to_use != NULL)
  417. set_pxa_fb_info(lpd270_lcd_to_use);
  418. pxa_set_ohci_info(&lpd270_ohci_platform_data);
  419. }
  420. static struct map_desc lpd270_io_desc[] __initdata = {
  421. {
  422. .virtual = LPD270_CPLD_VIRT,
  423. .pfn = __phys_to_pfn(LPD270_CPLD_PHYS),
  424. .length = LPD270_CPLD_SIZE,
  425. .type = MT_DEVICE,
  426. },
  427. };
  428. static void __init lpd270_map_io(void)
  429. {
  430. pxa_map_io();
  431. iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
  432. /* for use I SRAM as framebuffer. */
  433. PSLR |= 0x00000F04;
  434. PCFR = 0x00000066;
  435. }
  436. MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
  437. /* Maintainer: Peter Barada */
  438. .boot_params = 0xa0000100,
  439. .map_io = lpd270_map_io,
  440. .nr_irqs = LPD270_NR_IRQS,
  441. .init_irq = lpd270_init_irq,
  442. .timer = &pxa_timer,
  443. .init_machine = lpd270_init,
  444. MACHINE_END