board-3430sdp.c 19 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-3430sdp.c
  3. *
  4. * Copyright (C) 2007 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-generic.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/input.h>
  19. #include <linux/input/matrix_keypad.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/spi/ads7846.h>
  22. #include <linux/i2c/twl.h>
  23. #include <linux/regulator/machine.h>
  24. #include <linux/io.h>
  25. #include <linux/gpio.h>
  26. #include <linux/mmc/host.h>
  27. #include <mach/hardware.h>
  28. #include <asm/mach-types.h>
  29. #include <asm/mach/arch.h>
  30. #include <asm/mach/map.h>
  31. #include <plat/mcspi.h>
  32. #include <plat/board.h>
  33. #include <plat/usb.h>
  34. #include <plat/common.h>
  35. #include <plat/dma.h>
  36. #include <plat/gpmc.h>
  37. #include <plat/display.h>
  38. #include <plat/gpmc-smc91x.h>
  39. #include "board-flash.h"
  40. #include "mux.h"
  41. #include "sdram-qimonda-hyb18m512160af-6.h"
  42. #include "hsmmc.h"
  43. #include "pm.h"
  44. #include "control.h"
  45. #define CONFIG_DISABLE_HFCLK 1
  46. #define SDP3430_TS_GPIO_IRQ_SDPV1 3
  47. #define SDP3430_TS_GPIO_IRQ_SDPV2 2
  48. #define ENABLE_VAUX3_DEDICATED 0x03
  49. #define ENABLE_VAUX3_DEV_GRP 0x20
  50. #define TWL4030_MSECURE_GPIO 22
  51. /* FIXME: These values need to be updated based on more profiling on 3430sdp*/
  52. static struct cpuidle_params omap3_cpuidle_params_table[] = {
  53. /* C1 */
  54. {1, 2, 2, 5},
  55. /* C2 */
  56. {1, 10, 10, 30},
  57. /* C3 */
  58. {1, 50, 50, 300},
  59. /* C4 */
  60. {1, 1500, 1800, 4000},
  61. /* C5 */
  62. {1, 2500, 7500, 12000},
  63. /* C6 */
  64. {1, 3000, 8500, 15000},
  65. /* C7 */
  66. {1, 10000, 30000, 300000},
  67. };
  68. static uint32_t board_keymap[] = {
  69. KEY(0, 0, KEY_LEFT),
  70. KEY(0, 1, KEY_RIGHT),
  71. KEY(0, 2, KEY_A),
  72. KEY(0, 3, KEY_B),
  73. KEY(0, 4, KEY_C),
  74. KEY(1, 0, KEY_DOWN),
  75. KEY(1, 1, KEY_UP),
  76. KEY(1, 2, KEY_E),
  77. KEY(1, 3, KEY_F),
  78. KEY(1, 4, KEY_G),
  79. KEY(2, 0, KEY_ENTER),
  80. KEY(2, 1, KEY_I),
  81. KEY(2, 2, KEY_J),
  82. KEY(2, 3, KEY_K),
  83. KEY(2, 4, KEY_3),
  84. KEY(3, 0, KEY_M),
  85. KEY(3, 1, KEY_N),
  86. KEY(3, 2, KEY_O),
  87. KEY(3, 3, KEY_P),
  88. KEY(3, 4, KEY_Q),
  89. KEY(4, 0, KEY_R),
  90. KEY(4, 1, KEY_4),
  91. KEY(4, 2, KEY_T),
  92. KEY(4, 3, KEY_U),
  93. KEY(4, 4, KEY_D),
  94. KEY(5, 0, KEY_V),
  95. KEY(5, 1, KEY_W),
  96. KEY(5, 2, KEY_L),
  97. KEY(5, 3, KEY_S),
  98. KEY(5, 4, KEY_H),
  99. 0
  100. };
  101. static struct matrix_keymap_data board_map_data = {
  102. .keymap = board_keymap,
  103. .keymap_size = ARRAY_SIZE(board_keymap),
  104. };
  105. static struct twl4030_keypad_data sdp3430_kp_data = {
  106. .keymap_data = &board_map_data,
  107. .rows = 5,
  108. .cols = 6,
  109. .rep = 1,
  110. };
  111. static int ts_gpio; /* Needed for ads7846_get_pendown_state */
  112. /**
  113. * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq
  114. *
  115. * @return - void. If request gpio fails then Flag KERN_ERR.
  116. */
  117. static void ads7846_dev_init(void)
  118. {
  119. if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) {
  120. printk(KERN_ERR "can't get ads746 pen down GPIO\n");
  121. return;
  122. }
  123. gpio_direction_input(ts_gpio);
  124. gpio_set_debounce(ts_gpio, 310);
  125. }
  126. static int ads7846_get_pendown_state(void)
  127. {
  128. return !gpio_get_value(ts_gpio);
  129. }
  130. static struct ads7846_platform_data tsc2046_config __initdata = {
  131. .get_pendown_state = ads7846_get_pendown_state,
  132. .keep_vref_on = 1,
  133. .wakeup = true,
  134. };
  135. static struct omap2_mcspi_device_config tsc2046_mcspi_config = {
  136. .turbo_mode = 0,
  137. .single_channel = 1, /* 0: slave, 1: master */
  138. };
  139. static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
  140. [0] = {
  141. /*
  142. * TSC2046 operates at a max freqency of 2MHz, so
  143. * operate slightly below at 1.5MHz
  144. */
  145. .modalias = "ads7846",
  146. .bus_num = 1,
  147. .chip_select = 0,
  148. .max_speed_hz = 1500000,
  149. .controller_data = &tsc2046_mcspi_config,
  150. .irq = 0,
  151. .platform_data = &tsc2046_config,
  152. },
  153. };
  154. #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
  155. #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
  156. static unsigned backlight_gpio;
  157. static unsigned enable_gpio;
  158. static int lcd_enabled;
  159. static int dvi_enabled;
  160. static void __init sdp3430_display_init(void)
  161. {
  162. int r;
  163. enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO;
  164. backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO;
  165. r = gpio_request(enable_gpio, "LCD reset");
  166. if (r) {
  167. printk(KERN_ERR "failed to get LCD reset GPIO\n");
  168. goto err0;
  169. }
  170. r = gpio_request(backlight_gpio, "LCD Backlight");
  171. if (r) {
  172. printk(KERN_ERR "failed to get LCD backlight GPIO\n");
  173. goto err1;
  174. }
  175. gpio_direction_output(enable_gpio, 0);
  176. gpio_direction_output(backlight_gpio, 0);
  177. return;
  178. err1:
  179. gpio_free(enable_gpio);
  180. err0:
  181. return;
  182. }
  183. static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
  184. {
  185. if (dvi_enabled) {
  186. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  187. return -EINVAL;
  188. }
  189. gpio_direction_output(enable_gpio, 1);
  190. gpio_direction_output(backlight_gpio, 1);
  191. lcd_enabled = 1;
  192. return 0;
  193. }
  194. static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
  195. {
  196. lcd_enabled = 0;
  197. gpio_direction_output(enable_gpio, 0);
  198. gpio_direction_output(backlight_gpio, 0);
  199. }
  200. static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
  201. {
  202. if (lcd_enabled) {
  203. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  204. return -EINVAL;
  205. }
  206. dvi_enabled = 1;
  207. return 0;
  208. }
  209. static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
  210. {
  211. dvi_enabled = 0;
  212. }
  213. static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
  214. {
  215. return 0;
  216. }
  217. static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
  218. {
  219. }
  220. static struct omap_dss_device sdp3430_lcd_device = {
  221. .name = "lcd",
  222. .driver_name = "sharp_ls_panel",
  223. .type = OMAP_DISPLAY_TYPE_DPI,
  224. .phy.dpi.data_lines = 16,
  225. .platform_enable = sdp3430_panel_enable_lcd,
  226. .platform_disable = sdp3430_panel_disable_lcd,
  227. };
  228. static struct omap_dss_device sdp3430_dvi_device = {
  229. .name = "dvi",
  230. .driver_name = "generic_panel",
  231. .type = OMAP_DISPLAY_TYPE_DPI,
  232. .phy.dpi.data_lines = 24,
  233. .platform_enable = sdp3430_panel_enable_dvi,
  234. .platform_disable = sdp3430_panel_disable_dvi,
  235. };
  236. static struct omap_dss_device sdp3430_tv_device = {
  237. .name = "tv",
  238. .driver_name = "venc",
  239. .type = OMAP_DISPLAY_TYPE_VENC,
  240. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  241. .platform_enable = sdp3430_panel_enable_tv,
  242. .platform_disable = sdp3430_panel_disable_tv,
  243. };
  244. static struct omap_dss_device *sdp3430_dss_devices[] = {
  245. &sdp3430_lcd_device,
  246. &sdp3430_dvi_device,
  247. &sdp3430_tv_device,
  248. };
  249. static struct omap_dss_board_info sdp3430_dss_data = {
  250. .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
  251. .devices = sdp3430_dss_devices,
  252. .default_device = &sdp3430_lcd_device,
  253. };
  254. static struct platform_device sdp3430_dss_device = {
  255. .name = "omapdss",
  256. .id = -1,
  257. .dev = {
  258. .platform_data = &sdp3430_dss_data,
  259. },
  260. };
  261. static struct regulator_consumer_supply sdp3430_vdda_dac_supply = {
  262. .supply = "vdda_dac",
  263. .dev = &sdp3430_dss_device.dev,
  264. };
  265. static struct platform_device *sdp3430_devices[] __initdata = {
  266. &sdp3430_dss_device,
  267. };
  268. static struct omap_board_config_kernel sdp3430_config[] __initdata = {
  269. };
  270. static void __init omap_3430sdp_init_irq(void)
  271. {
  272. omap_board_config = sdp3430_config;
  273. omap_board_config_size = ARRAY_SIZE(sdp3430_config);
  274. omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
  275. omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
  276. omap_init_irq();
  277. omap_gpio_init();
  278. }
  279. static int sdp3430_batt_table[] = {
  280. /* 0 C*/
  281. 30800, 29500, 28300, 27100,
  282. 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
  283. 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
  284. 11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
  285. 8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
  286. 5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
  287. 4040, 3910, 3790, 3670, 3550
  288. };
  289. static struct twl4030_bci_platform_data sdp3430_bci_data = {
  290. .battery_tmp_tbl = sdp3430_batt_table,
  291. .tblsize = ARRAY_SIZE(sdp3430_batt_table),
  292. };
  293. static struct omap2_hsmmc_info mmc[] = {
  294. {
  295. .mmc = 1,
  296. /* 8 bits (default) requires S6.3 == ON,
  297. * so the SIM card isn't used; else 4 bits.
  298. */
  299. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  300. .gpio_wp = 4,
  301. },
  302. {
  303. .mmc = 2,
  304. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  305. .gpio_wp = 7,
  306. },
  307. {} /* Terminator */
  308. };
  309. static struct regulator_consumer_supply sdp3430_vmmc1_supply = {
  310. .supply = "vmmc",
  311. };
  312. static struct regulator_consumer_supply sdp3430_vsim_supply = {
  313. .supply = "vmmc_aux",
  314. };
  315. static struct regulator_consumer_supply sdp3430_vmmc2_supply = {
  316. .supply = "vmmc",
  317. };
  318. static int sdp3430_twl_gpio_setup(struct device *dev,
  319. unsigned gpio, unsigned ngpio)
  320. {
  321. /* gpio + 0 is "mmc0_cd" (input/IRQ),
  322. * gpio + 1 is "mmc1_cd" (input/IRQ)
  323. */
  324. mmc[0].gpio_cd = gpio + 0;
  325. mmc[1].gpio_cd = gpio + 1;
  326. omap2_hsmmc_init(mmc);
  327. /* link regulators to MMC adapters ... we "know" the
  328. * regulators will be set up only *after* we return.
  329. */
  330. sdp3430_vmmc1_supply.dev = mmc[0].dev;
  331. sdp3430_vsim_supply.dev = mmc[0].dev;
  332. sdp3430_vmmc2_supply.dev = mmc[1].dev;
  333. /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
  334. gpio_request(gpio + 7, "sub_lcd_en_bkl");
  335. gpio_direction_output(gpio + 7, 0);
  336. /* gpio + 15 is "sub_lcd_nRST" (output) */
  337. gpio_request(gpio + 15, "sub_lcd_nRST");
  338. gpio_direction_output(gpio + 15, 0);
  339. return 0;
  340. }
  341. static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
  342. .gpio_base = OMAP_MAX_GPIO_LINES,
  343. .irq_base = TWL4030_GPIO_IRQ_BASE,
  344. .irq_end = TWL4030_GPIO_IRQ_END,
  345. .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
  346. | BIT(16) | BIT(17),
  347. .setup = sdp3430_twl_gpio_setup,
  348. };
  349. static struct twl4030_usb_data sdp3430_usb_data = {
  350. .usb_mode = T2_USB_MODE_ULPI,
  351. };
  352. static struct twl4030_madc_platform_data sdp3430_madc_data = {
  353. .irq_line = 1,
  354. };
  355. /*
  356. * Apply all the fixed voltages since most versions of U-Boot
  357. * don't bother with that initialization.
  358. */
  359. /* VAUX1 for mainboard (irda and sub-lcd) */
  360. static struct regulator_init_data sdp3430_vaux1 = {
  361. .constraints = {
  362. .min_uV = 2800000,
  363. .max_uV = 2800000,
  364. .apply_uV = true,
  365. .valid_modes_mask = REGULATOR_MODE_NORMAL
  366. | REGULATOR_MODE_STANDBY,
  367. .valid_ops_mask = REGULATOR_CHANGE_MODE
  368. | REGULATOR_CHANGE_STATUS,
  369. },
  370. };
  371. /* VAUX2 for camera module */
  372. static struct regulator_init_data sdp3430_vaux2 = {
  373. .constraints = {
  374. .min_uV = 2800000,
  375. .max_uV = 2800000,
  376. .apply_uV = true,
  377. .valid_modes_mask = REGULATOR_MODE_NORMAL
  378. | REGULATOR_MODE_STANDBY,
  379. .valid_ops_mask = REGULATOR_CHANGE_MODE
  380. | REGULATOR_CHANGE_STATUS,
  381. },
  382. };
  383. /* VAUX3 for LCD board */
  384. static struct regulator_init_data sdp3430_vaux3 = {
  385. .constraints = {
  386. .min_uV = 2800000,
  387. .max_uV = 2800000,
  388. .apply_uV = true,
  389. .valid_modes_mask = REGULATOR_MODE_NORMAL
  390. | REGULATOR_MODE_STANDBY,
  391. .valid_ops_mask = REGULATOR_CHANGE_MODE
  392. | REGULATOR_CHANGE_STATUS,
  393. },
  394. };
  395. /* VAUX4 for OMAP VDD_CSI2 (camera) */
  396. static struct regulator_init_data sdp3430_vaux4 = {
  397. .constraints = {
  398. .min_uV = 1800000,
  399. .max_uV = 1800000,
  400. .apply_uV = true,
  401. .valid_modes_mask = REGULATOR_MODE_NORMAL
  402. | REGULATOR_MODE_STANDBY,
  403. .valid_ops_mask = REGULATOR_CHANGE_MODE
  404. | REGULATOR_CHANGE_STATUS,
  405. },
  406. };
  407. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  408. static struct regulator_init_data sdp3430_vmmc1 = {
  409. .constraints = {
  410. .min_uV = 1850000,
  411. .max_uV = 3150000,
  412. .valid_modes_mask = REGULATOR_MODE_NORMAL
  413. | REGULATOR_MODE_STANDBY,
  414. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  415. | REGULATOR_CHANGE_MODE
  416. | REGULATOR_CHANGE_STATUS,
  417. },
  418. .num_consumer_supplies = 1,
  419. .consumer_supplies = &sdp3430_vmmc1_supply,
  420. };
  421. /* VMMC2 for MMC2 card */
  422. static struct regulator_init_data sdp3430_vmmc2 = {
  423. .constraints = {
  424. .min_uV = 1850000,
  425. .max_uV = 1850000,
  426. .apply_uV = true,
  427. .valid_modes_mask = REGULATOR_MODE_NORMAL
  428. | REGULATOR_MODE_STANDBY,
  429. .valid_ops_mask = REGULATOR_CHANGE_MODE
  430. | REGULATOR_CHANGE_STATUS,
  431. },
  432. .num_consumer_supplies = 1,
  433. .consumer_supplies = &sdp3430_vmmc2_supply,
  434. };
  435. /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
  436. static struct regulator_init_data sdp3430_vsim = {
  437. .constraints = {
  438. .min_uV = 1800000,
  439. .max_uV = 3000000,
  440. .valid_modes_mask = REGULATOR_MODE_NORMAL
  441. | REGULATOR_MODE_STANDBY,
  442. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  443. | REGULATOR_CHANGE_MODE
  444. | REGULATOR_CHANGE_STATUS,
  445. },
  446. .num_consumer_supplies = 1,
  447. .consumer_supplies = &sdp3430_vsim_supply,
  448. };
  449. /* VDAC for DSS driving S-Video */
  450. static struct regulator_init_data sdp3430_vdac = {
  451. .constraints = {
  452. .min_uV = 1800000,
  453. .max_uV = 1800000,
  454. .apply_uV = true,
  455. .valid_modes_mask = REGULATOR_MODE_NORMAL
  456. | REGULATOR_MODE_STANDBY,
  457. .valid_ops_mask = REGULATOR_CHANGE_MODE
  458. | REGULATOR_CHANGE_STATUS,
  459. },
  460. .num_consumer_supplies = 1,
  461. .consumer_supplies = &sdp3430_vdda_dac_supply,
  462. };
  463. /* VPLL2 for digital video outputs */
  464. static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
  465. {
  466. .supply = "vdds_dsi",
  467. .dev = &sdp3430_dss_device.dev,
  468. }
  469. };
  470. static struct regulator_init_data sdp3430_vpll2 = {
  471. .constraints = {
  472. .name = "VDVI",
  473. .min_uV = 1800000,
  474. .max_uV = 1800000,
  475. .apply_uV = true,
  476. .valid_modes_mask = REGULATOR_MODE_NORMAL
  477. | REGULATOR_MODE_STANDBY,
  478. .valid_ops_mask = REGULATOR_CHANGE_MODE
  479. | REGULATOR_CHANGE_STATUS,
  480. },
  481. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies),
  482. .consumer_supplies = sdp3430_vpll2_supplies,
  483. };
  484. static struct twl4030_codec_audio_data sdp3430_audio = {
  485. .audio_mclk = 26000000,
  486. };
  487. static struct twl4030_codec_data sdp3430_codec = {
  488. .audio_mclk = 26000000,
  489. .audio = &sdp3430_audio,
  490. };
  491. static struct twl4030_platform_data sdp3430_twldata = {
  492. .irq_base = TWL4030_IRQ_BASE,
  493. .irq_end = TWL4030_IRQ_END,
  494. /* platform_data for children goes here */
  495. .bci = &sdp3430_bci_data,
  496. .gpio = &sdp3430_gpio_data,
  497. .madc = &sdp3430_madc_data,
  498. .keypad = &sdp3430_kp_data,
  499. .usb = &sdp3430_usb_data,
  500. .codec = &sdp3430_codec,
  501. .vaux1 = &sdp3430_vaux1,
  502. .vaux2 = &sdp3430_vaux2,
  503. .vaux3 = &sdp3430_vaux3,
  504. .vaux4 = &sdp3430_vaux4,
  505. .vmmc1 = &sdp3430_vmmc1,
  506. .vmmc2 = &sdp3430_vmmc2,
  507. .vsim = &sdp3430_vsim,
  508. .vdac = &sdp3430_vdac,
  509. .vpll2 = &sdp3430_vpll2,
  510. };
  511. static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = {
  512. {
  513. I2C_BOARD_INFO("twl4030", 0x48),
  514. .flags = I2C_CLIENT_WAKE,
  515. .irq = INT_34XX_SYS_NIRQ,
  516. .platform_data = &sdp3430_twldata,
  517. },
  518. };
  519. static int __init omap3430_i2c_init(void)
  520. {
  521. /* i2c1 for PMIC only */
  522. omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo,
  523. ARRAY_SIZE(sdp3430_i2c_boardinfo));
  524. /* i2c2 on camera connector (for sensor control) and optional isp1301 */
  525. omap_register_i2c_bus(2, 400, NULL, 0);
  526. /* i2c3 on display connector (for DVI, tfp410) */
  527. omap_register_i2c_bus(3, 400, NULL, 0);
  528. return 0;
  529. }
  530. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  531. static struct omap_smc91x_platform_data board_smc91x_data = {
  532. .cs = 3,
  533. .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
  534. IORESOURCE_IRQ_LOWLEVEL,
  535. };
  536. static void __init board_smc91x_init(void)
  537. {
  538. if (omap_rev() > OMAP3430_REV_ES1_0)
  539. board_smc91x_data.gpio_irq = 6;
  540. else
  541. board_smc91x_data.gpio_irq = 29;
  542. gpmc_smc91x_init(&board_smc91x_data);
  543. }
  544. #else
  545. static inline void board_smc91x_init(void)
  546. {
  547. }
  548. #endif
  549. static void enable_board_wakeup_source(void)
  550. {
  551. /* T2 interrupt line (keypad) */
  552. omap_mux_init_signal("sys_nirq",
  553. OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  554. }
  555. static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
  556. .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
  557. .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
  558. .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
  559. .phy_reset = true,
  560. .reset_gpio_port[0] = 57,
  561. .reset_gpio_port[1] = 61,
  562. .reset_gpio_port[2] = -EINVAL
  563. };
  564. #ifdef CONFIG_OMAP_MUX
  565. static struct omap_board_mux board_mux[] __initdata = {
  566. { .reg_offset = OMAP_MUX_TERMINATOR },
  567. };
  568. #else
  569. #define board_mux NULL
  570. #endif
  571. /*
  572. * SDP3430 V2 Board CS organization
  573. * Different from SDP3430 V1. Now 4 switches used to specify CS
  574. *
  575. * See also the Switch S8 settings in the comments.
  576. */
  577. static char chip_sel_3430[][GPMC_CS_NUM] = {
  578. {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
  579. {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
  580. {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
  581. };
  582. static struct mtd_partition sdp_nor_partitions[] = {
  583. /* bootloader (U-Boot, etc) in first sector */
  584. {
  585. .name = "Bootloader-NOR",
  586. .offset = 0,
  587. .size = SZ_256K,
  588. .mask_flags = MTD_WRITEABLE, /* force read-only */
  589. },
  590. /* bootloader params in the next sector */
  591. {
  592. .name = "Params-NOR",
  593. .offset = MTDPART_OFS_APPEND,
  594. .size = SZ_256K,
  595. .mask_flags = 0,
  596. },
  597. /* kernel */
  598. {
  599. .name = "Kernel-NOR",
  600. .offset = MTDPART_OFS_APPEND,
  601. .size = SZ_2M,
  602. .mask_flags = 0
  603. },
  604. /* file system */
  605. {
  606. .name = "Filesystem-NOR",
  607. .offset = MTDPART_OFS_APPEND,
  608. .size = MTDPART_SIZ_FULL,
  609. .mask_flags = 0
  610. }
  611. };
  612. static struct mtd_partition sdp_onenand_partitions[] = {
  613. {
  614. .name = "X-Loader-OneNAND",
  615. .offset = 0,
  616. .size = 4 * (64 * 2048),
  617. .mask_flags = MTD_WRITEABLE /* force read-only */
  618. },
  619. {
  620. .name = "U-Boot-OneNAND",
  621. .offset = MTDPART_OFS_APPEND,
  622. .size = 2 * (64 * 2048),
  623. .mask_flags = MTD_WRITEABLE /* force read-only */
  624. },
  625. {
  626. .name = "U-Boot Environment-OneNAND",
  627. .offset = MTDPART_OFS_APPEND,
  628. .size = 1 * (64 * 2048),
  629. },
  630. {
  631. .name = "Kernel-OneNAND",
  632. .offset = MTDPART_OFS_APPEND,
  633. .size = 16 * (64 * 2048),
  634. },
  635. {
  636. .name = "File System-OneNAND",
  637. .offset = MTDPART_OFS_APPEND,
  638. .size = MTDPART_SIZ_FULL,
  639. },
  640. };
  641. static struct mtd_partition sdp_nand_partitions[] = {
  642. /* All the partition sizes are listed in terms of NAND block size */
  643. {
  644. .name = "X-Loader-NAND",
  645. .offset = 0,
  646. .size = 4 * (64 * 2048),
  647. .mask_flags = MTD_WRITEABLE, /* force read-only */
  648. },
  649. {
  650. .name = "U-Boot-NAND",
  651. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  652. .size = 10 * (64 * 2048),
  653. .mask_flags = MTD_WRITEABLE, /* force read-only */
  654. },
  655. {
  656. .name = "Boot Env-NAND",
  657. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  658. .size = 6 * (64 * 2048),
  659. },
  660. {
  661. .name = "Kernel-NAND",
  662. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  663. .size = 40 * (64 * 2048),
  664. },
  665. {
  666. .name = "File System - NAND",
  667. .size = MTDPART_SIZ_FULL,
  668. .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
  669. },
  670. };
  671. static struct flash_partitions sdp_flash_partitions[] = {
  672. {
  673. .parts = sdp_nor_partitions,
  674. .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
  675. },
  676. {
  677. .parts = sdp_onenand_partitions,
  678. .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
  679. },
  680. {
  681. .parts = sdp_nand_partitions,
  682. .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
  683. },
  684. };
  685. static struct omap_musb_board_data musb_board_data = {
  686. .interface_type = MUSB_INTERFACE_ULPI,
  687. .mode = MUSB_OTG,
  688. .power = 100,
  689. };
  690. static void __init omap_3430sdp_init(void)
  691. {
  692. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  693. omap3430_i2c_init();
  694. platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
  695. if (omap_rev() > OMAP3430_REV_ES1_0)
  696. ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
  697. else
  698. ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1;
  699. sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
  700. spi_register_board_info(sdp3430_spi_board_info,
  701. ARRAY_SIZE(sdp3430_spi_board_info));
  702. ads7846_dev_init();
  703. omap_serial_init();
  704. usb_musb_init(&musb_board_data);
  705. board_smc91x_init();
  706. board_flash_init(sdp_flash_partitions, chip_sel_3430);
  707. sdp3430_display_init();
  708. enable_board_wakeup_source();
  709. usb_ehci_init(&ehci_pdata);
  710. }
  711. MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
  712. /* Maintainer: Syed Khasim - Texas Instruments Inc */
  713. .boot_params = 0x80000100,
  714. .map_io = omap3_map_io,
  715. .reserve = omap_reserve,
  716. .init_irq = omap_3430sdp_init_irq,
  717. .init_machine = omap_3430sdp_init,
  718. .timer = &omap_timer,
  719. MACHINE_END