board-mx51_efikamx.c 3.2 KB

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  1. /*
  2. * Copyright (C) 2010 Linaro Limited
  3. *
  4. * based on code from the following
  5. * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  6. * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved.
  7. * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved.
  8. *
  9. * The code contained herein is licensed under the GNU General Public
  10. * License. You may obtain a copy of the GNU General Public License
  11. * Version 2 or later at the following locations:
  12. *
  13. * http://www.opensource.org/licenses/gpl-license.html
  14. * http://www.gnu.org/copyleft/gpl.html
  15. */
  16. #include <linux/init.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/i2c.h>
  19. #include <linux/gpio.h>
  20. #include <linux/delay.h>
  21. #include <linux/io.h>
  22. #include <linux/fsl_devices.h>
  23. #include <mach/common.h>
  24. #include <mach/hardware.h>
  25. #include <mach/iomux-mx51.h>
  26. #include <mach/i2c.h>
  27. #include <mach/mxc_ehci.h>
  28. #include <asm/irq.h>
  29. #include <asm/setup.h>
  30. #include <asm/mach-types.h>
  31. #include <asm/mach/arch.h>
  32. #include <asm/mach/time.h>
  33. #include "devices-imx51.h"
  34. #include "devices.h"
  35. #define MX51_USB_PLL_DIV_24_MHZ 0x01
  36. static struct pad_desc mx51efikamx_pads[] = {
  37. /* UART1 */
  38. MX51_PAD_UART1_RXD__UART1_RXD,
  39. MX51_PAD_UART1_TXD__UART1_TXD,
  40. MX51_PAD_UART1_RTS__UART1_RTS,
  41. MX51_PAD_UART1_CTS__UART1_CTS,
  42. };
  43. /* Serial ports */
  44. #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
  45. static const struct imxuart_platform_data uart_pdata = {
  46. .flags = IMXUART_HAVE_RTSCTS,
  47. };
  48. static inline void mxc_init_imx_uart(void)
  49. {
  50. imx51_add_imx_uart(0, &uart_pdata);
  51. imx51_add_imx_uart(1, &uart_pdata);
  52. imx51_add_imx_uart(2, &uart_pdata);
  53. }
  54. #else /* !SERIAL_IMX */
  55. static inline void mxc_init_imx_uart(void)
  56. {
  57. }
  58. #endif /* SERIAL_IMX */
  59. /* This function is board specific as the bit mask for the plldiv will also
  60. * be different for other Freescale SoCs, thus a common bitmask is not
  61. * possible and cannot get place in /plat-mxc/ehci.c.
  62. */
  63. static int initialize_otg_port(struct platform_device *pdev)
  64. {
  65. u32 v;
  66. void __iomem *usb_base;
  67. void __iomem *usbother_base;
  68. usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
  69. usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
  70. /* Set the PHY clock to 19.2MHz */
  71. v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
  72. v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
  73. v |= MX51_USB_PLL_DIV_24_MHZ;
  74. __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
  75. iounmap(usb_base);
  76. return 0;
  77. }
  78. static struct mxc_usbh_platform_data dr_utmi_config = {
  79. .init = initialize_otg_port,
  80. .portsc = MXC_EHCI_UTMI_16BIT,
  81. .flags = MXC_EHCI_INTERNAL_PHY,
  82. };
  83. static void __init mxc_board_init(void)
  84. {
  85. mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads,
  86. ARRAY_SIZE(mx51efikamx_pads));
  87. mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
  88. mxc_init_imx_uart();
  89. }
  90. static void __init mx51_efikamx_timer_init(void)
  91. {
  92. mx51_clocks_init(32768, 24000000, 22579200, 24576000);
  93. }
  94. static struct sys_timer mxc_timer = {
  95. .init = mx51_efikamx_timer_init,
  96. };
  97. MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")
  98. /* Maintainer: Amit Kucheria <amit.kucheria@linaro.org> */
  99. .boot_params = MX51_PHYS_OFFSET + 0x100,
  100. .map_io = mx51_map_io,
  101. .init_irq = mx51_init_irq,
  102. .init_machine = mxc_board_init,
  103. .timer = &mxc_timer,
  104. MACHINE_END