common.c 8.1 KB

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  1. /*
  2. * linux/arch/arm/plat-omap/common.c
  3. *
  4. * Code common to all OMAP machines.
  5. * The file is created by Tony Lindgren <tony@atomide.com>
  6. *
  7. * Copyright (C) 2009 Texas Instruments
  8. * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/console.h>
  19. #include <linux/serial.h>
  20. #include <linux/tty.h>
  21. #include <linux/serial_8250.h>
  22. #include <linux/serial_reg.h>
  23. #include <linux/clk.h>
  24. #include <linux/io.h>
  25. #include <mach/hardware.h>
  26. #include <asm/system.h>
  27. #include <asm/pgtable.h>
  28. #include <asm/mach/map.h>
  29. #include <asm/setup.h>
  30. #include <plat/common.h>
  31. #include <plat/board.h>
  32. #include <plat/control.h>
  33. #include <plat/mux.h>
  34. #include <plat/fpga.h>
  35. #include <plat/clock.h>
  36. #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
  37. # include "../mach-omap2/sdrc.h"
  38. #endif
  39. #define NO_LENGTH_CHECK 0xffffffff
  40. unsigned char omap_bootloader_tag[512];
  41. int omap_bootloader_tag_len;
  42. struct omap_board_config_kernel *omap_board_config;
  43. int omap_board_config_size;
  44. /* used by omap-smp.c and board-4430sdp.c */
  45. void __iomem *gic_cpu_base_addr;
  46. static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
  47. {
  48. struct omap_board_config_kernel *kinfo = NULL;
  49. int i;
  50. /* Try to find the config from the board-specific structures
  51. * in the kernel. */
  52. for (i = 0; i < omap_board_config_size; i++) {
  53. if (omap_board_config[i].tag == tag) {
  54. if (skip == 0) {
  55. kinfo = &omap_board_config[i];
  56. break;
  57. } else {
  58. skip--;
  59. }
  60. }
  61. }
  62. if (kinfo == NULL)
  63. return NULL;
  64. return kinfo->data;
  65. }
  66. const void *__omap_get_config(u16 tag, size_t len, int nr)
  67. {
  68. return get_config(tag, len, nr, NULL);
  69. }
  70. EXPORT_SYMBOL(__omap_get_config);
  71. const void *omap_get_var_config(u16 tag, size_t *len)
  72. {
  73. return get_config(tag, NO_LENGTH_CHECK, 0, len);
  74. }
  75. EXPORT_SYMBOL(omap_get_var_config);
  76. /*
  77. * 32KHz clocksource ... always available, on pretty most chips except
  78. * OMAP 730 and 1510. Other timers could be used as clocksources, with
  79. * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
  80. * but systems won't necessarily want to spend resources that way.
  81. */
  82. #define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
  83. #if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
  84. #include <linux/clocksource.h>
  85. #ifdef CONFIG_ARCH_OMAP16XX
  86. static cycle_t omap16xx_32k_read(struct clocksource *cs)
  87. {
  88. return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED);
  89. }
  90. #else
  91. #define omap16xx_32k_read NULL
  92. #endif
  93. #ifdef CONFIG_ARCH_OMAP2420
  94. static cycle_t omap2420_32k_read(struct clocksource *cs)
  95. {
  96. return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10);
  97. }
  98. #else
  99. #define omap2420_32k_read NULL
  100. #endif
  101. #ifdef CONFIG_ARCH_OMAP2430
  102. static cycle_t omap2430_32k_read(struct clocksource *cs)
  103. {
  104. return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10);
  105. }
  106. #else
  107. #define omap2430_32k_read NULL
  108. #endif
  109. #ifdef CONFIG_ARCH_OMAP34XX
  110. static cycle_t omap34xx_32k_read(struct clocksource *cs)
  111. {
  112. return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10);
  113. }
  114. #else
  115. #define omap34xx_32k_read NULL
  116. #endif
  117. #ifdef CONFIG_ARCH_OMAP4
  118. static cycle_t omap44xx_32k_read(struct clocksource *cs)
  119. {
  120. return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10);
  121. }
  122. #else
  123. #define omap44xx_32k_read NULL
  124. #endif
  125. /*
  126. * Kernel assumes that sched_clock can be called early but may not have
  127. * things ready yet.
  128. */
  129. static cycle_t omap_32k_read_dummy(struct clocksource *cs)
  130. {
  131. return 0;
  132. }
  133. static struct clocksource clocksource_32k = {
  134. .name = "32k_counter",
  135. .rating = 250,
  136. .read = omap_32k_read_dummy,
  137. .mask = CLOCKSOURCE_MASK(32),
  138. .shift = 10,
  139. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  140. };
  141. /*
  142. * Returns current time from boot in nsecs. It's OK for this to wrap
  143. * around for now, as it's just a relative time stamp.
  144. */
  145. unsigned long long sched_clock(void)
  146. {
  147. return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
  148. clocksource_32k.mult, clocksource_32k.shift);
  149. }
  150. /**
  151. * read_persistent_clock - Return time from a persistent clock.
  152. *
  153. * Reads the time from a source which isn't disabled during PM, the
  154. * 32k sync timer. Convert the cycles elapsed since last read into
  155. * nsecs and adds to a monotonically increasing timespec.
  156. */
  157. static struct timespec persistent_ts;
  158. static cycles_t cycles, last_cycles;
  159. void read_persistent_clock(struct timespec *ts)
  160. {
  161. unsigned long long nsecs;
  162. cycles_t delta;
  163. struct timespec *tsp = &persistent_ts;
  164. last_cycles = cycles;
  165. cycles = clocksource_32k.read(&clocksource_32k);
  166. delta = cycles - last_cycles;
  167. nsecs = clocksource_cyc2ns(delta,
  168. clocksource_32k.mult, clocksource_32k.shift);
  169. timespec_add_ns(tsp, nsecs);
  170. *ts = *tsp;
  171. }
  172. static int __init omap_init_clocksource_32k(void)
  173. {
  174. static char err[] __initdata = KERN_ERR
  175. "%s: can't register clocksource!\n";
  176. if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
  177. struct clk *sync_32k_ick;
  178. if (cpu_is_omap16xx())
  179. clocksource_32k.read = omap16xx_32k_read;
  180. else if (cpu_is_omap2420())
  181. clocksource_32k.read = omap2420_32k_read;
  182. else if (cpu_is_omap2430())
  183. clocksource_32k.read = omap2430_32k_read;
  184. else if (cpu_is_omap34xx())
  185. clocksource_32k.read = omap34xx_32k_read;
  186. else if (cpu_is_omap44xx())
  187. clocksource_32k.read = omap44xx_32k_read;
  188. else
  189. return -ENODEV;
  190. sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
  191. if (sync_32k_ick)
  192. clk_enable(sync_32k_ick);
  193. clocksource_32k.mult = clocksource_hz2mult(32768,
  194. clocksource_32k.shift);
  195. if (clocksource_register(&clocksource_32k))
  196. printk(err, clocksource_32k.name);
  197. }
  198. return 0;
  199. }
  200. arch_initcall(omap_init_clocksource_32k);
  201. #endif /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
  202. /* Global address base setup code */
  203. #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
  204. static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
  205. {
  206. omap2_set_globals_tap(omap2_globals);
  207. omap2_set_globals_sdrc(omap2_globals);
  208. omap2_set_globals_control(omap2_globals);
  209. omap2_set_globals_prcm(omap2_globals);
  210. }
  211. #endif
  212. #if defined(CONFIG_ARCH_OMAP2420)
  213. static struct omap_globals omap242x_globals = {
  214. .class = OMAP242X_CLASS,
  215. .tap = OMAP2_L4_IO_ADDRESS(0x48014000),
  216. .sdrc = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
  217. .sms = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE),
  218. .ctrl = OMAP2_L4_IO_ADDRESS(OMAP2420_CTRL_BASE),
  219. .prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
  220. .cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
  221. };
  222. void __init omap2_set_globals_242x(void)
  223. {
  224. __omap2_set_globals(&omap242x_globals);
  225. }
  226. #endif
  227. #if defined(CONFIG_ARCH_OMAP2430)
  228. static struct omap_globals omap243x_globals = {
  229. .class = OMAP243X_CLASS,
  230. .tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
  231. .sdrc = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
  232. .sms = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE),
  233. .ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
  234. .prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
  235. .cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
  236. };
  237. void __init omap2_set_globals_243x(void)
  238. {
  239. __omap2_set_globals(&omap243x_globals);
  240. }
  241. #endif
  242. #if defined(CONFIG_ARCH_OMAP3430)
  243. static struct omap_globals omap343x_globals = {
  244. .class = OMAP343X_CLASS,
  245. .tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
  246. .sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
  247. .sms = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE),
  248. .ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
  249. .prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
  250. .cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
  251. };
  252. void __init omap2_set_globals_343x(void)
  253. {
  254. __omap2_set_globals(&omap343x_globals);
  255. }
  256. #endif
  257. #if defined(CONFIG_ARCH_OMAP4)
  258. static struct omap_globals omap4_globals = {
  259. .class = OMAP443X_CLASS,
  260. .tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
  261. .ctrl = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE),
  262. .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
  263. .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
  264. .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
  265. };
  266. void __init omap2_set_globals_443x(void)
  267. {
  268. omap2_set_globals_tap(&omap4_globals);
  269. omap2_set_globals_control(&omap4_globals);
  270. omap2_set_globals_prcm(&omap4_globals);
  271. }
  272. #endif