pinctrl.h 4.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140
  1. /*
  2. * Interface the pinctrl subsystem
  3. *
  4. * Copyright (C) 2011 ST-Ericsson SA
  5. * Written on behalf of Linaro for ST-Ericsson
  6. * This interface is used in the core to keep track of pins.
  7. *
  8. * Author: Linus Walleij <linus.walleij@linaro.org>
  9. *
  10. * License terms: GNU General Public License (GPL) version 2
  11. */
  12. #ifndef __LINUX_PINCTRL_PINCTRL_H
  13. #define __LINUX_PINCTRL_PINCTRL_H
  14. #ifdef CONFIG_PINCTRL
  15. #include <linux/radix-tree.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/list.h>
  18. #include <linux/seq_file.h>
  19. struct pinctrl_dev;
  20. struct pinmux_ops;
  21. struct pinconf_ops;
  22. struct gpio_chip;
  23. /**
  24. * struct pinctrl_pin_desc - boards/machines provide information on their
  25. * pins, pads or other muxable units in this struct
  26. * @number: unique pin number from the global pin number space
  27. * @name: a name for this pin
  28. */
  29. struct pinctrl_pin_desc {
  30. unsigned number;
  31. const char *name;
  32. };
  33. /* Convenience macro to define a single named or anonymous pin descriptor */
  34. #define PINCTRL_PIN(a, b) { .number = a, .name = b }
  35. #define PINCTRL_PIN_ANON(a) { .number = a }
  36. /**
  37. * struct pinctrl_gpio_range - each pin controller can provide subranges of
  38. * the GPIO number space to be handled by the controller
  39. * @node: list node for internal use
  40. * @name: a name for the chip in this range
  41. * @id: an ID number for the chip in this range
  42. * @base: base offset of the GPIO range
  43. * @pin_base: base pin number of the GPIO range
  44. * @npins: number of pins in the GPIO range, including the base number
  45. * @gc: an optional pointer to a gpio_chip
  46. */
  47. struct pinctrl_gpio_range {
  48. struct list_head node;
  49. const char *name;
  50. unsigned int id;
  51. unsigned int base;
  52. unsigned int pin_base;
  53. unsigned int npins;
  54. struct gpio_chip *gc;
  55. };
  56. /**
  57. * struct pinctrl_ops - global pin control operations, to be implemented by
  58. * pin controller drivers.
  59. * @list_groups: list the number of selectable named groups available
  60. * in this pinmux driver, the core will begin on 0 and call this
  61. * repeatedly as long as it returns >= 0 to enumerate the groups
  62. * @get_group_name: return the group name of the pin group
  63. * @get_group_pins: return an array of pins corresponding to a certain
  64. * group selector @pins, and the size of the array in @num_pins
  65. * @pin_dbg_show: optional debugfs display hook that will provide per-device
  66. * info for a certain pin in debugfs
  67. */
  68. struct pinctrl_ops {
  69. int (*list_groups) (struct pinctrl_dev *pctldev, unsigned selector);
  70. const char *(*get_group_name) (struct pinctrl_dev *pctldev,
  71. unsigned selector);
  72. int (*get_group_pins) (struct pinctrl_dev *pctldev,
  73. unsigned selector,
  74. const unsigned **pins,
  75. unsigned *num_pins);
  76. void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s,
  77. unsigned offset);
  78. };
  79. /**
  80. * struct pinctrl_desc - pin controller descriptor, register this to pin
  81. * control subsystem
  82. * @name: name for the pin controller
  83. * @pins: an array of pin descriptors describing all the pins handled by
  84. * this pin controller
  85. * @npins: number of descriptors in the array, usually just ARRAY_SIZE()
  86. * of the pins field above
  87. * @maxpin: since pin spaces may be sparse, there can he "holes" in the
  88. * pin range, this attribute gives the maximum pin number in the
  89. * total range. This should not be lower than npins for example,
  90. * but may be equal to npins if you have no holes in the pin range.
  91. * @pctlops: pin control operation vtable, to support global concepts like
  92. * grouping of pins, this is optional.
  93. * @pmxops: pinmux operations vtable, if you support pinmuxing in your driver
  94. * @confops: pin config operations vtable, if you support pin configuration in
  95. * your driver
  96. * @owner: module providing the pin controller, used for refcounting
  97. */
  98. struct pinctrl_desc {
  99. const char *name;
  100. struct pinctrl_pin_desc const *pins;
  101. unsigned int npins;
  102. unsigned int maxpin;
  103. struct pinctrl_ops *pctlops;
  104. struct pinmux_ops *pmxops;
  105. struct pinconf_ops *confops;
  106. struct module *owner;
  107. };
  108. /* External interface to pin controller */
  109. extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
  110. struct device *dev, void *driver_data);
  111. extern void pinctrl_unregister(struct pinctrl_dev *pctldev);
  112. extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin);
  113. extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
  114. struct pinctrl_gpio_range *range);
  115. extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
  116. struct pinctrl_gpio_range *range);
  117. extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev);
  118. extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev);
  119. #else
  120. struct pinctrl_dev;
  121. /* Sufficiently stupid default functions when pinctrl is not in use */
  122. static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
  123. {
  124. return pin >= 0;
  125. }
  126. #endif /* !CONFIG_PINCTRL */
  127. #endif /* __LINUX_PINCTRL_PINCTRL_H */