fsl-diu-fb.c 44 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * Freescale DIU Frame Buffer device driver
  5. *
  6. * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
  7. * Paul Widmer <paul.widmer@freescale.com>
  8. * Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
  9. * York Sun <yorksun@freescale.com>
  10. *
  11. * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms of the GNU General Public License as published by the
  15. * Free Software Foundation; either version 2 of the License, or (at your
  16. * option) any later version.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/string.h>
  23. #include <linux/slab.h>
  24. #include <linux/fb.h>
  25. #include <linux/init.h>
  26. #include <linux/dma-mapping.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/clk.h>
  30. #include <linux/uaccess.h>
  31. #include <linux/vmalloc.h>
  32. #include <linux/of_platform.h>
  33. #include <sysdev/fsl_soc.h>
  34. #include "fsl-diu-fb.h"
  35. /*
  36. * These parameters give default parameters
  37. * for video output 1024x768,
  38. * FIXME - change timing to proper amounts
  39. * hsync 31.5kHz, vsync 60Hz
  40. */
  41. static struct fb_videomode __devinitdata fsl_diu_default_mode = {
  42. .refresh = 60,
  43. .xres = 1024,
  44. .yres = 768,
  45. .pixclock = 15385,
  46. .left_margin = 160,
  47. .right_margin = 24,
  48. .upper_margin = 29,
  49. .lower_margin = 3,
  50. .hsync_len = 136,
  51. .vsync_len = 6,
  52. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  53. .vmode = FB_VMODE_NONINTERLACED
  54. };
  55. static struct fb_videomode __devinitdata fsl_diu_mode_db[] = {
  56. {
  57. .name = "1024x768-60",
  58. .refresh = 60,
  59. .xres = 1024,
  60. .yres = 768,
  61. .pixclock = 15385,
  62. .left_margin = 160,
  63. .right_margin = 24,
  64. .upper_margin = 29,
  65. .lower_margin = 3,
  66. .hsync_len = 136,
  67. .vsync_len = 6,
  68. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  69. .vmode = FB_VMODE_NONINTERLACED
  70. },
  71. {
  72. .name = "1024x768-70",
  73. .refresh = 70,
  74. .xres = 1024,
  75. .yres = 768,
  76. .pixclock = 16886,
  77. .left_margin = 3,
  78. .right_margin = 3,
  79. .upper_margin = 2,
  80. .lower_margin = 2,
  81. .hsync_len = 40,
  82. .vsync_len = 18,
  83. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  84. .vmode = FB_VMODE_NONINTERLACED
  85. },
  86. {
  87. .name = "1024x768-75",
  88. .refresh = 75,
  89. .xres = 1024,
  90. .yres = 768,
  91. .pixclock = 15009,
  92. .left_margin = 3,
  93. .right_margin = 3,
  94. .upper_margin = 2,
  95. .lower_margin = 2,
  96. .hsync_len = 80,
  97. .vsync_len = 32,
  98. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  99. .vmode = FB_VMODE_NONINTERLACED
  100. },
  101. {
  102. .name = "1280x1024-60",
  103. .refresh = 60,
  104. .xres = 1280,
  105. .yres = 1024,
  106. .pixclock = 9375,
  107. .left_margin = 38,
  108. .right_margin = 128,
  109. .upper_margin = 2,
  110. .lower_margin = 7,
  111. .hsync_len = 216,
  112. .vsync_len = 37,
  113. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  114. .vmode = FB_VMODE_NONINTERLACED
  115. },
  116. {
  117. .name = "1280x1024-70",
  118. .refresh = 70,
  119. .xres = 1280,
  120. .yres = 1024,
  121. .pixclock = 9380,
  122. .left_margin = 6,
  123. .right_margin = 6,
  124. .upper_margin = 4,
  125. .lower_margin = 4,
  126. .hsync_len = 60,
  127. .vsync_len = 94,
  128. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  129. .vmode = FB_VMODE_NONINTERLACED
  130. },
  131. {
  132. .name = "1280x1024-75",
  133. .refresh = 75,
  134. .xres = 1280,
  135. .yres = 1024,
  136. .pixclock = 9380,
  137. .left_margin = 6,
  138. .right_margin = 6,
  139. .upper_margin = 4,
  140. .lower_margin = 4,
  141. .hsync_len = 60,
  142. .vsync_len = 15,
  143. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  144. .vmode = FB_VMODE_NONINTERLACED
  145. },
  146. {
  147. .name = "320x240", /* for AOI only */
  148. .refresh = 60,
  149. .xres = 320,
  150. .yres = 240,
  151. .pixclock = 15385,
  152. .left_margin = 0,
  153. .right_margin = 0,
  154. .upper_margin = 0,
  155. .lower_margin = 0,
  156. .hsync_len = 0,
  157. .vsync_len = 0,
  158. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  159. .vmode = FB_VMODE_NONINTERLACED
  160. },
  161. {
  162. .name = "1280x480-60",
  163. .refresh = 60,
  164. .xres = 1280,
  165. .yres = 480,
  166. .pixclock = 18939,
  167. .left_margin = 353,
  168. .right_margin = 47,
  169. .upper_margin = 39,
  170. .lower_margin = 4,
  171. .hsync_len = 8,
  172. .vsync_len = 2,
  173. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  174. .vmode = FB_VMODE_NONINTERLACED
  175. },
  176. };
  177. static char *fb_mode = "1024x768-32@60";
  178. static unsigned long default_bpp = 32;
  179. static int monitor_port;
  180. #if defined(CONFIG_NOT_COHERENT_CACHE)
  181. static u8 *coherence_data;
  182. static size_t coherence_data_size;
  183. static unsigned int d_cache_line_size;
  184. #endif
  185. static DEFINE_SPINLOCK(diu_lock);
  186. struct fsl_diu_data {
  187. struct fb_info *fsl_diu_info[FSL_AOI_NUM - 1];
  188. /*FSL_AOI_NUM has one dummy AOI */
  189. struct device_attribute dev_attr;
  190. struct diu_ad *dummy_ad;
  191. void *dummy_aoi_virt;
  192. unsigned int irq;
  193. int fb_enabled;
  194. int monitor_port;
  195. };
  196. struct mfb_info {
  197. int index;
  198. int type;
  199. char *id;
  200. int registered;
  201. int blank;
  202. unsigned long pseudo_palette[16];
  203. struct diu_ad *ad;
  204. int cursor_reset;
  205. unsigned char g_alpha;
  206. unsigned int count;
  207. int x_aoi_d; /* aoi display x offset to physical screen */
  208. int y_aoi_d; /* aoi display y offset to physical screen */
  209. struct fsl_diu_data *parent;
  210. };
  211. static struct mfb_info mfb_template[] = {
  212. { /* AOI 0 for plane 0 */
  213. .index = 0,
  214. .type = MFB_TYPE_OUTPUT,
  215. .id = "Panel0",
  216. .registered = 0,
  217. .count = 0,
  218. .x_aoi_d = 0,
  219. .y_aoi_d = 0,
  220. },
  221. { /* AOI 0 for plane 1 */
  222. .index = 1,
  223. .type = MFB_TYPE_OUTPUT,
  224. .id = "Panel1 AOI0",
  225. .registered = 0,
  226. .g_alpha = 0xff,
  227. .count = 0,
  228. .x_aoi_d = 0,
  229. .y_aoi_d = 0,
  230. },
  231. { /* AOI 1 for plane 1 */
  232. .index = 2,
  233. .type = MFB_TYPE_OUTPUT,
  234. .id = "Panel1 AOI1",
  235. .registered = 0,
  236. .g_alpha = 0xff,
  237. .count = 0,
  238. .x_aoi_d = 0,
  239. .y_aoi_d = 480,
  240. },
  241. { /* AOI 0 for plane 2 */
  242. .index = 3,
  243. .type = MFB_TYPE_OUTPUT,
  244. .id = "Panel2 AOI0",
  245. .registered = 0,
  246. .g_alpha = 0xff,
  247. .count = 0,
  248. .x_aoi_d = 640,
  249. .y_aoi_d = 0,
  250. },
  251. { /* AOI 1 for plane 2 */
  252. .index = 4,
  253. .type = MFB_TYPE_OUTPUT,
  254. .id = "Panel2 AOI1",
  255. .registered = 0,
  256. .g_alpha = 0xff,
  257. .count = 0,
  258. .x_aoi_d = 640,
  259. .y_aoi_d = 480,
  260. },
  261. };
  262. static struct diu_hw dr = {
  263. .mode = MFB_MODE1,
  264. .reg_lock = __SPIN_LOCK_UNLOCKED(diu_hw.reg_lock),
  265. };
  266. static struct diu_pool pool;
  267. /**
  268. * fsl_diu_alloc - allocate memory for the DIU
  269. * @size: number of bytes to allocate
  270. * @param: returned physical address of memory
  271. *
  272. * This function allocates a physically-contiguous block of memory.
  273. */
  274. static void *fsl_diu_alloc(size_t size, phys_addr_t *phys)
  275. {
  276. void *virt;
  277. pr_debug("size=%zu\n", size);
  278. virt = alloc_pages_exact(size, GFP_DMA | __GFP_ZERO);
  279. if (virt) {
  280. *phys = virt_to_phys(virt);
  281. pr_debug("virt=%p phys=%llx\n", virt,
  282. (unsigned long long)*phys);
  283. }
  284. return virt;
  285. }
  286. /**
  287. * fsl_diu_free - release DIU memory
  288. * @virt: pointer returned by fsl_diu_alloc()
  289. * @size: number of bytes allocated by fsl_diu_alloc()
  290. *
  291. * This function releases memory allocated by fsl_diu_alloc().
  292. */
  293. static void fsl_diu_free(void *virt, size_t size)
  294. {
  295. pr_debug("virt=%p size=%zu\n", virt, size);
  296. if (virt && size)
  297. free_pages_exact(virt, size);
  298. }
  299. static int fsl_diu_enable_panel(struct fb_info *info)
  300. {
  301. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  302. struct diu *hw = dr.diu_reg;
  303. struct diu_ad *ad = mfbi->ad;
  304. struct fsl_diu_data *machine_data = mfbi->parent;
  305. int res = 0;
  306. pr_debug("enable_panel index %d\n", mfbi->index);
  307. if (mfbi->type != MFB_TYPE_OFF) {
  308. switch (mfbi->index) {
  309. case 0: /* plane 0 */
  310. if (hw->desc[0] != ad->paddr)
  311. out_be32(&hw->desc[0], ad->paddr);
  312. break;
  313. case 1: /* plane 1 AOI 0 */
  314. cmfbi = machine_data->fsl_diu_info[2]->par;
  315. if (hw->desc[1] != ad->paddr) { /* AOI0 closed */
  316. if (cmfbi->count > 0) /* AOI1 open */
  317. ad->next_ad =
  318. cpu_to_le32(cmfbi->ad->paddr);
  319. else
  320. ad->next_ad = 0;
  321. out_be32(&hw->desc[1], ad->paddr);
  322. }
  323. break;
  324. case 3: /* plane 2 AOI 0 */
  325. cmfbi = machine_data->fsl_diu_info[4]->par;
  326. if (hw->desc[2] != ad->paddr) { /* AOI0 closed */
  327. if (cmfbi->count > 0) /* AOI1 open */
  328. ad->next_ad =
  329. cpu_to_le32(cmfbi->ad->paddr);
  330. else
  331. ad->next_ad = 0;
  332. out_be32(&hw->desc[2], ad->paddr);
  333. }
  334. break;
  335. case 2: /* plane 1 AOI 1 */
  336. pmfbi = machine_data->fsl_diu_info[1]->par;
  337. ad->next_ad = 0;
  338. if (hw->desc[1] == machine_data->dummy_ad->paddr)
  339. out_be32(&hw->desc[1], ad->paddr);
  340. else /* AOI0 open */
  341. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  342. break;
  343. case 4: /* plane 2 AOI 1 */
  344. pmfbi = machine_data->fsl_diu_info[3]->par;
  345. ad->next_ad = 0;
  346. if (hw->desc[2] == machine_data->dummy_ad->paddr)
  347. out_be32(&hw->desc[2], ad->paddr);
  348. else /* AOI0 was open */
  349. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  350. break;
  351. default:
  352. res = -EINVAL;
  353. break;
  354. }
  355. } else
  356. res = -EINVAL;
  357. return res;
  358. }
  359. static int fsl_diu_disable_panel(struct fb_info *info)
  360. {
  361. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  362. struct diu *hw = dr.diu_reg;
  363. struct diu_ad *ad = mfbi->ad;
  364. struct fsl_diu_data *machine_data = mfbi->parent;
  365. int res = 0;
  366. switch (mfbi->index) {
  367. case 0: /* plane 0 */
  368. if (hw->desc[0] != machine_data->dummy_ad->paddr)
  369. out_be32(&hw->desc[0],
  370. machine_data->dummy_ad->paddr);
  371. break;
  372. case 1: /* plane 1 AOI 0 */
  373. cmfbi = machine_data->fsl_diu_info[2]->par;
  374. if (cmfbi->count > 0) /* AOI1 is open */
  375. out_be32(&hw->desc[1], cmfbi->ad->paddr);
  376. /* move AOI1 to the first */
  377. else /* AOI1 was closed */
  378. out_be32(&hw->desc[1],
  379. machine_data->dummy_ad->paddr);
  380. /* close AOI 0 */
  381. break;
  382. case 3: /* plane 2 AOI 0 */
  383. cmfbi = machine_data->fsl_diu_info[4]->par;
  384. if (cmfbi->count > 0) /* AOI1 is open */
  385. out_be32(&hw->desc[2], cmfbi->ad->paddr);
  386. /* move AOI1 to the first */
  387. else /* AOI1 was closed */
  388. out_be32(&hw->desc[2],
  389. machine_data->dummy_ad->paddr);
  390. /* close AOI 0 */
  391. break;
  392. case 2: /* plane 1 AOI 1 */
  393. pmfbi = machine_data->fsl_diu_info[1]->par;
  394. if (hw->desc[1] != ad->paddr) {
  395. /* AOI1 is not the first in the chain */
  396. if (pmfbi->count > 0)
  397. /* AOI0 is open, must be the first */
  398. pmfbi->ad->next_ad = 0;
  399. } else /* AOI1 is the first in the chain */
  400. out_be32(&hw->desc[1], machine_data->dummy_ad->paddr);
  401. /* close AOI 1 */
  402. break;
  403. case 4: /* plane 2 AOI 1 */
  404. pmfbi = machine_data->fsl_diu_info[3]->par;
  405. if (hw->desc[2] != ad->paddr) {
  406. /* AOI1 is not the first in the chain */
  407. if (pmfbi->count > 0)
  408. /* AOI0 is open, must be the first */
  409. pmfbi->ad->next_ad = 0;
  410. } else /* AOI1 is the first in the chain */
  411. out_be32(&hw->desc[2], machine_data->dummy_ad->paddr);
  412. /* close AOI 1 */
  413. break;
  414. default:
  415. res = -EINVAL;
  416. break;
  417. }
  418. return res;
  419. }
  420. static void enable_lcdc(struct fb_info *info)
  421. {
  422. struct diu *hw = dr.diu_reg;
  423. struct mfb_info *mfbi = info->par;
  424. struct fsl_diu_data *machine_data = mfbi->parent;
  425. if (!machine_data->fb_enabled) {
  426. out_be32(&hw->diu_mode, dr.mode);
  427. machine_data->fb_enabled++;
  428. }
  429. }
  430. static void disable_lcdc(struct fb_info *info)
  431. {
  432. struct diu *hw = dr.diu_reg;
  433. struct mfb_info *mfbi = info->par;
  434. struct fsl_diu_data *machine_data = mfbi->parent;
  435. if (machine_data->fb_enabled) {
  436. out_be32(&hw->diu_mode, 0);
  437. machine_data->fb_enabled = 0;
  438. }
  439. }
  440. static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
  441. struct fb_info *info)
  442. {
  443. struct mfb_info *lower_aoi_mfbi, *upper_aoi_mfbi, *mfbi = info->par;
  444. struct fsl_diu_data *machine_data = mfbi->parent;
  445. int available_height, upper_aoi_bottom, index = mfbi->index;
  446. int lower_aoi_is_open, upper_aoi_is_open;
  447. __u32 base_plane_width, base_plane_height, upper_aoi_height;
  448. base_plane_width = machine_data->fsl_diu_info[0]->var.xres;
  449. base_plane_height = machine_data->fsl_diu_info[0]->var.yres;
  450. switch (index) {
  451. case 0:
  452. if (mfbi->x_aoi_d != 0)
  453. mfbi->x_aoi_d = 0;
  454. if (mfbi->y_aoi_d != 0)
  455. mfbi->y_aoi_d = 0;
  456. break;
  457. case 1: /* AOI 0 */
  458. case 3:
  459. lower_aoi_mfbi = machine_data->fsl_diu_info[index+1]->par;
  460. lower_aoi_is_open = lower_aoi_mfbi->count > 0 ? 1 : 0;
  461. if (var->xres > base_plane_width)
  462. var->xres = base_plane_width;
  463. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  464. mfbi->x_aoi_d = base_plane_width - var->xres;
  465. if (lower_aoi_is_open)
  466. available_height = lower_aoi_mfbi->y_aoi_d;
  467. else
  468. available_height = base_plane_height;
  469. if (var->yres > available_height)
  470. var->yres = available_height;
  471. if ((mfbi->y_aoi_d + var->yres) > available_height)
  472. mfbi->y_aoi_d = available_height - var->yres;
  473. break;
  474. case 2: /* AOI 1 */
  475. case 4:
  476. upper_aoi_mfbi = machine_data->fsl_diu_info[index-1]->par;
  477. upper_aoi_height =
  478. machine_data->fsl_diu_info[index-1]->var.yres;
  479. upper_aoi_bottom = upper_aoi_mfbi->y_aoi_d + upper_aoi_height;
  480. upper_aoi_is_open = upper_aoi_mfbi->count > 0 ? 1 : 0;
  481. if (var->xres > base_plane_width)
  482. var->xres = base_plane_width;
  483. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  484. mfbi->x_aoi_d = base_plane_width - var->xres;
  485. if (mfbi->y_aoi_d < 0)
  486. mfbi->y_aoi_d = 0;
  487. if (upper_aoi_is_open) {
  488. if (mfbi->y_aoi_d < upper_aoi_bottom)
  489. mfbi->y_aoi_d = upper_aoi_bottom;
  490. available_height = base_plane_height
  491. - upper_aoi_bottom;
  492. } else
  493. available_height = base_plane_height;
  494. if (var->yres > available_height)
  495. var->yres = available_height;
  496. if ((mfbi->y_aoi_d + var->yres) > base_plane_height)
  497. mfbi->y_aoi_d = base_plane_height - var->yres;
  498. break;
  499. }
  500. }
  501. /*
  502. * Checks to see if the hardware supports the state requested by var passed
  503. * in. This function does not alter the hardware state! If the var passed in
  504. * is slightly off by what the hardware can support then we alter the var
  505. * PASSED in to what we can do. If the hardware doesn't support mode change
  506. * a -EINVAL will be returned by the upper layers.
  507. */
  508. static int fsl_diu_check_var(struct fb_var_screeninfo *var,
  509. struct fb_info *info)
  510. {
  511. unsigned long htotal, vtotal;
  512. pr_debug("check_var xres: %d\n", var->xres);
  513. pr_debug("check_var yres: %d\n", var->yres);
  514. if (var->xres_virtual < var->xres)
  515. var->xres_virtual = var->xres;
  516. if (var->yres_virtual < var->yres)
  517. var->yres_virtual = var->yres;
  518. if (var->xoffset < 0)
  519. var->xoffset = 0;
  520. if (var->yoffset < 0)
  521. var->yoffset = 0;
  522. if (var->xoffset + info->var.xres > info->var.xres_virtual)
  523. var->xoffset = info->var.xres_virtual - info->var.xres;
  524. if (var->yoffset + info->var.yres > info->var.yres_virtual)
  525. var->yoffset = info->var.yres_virtual - info->var.yres;
  526. if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
  527. (var->bits_per_pixel != 16))
  528. var->bits_per_pixel = default_bpp;
  529. switch (var->bits_per_pixel) {
  530. case 16:
  531. var->red.length = 5;
  532. var->red.offset = 11;
  533. var->red.msb_right = 0;
  534. var->green.length = 6;
  535. var->green.offset = 5;
  536. var->green.msb_right = 0;
  537. var->blue.length = 5;
  538. var->blue.offset = 0;
  539. var->blue.msb_right = 0;
  540. var->transp.length = 0;
  541. var->transp.offset = 0;
  542. var->transp.msb_right = 0;
  543. break;
  544. case 24:
  545. var->red.length = 8;
  546. var->red.offset = 0;
  547. var->red.msb_right = 0;
  548. var->green.length = 8;
  549. var->green.offset = 8;
  550. var->green.msb_right = 0;
  551. var->blue.length = 8;
  552. var->blue.offset = 16;
  553. var->blue.msb_right = 0;
  554. var->transp.length = 0;
  555. var->transp.offset = 0;
  556. var->transp.msb_right = 0;
  557. break;
  558. case 32:
  559. var->red.length = 8;
  560. var->red.offset = 16;
  561. var->red.msb_right = 0;
  562. var->green.length = 8;
  563. var->green.offset = 8;
  564. var->green.msb_right = 0;
  565. var->blue.length = 8;
  566. var->blue.offset = 0;
  567. var->blue.msb_right = 0;
  568. var->transp.length = 8;
  569. var->transp.offset = 24;
  570. var->transp.msb_right = 0;
  571. break;
  572. }
  573. /* If the pixclock is below the minimum spec'd value then set to
  574. * refresh rate for 60Hz since this is supported by most monitors.
  575. * Refer to Documentation/fb/ for calculations.
  576. */
  577. if ((var->pixclock < MIN_PIX_CLK) || (var->pixclock > MAX_PIX_CLK)) {
  578. htotal = var->xres + var->right_margin + var->hsync_len +
  579. var->left_margin;
  580. vtotal = var->yres + var->lower_margin + var->vsync_len +
  581. var->upper_margin;
  582. var->pixclock = (vtotal * htotal * 6UL) / 100UL;
  583. var->pixclock = KHZ2PICOS(var->pixclock);
  584. pr_debug("pixclock set for 60Hz refresh = %u ps\n",
  585. var->pixclock);
  586. }
  587. var->height = -1;
  588. var->width = -1;
  589. var->grayscale = 0;
  590. /* Copy nonstd field to/from sync for fbset usage */
  591. var->sync |= var->nonstd;
  592. var->nonstd |= var->sync;
  593. adjust_aoi_size_position(var, info);
  594. return 0;
  595. }
  596. static void set_fix(struct fb_info *info)
  597. {
  598. struct fb_fix_screeninfo *fix = &info->fix;
  599. struct fb_var_screeninfo *var = &info->var;
  600. struct mfb_info *mfbi = info->par;
  601. strncpy(fix->id, mfbi->id, strlen(mfbi->id));
  602. fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
  603. fix->type = FB_TYPE_PACKED_PIXELS;
  604. fix->accel = FB_ACCEL_NONE;
  605. fix->visual = FB_VISUAL_TRUECOLOR;
  606. fix->xpanstep = 1;
  607. fix->ypanstep = 1;
  608. }
  609. static void update_lcdc(struct fb_info *info)
  610. {
  611. struct fb_var_screeninfo *var = &info->var;
  612. struct mfb_info *mfbi = info->par;
  613. struct fsl_diu_data *machine_data = mfbi->parent;
  614. struct diu *hw;
  615. int i, j;
  616. char __iomem *cursor_base, *gamma_table_base;
  617. u32 temp;
  618. hw = dr.diu_reg;
  619. if (mfbi->type == MFB_TYPE_OFF) {
  620. fsl_diu_disable_panel(info);
  621. return;
  622. }
  623. diu_ops.set_monitor_port(machine_data->monitor_port);
  624. gamma_table_base = pool.gamma.vaddr;
  625. cursor_base = pool.cursor.vaddr;
  626. /* Prep for DIU init - gamma table, cursor table */
  627. for (i = 0; i <= 2; i++)
  628. for (j = 0; j <= 255; j++)
  629. *gamma_table_base++ = j;
  630. diu_ops.set_gamma_table(machine_data->monitor_port, pool.gamma.vaddr);
  631. pr_debug("update-lcdc: HW - %p\n Disabling DIU\n", hw);
  632. disable_lcdc(info);
  633. /* Program DIU registers */
  634. out_be32(&hw->gamma, pool.gamma.paddr);
  635. out_be32(&hw->cursor, pool.cursor.paddr);
  636. out_be32(&hw->bgnd, 0x007F7F7F); /* BGND */
  637. out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
  638. out_be32(&hw->disp_size, (var->yres << 16 | var->xres));
  639. /* DISP SIZE */
  640. pr_debug("DIU xres: %d\n", var->xres);
  641. pr_debug("DIU yres: %d\n", var->yres);
  642. out_be32(&hw->wb_size, 0); /* WB SIZE */
  643. out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
  644. /* Horizontal and vertical configuration register */
  645. temp = var->left_margin << 22 | /* BP_H */
  646. var->hsync_len << 11 | /* PW_H */
  647. var->right_margin; /* FP_H */
  648. out_be32(&hw->hsyn_para, temp);
  649. temp = var->upper_margin << 22 | /* BP_V */
  650. var->vsync_len << 11 | /* PW_V */
  651. var->lower_margin; /* FP_V */
  652. out_be32(&hw->vsyn_para, temp);
  653. pr_debug("DIU right_margin - %d\n", var->right_margin);
  654. pr_debug("DIU left_margin - %d\n", var->left_margin);
  655. pr_debug("DIU hsync_len - %d\n", var->hsync_len);
  656. pr_debug("DIU upper_margin - %d\n", var->upper_margin);
  657. pr_debug("DIU lower_margin - %d\n", var->lower_margin);
  658. pr_debug("DIU vsync_len - %d\n", var->vsync_len);
  659. pr_debug("DIU HSYNC - 0x%08x\n", hw->hsyn_para);
  660. pr_debug("DIU VSYNC - 0x%08x\n", hw->vsyn_para);
  661. diu_ops.set_pixel_clock(var->pixclock);
  662. out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
  663. out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */
  664. out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
  665. out_be32(&hw->plut, 0x01F5F666);
  666. /* Enable the DIU */
  667. enable_lcdc(info);
  668. }
  669. static int map_video_memory(struct fb_info *info)
  670. {
  671. phys_addr_t phys;
  672. pr_debug("info->var.xres_virtual = %d\n", info->var.xres_virtual);
  673. pr_debug("info->var.yres_virtual = %d\n", info->var.yres_virtual);
  674. pr_debug("info->fix.line_length = %d\n", info->fix.line_length);
  675. info->fix.smem_len = info->fix.line_length * info->var.yres_virtual;
  676. pr_debug("MAP_VIDEO_MEMORY: smem_len = %d\n", info->fix.smem_len);
  677. info->screen_base = fsl_diu_alloc(info->fix.smem_len, &phys);
  678. if (info->screen_base == NULL) {
  679. printk(KERN_ERR "Unable to allocate fb memory\n");
  680. return -ENOMEM;
  681. }
  682. info->fix.smem_start = (unsigned long) phys;
  683. info->screen_size = info->fix.smem_len;
  684. pr_debug("Allocated fb @ paddr=0x%08lx, size=%d.\n",
  685. info->fix.smem_start,
  686. info->fix.smem_len);
  687. pr_debug("screen base %p\n", info->screen_base);
  688. return 0;
  689. }
  690. static void unmap_video_memory(struct fb_info *info)
  691. {
  692. fsl_diu_free(info->screen_base, info->fix.smem_len);
  693. info->screen_base = NULL;
  694. info->fix.smem_start = 0;
  695. info->fix.smem_len = 0;
  696. }
  697. /*
  698. * Using the fb_var_screeninfo in fb_info we set the aoi of this
  699. * particular framebuffer. It is a light version of fsl_diu_set_par.
  700. */
  701. static int fsl_diu_set_aoi(struct fb_info *info)
  702. {
  703. struct fb_var_screeninfo *var = &info->var;
  704. struct mfb_info *mfbi = info->par;
  705. struct diu_ad *ad = mfbi->ad;
  706. /* AOI should not be greater than display size */
  707. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  708. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  709. return 0;
  710. }
  711. /*
  712. * Using the fb_var_screeninfo in fb_info we set the resolution of this
  713. * particular framebuffer. This function alters the fb_fix_screeninfo stored
  714. * in fb_info. It does not alter var in fb_info since we are using that
  715. * data. This means we depend on the data in var inside fb_info to be
  716. * supported by the hardware. fsl_diu_check_var is always called before
  717. * fsl_diu_set_par to ensure this.
  718. */
  719. static int fsl_diu_set_par(struct fb_info *info)
  720. {
  721. unsigned long len;
  722. struct fb_var_screeninfo *var = &info->var;
  723. struct mfb_info *mfbi = info->par;
  724. struct fsl_diu_data *machine_data = mfbi->parent;
  725. struct diu_ad *ad = mfbi->ad;
  726. struct diu *hw;
  727. hw = dr.diu_reg;
  728. set_fix(info);
  729. mfbi->cursor_reset = 1;
  730. len = info->var.yres_virtual * info->fix.line_length;
  731. /* Alloc & dealloc each time resolution/bpp change */
  732. if (len != info->fix.smem_len) {
  733. if (info->fix.smem_start)
  734. unmap_video_memory(info);
  735. pr_debug("SET PAR: smem_len = %d\n", info->fix.smem_len);
  736. /* Memory allocation for framebuffer */
  737. if (map_video_memory(info)) {
  738. printk(KERN_ERR "Unable to allocate fb memory 1\n");
  739. return -ENOMEM;
  740. }
  741. }
  742. ad->pix_fmt =
  743. diu_ops.get_pixel_format(var->bits_per_pixel,
  744. machine_data->monitor_port);
  745. ad->addr = cpu_to_le32(info->fix.smem_start);
  746. ad->src_size_g_alpha = cpu_to_le32((var->yres_virtual << 12) |
  747. var->xres_virtual) | mfbi->g_alpha;
  748. /* AOI should not be greater than display size */
  749. ad->aoi_size = cpu_to_le32((var->yres << 16) | var->xres);
  750. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  751. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  752. /* Disable chroma keying function */
  753. ad->ckmax_r = 0;
  754. ad->ckmax_g = 0;
  755. ad->ckmax_b = 0;
  756. ad->ckmin_r = 255;
  757. ad->ckmin_g = 255;
  758. ad->ckmin_b = 255;
  759. if (mfbi->index == 0)
  760. update_lcdc(info);
  761. return 0;
  762. }
  763. static inline __u32 CNVT_TOHW(__u32 val, __u32 width)
  764. {
  765. return ((val<<width) + 0x7FFF - val)>>16;
  766. }
  767. /*
  768. * Set a single color register. The values supplied have a 16 bit magnitude
  769. * which needs to be scaled in this function for the hardware. Things to take
  770. * into consideration are how many color registers, if any, are supported with
  771. * the current color visual. With truecolor mode no color palettes are
  772. * supported. Here a psuedo palette is created which we store the value in
  773. * pseudo_palette in struct fb_info. For pseudocolor mode we have a limited
  774. * color palette.
  775. */
  776. static int fsl_diu_setcolreg(unsigned regno, unsigned red, unsigned green,
  777. unsigned blue, unsigned transp, struct fb_info *info)
  778. {
  779. int ret = 1;
  780. /*
  781. * If greyscale is true, then we convert the RGB value
  782. * to greyscale no matter what visual we are using.
  783. */
  784. if (info->var.grayscale)
  785. red = green = blue = (19595 * red + 38470 * green +
  786. 7471 * blue) >> 16;
  787. switch (info->fix.visual) {
  788. case FB_VISUAL_TRUECOLOR:
  789. /*
  790. * 16-bit True Colour. We encode the RGB value
  791. * according to the RGB bitfield information.
  792. */
  793. if (regno < 16) {
  794. u32 *pal = info->pseudo_palette;
  795. u32 v;
  796. red = CNVT_TOHW(red, info->var.red.length);
  797. green = CNVT_TOHW(green, info->var.green.length);
  798. blue = CNVT_TOHW(blue, info->var.blue.length);
  799. transp = CNVT_TOHW(transp, info->var.transp.length);
  800. v = (red << info->var.red.offset) |
  801. (green << info->var.green.offset) |
  802. (blue << info->var.blue.offset) |
  803. (transp << info->var.transp.offset);
  804. pal[regno] = v;
  805. ret = 0;
  806. }
  807. break;
  808. case FB_VISUAL_STATIC_PSEUDOCOLOR:
  809. case FB_VISUAL_PSEUDOCOLOR:
  810. break;
  811. }
  812. return ret;
  813. }
  814. /*
  815. * Pan (or wrap, depending on the `vmode' field) the display using the
  816. * 'xoffset' and 'yoffset' fields of the 'var' structure. If the values
  817. * don't fit, return -EINVAL.
  818. */
  819. static int fsl_diu_pan_display(struct fb_var_screeninfo *var,
  820. struct fb_info *info)
  821. {
  822. if ((info->var.xoffset == var->xoffset) &&
  823. (info->var.yoffset == var->yoffset))
  824. return 0; /* No change, do nothing */
  825. if (var->xoffset < 0 || var->yoffset < 0
  826. || var->xoffset + info->var.xres > info->var.xres_virtual
  827. || var->yoffset + info->var.yres > info->var.yres_virtual)
  828. return -EINVAL;
  829. info->var.xoffset = var->xoffset;
  830. info->var.yoffset = var->yoffset;
  831. if (var->vmode & FB_VMODE_YWRAP)
  832. info->var.vmode |= FB_VMODE_YWRAP;
  833. else
  834. info->var.vmode &= ~FB_VMODE_YWRAP;
  835. fsl_diu_set_aoi(info);
  836. return 0;
  837. }
  838. /*
  839. * Blank the screen if blank_mode != 0, else unblank. Return 0 if blanking
  840. * succeeded, != 0 if un-/blanking failed.
  841. * blank_mode == 2: suspend vsync
  842. * blank_mode == 3: suspend hsync
  843. * blank_mode == 4: powerdown
  844. */
  845. static int fsl_diu_blank(int blank_mode, struct fb_info *info)
  846. {
  847. struct mfb_info *mfbi = info->par;
  848. mfbi->blank = blank_mode;
  849. switch (blank_mode) {
  850. case FB_BLANK_VSYNC_SUSPEND:
  851. case FB_BLANK_HSYNC_SUSPEND:
  852. /* FIXME: fixes to enable_panel and enable lcdc needed */
  853. case FB_BLANK_NORMAL:
  854. /* fsl_diu_disable_panel(info);*/
  855. break;
  856. case FB_BLANK_POWERDOWN:
  857. /* disable_lcdc(info); */
  858. break;
  859. case FB_BLANK_UNBLANK:
  860. /* fsl_diu_enable_panel(info);*/
  861. break;
  862. }
  863. return 0;
  864. }
  865. static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
  866. unsigned long arg)
  867. {
  868. struct mfb_info *mfbi = info->par;
  869. struct diu_ad *ad = mfbi->ad;
  870. struct mfb_chroma_key ck;
  871. unsigned char global_alpha;
  872. struct aoi_display_offset aoi_d;
  873. __u32 pix_fmt;
  874. void __user *buf = (void __user *)arg;
  875. if (!arg)
  876. return -EINVAL;
  877. switch (cmd) {
  878. case MFB_SET_PIXFMT:
  879. if (copy_from_user(&pix_fmt, buf, sizeof(pix_fmt)))
  880. return -EFAULT;
  881. ad->pix_fmt = pix_fmt;
  882. pr_debug("Set pixel format to 0x%08x\n", ad->pix_fmt);
  883. break;
  884. case MFB_GET_PIXFMT:
  885. pix_fmt = ad->pix_fmt;
  886. if (copy_to_user(buf, &pix_fmt, sizeof(pix_fmt)))
  887. return -EFAULT;
  888. pr_debug("get pixel format 0x%08x\n", ad->pix_fmt);
  889. break;
  890. case MFB_SET_AOID:
  891. if (copy_from_user(&aoi_d, buf, sizeof(aoi_d)))
  892. return -EFAULT;
  893. mfbi->x_aoi_d = aoi_d.x_aoi_d;
  894. mfbi->y_aoi_d = aoi_d.y_aoi_d;
  895. pr_debug("set AOI display offset of index %d to (%d,%d)\n",
  896. mfbi->index, aoi_d.x_aoi_d, aoi_d.y_aoi_d);
  897. fsl_diu_check_var(&info->var, info);
  898. fsl_diu_set_aoi(info);
  899. break;
  900. case MFB_GET_AOID:
  901. aoi_d.x_aoi_d = mfbi->x_aoi_d;
  902. aoi_d.y_aoi_d = mfbi->y_aoi_d;
  903. if (copy_to_user(buf, &aoi_d, sizeof(aoi_d)))
  904. return -EFAULT;
  905. pr_debug("get AOI display offset of index %d (%d,%d)\n",
  906. mfbi->index, aoi_d.x_aoi_d, aoi_d.y_aoi_d);
  907. break;
  908. case MFB_GET_ALPHA:
  909. global_alpha = mfbi->g_alpha;
  910. if (copy_to_user(buf, &global_alpha, sizeof(global_alpha)))
  911. return -EFAULT;
  912. pr_debug("get global alpha of index %d\n", mfbi->index);
  913. break;
  914. case MFB_SET_ALPHA:
  915. /* set panel information */
  916. if (copy_from_user(&global_alpha, buf, sizeof(global_alpha)))
  917. return -EFAULT;
  918. ad->src_size_g_alpha = (ad->src_size_g_alpha & (~0xff)) |
  919. (global_alpha & 0xff);
  920. mfbi->g_alpha = global_alpha;
  921. pr_debug("set global alpha for index %d\n", mfbi->index);
  922. break;
  923. case MFB_SET_CHROMA_KEY:
  924. /* set panel winformation */
  925. if (copy_from_user(&ck, buf, sizeof(ck)))
  926. return -EFAULT;
  927. if (ck.enable &&
  928. (ck.red_max < ck.red_min ||
  929. ck.green_max < ck.green_min ||
  930. ck.blue_max < ck.blue_min))
  931. return -EINVAL;
  932. if (!ck.enable) {
  933. ad->ckmax_r = 0;
  934. ad->ckmax_g = 0;
  935. ad->ckmax_b = 0;
  936. ad->ckmin_r = 255;
  937. ad->ckmin_g = 255;
  938. ad->ckmin_b = 255;
  939. } else {
  940. ad->ckmax_r = ck.red_max;
  941. ad->ckmax_g = ck.green_max;
  942. ad->ckmax_b = ck.blue_max;
  943. ad->ckmin_r = ck.red_min;
  944. ad->ckmin_g = ck.green_min;
  945. ad->ckmin_b = ck.blue_min;
  946. }
  947. pr_debug("set chroma key\n");
  948. break;
  949. case FBIOGET_GWINFO:
  950. if (mfbi->type == MFB_TYPE_OFF)
  951. return -ENODEV;
  952. /* get graphic window information */
  953. if (copy_to_user(buf, ad, sizeof(*ad)))
  954. return -EFAULT;
  955. break;
  956. case FBIOGET_HWCINFO:
  957. pr_debug("FBIOGET_HWCINFO:0x%08x\n", FBIOGET_HWCINFO);
  958. break;
  959. case FBIOPUT_MODEINFO:
  960. pr_debug("FBIOPUT_MODEINFO:0x%08x\n", FBIOPUT_MODEINFO);
  961. break;
  962. case FBIOGET_DISPINFO:
  963. pr_debug("FBIOGET_DISPINFO:0x%08x\n", FBIOGET_DISPINFO);
  964. break;
  965. default:
  966. printk(KERN_ERR "Unknown ioctl command (0x%08X)\n", cmd);
  967. return -ENOIOCTLCMD;
  968. }
  969. return 0;
  970. }
  971. /* turn on fb if count == 1
  972. */
  973. static int fsl_diu_open(struct fb_info *info, int user)
  974. {
  975. struct mfb_info *mfbi = info->par;
  976. int res = 0;
  977. spin_lock(&diu_lock);
  978. mfbi->count++;
  979. if (mfbi->count == 1) {
  980. pr_debug("open plane index %d\n", mfbi->index);
  981. fsl_diu_check_var(&info->var, info);
  982. res = fsl_diu_set_par(info);
  983. if (res < 0)
  984. mfbi->count--;
  985. else {
  986. res = fsl_diu_enable_panel(info);
  987. if (res < 0)
  988. mfbi->count--;
  989. }
  990. }
  991. spin_unlock(&diu_lock);
  992. return res;
  993. }
  994. /* turn off fb if count == 0
  995. */
  996. static int fsl_diu_release(struct fb_info *info, int user)
  997. {
  998. struct mfb_info *mfbi = info->par;
  999. int res = 0;
  1000. spin_lock(&diu_lock);
  1001. mfbi->count--;
  1002. if (mfbi->count == 0) {
  1003. pr_debug("release plane index %d\n", mfbi->index);
  1004. res = fsl_diu_disable_panel(info);
  1005. if (res < 0)
  1006. mfbi->count++;
  1007. }
  1008. spin_unlock(&diu_lock);
  1009. return res;
  1010. }
  1011. static struct fb_ops fsl_diu_ops = {
  1012. .owner = THIS_MODULE,
  1013. .fb_check_var = fsl_diu_check_var,
  1014. .fb_set_par = fsl_diu_set_par,
  1015. .fb_setcolreg = fsl_diu_setcolreg,
  1016. .fb_blank = fsl_diu_blank,
  1017. .fb_pan_display = fsl_diu_pan_display,
  1018. .fb_fillrect = cfb_fillrect,
  1019. .fb_copyarea = cfb_copyarea,
  1020. .fb_imageblit = cfb_imageblit,
  1021. .fb_ioctl = fsl_diu_ioctl,
  1022. .fb_open = fsl_diu_open,
  1023. .fb_release = fsl_diu_release,
  1024. };
  1025. static int init_fbinfo(struct fb_info *info)
  1026. {
  1027. struct mfb_info *mfbi = info->par;
  1028. info->device = NULL;
  1029. info->var.activate = FB_ACTIVATE_NOW;
  1030. info->fbops = &fsl_diu_ops;
  1031. info->flags = FBINFO_FLAG_DEFAULT;
  1032. info->pseudo_palette = &mfbi->pseudo_palette;
  1033. /* Allocate colormap */
  1034. fb_alloc_cmap(&info->cmap, 16, 0);
  1035. return 0;
  1036. }
  1037. static int __devinit install_fb(struct fb_info *info)
  1038. {
  1039. int rc;
  1040. struct mfb_info *mfbi = info->par;
  1041. const char *aoi_mode, *init_aoi_mode = "320x240";
  1042. if (init_fbinfo(info))
  1043. return -EINVAL;
  1044. if (mfbi->index == 0) /* plane 0 */
  1045. aoi_mode = fb_mode;
  1046. else
  1047. aoi_mode = init_aoi_mode;
  1048. pr_debug("mode used = %s\n", aoi_mode);
  1049. rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
  1050. ARRAY_SIZE(fsl_diu_mode_db), &fsl_diu_default_mode, default_bpp);
  1051. switch (rc) {
  1052. case 1:
  1053. pr_debug("using mode specified in @mode\n");
  1054. break;
  1055. case 2:
  1056. pr_debug("using mode specified in @mode "
  1057. "with ignored refresh rate\n");
  1058. break;
  1059. case 3:
  1060. pr_debug("using mode default mode\n");
  1061. break;
  1062. case 4:
  1063. pr_debug("using mode from list\n");
  1064. break;
  1065. default:
  1066. pr_debug("rc = %d\n", rc);
  1067. pr_debug("failed to find mode\n");
  1068. return -EINVAL;
  1069. break;
  1070. }
  1071. pr_debug("xres_virtual %d\n", info->var.xres_virtual);
  1072. pr_debug("bits_per_pixel %d\n", info->var.bits_per_pixel);
  1073. pr_debug("info->var.yres_virtual = %d\n", info->var.yres_virtual);
  1074. pr_debug("info->fix.line_length = %d\n", info->fix.line_length);
  1075. if (mfbi->type == MFB_TYPE_OFF)
  1076. mfbi->blank = FB_BLANK_NORMAL;
  1077. else
  1078. mfbi->blank = FB_BLANK_UNBLANK;
  1079. if (fsl_diu_check_var(&info->var, info)) {
  1080. printk(KERN_ERR "fb_check_var failed");
  1081. fb_dealloc_cmap(&info->cmap);
  1082. return -EINVAL;
  1083. }
  1084. if (fsl_diu_set_par(info)) {
  1085. printk(KERN_ERR "fb_set_par failed");
  1086. fb_dealloc_cmap(&info->cmap);
  1087. return -EINVAL;
  1088. }
  1089. if (register_framebuffer(info) < 0) {
  1090. printk(KERN_ERR "register_framebuffer failed");
  1091. unmap_video_memory(info);
  1092. fb_dealloc_cmap(&info->cmap);
  1093. return -EINVAL;
  1094. }
  1095. mfbi->registered = 1;
  1096. printk(KERN_INFO "fb%d: %s fb device registered successfully.\n",
  1097. info->node, info->fix.id);
  1098. return 0;
  1099. }
  1100. static void uninstall_fb(struct fb_info *info)
  1101. {
  1102. struct mfb_info *mfbi = info->par;
  1103. if (!mfbi->registered)
  1104. return;
  1105. unregister_framebuffer(info);
  1106. unmap_video_memory(info);
  1107. if (&info->cmap)
  1108. fb_dealloc_cmap(&info->cmap);
  1109. mfbi->registered = 0;
  1110. }
  1111. static irqreturn_t fsl_diu_isr(int irq, void *dev_id)
  1112. {
  1113. struct diu *hw = dr.diu_reg;
  1114. unsigned int status = in_be32(&hw->int_status);
  1115. if (status) {
  1116. /* This is the workaround for underrun */
  1117. if (status & INT_UNDRUN) {
  1118. out_be32(&hw->diu_mode, 0);
  1119. pr_debug("Err: DIU occurs underrun!\n");
  1120. udelay(1);
  1121. out_be32(&hw->diu_mode, 1);
  1122. }
  1123. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1124. else if (status & INT_VSYNC) {
  1125. unsigned int i;
  1126. for (i = 0; i < coherence_data_size;
  1127. i += d_cache_line_size)
  1128. __asm__ __volatile__ (
  1129. "dcbz 0, %[input]"
  1130. ::[input]"r"(&coherence_data[i]));
  1131. }
  1132. #endif
  1133. return IRQ_HANDLED;
  1134. }
  1135. return IRQ_NONE;
  1136. }
  1137. static int request_irq_local(int irq)
  1138. {
  1139. unsigned long status, ints;
  1140. struct diu *hw;
  1141. int ret;
  1142. hw = dr.diu_reg;
  1143. /* Read to clear the status */
  1144. status = in_be32(&hw->int_status);
  1145. ret = request_irq(irq, fsl_diu_isr, 0, "diu", NULL);
  1146. if (ret)
  1147. pr_info("Request diu IRQ failed.\n");
  1148. else {
  1149. ints = INT_PARERR | INT_LS_BF_VS;
  1150. #if !defined(CONFIG_NOT_COHERENT_CACHE)
  1151. ints |= INT_VSYNC;
  1152. #endif
  1153. if (dr.mode == MFB_MODE2 || dr.mode == MFB_MODE3)
  1154. ints |= INT_VSYNC_WB;
  1155. /* Read to clear the status */
  1156. status = in_be32(&hw->int_status);
  1157. out_be32(&hw->int_mask, ints);
  1158. }
  1159. return ret;
  1160. }
  1161. static void free_irq_local(int irq)
  1162. {
  1163. struct diu *hw = dr.diu_reg;
  1164. /* Disable all LCDC interrupt */
  1165. out_be32(&hw->int_mask, 0x1f);
  1166. free_irq(irq, NULL);
  1167. }
  1168. #ifdef CONFIG_PM
  1169. /*
  1170. * Power management hooks. Note that we won't be called from IRQ context,
  1171. * unlike the blank functions above, so we may sleep.
  1172. */
  1173. static int fsl_diu_suspend(struct of_device *ofdev, pm_message_t state)
  1174. {
  1175. struct fsl_diu_data *machine_data;
  1176. machine_data = dev_get_drvdata(&ofdev->dev);
  1177. disable_lcdc(machine_data->fsl_diu_info[0]);
  1178. return 0;
  1179. }
  1180. static int fsl_diu_resume(struct of_device *ofdev)
  1181. {
  1182. struct fsl_diu_data *machine_data;
  1183. machine_data = dev_get_drvdata(&ofdev->dev);
  1184. enable_lcdc(machine_data->fsl_diu_info[0]);
  1185. return 0;
  1186. }
  1187. #else
  1188. #define fsl_diu_suspend NULL
  1189. #define fsl_diu_resume NULL
  1190. #endif /* CONFIG_PM */
  1191. /* Align to 64-bit(8-byte), 32-byte, etc. */
  1192. static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
  1193. {
  1194. u32 offset, ssize;
  1195. u32 mask;
  1196. dma_addr_t paddr = 0;
  1197. ssize = size + bytes_align;
  1198. buf->vaddr = dma_alloc_coherent(NULL, ssize, &paddr, GFP_DMA |
  1199. __GFP_ZERO);
  1200. if (!buf->vaddr)
  1201. return -ENOMEM;
  1202. buf->paddr = (__u32) paddr;
  1203. mask = bytes_align - 1;
  1204. offset = (u32)buf->paddr & mask;
  1205. if (offset) {
  1206. buf->offset = bytes_align - offset;
  1207. buf->paddr = (u32)buf->paddr + offset;
  1208. } else
  1209. buf->offset = 0;
  1210. return 0;
  1211. }
  1212. static void free_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
  1213. {
  1214. dma_free_coherent(NULL, size + bytes_align,
  1215. buf->vaddr, (buf->paddr - buf->offset));
  1216. return;
  1217. }
  1218. static ssize_t store_monitor(struct device *device,
  1219. struct device_attribute *attr, const char *buf, size_t count)
  1220. {
  1221. int old_monitor_port;
  1222. unsigned long val;
  1223. struct fsl_diu_data *machine_data =
  1224. container_of(attr, struct fsl_diu_data, dev_attr);
  1225. if (strict_strtoul(buf, 10, &val))
  1226. return 0;
  1227. old_monitor_port = machine_data->monitor_port;
  1228. machine_data->monitor_port = diu_ops.set_sysfs_monitor_port(val);
  1229. if (old_monitor_port != machine_data->monitor_port) {
  1230. /* All AOIs need adjust pixel format
  1231. * fsl_diu_set_par only change the pixsel format here
  1232. * unlikely to fail. */
  1233. fsl_diu_set_par(machine_data->fsl_diu_info[0]);
  1234. fsl_diu_set_par(machine_data->fsl_diu_info[1]);
  1235. fsl_diu_set_par(machine_data->fsl_diu_info[2]);
  1236. fsl_diu_set_par(machine_data->fsl_diu_info[3]);
  1237. fsl_diu_set_par(machine_data->fsl_diu_info[4]);
  1238. }
  1239. return count;
  1240. }
  1241. static ssize_t show_monitor(struct device *device,
  1242. struct device_attribute *attr, char *buf)
  1243. {
  1244. struct fsl_diu_data *machine_data =
  1245. container_of(attr, struct fsl_diu_data, dev_attr);
  1246. return diu_ops.show_monitor_port(machine_data->monitor_port, buf);
  1247. }
  1248. static int __devinit fsl_diu_probe(struct of_device *ofdev,
  1249. const struct of_device_id *match)
  1250. {
  1251. struct device_node *np = ofdev->node;
  1252. struct mfb_info *mfbi;
  1253. phys_addr_t dummy_ad_addr;
  1254. int ret, i, error = 0;
  1255. struct resource res;
  1256. struct fsl_diu_data *machine_data;
  1257. machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL);
  1258. if (!machine_data)
  1259. return -ENOMEM;
  1260. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
  1261. machine_data->fsl_diu_info[i] =
  1262. framebuffer_alloc(sizeof(struct mfb_info), &ofdev->dev);
  1263. if (!machine_data->fsl_diu_info[i]) {
  1264. dev_err(&ofdev->dev, "cannot allocate memory\n");
  1265. ret = -ENOMEM;
  1266. goto error2;
  1267. }
  1268. mfbi = machine_data->fsl_diu_info[i]->par;
  1269. memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
  1270. mfbi->parent = machine_data;
  1271. }
  1272. ret = of_address_to_resource(np, 0, &res);
  1273. if (ret) {
  1274. dev_err(&ofdev->dev, "could not obtain DIU address\n");
  1275. goto error;
  1276. }
  1277. if (!res.start) {
  1278. dev_err(&ofdev->dev, "invalid DIU address\n");
  1279. goto error;
  1280. }
  1281. dev_dbg(&ofdev->dev, "%s, res.start: 0x%08x\n", __func__, res.start);
  1282. dr.diu_reg = ioremap(res.start, sizeof(struct diu));
  1283. if (!dr.diu_reg) {
  1284. dev_err(&ofdev->dev, "Err: can't map DIU registers!\n");
  1285. ret = -EFAULT;
  1286. goto error2;
  1287. }
  1288. out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU anyway*/
  1289. /* Get the IRQ of the DIU */
  1290. machine_data->irq = irq_of_parse_and_map(np, 0);
  1291. if (!machine_data->irq) {
  1292. dev_err(&ofdev->dev, "could not get DIU IRQ\n");
  1293. ret = -EINVAL;
  1294. goto error;
  1295. }
  1296. machine_data->monitor_port = monitor_port;
  1297. /* Area descriptor memory pool aligns to 64-bit boundary */
  1298. if (allocate_buf(&pool.ad, sizeof(struct diu_ad) * FSL_AOI_NUM, 8))
  1299. return -ENOMEM;
  1300. /* Get memory for Gamma Table - 32-byte aligned memory */
  1301. if (allocate_buf(&pool.gamma, 768, 32)) {
  1302. ret = -ENOMEM;
  1303. goto error;
  1304. }
  1305. /* For performance, cursor bitmap buffer aligns to 32-byte boundary */
  1306. if (allocate_buf(&pool.cursor, MAX_CURS * MAX_CURS * 2, 32)) {
  1307. ret = -ENOMEM;
  1308. goto error;
  1309. }
  1310. i = ARRAY_SIZE(machine_data->fsl_diu_info);
  1311. machine_data->dummy_ad = (struct diu_ad *)
  1312. ((u32)pool.ad.vaddr + pool.ad.offset) + i;
  1313. machine_data->dummy_ad->paddr = pool.ad.paddr +
  1314. i * sizeof(struct diu_ad);
  1315. machine_data->dummy_aoi_virt = fsl_diu_alloc(64, &dummy_ad_addr);
  1316. if (!machine_data->dummy_aoi_virt) {
  1317. ret = -ENOMEM;
  1318. goto error;
  1319. }
  1320. machine_data->dummy_ad->addr = cpu_to_le32(dummy_ad_addr);
  1321. machine_data->dummy_ad->pix_fmt = 0x88882317;
  1322. machine_data->dummy_ad->src_size_g_alpha = cpu_to_le32((4 << 12) | 4);
  1323. machine_data->dummy_ad->aoi_size = cpu_to_le32((4 << 16) | 2);
  1324. machine_data->dummy_ad->offset_xyi = 0;
  1325. machine_data->dummy_ad->offset_xyd = 0;
  1326. machine_data->dummy_ad->next_ad = 0;
  1327. out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr);
  1328. out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr);
  1329. out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr);
  1330. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
  1331. machine_data->fsl_diu_info[i]->fix.smem_start = 0;
  1332. mfbi = machine_data->fsl_diu_info[i]->par;
  1333. mfbi->ad = (struct diu_ad *)((u32)pool.ad.vaddr
  1334. + pool.ad.offset) + i;
  1335. mfbi->ad->paddr = pool.ad.paddr + i * sizeof(struct diu_ad);
  1336. ret = install_fb(machine_data->fsl_diu_info[i]);
  1337. if (ret) {
  1338. dev_err(&ofdev->dev,
  1339. "Failed to register framebuffer %d\n",
  1340. i);
  1341. goto error;
  1342. }
  1343. }
  1344. if (request_irq_local(machine_data->irq)) {
  1345. dev_err(machine_data->fsl_diu_info[0]->dev,
  1346. "could not request irq for diu.");
  1347. goto error;
  1348. }
  1349. machine_data->dev_attr.attr.name = "monitor";
  1350. machine_data->dev_attr.attr.mode = S_IRUGO|S_IWUSR;
  1351. machine_data->dev_attr.show = show_monitor;
  1352. machine_data->dev_attr.store = store_monitor;
  1353. error = device_create_file(machine_data->fsl_diu_info[0]->dev,
  1354. &machine_data->dev_attr);
  1355. if (error) {
  1356. dev_err(machine_data->fsl_diu_info[0]->dev,
  1357. "could not create sysfs %s file\n",
  1358. machine_data->dev_attr.attr.name);
  1359. }
  1360. dev_set_drvdata(&ofdev->dev, machine_data);
  1361. return 0;
  1362. error:
  1363. for (i = ARRAY_SIZE(machine_data->fsl_diu_info);
  1364. i > 0; i--)
  1365. uninstall_fb(machine_data->fsl_diu_info[i - 1]);
  1366. if (pool.ad.vaddr)
  1367. free_buf(&pool.ad, sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
  1368. if (pool.gamma.vaddr)
  1369. free_buf(&pool.gamma, 768, 32);
  1370. if (pool.cursor.vaddr)
  1371. free_buf(&pool.cursor, MAX_CURS * MAX_CURS * 2, 32);
  1372. if (machine_data->dummy_aoi_virt)
  1373. fsl_diu_free(machine_data->dummy_aoi_virt, 64);
  1374. iounmap(dr.diu_reg);
  1375. error2:
  1376. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1377. if (machine_data->fsl_diu_info[i])
  1378. framebuffer_release(machine_data->fsl_diu_info[i]);
  1379. kfree(machine_data);
  1380. return ret;
  1381. }
  1382. static int fsl_diu_remove(struct of_device *ofdev)
  1383. {
  1384. struct fsl_diu_data *machine_data;
  1385. int i;
  1386. machine_data = dev_get_drvdata(&ofdev->dev);
  1387. disable_lcdc(machine_data->fsl_diu_info[0]);
  1388. free_irq_local(machine_data->irq);
  1389. for (i = ARRAY_SIZE(machine_data->fsl_diu_info); i > 0; i--)
  1390. uninstall_fb(machine_data->fsl_diu_info[i - 1]);
  1391. if (pool.ad.vaddr)
  1392. free_buf(&pool.ad, sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
  1393. if (pool.gamma.vaddr)
  1394. free_buf(&pool.gamma, 768, 32);
  1395. if (pool.cursor.vaddr)
  1396. free_buf(&pool.cursor, MAX_CURS * MAX_CURS * 2, 32);
  1397. if (machine_data->dummy_aoi_virt)
  1398. fsl_diu_free(machine_data->dummy_aoi_virt, 64);
  1399. iounmap(dr.diu_reg);
  1400. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1401. if (machine_data->fsl_diu_info[i])
  1402. framebuffer_release(machine_data->fsl_diu_info[i]);
  1403. kfree(machine_data);
  1404. return 0;
  1405. }
  1406. #ifndef MODULE
  1407. static int __init fsl_diu_setup(char *options)
  1408. {
  1409. char *opt;
  1410. unsigned long val;
  1411. if (!options || !*options)
  1412. return 0;
  1413. while ((opt = strsep(&options, ",")) != NULL) {
  1414. if (!*opt)
  1415. continue;
  1416. if (!strncmp(opt, "monitor=", 8)) {
  1417. if (!strict_strtoul(opt + 8, 10, &val) && (val <= 2))
  1418. monitor_port = val;
  1419. } else if (!strncmp(opt, "bpp=", 4)) {
  1420. if (!strict_strtoul(opt + 4, 10, &val))
  1421. default_bpp = val;
  1422. } else
  1423. fb_mode = opt;
  1424. }
  1425. return 0;
  1426. }
  1427. #endif
  1428. static struct of_device_id fsl_diu_match[] = {
  1429. {
  1430. .compatible = "fsl,diu",
  1431. },
  1432. {}
  1433. };
  1434. MODULE_DEVICE_TABLE(of, fsl_diu_match);
  1435. static struct of_platform_driver fsl_diu_driver = {
  1436. .owner = THIS_MODULE,
  1437. .name = "fsl_diu",
  1438. .match_table = fsl_diu_match,
  1439. .probe = fsl_diu_probe,
  1440. .remove = fsl_diu_remove,
  1441. .suspend = fsl_diu_suspend,
  1442. .resume = fsl_diu_resume,
  1443. };
  1444. static int __init fsl_diu_init(void)
  1445. {
  1446. #ifdef CONFIG_NOT_COHERENT_CACHE
  1447. struct device_node *np;
  1448. const u32 *prop;
  1449. #endif
  1450. int ret;
  1451. #ifndef MODULE
  1452. char *option;
  1453. /*
  1454. * For kernel boot options (in 'video=xxxfb:<options>' format)
  1455. */
  1456. if (fb_get_options("fslfb", &option))
  1457. return -ENODEV;
  1458. fsl_diu_setup(option);
  1459. #endif
  1460. printk(KERN_INFO "Freescale DIU driver\n");
  1461. #ifdef CONFIG_NOT_COHERENT_CACHE
  1462. np = of_find_node_by_type(NULL, "cpu");
  1463. if (!np) {
  1464. printk(KERN_ERR "Err: can't find device node 'cpu'\n");
  1465. return -ENODEV;
  1466. }
  1467. prop = of_get_property(np, "d-cache-size", NULL);
  1468. if (prop == NULL) {
  1469. of_node_put(np);
  1470. return -ENODEV;
  1471. }
  1472. /* Freescale PLRU requires 13/8 times the cache size to do a proper
  1473. displacement flush
  1474. */
  1475. coherence_data_size = *prop * 13;
  1476. coherence_data_size /= 8;
  1477. prop = of_get_property(np, "d-cache-line-size", NULL);
  1478. if (prop == NULL) {
  1479. of_node_put(np);
  1480. return -ENODEV;
  1481. }
  1482. d_cache_line_size = *prop;
  1483. of_node_put(np);
  1484. coherence_data = vmalloc(coherence_data_size);
  1485. if (!coherence_data)
  1486. return -ENOMEM;
  1487. #endif
  1488. ret = of_register_platform_driver(&fsl_diu_driver);
  1489. if (ret) {
  1490. printk(KERN_ERR
  1491. "fsl-diu: failed to register platform driver\n");
  1492. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1493. vfree(coherence_data);
  1494. #endif
  1495. iounmap(dr.diu_reg);
  1496. }
  1497. return ret;
  1498. }
  1499. static void __exit fsl_diu_exit(void)
  1500. {
  1501. of_unregister_platform_driver(&fsl_diu_driver);
  1502. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1503. vfree(coherence_data);
  1504. #endif
  1505. }
  1506. module_init(fsl_diu_init);
  1507. module_exit(fsl_diu_exit);
  1508. MODULE_AUTHOR("York Sun <yorksun@freescale.com>");
  1509. MODULE_DESCRIPTION("Freescale DIU framebuffer driver");
  1510. MODULE_LICENSE("GPL");
  1511. module_param_named(mode, fb_mode, charp, 0);
  1512. MODULE_PARM_DESC(mode,
  1513. "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
  1514. module_param_named(bpp, default_bpp, ulong, 0);
  1515. MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified mode");
  1516. module_param_named(monitor, monitor_port, int, 0);
  1517. MODULE_PARM_DESC(monitor,
  1518. "Specify the monitor port (0, 1 or 2) if supported by the platform");