omap_hwmod.c 66 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466
  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <plat/common.h>
  139. #include <plat/cpu.h>
  140. #include "clockdomain.h"
  141. #include "powerdomain.h"
  142. #include <plat/clock.h>
  143. #include <plat/omap_hwmod.h>
  144. #include <plat/prcm.h>
  145. #include "cm2xxx_3xxx.h"
  146. #include "cm44xx.h"
  147. #include "prm2xxx_3xxx.h"
  148. #include "prm44xx.h"
  149. #include "mux.h"
  150. /* Maximum microseconds to wait for OMAP module to softreset */
  151. #define MAX_MODULE_SOFTRESET_WAIT 10000
  152. /* Name of the OMAP hwmod for the MPU */
  153. #define MPU_INITIATOR_NAME "mpu"
  154. /* omap_hwmod_list contains all registered struct omap_hwmods */
  155. static LIST_HEAD(omap_hwmod_list);
  156. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  157. static struct omap_hwmod *mpu_oh;
  158. /* Private functions */
  159. /**
  160. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  161. * @oh: struct omap_hwmod *
  162. *
  163. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  164. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  165. * OCP_SYSCONFIG register or 0 upon success.
  166. */
  167. static int _update_sysc_cache(struct omap_hwmod *oh)
  168. {
  169. if (!oh->class->sysc) {
  170. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  171. return -EINVAL;
  172. }
  173. /* XXX ensure module interface clock is up */
  174. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  175. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  176. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  177. return 0;
  178. }
  179. /**
  180. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  181. * @v: OCP_SYSCONFIG value to write
  182. * @oh: struct omap_hwmod *
  183. *
  184. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  185. * one. No return value.
  186. */
  187. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  188. {
  189. if (!oh->class->sysc) {
  190. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  191. return;
  192. }
  193. /* XXX ensure module interface clock is up */
  194. /* Module might have lost context, always update cache and register */
  195. oh->_sysc_cache = v;
  196. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  197. }
  198. /**
  199. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  200. * @oh: struct omap_hwmod *
  201. * @standbymode: MIDLEMODE field bits
  202. * @v: pointer to register contents to modify
  203. *
  204. * Update the master standby mode bits in @v to be @standbymode for
  205. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  206. * upon error or 0 upon success.
  207. */
  208. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  209. u32 *v)
  210. {
  211. u32 mstandby_mask;
  212. u8 mstandby_shift;
  213. if (!oh->class->sysc ||
  214. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  215. return -EINVAL;
  216. if (!oh->class->sysc->sysc_fields) {
  217. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  218. return -EINVAL;
  219. }
  220. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  221. mstandby_mask = (0x3 << mstandby_shift);
  222. *v &= ~mstandby_mask;
  223. *v |= __ffs(standbymode) << mstandby_shift;
  224. return 0;
  225. }
  226. /**
  227. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  228. * @oh: struct omap_hwmod *
  229. * @idlemode: SIDLEMODE field bits
  230. * @v: pointer to register contents to modify
  231. *
  232. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  233. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  234. * or 0 upon success.
  235. */
  236. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  237. {
  238. u32 sidle_mask;
  239. u8 sidle_shift;
  240. if (!oh->class->sysc ||
  241. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  242. return -EINVAL;
  243. if (!oh->class->sysc->sysc_fields) {
  244. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  245. return -EINVAL;
  246. }
  247. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  248. sidle_mask = (0x3 << sidle_shift);
  249. *v &= ~sidle_mask;
  250. *v |= __ffs(idlemode) << sidle_shift;
  251. return 0;
  252. }
  253. /**
  254. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  255. * @oh: struct omap_hwmod *
  256. * @clockact: CLOCKACTIVITY field bits
  257. * @v: pointer to register contents to modify
  258. *
  259. * Update the clockactivity mode bits in @v to be @clockact for the
  260. * @oh hwmod. Used for additional powersaving on some modules. Does
  261. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  262. * success.
  263. */
  264. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  265. {
  266. u32 clkact_mask;
  267. u8 clkact_shift;
  268. if (!oh->class->sysc ||
  269. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  270. return -EINVAL;
  271. if (!oh->class->sysc->sysc_fields) {
  272. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  273. return -EINVAL;
  274. }
  275. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  276. clkact_mask = (0x3 << clkact_shift);
  277. *v &= ~clkact_mask;
  278. *v |= clockact << clkact_shift;
  279. return 0;
  280. }
  281. /**
  282. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  283. * @oh: struct omap_hwmod *
  284. * @v: pointer to register contents to modify
  285. *
  286. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  287. * error or 0 upon success.
  288. */
  289. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  290. {
  291. u32 softrst_mask;
  292. if (!oh->class->sysc ||
  293. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  294. return -EINVAL;
  295. if (!oh->class->sysc->sysc_fields) {
  296. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  297. return -EINVAL;
  298. }
  299. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  300. *v |= softrst_mask;
  301. return 0;
  302. }
  303. /**
  304. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  305. * @oh: struct omap_hwmod *
  306. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  307. * @v: pointer to register contents to modify
  308. *
  309. * Update the module autoidle bit in @v to be @autoidle for the @oh
  310. * hwmod. The autoidle bit controls whether the module can gate
  311. * internal clocks automatically when it isn't doing anything; the
  312. * exact function of this bit varies on a per-module basis. This
  313. * function does not write to the hardware. Returns -EINVAL upon
  314. * error or 0 upon success.
  315. */
  316. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  317. u32 *v)
  318. {
  319. u32 autoidle_mask;
  320. u8 autoidle_shift;
  321. if (!oh->class->sysc ||
  322. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  323. return -EINVAL;
  324. if (!oh->class->sysc->sysc_fields) {
  325. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  326. return -EINVAL;
  327. }
  328. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  329. autoidle_mask = (0x1 << autoidle_shift);
  330. *v &= ~autoidle_mask;
  331. *v |= autoidle << autoidle_shift;
  332. return 0;
  333. }
  334. /**
  335. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  336. * @oh: struct omap_hwmod *
  337. *
  338. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  339. * upon error or 0 upon success.
  340. */
  341. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  342. {
  343. if (!oh->class->sysc ||
  344. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  345. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  346. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  347. return -EINVAL;
  348. if (!oh->class->sysc->sysc_fields) {
  349. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  350. return -EINVAL;
  351. }
  352. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  353. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  354. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  355. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  356. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  357. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  358. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  359. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  360. return 0;
  361. }
  362. /**
  363. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  364. * @oh: struct omap_hwmod *
  365. *
  366. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  367. * upon error or 0 upon success.
  368. */
  369. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  370. {
  371. if (!oh->class->sysc ||
  372. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  373. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  374. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  375. return -EINVAL;
  376. if (!oh->class->sysc->sysc_fields) {
  377. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  378. return -EINVAL;
  379. }
  380. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  381. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  382. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  383. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  384. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  385. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  386. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  387. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  388. return 0;
  389. }
  390. /**
  391. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  392. * @oh: struct omap_hwmod *
  393. *
  394. * Prevent the hardware module @oh from entering idle while the
  395. * hardare module initiator @init_oh is active. Useful when a module
  396. * will be accessed by a particular initiator (e.g., if a module will
  397. * be accessed by the IVA, there should be a sleepdep between the IVA
  398. * initiator and the module). Only applies to modules in smart-idle
  399. * mode. If the clockdomain is marked as not needing autodeps, return
  400. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  401. * passes along clkdm_add_sleepdep() value upon success.
  402. */
  403. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  404. {
  405. if (!oh->_clk)
  406. return -EINVAL;
  407. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  408. return 0;
  409. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  410. }
  411. /**
  412. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  413. * @oh: struct omap_hwmod *
  414. *
  415. * Allow the hardware module @oh to enter idle while the hardare
  416. * module initiator @init_oh is active. Useful when a module will not
  417. * be accessed by a particular initiator (e.g., if a module will not
  418. * be accessed by the IVA, there should be no sleepdep between the IVA
  419. * initiator and the module). Only applies to modules in smart-idle
  420. * mode. If the clockdomain is marked as not needing autodeps, return
  421. * 0 without doing anything. Returns -EINVAL upon error or passes
  422. * along clkdm_del_sleepdep() value upon success.
  423. */
  424. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  425. {
  426. if (!oh->_clk)
  427. return -EINVAL;
  428. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  429. return 0;
  430. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  431. }
  432. /**
  433. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  434. * @oh: struct omap_hwmod *
  435. *
  436. * Called from _init_clocks(). Populates the @oh _clk (main
  437. * functional clock pointer) if a main_clk is present. Returns 0 on
  438. * success or -EINVAL on error.
  439. */
  440. static int _init_main_clk(struct omap_hwmod *oh)
  441. {
  442. int ret = 0;
  443. if (!oh->main_clk)
  444. return 0;
  445. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  446. if (!oh->_clk) {
  447. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  448. oh->name, oh->main_clk);
  449. return -EINVAL;
  450. }
  451. if (!oh->_clk->clkdm)
  452. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  453. oh->main_clk, oh->_clk->name);
  454. return ret;
  455. }
  456. /**
  457. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  458. * @oh: struct omap_hwmod *
  459. *
  460. * Called from _init_clocks(). Populates the @oh OCP slave interface
  461. * clock pointers. Returns 0 on success or -EINVAL on error.
  462. */
  463. static int _init_interface_clks(struct omap_hwmod *oh)
  464. {
  465. struct clk *c;
  466. int i;
  467. int ret = 0;
  468. if (oh->slaves_cnt == 0)
  469. return 0;
  470. for (i = 0; i < oh->slaves_cnt; i++) {
  471. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  472. if (!os->clk)
  473. continue;
  474. c = omap_clk_get_by_name(os->clk);
  475. if (!c) {
  476. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  477. oh->name, os->clk);
  478. ret = -EINVAL;
  479. }
  480. os->_clk = c;
  481. }
  482. return ret;
  483. }
  484. /**
  485. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  486. * @oh: struct omap_hwmod *
  487. *
  488. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  489. * clock pointers. Returns 0 on success or -EINVAL on error.
  490. */
  491. static int _init_opt_clks(struct omap_hwmod *oh)
  492. {
  493. struct omap_hwmod_opt_clk *oc;
  494. struct clk *c;
  495. int i;
  496. int ret = 0;
  497. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  498. c = omap_clk_get_by_name(oc->clk);
  499. if (!c) {
  500. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  501. oh->name, oc->clk);
  502. ret = -EINVAL;
  503. }
  504. oc->_clk = c;
  505. }
  506. return ret;
  507. }
  508. /**
  509. * _enable_clocks - enable hwmod main clock and interface clocks
  510. * @oh: struct omap_hwmod *
  511. *
  512. * Enables all clocks necessary for register reads and writes to succeed
  513. * on the hwmod @oh. Returns 0.
  514. */
  515. static int _enable_clocks(struct omap_hwmod *oh)
  516. {
  517. int i;
  518. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  519. if (oh->_clk)
  520. clk_enable(oh->_clk);
  521. if (oh->slaves_cnt > 0) {
  522. for (i = 0; i < oh->slaves_cnt; i++) {
  523. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  524. struct clk *c = os->_clk;
  525. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  526. clk_enable(c);
  527. }
  528. }
  529. /* The opt clocks are controlled by the device driver. */
  530. return 0;
  531. }
  532. /**
  533. * _disable_clocks - disable hwmod main clock and interface clocks
  534. * @oh: struct omap_hwmod *
  535. *
  536. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  537. */
  538. static int _disable_clocks(struct omap_hwmod *oh)
  539. {
  540. int i;
  541. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  542. if (oh->_clk)
  543. clk_disable(oh->_clk);
  544. if (oh->slaves_cnt > 0) {
  545. for (i = 0; i < oh->slaves_cnt; i++) {
  546. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  547. struct clk *c = os->_clk;
  548. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  549. clk_disable(c);
  550. }
  551. }
  552. /* The opt clocks are controlled by the device driver. */
  553. return 0;
  554. }
  555. static void _enable_optional_clocks(struct omap_hwmod *oh)
  556. {
  557. struct omap_hwmod_opt_clk *oc;
  558. int i;
  559. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  560. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  561. if (oc->_clk) {
  562. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  563. oc->_clk->name);
  564. clk_enable(oc->_clk);
  565. }
  566. }
  567. static void _disable_optional_clocks(struct omap_hwmod *oh)
  568. {
  569. struct omap_hwmod_opt_clk *oc;
  570. int i;
  571. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  572. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  573. if (oc->_clk) {
  574. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  575. oc->_clk->name);
  576. clk_disable(oc->_clk);
  577. }
  578. }
  579. /**
  580. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  581. * @oh: struct omap_hwmod *oh
  582. *
  583. * Count and return the number of MPU IRQs associated with the hwmod
  584. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  585. * NULL.
  586. */
  587. static int _count_mpu_irqs(struct omap_hwmod *oh)
  588. {
  589. struct omap_hwmod_irq_info *ohii;
  590. int i = 0;
  591. if (!oh || !oh->mpu_irqs)
  592. return 0;
  593. do {
  594. ohii = &oh->mpu_irqs[i++];
  595. } while (ohii->irq != -1);
  596. return i;
  597. }
  598. /**
  599. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  600. * @oh: struct omap_hwmod *oh
  601. *
  602. * Count and return the number of SDMA request lines associated with
  603. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  604. * if @oh is NULL.
  605. */
  606. static int _count_sdma_reqs(struct omap_hwmod *oh)
  607. {
  608. struct omap_hwmod_dma_info *ohdi;
  609. int i = 0;
  610. if (!oh || !oh->sdma_reqs)
  611. return 0;
  612. do {
  613. ohdi = &oh->sdma_reqs[i++];
  614. } while (ohdi->dma_req != -1);
  615. return i;
  616. }
  617. /**
  618. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  619. * @oh: struct omap_hwmod *oh
  620. *
  621. * Count and return the number of address space ranges associated with
  622. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  623. * if @oh is NULL.
  624. */
  625. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  626. {
  627. struct omap_hwmod_addr_space *mem;
  628. int i = 0;
  629. if (!os || !os->addr)
  630. return 0;
  631. do {
  632. mem = &os->addr[i++];
  633. } while (mem->pa_start != mem->pa_end);
  634. return i;
  635. }
  636. /**
  637. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  638. * @oh: struct omap_hwmod *
  639. *
  640. * Returns the array index of the OCP slave port that the MPU
  641. * addresses the device on, or -EINVAL upon error or not found.
  642. */
  643. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  644. {
  645. int i;
  646. int found = 0;
  647. if (!oh || oh->slaves_cnt == 0)
  648. return -EINVAL;
  649. for (i = 0; i < oh->slaves_cnt; i++) {
  650. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  651. if (os->user & OCP_USER_MPU) {
  652. found = 1;
  653. break;
  654. }
  655. }
  656. if (found)
  657. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  658. oh->name, i);
  659. else
  660. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  661. oh->name);
  662. return (found) ? i : -EINVAL;
  663. }
  664. /**
  665. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  666. * @oh: struct omap_hwmod *
  667. *
  668. * Return the virtual address of the base of the register target of
  669. * device @oh, or NULL on error.
  670. */
  671. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  672. {
  673. struct omap_hwmod_ocp_if *os;
  674. struct omap_hwmod_addr_space *mem;
  675. int i = 0, found = 0;
  676. void __iomem *va_start;
  677. if (!oh || oh->slaves_cnt == 0)
  678. return NULL;
  679. os = oh->slaves[index];
  680. if (!os->addr)
  681. return NULL;
  682. do {
  683. mem = &os->addr[i++];
  684. if (mem->flags & ADDR_TYPE_RT)
  685. found = 1;
  686. } while (!found && mem->pa_start != mem->pa_end);
  687. if (found) {
  688. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  689. if (!va_start) {
  690. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  691. return NULL;
  692. }
  693. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  694. oh->name, va_start);
  695. } else {
  696. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  697. oh->name);
  698. }
  699. return (found) ? va_start : NULL;
  700. }
  701. /**
  702. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  703. * @oh: struct omap_hwmod *
  704. *
  705. * If module is marked as SWSUP_SIDLE, force the module out of slave
  706. * idle; otherwise, configure it for smart-idle. If module is marked
  707. * as SWSUP_MSUSPEND, force the module out of master standby;
  708. * otherwise, configure it for smart-standby. No return value.
  709. */
  710. static void _enable_sysc(struct omap_hwmod *oh)
  711. {
  712. u8 idlemode, sf;
  713. u32 v;
  714. if (!oh->class->sysc)
  715. return;
  716. v = oh->_sysc_cache;
  717. sf = oh->class->sysc->sysc_flags;
  718. if (sf & SYSC_HAS_SIDLEMODE) {
  719. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  720. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  721. _set_slave_idlemode(oh, idlemode, &v);
  722. }
  723. if (sf & SYSC_HAS_MIDLEMODE) {
  724. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  725. idlemode = HWMOD_IDLEMODE_NO;
  726. } else {
  727. if (sf & SYSC_HAS_ENAWAKEUP)
  728. _enable_wakeup(oh, &v);
  729. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  730. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  731. else
  732. idlemode = HWMOD_IDLEMODE_SMART;
  733. }
  734. _set_master_standbymode(oh, idlemode, &v);
  735. }
  736. /*
  737. * XXX The clock framework should handle this, by
  738. * calling into this code. But this must wait until the
  739. * clock structures are tagged with omap_hwmod entries
  740. */
  741. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  742. (sf & SYSC_HAS_CLOCKACTIVITY))
  743. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  744. /* If slave is in SMARTIDLE, also enable wakeup */
  745. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  746. _enable_wakeup(oh, &v);
  747. _write_sysconfig(v, oh);
  748. /*
  749. * Set the autoidle bit only after setting the smartidle bit
  750. * Setting this will not have any impact on the other modules.
  751. */
  752. if (sf & SYSC_HAS_AUTOIDLE) {
  753. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  754. 0 : 1;
  755. _set_module_autoidle(oh, idlemode, &v);
  756. _write_sysconfig(v, oh);
  757. }
  758. }
  759. /**
  760. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  761. * @oh: struct omap_hwmod *
  762. *
  763. * If module is marked as SWSUP_SIDLE, force the module into slave
  764. * idle; otherwise, configure it for smart-idle. If module is marked
  765. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  766. * configure it for smart-standby. No return value.
  767. */
  768. static void _idle_sysc(struct omap_hwmod *oh)
  769. {
  770. u8 idlemode, sf;
  771. u32 v;
  772. if (!oh->class->sysc)
  773. return;
  774. v = oh->_sysc_cache;
  775. sf = oh->class->sysc->sysc_flags;
  776. if (sf & SYSC_HAS_SIDLEMODE) {
  777. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  778. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  779. _set_slave_idlemode(oh, idlemode, &v);
  780. }
  781. if (sf & SYSC_HAS_MIDLEMODE) {
  782. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  783. idlemode = HWMOD_IDLEMODE_FORCE;
  784. } else {
  785. if (sf & SYSC_HAS_ENAWAKEUP)
  786. _enable_wakeup(oh, &v);
  787. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  788. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  789. else
  790. idlemode = HWMOD_IDLEMODE_SMART;
  791. }
  792. _set_master_standbymode(oh, idlemode, &v);
  793. }
  794. /* If slave is in SMARTIDLE, also enable wakeup */
  795. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  796. _enable_wakeup(oh, &v);
  797. _write_sysconfig(v, oh);
  798. }
  799. /**
  800. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  801. * @oh: struct omap_hwmod *
  802. *
  803. * Force the module into slave idle and master suspend. No return
  804. * value.
  805. */
  806. static void _shutdown_sysc(struct omap_hwmod *oh)
  807. {
  808. u32 v;
  809. u8 sf;
  810. if (!oh->class->sysc)
  811. return;
  812. v = oh->_sysc_cache;
  813. sf = oh->class->sysc->sysc_flags;
  814. if (sf & SYSC_HAS_SIDLEMODE)
  815. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  816. if (sf & SYSC_HAS_MIDLEMODE)
  817. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  818. if (sf & SYSC_HAS_AUTOIDLE)
  819. _set_module_autoidle(oh, 1, &v);
  820. _write_sysconfig(v, oh);
  821. }
  822. /**
  823. * _lookup - find an omap_hwmod by name
  824. * @name: find an omap_hwmod by name
  825. *
  826. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  827. */
  828. static struct omap_hwmod *_lookup(const char *name)
  829. {
  830. struct omap_hwmod *oh, *temp_oh;
  831. oh = NULL;
  832. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  833. if (!strcmp(name, temp_oh->name)) {
  834. oh = temp_oh;
  835. break;
  836. }
  837. }
  838. return oh;
  839. }
  840. /**
  841. * _init_clocks - clk_get() all clocks associated with this hwmod
  842. * @oh: struct omap_hwmod *
  843. * @data: not used; pass NULL
  844. *
  845. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  846. * Resolves all clock names embedded in the hwmod. Returns 0 on
  847. * success, or a negative error code on failure.
  848. */
  849. static int _init_clocks(struct omap_hwmod *oh, void *data)
  850. {
  851. int ret = 0;
  852. if (oh->_state != _HWMOD_STATE_REGISTERED)
  853. return 0;
  854. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  855. ret |= _init_main_clk(oh);
  856. ret |= _init_interface_clks(oh);
  857. ret |= _init_opt_clks(oh);
  858. if (!ret)
  859. oh->_state = _HWMOD_STATE_CLKS_INITED;
  860. else
  861. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  862. return ret;
  863. }
  864. /**
  865. * _wait_target_ready - wait for a module to leave slave idle
  866. * @oh: struct omap_hwmod *
  867. *
  868. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  869. * does not have an IDLEST bit or if the module successfully leaves
  870. * slave idle; otherwise, pass along the return value of the
  871. * appropriate *_cm_wait_module_ready() function.
  872. */
  873. static int _wait_target_ready(struct omap_hwmod *oh)
  874. {
  875. struct omap_hwmod_ocp_if *os;
  876. int ret;
  877. if (!oh)
  878. return -EINVAL;
  879. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  880. return 0;
  881. os = oh->slaves[oh->_mpu_port_index];
  882. if (oh->flags & HWMOD_NO_IDLEST)
  883. return 0;
  884. /* XXX check module SIDLEMODE */
  885. /* XXX check clock enable states */
  886. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  887. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  888. oh->prcm.omap2.idlest_reg_id,
  889. oh->prcm.omap2.idlest_idle_bit);
  890. } else if (cpu_is_omap44xx()) {
  891. ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
  892. } else {
  893. BUG();
  894. };
  895. return ret;
  896. }
  897. /**
  898. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  899. * @oh: struct omap_hwmod *
  900. * @name: name of the reset line in the context of this hwmod
  901. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  902. *
  903. * Return the bit position of the reset line that match the
  904. * input name. Return -ENOENT if not found.
  905. */
  906. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  907. struct omap_hwmod_rst_info *ohri)
  908. {
  909. int i;
  910. for (i = 0; i < oh->rst_lines_cnt; i++) {
  911. const char *rst_line = oh->rst_lines[i].name;
  912. if (!strcmp(rst_line, name)) {
  913. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  914. ohri->st_shift = oh->rst_lines[i].st_shift;
  915. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  916. oh->name, __func__, rst_line, ohri->rst_shift,
  917. ohri->st_shift);
  918. return 0;
  919. }
  920. }
  921. return -ENOENT;
  922. }
  923. /**
  924. * _assert_hardreset - assert the HW reset line of submodules
  925. * contained in the hwmod module.
  926. * @oh: struct omap_hwmod *
  927. * @name: name of the reset line to lookup and assert
  928. *
  929. * Some IP like dsp, ipu or iva contain processor that require
  930. * an HW reset line to be assert / deassert in order to enable fully
  931. * the IP.
  932. */
  933. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  934. {
  935. struct omap_hwmod_rst_info ohri;
  936. u8 ret;
  937. if (!oh)
  938. return -EINVAL;
  939. ret = _lookup_hardreset(oh, name, &ohri);
  940. if (IS_ERR_VALUE(ret))
  941. return ret;
  942. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  943. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  944. ohri.rst_shift);
  945. else if (cpu_is_omap44xx())
  946. return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
  947. ohri.rst_shift);
  948. else
  949. return -EINVAL;
  950. }
  951. /**
  952. * _deassert_hardreset - deassert the HW reset line of submodules contained
  953. * in the hwmod module.
  954. * @oh: struct omap_hwmod *
  955. * @name: name of the reset line to look up and deassert
  956. *
  957. * Some IP like dsp, ipu or iva contain processor that require
  958. * an HW reset line to be assert / deassert in order to enable fully
  959. * the IP.
  960. */
  961. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  962. {
  963. struct omap_hwmod_rst_info ohri;
  964. int ret;
  965. if (!oh)
  966. return -EINVAL;
  967. ret = _lookup_hardreset(oh, name, &ohri);
  968. if (IS_ERR_VALUE(ret))
  969. return ret;
  970. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  971. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  972. ohri.rst_shift,
  973. ohri.st_shift);
  974. } else if (cpu_is_omap44xx()) {
  975. if (ohri.st_shift)
  976. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  977. oh->name, name);
  978. ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
  979. ohri.rst_shift);
  980. } else {
  981. return -EINVAL;
  982. }
  983. if (ret == -EBUSY)
  984. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  985. return ret;
  986. }
  987. /**
  988. * _read_hardreset - read the HW reset line state of submodules
  989. * contained in the hwmod module
  990. * @oh: struct omap_hwmod *
  991. * @name: name of the reset line to look up and read
  992. *
  993. * Return the state of the reset line.
  994. */
  995. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  996. {
  997. struct omap_hwmod_rst_info ohri;
  998. u8 ret;
  999. if (!oh)
  1000. return -EINVAL;
  1001. ret = _lookup_hardreset(oh, name, &ohri);
  1002. if (IS_ERR_VALUE(ret))
  1003. return ret;
  1004. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1005. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  1006. ohri.st_shift);
  1007. } else if (cpu_is_omap44xx()) {
  1008. return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
  1009. ohri.rst_shift);
  1010. } else {
  1011. return -EINVAL;
  1012. }
  1013. }
  1014. /**
  1015. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1016. * @oh: struct omap_hwmod *
  1017. *
  1018. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1019. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  1020. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1021. * the module did not reset in time, or 0 upon success.
  1022. *
  1023. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1024. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1025. * use the SYSCONFIG softreset bit to provide the status.
  1026. *
  1027. * Note that some IP like McBSP do have reset control but don't have
  1028. * reset status.
  1029. */
  1030. static int _ocp_softreset(struct omap_hwmod *oh)
  1031. {
  1032. u32 v;
  1033. int c = 0;
  1034. int ret = 0;
  1035. if (!oh->class->sysc ||
  1036. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1037. return -EINVAL;
  1038. /* clocks must be on for this operation */
  1039. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1040. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1041. "enabled state\n", oh->name);
  1042. return -EINVAL;
  1043. }
  1044. /* For some modules, all optionnal clocks need to be enabled as well */
  1045. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1046. _enable_optional_clocks(oh);
  1047. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1048. v = oh->_sysc_cache;
  1049. ret = _set_softreset(oh, &v);
  1050. if (ret)
  1051. goto dis_opt_clks;
  1052. _write_sysconfig(v, oh);
  1053. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1054. omap_test_timeout((omap_hwmod_read(oh,
  1055. oh->class->sysc->syss_offs)
  1056. & SYSS_RESETDONE_MASK),
  1057. MAX_MODULE_SOFTRESET_WAIT, c);
  1058. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  1059. omap_test_timeout(!(omap_hwmod_read(oh,
  1060. oh->class->sysc->sysc_offs)
  1061. & SYSC_TYPE2_SOFTRESET_MASK),
  1062. MAX_MODULE_SOFTRESET_WAIT, c);
  1063. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1064. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1065. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1066. else
  1067. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1068. /*
  1069. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1070. * _wait_target_ready() or _reset()
  1071. */
  1072. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1073. dis_opt_clks:
  1074. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1075. _disable_optional_clocks(oh);
  1076. return ret;
  1077. }
  1078. /**
  1079. * _reset - reset an omap_hwmod
  1080. * @oh: struct omap_hwmod *
  1081. *
  1082. * Resets an omap_hwmod @oh. The default software reset mechanism for
  1083. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  1084. * bit. However, some hwmods cannot be reset via this method: some
  1085. * are not targets and therefore have no OCP header registers to
  1086. * access; others (like the IVA) have idiosyncratic reset sequences.
  1087. * So for these relatively rare cases, custom reset code can be
  1088. * supplied in the struct omap_hwmod_class .reset function pointer.
  1089. * Passes along the return value from either _reset() or the custom
  1090. * reset function - these must return -EINVAL if the hwmod cannot be
  1091. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1092. * the module did not reset in time, or 0 upon success.
  1093. */
  1094. static int _reset(struct omap_hwmod *oh)
  1095. {
  1096. int ret;
  1097. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1098. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1099. return ret;
  1100. }
  1101. /**
  1102. * _enable - enable an omap_hwmod
  1103. * @oh: struct omap_hwmod *
  1104. *
  1105. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1106. * register target. Returns -EINVAL if the hwmod is in the wrong
  1107. * state or passes along the return value of _wait_target_ready().
  1108. */
  1109. static int _enable(struct omap_hwmod *oh)
  1110. {
  1111. int r;
  1112. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1113. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1114. oh->_state != _HWMOD_STATE_IDLE &&
  1115. oh->_state != _HWMOD_STATE_DISABLED) {
  1116. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1117. "from initialized, idle, or disabled state\n", oh->name);
  1118. return -EINVAL;
  1119. }
  1120. /* Mux pins for device runtime if populated */
  1121. if (oh->mux && (!oh->mux->enabled ||
  1122. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1123. oh->mux->pads_dynamic)))
  1124. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1125. _add_initiator_dep(oh, mpu_oh);
  1126. _enable_clocks(oh);
  1127. /*
  1128. * If an IP contains only one HW reset line, then de-assert it in order
  1129. * to allow the module state transition. Otherwise the PRCM will return
  1130. * Intransition status, and the init will failed.
  1131. */
  1132. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1133. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1134. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1135. r = _wait_target_ready(oh);
  1136. if (r) {
  1137. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1138. oh->name, r);
  1139. _disable_clocks(oh);
  1140. return r;
  1141. }
  1142. oh->_state = _HWMOD_STATE_ENABLED;
  1143. /* Access the sysconfig only if the target is ready */
  1144. if (oh->class->sysc) {
  1145. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1146. _update_sysc_cache(oh);
  1147. _enable_sysc(oh);
  1148. }
  1149. return r;
  1150. }
  1151. /**
  1152. * _idle - idle an omap_hwmod
  1153. * @oh: struct omap_hwmod *
  1154. *
  1155. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1156. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1157. * state or returns 0.
  1158. */
  1159. static int _idle(struct omap_hwmod *oh)
  1160. {
  1161. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1162. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1163. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1164. "enabled state\n", oh->name);
  1165. return -EINVAL;
  1166. }
  1167. if (oh->class->sysc)
  1168. _idle_sysc(oh);
  1169. _del_initiator_dep(oh, mpu_oh);
  1170. _disable_clocks(oh);
  1171. /* Mux pins for device idle if populated */
  1172. if (oh->mux && oh->mux->pads_dynamic)
  1173. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1174. oh->_state = _HWMOD_STATE_IDLE;
  1175. return 0;
  1176. }
  1177. /**
  1178. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1179. * @oh: struct omap_hwmod *
  1180. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1181. *
  1182. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1183. * local copy. Intended to be used by drivers that require
  1184. * direct manipulation of the AUTOIDLE bits.
  1185. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1186. * along the return value from _set_module_autoidle().
  1187. *
  1188. * Any users of this function should be scrutinized carefully.
  1189. */
  1190. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1191. {
  1192. u32 v;
  1193. int retval = 0;
  1194. unsigned long flags;
  1195. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1196. return -EINVAL;
  1197. spin_lock_irqsave(&oh->_lock, flags);
  1198. v = oh->_sysc_cache;
  1199. retval = _set_module_autoidle(oh, autoidle, &v);
  1200. if (!retval)
  1201. _write_sysconfig(v, oh);
  1202. spin_unlock_irqrestore(&oh->_lock, flags);
  1203. return retval;
  1204. }
  1205. /**
  1206. * _shutdown - shutdown an omap_hwmod
  1207. * @oh: struct omap_hwmod *
  1208. *
  1209. * Shut down an omap_hwmod @oh. This should be called when the driver
  1210. * used for the hwmod is removed or unloaded or if the driver is not
  1211. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1212. * state or returns 0.
  1213. */
  1214. static int _shutdown(struct omap_hwmod *oh)
  1215. {
  1216. int ret;
  1217. u8 prev_state;
  1218. if (oh->_state != _HWMOD_STATE_IDLE &&
  1219. oh->_state != _HWMOD_STATE_ENABLED) {
  1220. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1221. "from idle, or enabled state\n", oh->name);
  1222. return -EINVAL;
  1223. }
  1224. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1225. if (oh->class->pre_shutdown) {
  1226. prev_state = oh->_state;
  1227. if (oh->_state == _HWMOD_STATE_IDLE)
  1228. _enable(oh);
  1229. ret = oh->class->pre_shutdown(oh);
  1230. if (ret) {
  1231. if (prev_state == _HWMOD_STATE_IDLE)
  1232. _idle(oh);
  1233. return ret;
  1234. }
  1235. }
  1236. if (oh->class->sysc) {
  1237. if (oh->_state == _HWMOD_STATE_IDLE)
  1238. _enable(oh);
  1239. _shutdown_sysc(oh);
  1240. }
  1241. /* clocks and deps are already disabled in idle */
  1242. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1243. _del_initiator_dep(oh, mpu_oh);
  1244. /* XXX what about the other system initiators here? dma, dsp */
  1245. _disable_clocks(oh);
  1246. }
  1247. /* XXX Should this code also force-disable the optional clocks? */
  1248. /*
  1249. * If an IP contains only one HW reset line, then assert it
  1250. * after disabling the clocks and before shutting down the IP.
  1251. */
  1252. if (oh->rst_lines_cnt == 1)
  1253. _assert_hardreset(oh, oh->rst_lines[0].name);
  1254. /* Mux pins to safe mode or use populated off mode values */
  1255. if (oh->mux)
  1256. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1257. oh->_state = _HWMOD_STATE_DISABLED;
  1258. return 0;
  1259. }
  1260. /**
  1261. * _setup - do initial configuration of omap_hwmod
  1262. * @oh: struct omap_hwmod *
  1263. *
  1264. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1265. * OCP_SYSCONFIG register. Returns 0.
  1266. */
  1267. static int _setup(struct omap_hwmod *oh, void *data)
  1268. {
  1269. int i, r;
  1270. u8 postsetup_state;
  1271. if (oh->_state != _HWMOD_STATE_CLKS_INITED)
  1272. return 0;
  1273. /* Set iclk autoidle mode */
  1274. if (oh->slaves_cnt > 0) {
  1275. for (i = 0; i < oh->slaves_cnt; i++) {
  1276. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1277. struct clk *c = os->_clk;
  1278. if (!c)
  1279. continue;
  1280. if (os->flags & OCPIF_SWSUP_IDLE) {
  1281. /* XXX omap_iclk_deny_idle(c); */
  1282. } else {
  1283. /* XXX omap_iclk_allow_idle(c); */
  1284. clk_enable(c);
  1285. }
  1286. }
  1287. }
  1288. oh->_state = _HWMOD_STATE_INITIALIZED;
  1289. /*
  1290. * In the case of hwmod with hardreset that should not be
  1291. * de-assert at boot time, we have to keep the module
  1292. * initialized, because we cannot enable it properly with the
  1293. * reset asserted. Exit without warning because that behavior is
  1294. * expected.
  1295. */
  1296. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1297. return 0;
  1298. r = _enable(oh);
  1299. if (r) {
  1300. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1301. oh->name, oh->_state);
  1302. return 0;
  1303. }
  1304. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1305. _reset(oh);
  1306. /*
  1307. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1308. * The _enable() function should be split to
  1309. * avoid the rewrite of the OCP_SYSCONFIG register.
  1310. */
  1311. if (oh->class->sysc) {
  1312. _update_sysc_cache(oh);
  1313. _enable_sysc(oh);
  1314. }
  1315. }
  1316. postsetup_state = oh->_postsetup_state;
  1317. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1318. postsetup_state = _HWMOD_STATE_ENABLED;
  1319. /*
  1320. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1321. * it should be set by the core code as a runtime flag during startup
  1322. */
  1323. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1324. (postsetup_state == _HWMOD_STATE_IDLE))
  1325. postsetup_state = _HWMOD_STATE_ENABLED;
  1326. if (postsetup_state == _HWMOD_STATE_IDLE)
  1327. _idle(oh);
  1328. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1329. _shutdown(oh);
  1330. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1331. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1332. oh->name, postsetup_state);
  1333. return 0;
  1334. }
  1335. /**
  1336. * _register - register a struct omap_hwmod
  1337. * @oh: struct omap_hwmod *
  1338. *
  1339. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1340. * already has been registered by the same name; -EINVAL if the
  1341. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1342. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1343. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1344. * success.
  1345. *
  1346. * XXX The data should be copied into bootmem, so the original data
  1347. * should be marked __initdata and freed after init. This would allow
  1348. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1349. * that the copy process would be relatively complex due to the large number
  1350. * of substructures.
  1351. */
  1352. static int __init _register(struct omap_hwmod *oh)
  1353. {
  1354. int ms_id;
  1355. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1356. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1357. return -EINVAL;
  1358. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1359. if (_lookup(oh->name))
  1360. return -EEXIST;
  1361. ms_id = _find_mpu_port_index(oh);
  1362. if (!IS_ERR_VALUE(ms_id))
  1363. oh->_mpu_port_index = ms_id;
  1364. else
  1365. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1366. list_add_tail(&oh->node, &omap_hwmod_list);
  1367. spin_lock_init(&oh->_lock);
  1368. oh->_state = _HWMOD_STATE_REGISTERED;
  1369. /*
  1370. * XXX Rather than doing a strcmp(), this should test a flag
  1371. * set in the hwmod data, inserted by the autogenerator code.
  1372. */
  1373. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1374. mpu_oh = oh;
  1375. return 0;
  1376. }
  1377. /* Public functions */
  1378. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1379. {
  1380. if (oh->flags & HWMOD_16BIT_REG)
  1381. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1382. else
  1383. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1384. }
  1385. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1386. {
  1387. if (oh->flags & HWMOD_16BIT_REG)
  1388. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1389. else
  1390. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1391. }
  1392. /**
  1393. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1394. * @oh: struct omap_hwmod *
  1395. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1396. *
  1397. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1398. * local copy. Intended to be used by drivers that have some erratum
  1399. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1400. * -EINVAL if @oh is null, or passes along the return value from
  1401. * _set_slave_idlemode().
  1402. *
  1403. * XXX Does this function have any current users? If not, we should
  1404. * remove it; it is better to let the rest of the hwmod code handle this.
  1405. * Any users of this function should be scrutinized carefully.
  1406. */
  1407. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1408. {
  1409. u32 v;
  1410. int retval = 0;
  1411. if (!oh)
  1412. return -EINVAL;
  1413. v = oh->_sysc_cache;
  1414. retval = _set_slave_idlemode(oh, idlemode, &v);
  1415. if (!retval)
  1416. _write_sysconfig(v, oh);
  1417. return retval;
  1418. }
  1419. /**
  1420. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1421. * @name: name of the omap_hwmod to look up
  1422. *
  1423. * Given a @name of an omap_hwmod, return a pointer to the registered
  1424. * struct omap_hwmod *, or NULL upon error.
  1425. */
  1426. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1427. {
  1428. struct omap_hwmod *oh;
  1429. if (!name)
  1430. return NULL;
  1431. oh = _lookup(name);
  1432. return oh;
  1433. }
  1434. /**
  1435. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1436. * @fn: pointer to a callback function
  1437. * @data: void * data to pass to callback function
  1438. *
  1439. * Call @fn for each registered omap_hwmod, passing @data to each
  1440. * function. @fn must return 0 for success or any other value for
  1441. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1442. * will stop and the non-zero return value will be passed to the
  1443. * caller of omap_hwmod_for_each(). @fn is called with
  1444. * omap_hwmod_for_each() held.
  1445. */
  1446. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1447. void *data)
  1448. {
  1449. struct omap_hwmod *temp_oh;
  1450. int ret = 0;
  1451. if (!fn)
  1452. return -EINVAL;
  1453. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1454. ret = (*fn)(temp_oh, data);
  1455. if (ret)
  1456. break;
  1457. }
  1458. return ret;
  1459. }
  1460. /**
  1461. * omap_hwmod_register - register an array of hwmods
  1462. * @ohs: pointer to an array of omap_hwmods to register
  1463. *
  1464. * Intended to be called early in boot before the clock framework is
  1465. * initialized. If @ohs is not null, will register all omap_hwmods
  1466. * listed in @ohs that are valid for this chip. Returns 0.
  1467. */
  1468. int __init omap_hwmod_register(struct omap_hwmod **ohs)
  1469. {
  1470. int r, i;
  1471. if (!ohs)
  1472. return 0;
  1473. i = 0;
  1474. do {
  1475. if (!omap_chip_is(ohs[i]->omap_chip))
  1476. continue;
  1477. r = _register(ohs[i]);
  1478. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  1479. r);
  1480. } while (ohs[++i]);
  1481. return 0;
  1482. }
  1483. /*
  1484. * _populate_mpu_rt_base - populate the virtual address for a hwmod
  1485. *
  1486. * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
  1487. * Assumes the caller takes care of locking if needed.
  1488. */
  1489. static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1490. {
  1491. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1492. return 0;
  1493. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1494. return 0;
  1495. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1496. return 0;
  1497. }
  1498. /**
  1499. * omap_hwmod_setup_one - set up a single hwmod
  1500. * @oh_name: const char * name of the already-registered hwmod to set up
  1501. *
  1502. * Must be called after omap2_clk_init(). Resolves the struct clk
  1503. * names to struct clk pointers for each registered omap_hwmod. Also
  1504. * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
  1505. * success.
  1506. */
  1507. int __init omap_hwmod_setup_one(const char *oh_name)
  1508. {
  1509. struct omap_hwmod *oh;
  1510. int r;
  1511. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  1512. if (!mpu_oh) {
  1513. pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
  1514. oh_name, MPU_INITIATOR_NAME);
  1515. return -EINVAL;
  1516. }
  1517. oh = _lookup(oh_name);
  1518. if (!oh) {
  1519. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  1520. return -EINVAL;
  1521. }
  1522. if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  1523. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  1524. r = _populate_mpu_rt_base(oh, NULL);
  1525. if (IS_ERR_VALUE(r)) {
  1526. WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
  1527. return -EINVAL;
  1528. }
  1529. r = _init_clocks(oh, NULL);
  1530. if (IS_ERR_VALUE(r)) {
  1531. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
  1532. return -EINVAL;
  1533. }
  1534. _setup(oh, NULL);
  1535. return 0;
  1536. }
  1537. /**
  1538. * omap_hwmod_setup - do some post-clock framework initialization
  1539. *
  1540. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1541. * to struct clk pointers for each registered omap_hwmod. Also calls
  1542. * _setup() on each hwmod. Returns 0 upon success.
  1543. */
  1544. static int __init omap_hwmod_setup_all(void)
  1545. {
  1546. int r;
  1547. if (!mpu_oh) {
  1548. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  1549. __func__, MPU_INITIATOR_NAME);
  1550. return -EINVAL;
  1551. }
  1552. r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
  1553. r = omap_hwmod_for_each(_init_clocks, NULL);
  1554. WARN(IS_ERR_VALUE(r),
  1555. "omap_hwmod: %s: _init_clocks failed\n", __func__);
  1556. omap_hwmod_for_each(_setup, NULL);
  1557. return 0;
  1558. }
  1559. core_initcall(omap_hwmod_setup_all);
  1560. /**
  1561. * omap_hwmod_enable - enable an omap_hwmod
  1562. * @oh: struct omap_hwmod *
  1563. *
  1564. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1565. * Returns -EINVAL on error or passes along the return value from _enable().
  1566. */
  1567. int omap_hwmod_enable(struct omap_hwmod *oh)
  1568. {
  1569. int r;
  1570. unsigned long flags;
  1571. if (!oh)
  1572. return -EINVAL;
  1573. spin_lock_irqsave(&oh->_lock, flags);
  1574. r = _enable(oh);
  1575. spin_unlock_irqrestore(&oh->_lock, flags);
  1576. return r;
  1577. }
  1578. /**
  1579. * omap_hwmod_idle - idle an omap_hwmod
  1580. * @oh: struct omap_hwmod *
  1581. *
  1582. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1583. * Returns -EINVAL on error or passes along the return value from _idle().
  1584. */
  1585. int omap_hwmod_idle(struct omap_hwmod *oh)
  1586. {
  1587. unsigned long flags;
  1588. if (!oh)
  1589. return -EINVAL;
  1590. spin_lock_irqsave(&oh->_lock, flags);
  1591. _idle(oh);
  1592. spin_unlock_irqrestore(&oh->_lock, flags);
  1593. return 0;
  1594. }
  1595. /**
  1596. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1597. * @oh: struct omap_hwmod *
  1598. *
  1599. * Shutdown an omap_hwmod @oh. Intended to be called by
  1600. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1601. * the return value from _shutdown().
  1602. */
  1603. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1604. {
  1605. unsigned long flags;
  1606. if (!oh)
  1607. return -EINVAL;
  1608. spin_lock_irqsave(&oh->_lock, flags);
  1609. _shutdown(oh);
  1610. spin_unlock_irqrestore(&oh->_lock, flags);
  1611. return 0;
  1612. }
  1613. /**
  1614. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1615. * @oh: struct omap_hwmod *oh
  1616. *
  1617. * Intended to be called by the omap_device code.
  1618. */
  1619. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1620. {
  1621. unsigned long flags;
  1622. spin_lock_irqsave(&oh->_lock, flags);
  1623. _enable_clocks(oh);
  1624. spin_unlock_irqrestore(&oh->_lock, flags);
  1625. return 0;
  1626. }
  1627. /**
  1628. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1629. * @oh: struct omap_hwmod *oh
  1630. *
  1631. * Intended to be called by the omap_device code.
  1632. */
  1633. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1634. {
  1635. unsigned long flags;
  1636. spin_lock_irqsave(&oh->_lock, flags);
  1637. _disable_clocks(oh);
  1638. spin_unlock_irqrestore(&oh->_lock, flags);
  1639. return 0;
  1640. }
  1641. /**
  1642. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1643. * @oh: struct omap_hwmod *oh
  1644. *
  1645. * Intended to be called by drivers and core code when all posted
  1646. * writes to a device must complete before continuing further
  1647. * execution (for example, after clearing some device IRQSTATUS
  1648. * register bits)
  1649. *
  1650. * XXX what about targets with multiple OCP threads?
  1651. */
  1652. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1653. {
  1654. BUG_ON(!oh);
  1655. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1656. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1657. "device configuration\n", oh->name);
  1658. return;
  1659. }
  1660. /*
  1661. * Forces posted writes to complete on the OCP thread handling
  1662. * register writes
  1663. */
  1664. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1665. }
  1666. /**
  1667. * omap_hwmod_reset - reset the hwmod
  1668. * @oh: struct omap_hwmod *
  1669. *
  1670. * Under some conditions, a driver may wish to reset the entire device.
  1671. * Called from omap_device code. Returns -EINVAL on error or passes along
  1672. * the return value from _reset().
  1673. */
  1674. int omap_hwmod_reset(struct omap_hwmod *oh)
  1675. {
  1676. int r;
  1677. unsigned long flags;
  1678. if (!oh)
  1679. return -EINVAL;
  1680. spin_lock_irqsave(&oh->_lock, flags);
  1681. r = _reset(oh);
  1682. spin_unlock_irqrestore(&oh->_lock, flags);
  1683. return r;
  1684. }
  1685. /**
  1686. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1687. * @oh: struct omap_hwmod *
  1688. * @res: pointer to the first element of an array of struct resource to fill
  1689. *
  1690. * Count the number of struct resource array elements necessary to
  1691. * contain omap_hwmod @oh resources. Intended to be called by code
  1692. * that registers omap_devices. Intended to be used to determine the
  1693. * size of a dynamically-allocated struct resource array, before
  1694. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1695. * resource array elements needed.
  1696. *
  1697. * XXX This code is not optimized. It could attempt to merge adjacent
  1698. * resource IDs.
  1699. *
  1700. */
  1701. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1702. {
  1703. int ret, i;
  1704. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  1705. for (i = 0; i < oh->slaves_cnt; i++)
  1706. ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
  1707. return ret;
  1708. }
  1709. /**
  1710. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1711. * @oh: struct omap_hwmod *
  1712. * @res: pointer to the first element of an array of struct resource to fill
  1713. *
  1714. * Fill the struct resource array @res with resource data from the
  1715. * omap_hwmod @oh. Intended to be called by code that registers
  1716. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1717. * number of array elements filled.
  1718. */
  1719. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1720. {
  1721. int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
  1722. int r = 0;
  1723. /* For each IRQ, DMA, memory area, fill in array.*/
  1724. mpu_irqs_cnt = _count_mpu_irqs(oh);
  1725. for (i = 0; i < mpu_irqs_cnt; i++) {
  1726. (res + r)->name = (oh->mpu_irqs + i)->name;
  1727. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1728. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1729. (res + r)->flags = IORESOURCE_IRQ;
  1730. r++;
  1731. }
  1732. sdma_reqs_cnt = _count_sdma_reqs(oh);
  1733. for (i = 0; i < sdma_reqs_cnt; i++) {
  1734. (res + r)->name = (oh->sdma_reqs + i)->name;
  1735. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1736. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1737. (res + r)->flags = IORESOURCE_DMA;
  1738. r++;
  1739. }
  1740. for (i = 0; i < oh->slaves_cnt; i++) {
  1741. struct omap_hwmod_ocp_if *os;
  1742. int addr_cnt;
  1743. os = oh->slaves[i];
  1744. addr_cnt = _count_ocp_if_addr_spaces(os);
  1745. for (j = 0; j < addr_cnt; j++) {
  1746. (res + r)->name = (os->addr + j)->name;
  1747. (res + r)->start = (os->addr + j)->pa_start;
  1748. (res + r)->end = (os->addr + j)->pa_end;
  1749. (res + r)->flags = IORESOURCE_MEM;
  1750. r++;
  1751. }
  1752. }
  1753. return r;
  1754. }
  1755. /**
  1756. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1757. * @oh: struct omap_hwmod *
  1758. *
  1759. * Return the powerdomain pointer associated with the OMAP module
  1760. * @oh's main clock. If @oh does not have a main clk, return the
  1761. * powerdomain associated with the interface clock associated with the
  1762. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1763. * instead?) Returns NULL on error, or a struct powerdomain * on
  1764. * success.
  1765. */
  1766. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1767. {
  1768. struct clk *c;
  1769. if (!oh)
  1770. return NULL;
  1771. if (oh->_clk) {
  1772. c = oh->_clk;
  1773. } else {
  1774. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1775. return NULL;
  1776. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1777. }
  1778. if (!c->clkdm)
  1779. return NULL;
  1780. return c->clkdm->pwrdm.ptr;
  1781. }
  1782. /**
  1783. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1784. * @oh: struct omap_hwmod *
  1785. *
  1786. * Returns the virtual address corresponding to the beginning of the
  1787. * module's register target, in the address range that is intended to
  1788. * be used by the MPU. Returns the virtual address upon success or NULL
  1789. * upon error.
  1790. */
  1791. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1792. {
  1793. if (!oh)
  1794. return NULL;
  1795. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1796. return NULL;
  1797. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1798. return NULL;
  1799. return oh->_mpu_rt_va;
  1800. }
  1801. /**
  1802. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1803. * @oh: struct omap_hwmod *
  1804. * @init_oh: struct omap_hwmod * (initiator)
  1805. *
  1806. * Add a sleep dependency between the initiator @init_oh and @oh.
  1807. * Intended to be called by DSP/Bridge code via platform_data for the
  1808. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1809. * code needs to add/del initiator dependencies dynamically
  1810. * before/after accessing a device. Returns the return value from
  1811. * _add_initiator_dep().
  1812. *
  1813. * XXX Keep a usecount in the clockdomain code
  1814. */
  1815. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1816. struct omap_hwmod *init_oh)
  1817. {
  1818. return _add_initiator_dep(oh, init_oh);
  1819. }
  1820. /*
  1821. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1822. * for context save/restore operations?
  1823. */
  1824. /**
  1825. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1826. * @oh: struct omap_hwmod *
  1827. * @init_oh: struct omap_hwmod * (initiator)
  1828. *
  1829. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1830. * Intended to be called by DSP/Bridge code via platform_data for the
  1831. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1832. * code needs to add/del initiator dependencies dynamically
  1833. * before/after accessing a device. Returns the return value from
  1834. * _del_initiator_dep().
  1835. *
  1836. * XXX Keep a usecount in the clockdomain code
  1837. */
  1838. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1839. struct omap_hwmod *init_oh)
  1840. {
  1841. return _del_initiator_dep(oh, init_oh);
  1842. }
  1843. /**
  1844. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1845. * @oh: struct omap_hwmod *
  1846. *
  1847. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1848. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1849. * registers to cause the PRCM to receive wakeup events from the
  1850. * module. Does not set any wakeup routing registers beyond this
  1851. * point - if the module is to wake up any other module or subsystem,
  1852. * that must be set separately. Called by omap_device code. Returns
  1853. * -EINVAL on error or 0 upon success.
  1854. */
  1855. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1856. {
  1857. unsigned long flags;
  1858. u32 v;
  1859. if (!oh->class->sysc ||
  1860. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1861. return -EINVAL;
  1862. spin_lock_irqsave(&oh->_lock, flags);
  1863. v = oh->_sysc_cache;
  1864. _enable_wakeup(oh, &v);
  1865. _write_sysconfig(v, oh);
  1866. spin_unlock_irqrestore(&oh->_lock, flags);
  1867. return 0;
  1868. }
  1869. /**
  1870. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1871. * @oh: struct omap_hwmod *
  1872. *
  1873. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1874. * from sending wakeups to the PRCM. Eventually this should clear
  1875. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1876. * from the module. Does not set any wakeup routing registers beyond
  1877. * this point - if the module is to wake up any other module or
  1878. * subsystem, that must be set separately. Called by omap_device
  1879. * code. Returns -EINVAL on error or 0 upon success.
  1880. */
  1881. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1882. {
  1883. unsigned long flags;
  1884. u32 v;
  1885. if (!oh->class->sysc ||
  1886. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1887. return -EINVAL;
  1888. spin_lock_irqsave(&oh->_lock, flags);
  1889. v = oh->_sysc_cache;
  1890. _disable_wakeup(oh, &v);
  1891. _write_sysconfig(v, oh);
  1892. spin_unlock_irqrestore(&oh->_lock, flags);
  1893. return 0;
  1894. }
  1895. /**
  1896. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1897. * contained in the hwmod module.
  1898. * @oh: struct omap_hwmod *
  1899. * @name: name of the reset line to lookup and assert
  1900. *
  1901. * Some IP like dsp, ipu or iva contain processor that require
  1902. * an HW reset line to be assert / deassert in order to enable fully
  1903. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1904. * yet supported on this OMAP; otherwise, passes along the return value
  1905. * from _assert_hardreset().
  1906. */
  1907. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  1908. {
  1909. int ret;
  1910. unsigned long flags;
  1911. if (!oh)
  1912. return -EINVAL;
  1913. spin_lock_irqsave(&oh->_lock, flags);
  1914. ret = _assert_hardreset(oh, name);
  1915. spin_unlock_irqrestore(&oh->_lock, flags);
  1916. return ret;
  1917. }
  1918. /**
  1919. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  1920. * contained in the hwmod module.
  1921. * @oh: struct omap_hwmod *
  1922. * @name: name of the reset line to look up and deassert
  1923. *
  1924. * Some IP like dsp, ipu or iva contain processor that require
  1925. * an HW reset line to be assert / deassert in order to enable fully
  1926. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1927. * yet supported on this OMAP; otherwise, passes along the return value
  1928. * from _deassert_hardreset().
  1929. */
  1930. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1931. {
  1932. int ret;
  1933. unsigned long flags;
  1934. if (!oh)
  1935. return -EINVAL;
  1936. spin_lock_irqsave(&oh->_lock, flags);
  1937. ret = _deassert_hardreset(oh, name);
  1938. spin_unlock_irqrestore(&oh->_lock, flags);
  1939. return ret;
  1940. }
  1941. /**
  1942. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  1943. * contained in the hwmod module
  1944. * @oh: struct omap_hwmod *
  1945. * @name: name of the reset line to look up and read
  1946. *
  1947. * Return the current state of the hwmod @oh's reset line named @name:
  1948. * returns -EINVAL upon parameter error or if this operation
  1949. * is unsupported on the current OMAP; otherwise, passes along the return
  1950. * value from _read_hardreset().
  1951. */
  1952. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  1953. {
  1954. int ret;
  1955. unsigned long flags;
  1956. if (!oh)
  1957. return -EINVAL;
  1958. spin_lock_irqsave(&oh->_lock, flags);
  1959. ret = _read_hardreset(oh, name);
  1960. spin_unlock_irqrestore(&oh->_lock, flags);
  1961. return ret;
  1962. }
  1963. /**
  1964. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  1965. * @classname: struct omap_hwmod_class name to search for
  1966. * @fn: callback function pointer to call for each hwmod in class @classname
  1967. * @user: arbitrary context data to pass to the callback function
  1968. *
  1969. * For each omap_hwmod of class @classname, call @fn.
  1970. * If the callback function returns something other than
  1971. * zero, the iterator is terminated, and the callback function's return
  1972. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  1973. * if @classname or @fn are NULL, or passes back the error code from @fn.
  1974. */
  1975. int omap_hwmod_for_each_by_class(const char *classname,
  1976. int (*fn)(struct omap_hwmod *oh,
  1977. void *user),
  1978. void *user)
  1979. {
  1980. struct omap_hwmod *temp_oh;
  1981. int ret = 0;
  1982. if (!classname || !fn)
  1983. return -EINVAL;
  1984. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  1985. __func__, classname);
  1986. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1987. if (!strcmp(temp_oh->class->name, classname)) {
  1988. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  1989. __func__, temp_oh->name);
  1990. ret = (*fn)(temp_oh, user);
  1991. if (ret)
  1992. break;
  1993. }
  1994. }
  1995. if (ret)
  1996. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  1997. __func__, ret);
  1998. return ret;
  1999. }
  2000. /**
  2001. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  2002. * @oh: struct omap_hwmod *
  2003. * @state: state that _setup() should leave the hwmod in
  2004. *
  2005. * Sets the hwmod state that @oh will enter at the end of _setup()
  2006. * (called by omap_hwmod_setup_*()). Only valid to call between
  2007. * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
  2008. * 0 upon success or -EINVAL if there is a problem with the arguments
  2009. * or if the hwmod is in the wrong state.
  2010. */
  2011. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  2012. {
  2013. int ret;
  2014. unsigned long flags;
  2015. if (!oh)
  2016. return -EINVAL;
  2017. if (state != _HWMOD_STATE_DISABLED &&
  2018. state != _HWMOD_STATE_ENABLED &&
  2019. state != _HWMOD_STATE_IDLE)
  2020. return -EINVAL;
  2021. spin_lock_irqsave(&oh->_lock, flags);
  2022. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2023. ret = -EINVAL;
  2024. goto ohsps_unlock;
  2025. }
  2026. oh->_postsetup_state = state;
  2027. ret = 0;
  2028. ohsps_unlock:
  2029. spin_unlock_irqrestore(&oh->_lock, flags);
  2030. return ret;
  2031. }
  2032. /**
  2033. * omap_hwmod_get_context_loss_count - get lost context count
  2034. * @oh: struct omap_hwmod *
  2035. *
  2036. * Query the powerdomain of of @oh to get the context loss
  2037. * count for this device.
  2038. *
  2039. * Returns the context loss count of the powerdomain assocated with @oh
  2040. * upon success, or zero if no powerdomain exists for @oh.
  2041. */
  2042. u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  2043. {
  2044. struct powerdomain *pwrdm;
  2045. int ret = 0;
  2046. pwrdm = omap_hwmod_get_pwrdm(oh);
  2047. if (pwrdm)
  2048. ret = pwrdm_get_context_loss_count(pwrdm);
  2049. return ret;
  2050. }
  2051. /**
  2052. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  2053. * @oh: struct omap_hwmod *
  2054. *
  2055. * Prevent the hwmod @oh from being reset during the setup process.
  2056. * Intended for use by board-*.c files on boards with devices that
  2057. * cannot tolerate being reset. Must be called before the hwmod has
  2058. * been set up. Returns 0 upon success or negative error code upon
  2059. * failure.
  2060. */
  2061. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2062. {
  2063. if (!oh)
  2064. return -EINVAL;
  2065. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2066. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2067. oh->name);
  2068. return -EINVAL;
  2069. }
  2070. oh->flags |= HWMOD_INIT_NO_RESET;
  2071. return 0;
  2072. }