e1000_ethtool.c 56 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. /* ethtool support for e1000 */
  22. #include "e1000.h"
  23. #include <asm/uaccess.h>
  24. struct e1000_stats {
  25. char stat_string[ETH_GSTRING_LEN];
  26. int sizeof_stat;
  27. int stat_offset;
  28. };
  29. #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
  30. offsetof(struct e1000_adapter, m)
  31. static const struct e1000_stats e1000_gstrings_stats[] = {
  32. { "rx_packets", E1000_STAT(net_stats.rx_packets) },
  33. { "tx_packets", E1000_STAT(net_stats.tx_packets) },
  34. { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
  35. { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
  36. { "rx_errors", E1000_STAT(net_stats.rx_errors) },
  37. { "tx_errors", E1000_STAT(net_stats.tx_errors) },
  38. { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
  39. { "multicast", E1000_STAT(net_stats.multicast) },
  40. { "collisions", E1000_STAT(net_stats.collisions) },
  41. { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
  42. { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
  43. { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
  44. { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
  45. { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
  46. { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
  47. { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
  48. { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
  49. { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
  50. { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
  51. { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
  52. { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
  53. { "tx_deferred_ok", E1000_STAT(stats.dc) },
  54. { "tx_single_coll_ok", E1000_STAT(stats.scc) },
  55. { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
  56. { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
  57. { "rx_long_length_errors", E1000_STAT(stats.roc) },
  58. { "rx_short_length_errors", E1000_STAT(stats.ruc) },
  59. { "rx_align_errors", E1000_STAT(stats.algnerrc) },
  60. { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
  61. { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
  62. { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
  63. { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
  64. { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
  65. { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
  66. { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
  67. { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
  68. { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
  69. { "rx_header_split", E1000_STAT(rx_hdr_split) },
  70. { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
  71. };
  72. #define E1000_QUEUE_STATS_LEN 0
  73. #define E1000_GLOBAL_STATS_LEN \
  74. sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
  75. #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
  76. static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
  77. "Register test (offline)", "Eeprom test (offline)",
  78. "Interrupt test (offline)", "Loopback test (offline)",
  79. "Link test (on/offline)"
  80. };
  81. #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
  82. static int
  83. e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  84. {
  85. struct e1000_adapter *adapter = netdev_priv(netdev);
  86. struct e1000_hw *hw = &adapter->hw;
  87. if (hw->media_type == e1000_media_type_copper) {
  88. ecmd->supported = (SUPPORTED_10baseT_Half |
  89. SUPPORTED_10baseT_Full |
  90. SUPPORTED_100baseT_Half |
  91. SUPPORTED_100baseT_Full |
  92. SUPPORTED_1000baseT_Full|
  93. SUPPORTED_Autoneg |
  94. SUPPORTED_TP);
  95. if (hw->phy_type == e1000_phy_ife)
  96. ecmd->supported &= ~SUPPORTED_1000baseT_Full;
  97. ecmd->advertising = ADVERTISED_TP;
  98. if (hw->autoneg == 1) {
  99. ecmd->advertising |= ADVERTISED_Autoneg;
  100. /* the e1000 autoneg seems to match ethtool nicely */
  101. ecmd->advertising |= hw->autoneg_advertised;
  102. }
  103. ecmd->port = PORT_TP;
  104. ecmd->phy_address = hw->phy_addr;
  105. if (hw->mac_type == e1000_82543)
  106. ecmd->transceiver = XCVR_EXTERNAL;
  107. else
  108. ecmd->transceiver = XCVR_INTERNAL;
  109. } else {
  110. ecmd->supported = (SUPPORTED_1000baseT_Full |
  111. SUPPORTED_FIBRE |
  112. SUPPORTED_Autoneg);
  113. ecmd->advertising = (ADVERTISED_1000baseT_Full |
  114. ADVERTISED_FIBRE |
  115. ADVERTISED_Autoneg);
  116. ecmd->port = PORT_FIBRE;
  117. if (hw->mac_type >= e1000_82545)
  118. ecmd->transceiver = XCVR_INTERNAL;
  119. else
  120. ecmd->transceiver = XCVR_EXTERNAL;
  121. }
  122. if (netif_carrier_ok(adapter->netdev)) {
  123. e1000_get_speed_and_duplex(hw, &adapter->link_speed,
  124. &adapter->link_duplex);
  125. ecmd->speed = adapter->link_speed;
  126. /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
  127. * and HALF_DUPLEX != DUPLEX_HALF */
  128. if (adapter->link_duplex == FULL_DUPLEX)
  129. ecmd->duplex = DUPLEX_FULL;
  130. else
  131. ecmd->duplex = DUPLEX_HALF;
  132. } else {
  133. ecmd->speed = -1;
  134. ecmd->duplex = -1;
  135. }
  136. ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
  137. hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
  138. return 0;
  139. }
  140. static int
  141. e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  142. {
  143. struct e1000_adapter *adapter = netdev_priv(netdev);
  144. struct e1000_hw *hw = &adapter->hw;
  145. /* When SoL/IDER sessions are active, autoneg/speed/duplex
  146. * cannot be changed */
  147. if (e1000_check_phy_reset_block(hw)) {
  148. DPRINTK(DRV, ERR, "Cannot change link characteristics "
  149. "when SoL/IDER is active.\n");
  150. return -EINVAL;
  151. }
  152. if (ecmd->autoneg == AUTONEG_ENABLE) {
  153. hw->autoneg = 1;
  154. if (hw->media_type == e1000_media_type_fiber)
  155. hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
  156. ADVERTISED_FIBRE |
  157. ADVERTISED_Autoneg;
  158. else
  159. hw->autoneg_advertised = ADVERTISED_10baseT_Half |
  160. ADVERTISED_10baseT_Full |
  161. ADVERTISED_100baseT_Half |
  162. ADVERTISED_100baseT_Full |
  163. ADVERTISED_1000baseT_Full|
  164. ADVERTISED_Autoneg |
  165. ADVERTISED_TP;
  166. ecmd->advertising = hw->autoneg_advertised;
  167. } else
  168. if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
  169. return -EINVAL;
  170. /* reset the link */
  171. if (netif_running(adapter->netdev))
  172. e1000_reinit_locked(adapter);
  173. else
  174. e1000_reset(adapter);
  175. return 0;
  176. }
  177. static void
  178. e1000_get_pauseparam(struct net_device *netdev,
  179. struct ethtool_pauseparam *pause)
  180. {
  181. struct e1000_adapter *adapter = netdev_priv(netdev);
  182. struct e1000_hw *hw = &adapter->hw;
  183. pause->autoneg =
  184. (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
  185. if (hw->fc == e1000_fc_rx_pause)
  186. pause->rx_pause = 1;
  187. else if (hw->fc == e1000_fc_tx_pause)
  188. pause->tx_pause = 1;
  189. else if (hw->fc == e1000_fc_full) {
  190. pause->rx_pause = 1;
  191. pause->tx_pause = 1;
  192. }
  193. }
  194. static int
  195. e1000_set_pauseparam(struct net_device *netdev,
  196. struct ethtool_pauseparam *pause)
  197. {
  198. struct e1000_adapter *adapter = netdev_priv(netdev);
  199. struct e1000_hw *hw = &adapter->hw;
  200. adapter->fc_autoneg = pause->autoneg;
  201. if (pause->rx_pause && pause->tx_pause)
  202. hw->fc = e1000_fc_full;
  203. else if (pause->rx_pause && !pause->tx_pause)
  204. hw->fc = e1000_fc_rx_pause;
  205. else if (!pause->rx_pause && pause->tx_pause)
  206. hw->fc = e1000_fc_tx_pause;
  207. else if (!pause->rx_pause && !pause->tx_pause)
  208. hw->fc = e1000_fc_none;
  209. hw->original_fc = hw->fc;
  210. if (adapter->fc_autoneg == AUTONEG_ENABLE) {
  211. if (netif_running(adapter->netdev))
  212. e1000_reinit_locked(adapter);
  213. else
  214. e1000_reset(adapter);
  215. } else
  216. return ((hw->media_type == e1000_media_type_fiber) ?
  217. e1000_setup_link(hw) : e1000_force_mac_fc(hw));
  218. return 0;
  219. }
  220. static uint32_t
  221. e1000_get_rx_csum(struct net_device *netdev)
  222. {
  223. struct e1000_adapter *adapter = netdev_priv(netdev);
  224. return adapter->rx_csum;
  225. }
  226. static int
  227. e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
  228. {
  229. struct e1000_adapter *adapter = netdev_priv(netdev);
  230. adapter->rx_csum = data;
  231. if (netif_running(netdev))
  232. e1000_reinit_locked(adapter);
  233. else
  234. e1000_reset(adapter);
  235. return 0;
  236. }
  237. static uint32_t
  238. e1000_get_tx_csum(struct net_device *netdev)
  239. {
  240. return (netdev->features & NETIF_F_HW_CSUM) != 0;
  241. }
  242. static int
  243. e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
  244. {
  245. struct e1000_adapter *adapter = netdev_priv(netdev);
  246. if (adapter->hw.mac_type < e1000_82543) {
  247. if (!data)
  248. return -EINVAL;
  249. return 0;
  250. }
  251. if (data)
  252. netdev->features |= NETIF_F_HW_CSUM;
  253. else
  254. netdev->features &= ~NETIF_F_HW_CSUM;
  255. return 0;
  256. }
  257. #ifdef NETIF_F_TSO
  258. static int
  259. e1000_set_tso(struct net_device *netdev, uint32_t data)
  260. {
  261. struct e1000_adapter *adapter = netdev_priv(netdev);
  262. if ((adapter->hw.mac_type < e1000_82544) ||
  263. (adapter->hw.mac_type == e1000_82547))
  264. return data ? -EINVAL : 0;
  265. if (data)
  266. netdev->features |= NETIF_F_TSO;
  267. else
  268. netdev->features &= ~NETIF_F_TSO;
  269. DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
  270. adapter->tso_force = TRUE;
  271. return 0;
  272. }
  273. #endif /* NETIF_F_TSO */
  274. static uint32_t
  275. e1000_get_msglevel(struct net_device *netdev)
  276. {
  277. struct e1000_adapter *adapter = netdev_priv(netdev);
  278. return adapter->msg_enable;
  279. }
  280. static void
  281. e1000_set_msglevel(struct net_device *netdev, uint32_t data)
  282. {
  283. struct e1000_adapter *adapter = netdev_priv(netdev);
  284. adapter->msg_enable = data;
  285. }
  286. static int
  287. e1000_get_regs_len(struct net_device *netdev)
  288. {
  289. #define E1000_REGS_LEN 32
  290. return E1000_REGS_LEN * sizeof(uint32_t);
  291. }
  292. static void
  293. e1000_get_regs(struct net_device *netdev,
  294. struct ethtool_regs *regs, void *p)
  295. {
  296. struct e1000_adapter *adapter = netdev_priv(netdev);
  297. struct e1000_hw *hw = &adapter->hw;
  298. uint32_t *regs_buff = p;
  299. uint16_t phy_data;
  300. memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
  301. regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
  302. regs_buff[0] = E1000_READ_REG(hw, CTRL);
  303. regs_buff[1] = E1000_READ_REG(hw, STATUS);
  304. regs_buff[2] = E1000_READ_REG(hw, RCTL);
  305. regs_buff[3] = E1000_READ_REG(hw, RDLEN);
  306. regs_buff[4] = E1000_READ_REG(hw, RDH);
  307. regs_buff[5] = E1000_READ_REG(hw, RDT);
  308. regs_buff[6] = E1000_READ_REG(hw, RDTR);
  309. regs_buff[7] = E1000_READ_REG(hw, TCTL);
  310. regs_buff[8] = E1000_READ_REG(hw, TDLEN);
  311. regs_buff[9] = E1000_READ_REG(hw, TDH);
  312. regs_buff[10] = E1000_READ_REG(hw, TDT);
  313. regs_buff[11] = E1000_READ_REG(hw, TIDV);
  314. regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
  315. if (hw->phy_type == e1000_phy_igp) {
  316. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  317. IGP01E1000_PHY_AGC_A);
  318. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
  319. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  320. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  321. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  322. IGP01E1000_PHY_AGC_B);
  323. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
  324. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  325. regs_buff[14] = (uint32_t)phy_data; /* cable length */
  326. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  327. IGP01E1000_PHY_AGC_C);
  328. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
  329. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  330. regs_buff[15] = (uint32_t)phy_data; /* cable length */
  331. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  332. IGP01E1000_PHY_AGC_D);
  333. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
  334. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  335. regs_buff[16] = (uint32_t)phy_data; /* cable length */
  336. regs_buff[17] = 0; /* extended 10bt distance (not needed) */
  337. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  338. e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
  339. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  340. regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
  341. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  342. IGP01E1000_PHY_PCS_INIT_REG);
  343. e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
  344. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  345. regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
  346. regs_buff[20] = 0; /* polarity correction enabled (always) */
  347. regs_buff[22] = 0; /* phy receive errors (unavailable) */
  348. regs_buff[23] = regs_buff[18]; /* mdix mode */
  349. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  350. } else {
  351. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
  352. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  353. regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  354. regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  355. regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  356. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
  357. regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
  358. regs_buff[18] = regs_buff[13]; /* cable polarity */
  359. regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  360. regs_buff[20] = regs_buff[17]; /* polarity correction */
  361. /* phy receive errors */
  362. regs_buff[22] = adapter->phy_stats.receive_errors;
  363. regs_buff[23] = regs_buff[13]; /* mdix mode */
  364. }
  365. regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
  366. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
  367. regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
  368. regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
  369. if (hw->mac_type >= e1000_82540 &&
  370. hw->media_type == e1000_media_type_copper) {
  371. regs_buff[26] = E1000_READ_REG(hw, MANC);
  372. }
  373. }
  374. static int
  375. e1000_get_eeprom_len(struct net_device *netdev)
  376. {
  377. struct e1000_adapter *adapter = netdev_priv(netdev);
  378. return adapter->hw.eeprom.word_size * 2;
  379. }
  380. static int
  381. e1000_get_eeprom(struct net_device *netdev,
  382. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  383. {
  384. struct e1000_adapter *adapter = netdev_priv(netdev);
  385. struct e1000_hw *hw = &adapter->hw;
  386. uint16_t *eeprom_buff;
  387. int first_word, last_word;
  388. int ret_val = 0;
  389. uint16_t i;
  390. if (eeprom->len == 0)
  391. return -EINVAL;
  392. eeprom->magic = hw->vendor_id | (hw->device_id << 16);
  393. first_word = eeprom->offset >> 1;
  394. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  395. eeprom_buff = kmalloc(sizeof(uint16_t) *
  396. (last_word - first_word + 1), GFP_KERNEL);
  397. if (!eeprom_buff)
  398. return -ENOMEM;
  399. if (hw->eeprom.type == e1000_eeprom_spi)
  400. ret_val = e1000_read_eeprom(hw, first_word,
  401. last_word - first_word + 1,
  402. eeprom_buff);
  403. else {
  404. for (i = 0; i < last_word - first_word + 1; i++)
  405. if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
  406. &eeprom_buff[i])))
  407. break;
  408. }
  409. /* Device's eeprom is always little-endian, word addressable */
  410. for (i = 0; i < last_word - first_word + 1; i++)
  411. le16_to_cpus(&eeprom_buff[i]);
  412. memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
  413. eeprom->len);
  414. kfree(eeprom_buff);
  415. return ret_val;
  416. }
  417. static int
  418. e1000_set_eeprom(struct net_device *netdev,
  419. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  420. {
  421. struct e1000_adapter *adapter = netdev_priv(netdev);
  422. struct e1000_hw *hw = &adapter->hw;
  423. uint16_t *eeprom_buff;
  424. void *ptr;
  425. int max_len, first_word, last_word, ret_val = 0;
  426. uint16_t i;
  427. if (eeprom->len == 0)
  428. return -EOPNOTSUPP;
  429. if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
  430. return -EFAULT;
  431. max_len = hw->eeprom.word_size * 2;
  432. first_word = eeprom->offset >> 1;
  433. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  434. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  435. if (!eeprom_buff)
  436. return -ENOMEM;
  437. ptr = (void *)eeprom_buff;
  438. if (eeprom->offset & 1) {
  439. /* need read/modify/write of first changed EEPROM word */
  440. /* only the second byte of the word is being modified */
  441. ret_val = e1000_read_eeprom(hw, first_word, 1,
  442. &eeprom_buff[0]);
  443. ptr++;
  444. }
  445. if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
  446. /* need read/modify/write of last changed EEPROM word */
  447. /* only the first byte of the word is being modified */
  448. ret_val = e1000_read_eeprom(hw, last_word, 1,
  449. &eeprom_buff[last_word - first_word]);
  450. }
  451. /* Device's eeprom is always little-endian, word addressable */
  452. for (i = 0; i < last_word - first_word + 1; i++)
  453. le16_to_cpus(&eeprom_buff[i]);
  454. memcpy(ptr, bytes, eeprom->len);
  455. for (i = 0; i < last_word - first_word + 1; i++)
  456. eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
  457. ret_val = e1000_write_eeprom(hw, first_word,
  458. last_word - first_word + 1, eeprom_buff);
  459. /* Update the checksum over the first part of the EEPROM if needed
  460. * and flush shadow RAM for 82573 conrollers */
  461. if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
  462. (hw->mac_type == e1000_82573)))
  463. e1000_update_eeprom_checksum(hw);
  464. kfree(eeprom_buff);
  465. return ret_val;
  466. }
  467. static void
  468. e1000_get_drvinfo(struct net_device *netdev,
  469. struct ethtool_drvinfo *drvinfo)
  470. {
  471. struct e1000_adapter *adapter = netdev_priv(netdev);
  472. char firmware_version[32];
  473. uint16_t eeprom_data;
  474. strncpy(drvinfo->driver, e1000_driver_name, 32);
  475. strncpy(drvinfo->version, e1000_driver_version, 32);
  476. /* EEPROM image version # is reported as firmware version # for
  477. * 8257{1|2|3} controllers */
  478. e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
  479. switch (adapter->hw.mac_type) {
  480. case e1000_82571:
  481. case e1000_82572:
  482. case e1000_82573:
  483. case e1000_80003es2lan:
  484. case e1000_ich8lan:
  485. sprintf(firmware_version, "%d.%d-%d",
  486. (eeprom_data & 0xF000) >> 12,
  487. (eeprom_data & 0x0FF0) >> 4,
  488. eeprom_data & 0x000F);
  489. break;
  490. default:
  491. sprintf(firmware_version, "N/A");
  492. }
  493. strncpy(drvinfo->fw_version, firmware_version, 32);
  494. strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  495. drvinfo->n_stats = E1000_STATS_LEN;
  496. drvinfo->testinfo_len = E1000_TEST_LEN;
  497. drvinfo->regdump_len = e1000_get_regs_len(netdev);
  498. drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
  499. }
  500. static void
  501. e1000_get_ringparam(struct net_device *netdev,
  502. struct ethtool_ringparam *ring)
  503. {
  504. struct e1000_adapter *adapter = netdev_priv(netdev);
  505. e1000_mac_type mac_type = adapter->hw.mac_type;
  506. struct e1000_tx_ring *txdr = adapter->tx_ring;
  507. struct e1000_rx_ring *rxdr = adapter->rx_ring;
  508. ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
  509. E1000_MAX_82544_RXD;
  510. ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
  511. E1000_MAX_82544_TXD;
  512. ring->rx_mini_max_pending = 0;
  513. ring->rx_jumbo_max_pending = 0;
  514. ring->rx_pending = rxdr->count;
  515. ring->tx_pending = txdr->count;
  516. ring->rx_mini_pending = 0;
  517. ring->rx_jumbo_pending = 0;
  518. }
  519. static int
  520. e1000_set_ringparam(struct net_device *netdev,
  521. struct ethtool_ringparam *ring)
  522. {
  523. struct e1000_adapter *adapter = netdev_priv(netdev);
  524. e1000_mac_type mac_type = adapter->hw.mac_type;
  525. struct e1000_tx_ring *txdr, *tx_old, *tx_new;
  526. struct e1000_rx_ring *rxdr, *rx_old, *rx_new;
  527. int i, err, tx_ring_size, rx_ring_size;
  528. if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
  529. return -EINVAL;
  530. tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  531. rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  532. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  533. msleep(1);
  534. if (netif_running(adapter->netdev))
  535. e1000_down(adapter);
  536. tx_old = adapter->tx_ring;
  537. rx_old = adapter->rx_ring;
  538. adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL);
  539. if (!adapter->tx_ring) {
  540. err = -ENOMEM;
  541. goto err_setup_rx;
  542. }
  543. memset(adapter->tx_ring, 0, tx_ring_size);
  544. adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL);
  545. if (!adapter->rx_ring) {
  546. kfree(adapter->tx_ring);
  547. err = -ENOMEM;
  548. goto err_setup_rx;
  549. }
  550. memset(adapter->rx_ring, 0, rx_ring_size);
  551. txdr = adapter->tx_ring;
  552. rxdr = adapter->rx_ring;
  553. rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
  554. rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
  555. E1000_MAX_RXD : E1000_MAX_82544_RXD));
  556. E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
  557. txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
  558. txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
  559. E1000_MAX_TXD : E1000_MAX_82544_TXD));
  560. E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
  561. for (i = 0; i < adapter->num_tx_queues; i++)
  562. txdr[i].count = txdr->count;
  563. for (i = 0; i < adapter->num_rx_queues; i++)
  564. rxdr[i].count = rxdr->count;
  565. if (netif_running(adapter->netdev)) {
  566. /* Try to get new resources before deleting old */
  567. if ((err = e1000_setup_all_rx_resources(adapter)))
  568. goto err_setup_rx;
  569. if ((err = e1000_setup_all_tx_resources(adapter)))
  570. goto err_setup_tx;
  571. /* save the new, restore the old in order to free it,
  572. * then restore the new back again */
  573. rx_new = adapter->rx_ring;
  574. tx_new = adapter->tx_ring;
  575. adapter->rx_ring = rx_old;
  576. adapter->tx_ring = tx_old;
  577. e1000_free_all_rx_resources(adapter);
  578. e1000_free_all_tx_resources(adapter);
  579. kfree(tx_old);
  580. kfree(rx_old);
  581. adapter->rx_ring = rx_new;
  582. adapter->tx_ring = tx_new;
  583. if ((err = e1000_up(adapter)))
  584. goto err_setup;
  585. }
  586. clear_bit(__E1000_RESETTING, &adapter->flags);
  587. return 0;
  588. err_setup_tx:
  589. e1000_free_all_rx_resources(adapter);
  590. err_setup_rx:
  591. adapter->rx_ring = rx_old;
  592. adapter->tx_ring = tx_old;
  593. e1000_up(adapter);
  594. err_setup:
  595. clear_bit(__E1000_RESETTING, &adapter->flags);
  596. return err;
  597. }
  598. #define REG_PATTERN_TEST(R, M, W) \
  599. { \
  600. uint32_t pat, value; \
  601. uint32_t test[] = \
  602. {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
  603. for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
  604. E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
  605. value = E1000_READ_REG(&adapter->hw, R); \
  606. if (value != (test[pat] & W & M)) { \
  607. DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
  608. "0x%08X expected 0x%08X\n", \
  609. E1000_##R, value, (test[pat] & W & M)); \
  610. *data = (adapter->hw.mac_type < e1000_82543) ? \
  611. E1000_82542_##R : E1000_##R; \
  612. return 1; \
  613. } \
  614. } \
  615. }
  616. #define REG_SET_AND_CHECK(R, M, W) \
  617. { \
  618. uint32_t value; \
  619. E1000_WRITE_REG(&adapter->hw, R, W & M); \
  620. value = E1000_READ_REG(&adapter->hw, R); \
  621. if ((W & M) != (value & M)) { \
  622. DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
  623. "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
  624. *data = (adapter->hw.mac_type < e1000_82543) ? \
  625. E1000_82542_##R : E1000_##R; \
  626. return 1; \
  627. } \
  628. }
  629. static int
  630. e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
  631. {
  632. uint32_t value, before, after;
  633. uint32_t i, toggle;
  634. /* The status register is Read Only, so a write should fail.
  635. * Some bits that get toggled are ignored.
  636. */
  637. switch (adapter->hw.mac_type) {
  638. /* there are several bits on newer hardware that are r/w */
  639. case e1000_82571:
  640. case e1000_82572:
  641. case e1000_80003es2lan:
  642. toggle = 0x7FFFF3FF;
  643. break;
  644. case e1000_82573:
  645. case e1000_ich8lan:
  646. toggle = 0x7FFFF033;
  647. break;
  648. default:
  649. toggle = 0xFFFFF833;
  650. break;
  651. }
  652. before = E1000_READ_REG(&adapter->hw, STATUS);
  653. value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
  654. E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
  655. after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
  656. if (value != after) {
  657. DPRINTK(DRV, ERR, "failed STATUS register test got: "
  658. "0x%08X expected: 0x%08X\n", after, value);
  659. *data = 1;
  660. return 1;
  661. }
  662. /* restore previous status */
  663. E1000_WRITE_REG(&adapter->hw, STATUS, before);
  664. if (adapter->hw.mac_type != e1000_ich8lan) {
  665. REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
  666. REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
  667. REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
  668. REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
  669. }
  670. REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
  671. REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  672. REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
  673. REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
  674. REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
  675. REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
  676. REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
  677. REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
  678. REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  679. REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
  680. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
  681. before = (adapter->hw.mac_type == e1000_ich8lan ?
  682. 0x06C3B33E : 0x06DFB3FE);
  683. REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
  684. REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
  685. if (adapter->hw.mac_type >= e1000_82543) {
  686. REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
  687. REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  688. if (adapter->hw.mac_type != e1000_ich8lan)
  689. REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
  690. REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  691. REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
  692. value = (adapter->hw.mac_type == e1000_ich8lan ?
  693. E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES);
  694. for (i = 0; i < value; i++) {
  695. REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
  696. 0xFFFFFFFF);
  697. }
  698. } else {
  699. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
  700. REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
  701. REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
  702. REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
  703. }
  704. value = (adapter->hw.mac_type == e1000_ich8lan ?
  705. E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE);
  706. for (i = 0; i < value; i++)
  707. REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
  708. *data = 0;
  709. return 0;
  710. }
  711. static int
  712. e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
  713. {
  714. uint16_t temp;
  715. uint16_t checksum = 0;
  716. uint16_t i;
  717. *data = 0;
  718. /* Read and add up the contents of the EEPROM */
  719. for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
  720. if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
  721. *data = 1;
  722. break;
  723. }
  724. checksum += temp;
  725. }
  726. /* If Checksum is not Correct return error else test passed */
  727. if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
  728. *data = 2;
  729. return *data;
  730. }
  731. static irqreturn_t
  732. e1000_test_intr(int irq,
  733. void *data,
  734. struct pt_regs *regs)
  735. {
  736. struct net_device *netdev = (struct net_device *) data;
  737. struct e1000_adapter *adapter = netdev_priv(netdev);
  738. adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
  739. return IRQ_HANDLED;
  740. }
  741. static int
  742. e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
  743. {
  744. struct net_device *netdev = adapter->netdev;
  745. uint32_t mask, i=0, shared_int = TRUE;
  746. uint32_t irq = adapter->pdev->irq;
  747. *data = 0;
  748. /* Hook up test interrupt handler just for this test */
  749. if (!request_irq(irq, &e1000_test_intr, SA_PROBEIRQ, netdev->name,
  750. netdev)) {
  751. shared_int = FALSE;
  752. } else if (request_irq(irq, &e1000_test_intr, SA_SHIRQ,
  753. netdev->name, netdev)){
  754. *data = 1;
  755. return -1;
  756. }
  757. DPRINTK(PROBE,INFO, "testing %s interrupt\n",
  758. (shared_int ? "shared" : "unshared"));
  759. /* Disable all the interrupts */
  760. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  761. msec_delay(10);
  762. /* Test each interrupt */
  763. for (; i < 10; i++) {
  764. if (adapter->hw.mac_type == e1000_ich8lan && i == 8)
  765. continue;
  766. /* Interrupt to test */
  767. mask = 1 << i;
  768. if (!shared_int) {
  769. /* Disable the interrupt to be reported in
  770. * the cause register and then force the same
  771. * interrupt and see if one gets posted. If
  772. * an interrupt was posted to the bus, the
  773. * test failed.
  774. */
  775. adapter->test_icr = 0;
  776. E1000_WRITE_REG(&adapter->hw, IMC, mask);
  777. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  778. msec_delay(10);
  779. if (adapter->test_icr & mask) {
  780. *data = 3;
  781. break;
  782. }
  783. }
  784. /* Enable the interrupt to be reported in
  785. * the cause register and then force the same
  786. * interrupt and see if one gets posted. If
  787. * an interrupt was not posted to the bus, the
  788. * test failed.
  789. */
  790. adapter->test_icr = 0;
  791. E1000_WRITE_REG(&adapter->hw, IMS, mask);
  792. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  793. msec_delay(10);
  794. if (!(adapter->test_icr & mask)) {
  795. *data = 4;
  796. break;
  797. }
  798. if (!shared_int) {
  799. /* Disable the other interrupts to be reported in
  800. * the cause register and then force the other
  801. * interrupts and see if any get posted. If
  802. * an interrupt was posted to the bus, the
  803. * test failed.
  804. */
  805. adapter->test_icr = 0;
  806. E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
  807. E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
  808. msec_delay(10);
  809. if (adapter->test_icr) {
  810. *data = 5;
  811. break;
  812. }
  813. }
  814. }
  815. /* Disable all the interrupts */
  816. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  817. msec_delay(10);
  818. /* Unhook test interrupt handler */
  819. free_irq(irq, netdev);
  820. return *data;
  821. }
  822. static void
  823. e1000_free_desc_rings(struct e1000_adapter *adapter)
  824. {
  825. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  826. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  827. struct pci_dev *pdev = adapter->pdev;
  828. int i;
  829. if (txdr->desc && txdr->buffer_info) {
  830. for (i = 0; i < txdr->count; i++) {
  831. if (txdr->buffer_info[i].dma)
  832. pci_unmap_single(pdev, txdr->buffer_info[i].dma,
  833. txdr->buffer_info[i].length,
  834. PCI_DMA_TODEVICE);
  835. if (txdr->buffer_info[i].skb)
  836. dev_kfree_skb(txdr->buffer_info[i].skb);
  837. }
  838. }
  839. if (rxdr->desc && rxdr->buffer_info) {
  840. for (i = 0; i < rxdr->count; i++) {
  841. if (rxdr->buffer_info[i].dma)
  842. pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
  843. rxdr->buffer_info[i].length,
  844. PCI_DMA_FROMDEVICE);
  845. if (rxdr->buffer_info[i].skb)
  846. dev_kfree_skb(rxdr->buffer_info[i].skb);
  847. }
  848. }
  849. if (txdr->desc) {
  850. pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
  851. txdr->desc = NULL;
  852. }
  853. if (rxdr->desc) {
  854. pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
  855. rxdr->desc = NULL;
  856. }
  857. kfree(txdr->buffer_info);
  858. txdr->buffer_info = NULL;
  859. kfree(rxdr->buffer_info);
  860. rxdr->buffer_info = NULL;
  861. return;
  862. }
  863. static int
  864. e1000_setup_desc_rings(struct e1000_adapter *adapter)
  865. {
  866. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  867. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  868. struct pci_dev *pdev = adapter->pdev;
  869. uint32_t rctl;
  870. int size, i, ret_val;
  871. /* Setup Tx descriptor ring and Tx buffers */
  872. if (!txdr->count)
  873. txdr->count = E1000_DEFAULT_TXD;
  874. size = txdr->count * sizeof(struct e1000_buffer);
  875. if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  876. ret_val = 1;
  877. goto err_nomem;
  878. }
  879. memset(txdr->buffer_info, 0, size);
  880. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  881. E1000_ROUNDUP(txdr->size, 4096);
  882. if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
  883. ret_val = 2;
  884. goto err_nomem;
  885. }
  886. memset(txdr->desc, 0, txdr->size);
  887. txdr->next_to_use = txdr->next_to_clean = 0;
  888. E1000_WRITE_REG(&adapter->hw, TDBAL,
  889. ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
  890. E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
  891. E1000_WRITE_REG(&adapter->hw, TDLEN,
  892. txdr->count * sizeof(struct e1000_tx_desc));
  893. E1000_WRITE_REG(&adapter->hw, TDH, 0);
  894. E1000_WRITE_REG(&adapter->hw, TDT, 0);
  895. E1000_WRITE_REG(&adapter->hw, TCTL,
  896. E1000_TCTL_PSP | E1000_TCTL_EN |
  897. E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
  898. E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
  899. for (i = 0; i < txdr->count; i++) {
  900. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
  901. struct sk_buff *skb;
  902. unsigned int size = 1024;
  903. if (!(skb = alloc_skb(size, GFP_KERNEL))) {
  904. ret_val = 3;
  905. goto err_nomem;
  906. }
  907. skb_put(skb, size);
  908. txdr->buffer_info[i].skb = skb;
  909. txdr->buffer_info[i].length = skb->len;
  910. txdr->buffer_info[i].dma =
  911. pci_map_single(pdev, skb->data, skb->len,
  912. PCI_DMA_TODEVICE);
  913. tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
  914. tx_desc->lower.data = cpu_to_le32(skb->len);
  915. tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
  916. E1000_TXD_CMD_IFCS |
  917. E1000_TXD_CMD_RPS);
  918. tx_desc->upper.data = 0;
  919. }
  920. /* Setup Rx descriptor ring and Rx buffers */
  921. if (!rxdr->count)
  922. rxdr->count = E1000_DEFAULT_RXD;
  923. size = rxdr->count * sizeof(struct e1000_buffer);
  924. if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  925. ret_val = 4;
  926. goto err_nomem;
  927. }
  928. memset(rxdr->buffer_info, 0, size);
  929. rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
  930. if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
  931. ret_val = 5;
  932. goto err_nomem;
  933. }
  934. memset(rxdr->desc, 0, rxdr->size);
  935. rxdr->next_to_use = rxdr->next_to_clean = 0;
  936. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  937. E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
  938. E1000_WRITE_REG(&adapter->hw, RDBAL,
  939. ((uint64_t) rxdr->dma & 0xFFFFFFFF));
  940. E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
  941. E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
  942. E1000_WRITE_REG(&adapter->hw, RDH, 0);
  943. E1000_WRITE_REG(&adapter->hw, RDT, 0);
  944. rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
  945. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  946. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  947. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  948. for (i = 0; i < rxdr->count; i++) {
  949. struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
  950. struct sk_buff *skb;
  951. if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
  952. GFP_KERNEL))) {
  953. ret_val = 6;
  954. goto err_nomem;
  955. }
  956. skb_reserve(skb, NET_IP_ALIGN);
  957. rxdr->buffer_info[i].skb = skb;
  958. rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
  959. rxdr->buffer_info[i].dma =
  960. pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
  961. PCI_DMA_FROMDEVICE);
  962. rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
  963. memset(skb->data, 0x00, skb->len);
  964. }
  965. return 0;
  966. err_nomem:
  967. e1000_free_desc_rings(adapter);
  968. return ret_val;
  969. }
  970. static void
  971. e1000_phy_disable_receiver(struct e1000_adapter *adapter)
  972. {
  973. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  974. e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
  975. e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
  976. e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
  977. e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
  978. }
  979. static void
  980. e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
  981. {
  982. uint16_t phy_reg;
  983. /* Because we reset the PHY above, we need to re-force TX_CLK in the
  984. * Extended PHY Specific Control Register to 25MHz clock. This
  985. * value defaults back to a 2.5MHz clock when the PHY is reset.
  986. */
  987. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  988. phy_reg |= M88E1000_EPSCR_TX_CLK_25;
  989. e1000_write_phy_reg(&adapter->hw,
  990. M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
  991. /* In addition, because of the s/w reset above, we need to enable
  992. * CRS on TX. This must be set for both full and half duplex
  993. * operation.
  994. */
  995. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  996. phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
  997. e1000_write_phy_reg(&adapter->hw,
  998. M88E1000_PHY_SPEC_CTRL, phy_reg);
  999. }
  1000. static int
  1001. e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
  1002. {
  1003. uint32_t ctrl_reg;
  1004. uint16_t phy_reg;
  1005. /* Setup the Device Control Register for PHY loopback test. */
  1006. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  1007. ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
  1008. E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1009. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1010. E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
  1011. E1000_CTRL_FD); /* Force Duplex to FULL */
  1012. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  1013. /* Read the PHY Specific Control Register (0x10) */
  1014. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  1015. /* Clear Auto-Crossover bits in PHY Specific Control Register
  1016. * (bits 6:5).
  1017. */
  1018. phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
  1019. e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
  1020. /* Perform software reset on the PHY */
  1021. e1000_phy_reset(&adapter->hw);
  1022. /* Have to setup TX_CLK and TX_CRS after software reset */
  1023. e1000_phy_reset_clk_and_crs(adapter);
  1024. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
  1025. /* Wait for reset to complete. */
  1026. udelay(500);
  1027. /* Have to setup TX_CLK and TX_CRS after software reset */
  1028. e1000_phy_reset_clk_and_crs(adapter);
  1029. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  1030. e1000_phy_disable_receiver(adapter);
  1031. /* Set the loopback bit in the PHY control register. */
  1032. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1033. phy_reg |= MII_CR_LOOPBACK;
  1034. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1035. /* Setup TX_CLK and TX_CRS one more time. */
  1036. e1000_phy_reset_clk_and_crs(adapter);
  1037. /* Check Phy Configuration */
  1038. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1039. if (phy_reg != 0x4100)
  1040. return 9;
  1041. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  1042. if (phy_reg != 0x0070)
  1043. return 10;
  1044. e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
  1045. if (phy_reg != 0x001A)
  1046. return 11;
  1047. return 0;
  1048. }
  1049. static int
  1050. e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
  1051. {
  1052. uint32_t ctrl_reg = 0;
  1053. uint32_t stat_reg = 0;
  1054. adapter->hw.autoneg = FALSE;
  1055. if (adapter->hw.phy_type == e1000_phy_m88) {
  1056. /* Auto-MDI/MDIX Off */
  1057. e1000_write_phy_reg(&adapter->hw,
  1058. M88E1000_PHY_SPEC_CTRL, 0x0808);
  1059. /* reset to update Auto-MDI/MDIX */
  1060. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
  1061. /* autoneg off */
  1062. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
  1063. } else if (adapter->hw.phy_type == e1000_phy_gg82563) {
  1064. e1000_write_phy_reg(&adapter->hw,
  1065. GG82563_PHY_KMRN_MODE_CTRL,
  1066. 0x1CC);
  1067. }
  1068. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  1069. if (adapter->hw.phy_type == e1000_phy_ife) {
  1070. /* force 100, set loopback */
  1071. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x6100);
  1072. /* Now set up the MAC to the same speed/duplex as the PHY. */
  1073. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  1074. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1075. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1076. E1000_CTRL_SPD_100 |/* Force Speed to 100 */
  1077. E1000_CTRL_FD); /* Force Duplex to FULL */
  1078. } else {
  1079. /* force 1000, set loopback */
  1080. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
  1081. /* Now set up the MAC to the same speed/duplex as the PHY. */
  1082. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  1083. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  1084. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1085. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1086. E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
  1087. E1000_CTRL_FD); /* Force Duplex to FULL */
  1088. }
  1089. if (adapter->hw.media_type == e1000_media_type_copper &&
  1090. adapter->hw.phy_type == e1000_phy_m88) {
  1091. ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
  1092. } else {
  1093. /* Set the ILOS bit on the fiber Nic is half
  1094. * duplex link is detected. */
  1095. stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
  1096. if ((stat_reg & E1000_STATUS_FD) == 0)
  1097. ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
  1098. }
  1099. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  1100. /* Disable the receiver on the PHY so when a cable is plugged in, the
  1101. * PHY does not begin to autoneg when a cable is reconnected to the NIC.
  1102. */
  1103. if (adapter->hw.phy_type == e1000_phy_m88)
  1104. e1000_phy_disable_receiver(adapter);
  1105. udelay(500);
  1106. return 0;
  1107. }
  1108. static int
  1109. e1000_set_phy_loopback(struct e1000_adapter *adapter)
  1110. {
  1111. uint16_t phy_reg = 0;
  1112. uint16_t count = 0;
  1113. switch (adapter->hw.mac_type) {
  1114. case e1000_82543:
  1115. if (adapter->hw.media_type == e1000_media_type_copper) {
  1116. /* Attempt to setup Loopback mode on Non-integrated PHY.
  1117. * Some PHY registers get corrupted at random, so
  1118. * attempt this 10 times.
  1119. */
  1120. while (e1000_nonintegrated_phy_loopback(adapter) &&
  1121. count++ < 10);
  1122. if (count < 11)
  1123. return 0;
  1124. }
  1125. break;
  1126. case e1000_82544:
  1127. case e1000_82540:
  1128. case e1000_82545:
  1129. case e1000_82545_rev_3:
  1130. case e1000_82546:
  1131. case e1000_82546_rev_3:
  1132. case e1000_82541:
  1133. case e1000_82541_rev_2:
  1134. case e1000_82547:
  1135. case e1000_82547_rev_2:
  1136. case e1000_82571:
  1137. case e1000_82572:
  1138. case e1000_82573:
  1139. case e1000_80003es2lan:
  1140. case e1000_ich8lan:
  1141. return e1000_integrated_phy_loopback(adapter);
  1142. break;
  1143. default:
  1144. /* Default PHY loopback work is to read the MII
  1145. * control register and assert bit 14 (loopback mode).
  1146. */
  1147. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1148. phy_reg |= MII_CR_LOOPBACK;
  1149. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1150. return 0;
  1151. break;
  1152. }
  1153. return 8;
  1154. }
  1155. static int
  1156. e1000_setup_loopback_test(struct e1000_adapter *adapter)
  1157. {
  1158. struct e1000_hw *hw = &adapter->hw;
  1159. uint32_t rctl;
  1160. if (hw->media_type == e1000_media_type_fiber ||
  1161. hw->media_type == e1000_media_type_internal_serdes) {
  1162. switch (hw->mac_type) {
  1163. case e1000_82545:
  1164. case e1000_82546:
  1165. case e1000_82545_rev_3:
  1166. case e1000_82546_rev_3:
  1167. return e1000_set_phy_loopback(adapter);
  1168. break;
  1169. case e1000_82571:
  1170. case e1000_82572:
  1171. #define E1000_SERDES_LB_ON 0x410
  1172. e1000_set_phy_loopback(adapter);
  1173. E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
  1174. msec_delay(10);
  1175. return 0;
  1176. break;
  1177. default:
  1178. rctl = E1000_READ_REG(hw, RCTL);
  1179. rctl |= E1000_RCTL_LBM_TCVR;
  1180. E1000_WRITE_REG(hw, RCTL, rctl);
  1181. return 0;
  1182. }
  1183. } else if (hw->media_type == e1000_media_type_copper)
  1184. return e1000_set_phy_loopback(adapter);
  1185. return 7;
  1186. }
  1187. static void
  1188. e1000_loopback_cleanup(struct e1000_adapter *adapter)
  1189. {
  1190. struct e1000_hw *hw = &adapter->hw;
  1191. uint32_t rctl;
  1192. uint16_t phy_reg;
  1193. rctl = E1000_READ_REG(hw, RCTL);
  1194. rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
  1195. E1000_WRITE_REG(hw, RCTL, rctl);
  1196. switch (hw->mac_type) {
  1197. case e1000_82571:
  1198. case e1000_82572:
  1199. if (hw->media_type == e1000_media_type_fiber ||
  1200. hw->media_type == e1000_media_type_internal_serdes) {
  1201. #define E1000_SERDES_LB_OFF 0x400
  1202. E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
  1203. msec_delay(10);
  1204. break;
  1205. }
  1206. /* Fall Through */
  1207. case e1000_82545:
  1208. case e1000_82546:
  1209. case e1000_82545_rev_3:
  1210. case e1000_82546_rev_3:
  1211. default:
  1212. hw->autoneg = TRUE;
  1213. if (hw->phy_type == e1000_phy_gg82563) {
  1214. e1000_write_phy_reg(hw,
  1215. GG82563_PHY_KMRN_MODE_CTRL,
  1216. 0x180);
  1217. }
  1218. e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
  1219. if (phy_reg & MII_CR_LOOPBACK) {
  1220. phy_reg &= ~MII_CR_LOOPBACK;
  1221. e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
  1222. e1000_phy_reset(hw);
  1223. }
  1224. break;
  1225. }
  1226. }
  1227. static void
  1228. e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1229. {
  1230. memset(skb->data, 0xFF, frame_size);
  1231. frame_size &= ~1;
  1232. memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
  1233. memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
  1234. memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
  1235. }
  1236. static int
  1237. e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1238. {
  1239. frame_size &= ~1;
  1240. if (*(skb->data + 3) == 0xFF) {
  1241. if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
  1242. (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
  1243. return 0;
  1244. }
  1245. }
  1246. return 13;
  1247. }
  1248. static int
  1249. e1000_run_loopback_test(struct e1000_adapter *adapter)
  1250. {
  1251. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  1252. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  1253. struct pci_dev *pdev = adapter->pdev;
  1254. int i, j, k, l, lc, good_cnt, ret_val=0;
  1255. unsigned long time;
  1256. E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
  1257. /* Calculate the loop count based on the largest descriptor ring
  1258. * The idea is to wrap the largest ring a number of times using 64
  1259. * send/receive pairs during each loop
  1260. */
  1261. if (rxdr->count <= txdr->count)
  1262. lc = ((txdr->count / 64) * 2) + 1;
  1263. else
  1264. lc = ((rxdr->count / 64) * 2) + 1;
  1265. k = l = 0;
  1266. for (j = 0; j <= lc; j++) { /* loop count loop */
  1267. for (i = 0; i < 64; i++) { /* send the packets */
  1268. e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
  1269. 1024);
  1270. pci_dma_sync_single_for_device(pdev,
  1271. txdr->buffer_info[k].dma,
  1272. txdr->buffer_info[k].length,
  1273. PCI_DMA_TODEVICE);
  1274. if (unlikely(++k == txdr->count)) k = 0;
  1275. }
  1276. E1000_WRITE_REG(&adapter->hw, TDT, k);
  1277. msec_delay(200);
  1278. time = jiffies; /* set the start time for the receive */
  1279. good_cnt = 0;
  1280. do { /* receive the sent packets */
  1281. pci_dma_sync_single_for_cpu(pdev,
  1282. rxdr->buffer_info[l].dma,
  1283. rxdr->buffer_info[l].length,
  1284. PCI_DMA_FROMDEVICE);
  1285. ret_val = e1000_check_lbtest_frame(
  1286. rxdr->buffer_info[l].skb,
  1287. 1024);
  1288. if (!ret_val)
  1289. good_cnt++;
  1290. if (unlikely(++l == rxdr->count)) l = 0;
  1291. /* time + 20 msecs (200 msecs on 2.4) is more than
  1292. * enough time to complete the receives, if it's
  1293. * exceeded, break and error off
  1294. */
  1295. } while (good_cnt < 64 && jiffies < (time + 20));
  1296. if (good_cnt != 64) {
  1297. ret_val = 13; /* ret_val is the same as mis-compare */
  1298. break;
  1299. }
  1300. if (jiffies >= (time + 2)) {
  1301. ret_val = 14; /* error code for time out error */
  1302. break;
  1303. }
  1304. } /* end loop count loop */
  1305. return ret_val;
  1306. }
  1307. static int
  1308. e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
  1309. {
  1310. /* PHY loopback cannot be performed if SoL/IDER
  1311. * sessions are active */
  1312. if (e1000_check_phy_reset_block(&adapter->hw)) {
  1313. DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
  1314. "when SoL/IDER is active.\n");
  1315. *data = 0;
  1316. goto out;
  1317. }
  1318. if ((*data = e1000_setup_desc_rings(adapter)))
  1319. goto out;
  1320. if ((*data = e1000_setup_loopback_test(adapter)))
  1321. goto err_loopback;
  1322. *data = e1000_run_loopback_test(adapter);
  1323. e1000_loopback_cleanup(adapter);
  1324. err_loopback:
  1325. e1000_free_desc_rings(adapter);
  1326. out:
  1327. return *data;
  1328. }
  1329. static int
  1330. e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
  1331. {
  1332. *data = 0;
  1333. if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
  1334. int i = 0;
  1335. adapter->hw.serdes_link_down = TRUE;
  1336. /* On some blade server designs, link establishment
  1337. * could take as long as 2-3 minutes */
  1338. do {
  1339. e1000_check_for_link(&adapter->hw);
  1340. if (adapter->hw.serdes_link_down == FALSE)
  1341. return *data;
  1342. msec_delay(20);
  1343. } while (i++ < 3750);
  1344. *data = 1;
  1345. } else {
  1346. e1000_check_for_link(&adapter->hw);
  1347. if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
  1348. msec_delay(4000);
  1349. if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
  1350. *data = 1;
  1351. }
  1352. }
  1353. return *data;
  1354. }
  1355. static int
  1356. e1000_diag_test_count(struct net_device *netdev)
  1357. {
  1358. return E1000_TEST_LEN;
  1359. }
  1360. static void
  1361. e1000_diag_test(struct net_device *netdev,
  1362. struct ethtool_test *eth_test, uint64_t *data)
  1363. {
  1364. struct e1000_adapter *adapter = netdev_priv(netdev);
  1365. boolean_t if_running = netif_running(netdev);
  1366. set_bit(__E1000_DRIVER_TESTING, &adapter->flags);
  1367. if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
  1368. /* Offline tests */
  1369. /* save speed, duplex, autoneg settings */
  1370. uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
  1371. uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
  1372. uint8_t autoneg = adapter->hw.autoneg;
  1373. /* Link test performed before hardware reset so autoneg doesn't
  1374. * interfere with test result */
  1375. if (e1000_link_test(adapter, &data[4]))
  1376. eth_test->flags |= ETH_TEST_FL_FAILED;
  1377. if (if_running)
  1378. /* indicate we're in test mode */
  1379. dev_close(netdev);
  1380. else
  1381. e1000_reset(adapter);
  1382. if (e1000_reg_test(adapter, &data[0]))
  1383. eth_test->flags |= ETH_TEST_FL_FAILED;
  1384. e1000_reset(adapter);
  1385. if (e1000_eeprom_test(adapter, &data[1]))
  1386. eth_test->flags |= ETH_TEST_FL_FAILED;
  1387. e1000_reset(adapter);
  1388. if (e1000_intr_test(adapter, &data[2]))
  1389. eth_test->flags |= ETH_TEST_FL_FAILED;
  1390. e1000_reset(adapter);
  1391. if (e1000_loopback_test(adapter, &data[3]))
  1392. eth_test->flags |= ETH_TEST_FL_FAILED;
  1393. /* restore speed, duplex, autoneg settings */
  1394. adapter->hw.autoneg_advertised = autoneg_advertised;
  1395. adapter->hw.forced_speed_duplex = forced_speed_duplex;
  1396. adapter->hw.autoneg = autoneg;
  1397. e1000_reset(adapter);
  1398. clear_bit(__E1000_DRIVER_TESTING, &adapter->flags);
  1399. if (if_running)
  1400. dev_open(netdev);
  1401. } else {
  1402. /* Online tests */
  1403. if (e1000_link_test(adapter, &data[4]))
  1404. eth_test->flags |= ETH_TEST_FL_FAILED;
  1405. /* Offline tests aren't run; pass by default */
  1406. data[0] = 0;
  1407. data[1] = 0;
  1408. data[2] = 0;
  1409. data[3] = 0;
  1410. clear_bit(__E1000_DRIVER_TESTING, &adapter->flags);
  1411. }
  1412. msleep_interruptible(4 * 1000);
  1413. }
  1414. static void
  1415. e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1416. {
  1417. struct e1000_adapter *adapter = netdev_priv(netdev);
  1418. struct e1000_hw *hw = &adapter->hw;
  1419. switch (adapter->hw.device_id) {
  1420. case E1000_DEV_ID_82542:
  1421. case E1000_DEV_ID_82543GC_FIBER:
  1422. case E1000_DEV_ID_82543GC_COPPER:
  1423. case E1000_DEV_ID_82544EI_FIBER:
  1424. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1425. case E1000_DEV_ID_82545EM_FIBER:
  1426. case E1000_DEV_ID_82545EM_COPPER:
  1427. case E1000_DEV_ID_82546GB_QUAD_COPPER:
  1428. wol->supported = 0;
  1429. wol->wolopts = 0;
  1430. return;
  1431. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1432. /* device id 10B5 port-A supports wol */
  1433. if (!adapter->ksp3_port_a) {
  1434. wol->supported = 0;
  1435. return;
  1436. }
  1437. /* KSP3 does not suppport UCAST wake-ups for any interface */
  1438. wol->supported = WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
  1439. if (adapter->wol & E1000_WUFC_EX)
  1440. DPRINTK(DRV, ERR, "Interface does not support "
  1441. "directed (unicast) frame wake-up packets\n");
  1442. wol->wolopts = 0;
  1443. goto do_defaults;
  1444. case E1000_DEV_ID_82546EB_FIBER:
  1445. case E1000_DEV_ID_82546GB_FIBER:
  1446. case E1000_DEV_ID_82571EB_FIBER:
  1447. /* Wake events only supported on port A for dual fiber */
  1448. if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
  1449. wol->supported = 0;
  1450. wol->wolopts = 0;
  1451. return;
  1452. }
  1453. /* Fall Through */
  1454. default:
  1455. wol->supported = WAKE_UCAST | WAKE_MCAST |
  1456. WAKE_BCAST | WAKE_MAGIC;
  1457. wol->wolopts = 0;
  1458. do_defaults:
  1459. if (adapter->wol & E1000_WUFC_EX)
  1460. wol->wolopts |= WAKE_UCAST;
  1461. if (adapter->wol & E1000_WUFC_MC)
  1462. wol->wolopts |= WAKE_MCAST;
  1463. if (adapter->wol & E1000_WUFC_BC)
  1464. wol->wolopts |= WAKE_BCAST;
  1465. if (adapter->wol & E1000_WUFC_MAG)
  1466. wol->wolopts |= WAKE_MAGIC;
  1467. return;
  1468. }
  1469. }
  1470. static int
  1471. e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1472. {
  1473. struct e1000_adapter *adapter = netdev_priv(netdev);
  1474. struct e1000_hw *hw = &adapter->hw;
  1475. switch (adapter->hw.device_id) {
  1476. case E1000_DEV_ID_82542:
  1477. case E1000_DEV_ID_82543GC_FIBER:
  1478. case E1000_DEV_ID_82543GC_COPPER:
  1479. case E1000_DEV_ID_82544EI_FIBER:
  1480. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1481. case E1000_DEV_ID_82546GB_QUAD_COPPER:
  1482. case E1000_DEV_ID_82545EM_FIBER:
  1483. case E1000_DEV_ID_82545EM_COPPER:
  1484. return wol->wolopts ? -EOPNOTSUPP : 0;
  1485. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1486. /* device id 10B5 port-A supports wol */
  1487. if (!adapter->ksp3_port_a)
  1488. return wol->wolopts ? -EOPNOTSUPP : 0;
  1489. if (wol->wolopts & WAKE_UCAST) {
  1490. DPRINTK(DRV, ERR, "Interface does not support "
  1491. "directed (unicast) frame wake-up packets\n");
  1492. return -EOPNOTSUPP;
  1493. }
  1494. case E1000_DEV_ID_82546EB_FIBER:
  1495. case E1000_DEV_ID_82546GB_FIBER:
  1496. case E1000_DEV_ID_82571EB_FIBER:
  1497. /* Wake events only supported on port A for dual fiber */
  1498. if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
  1499. return wol->wolopts ? -EOPNOTSUPP : 0;
  1500. /* Fall Through */
  1501. default:
  1502. if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
  1503. return -EOPNOTSUPP;
  1504. adapter->wol = 0;
  1505. if (wol->wolopts & WAKE_UCAST)
  1506. adapter->wol |= E1000_WUFC_EX;
  1507. if (wol->wolopts & WAKE_MCAST)
  1508. adapter->wol |= E1000_WUFC_MC;
  1509. if (wol->wolopts & WAKE_BCAST)
  1510. adapter->wol |= E1000_WUFC_BC;
  1511. if (wol->wolopts & WAKE_MAGIC)
  1512. adapter->wol |= E1000_WUFC_MAG;
  1513. }
  1514. return 0;
  1515. }
  1516. /* toggle LED 4 times per second = 2 "blinks" per second */
  1517. #define E1000_ID_INTERVAL (HZ/4)
  1518. /* bit defines for adapter->led_status */
  1519. #define E1000_LED_ON 0
  1520. static void
  1521. e1000_led_blink_callback(unsigned long data)
  1522. {
  1523. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1524. if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
  1525. e1000_led_off(&adapter->hw);
  1526. else
  1527. e1000_led_on(&adapter->hw);
  1528. mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
  1529. }
  1530. static int
  1531. e1000_phys_id(struct net_device *netdev, uint32_t data)
  1532. {
  1533. struct e1000_adapter *adapter = netdev_priv(netdev);
  1534. if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
  1535. data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
  1536. if (adapter->hw.mac_type < e1000_82571) {
  1537. if (!adapter->blink_timer.function) {
  1538. init_timer(&adapter->blink_timer);
  1539. adapter->blink_timer.function = e1000_led_blink_callback;
  1540. adapter->blink_timer.data = (unsigned long) adapter;
  1541. }
  1542. e1000_setup_led(&adapter->hw);
  1543. mod_timer(&adapter->blink_timer, jiffies);
  1544. msleep_interruptible(data * 1000);
  1545. del_timer_sync(&adapter->blink_timer);
  1546. } else if (adapter->hw.phy_type == e1000_phy_ife) {
  1547. if (!adapter->blink_timer.function) {
  1548. init_timer(&adapter->blink_timer);
  1549. adapter->blink_timer.function = e1000_led_blink_callback;
  1550. adapter->blink_timer.data = (unsigned long) adapter;
  1551. }
  1552. mod_timer(&adapter->blink_timer, jiffies);
  1553. msleep_interruptible(data * 1000);
  1554. del_timer_sync(&adapter->blink_timer);
  1555. e1000_write_phy_reg(&(adapter->hw), IFE_PHY_SPECIAL_CONTROL_LED, 0);
  1556. } else {
  1557. e1000_blink_led_start(&adapter->hw);
  1558. msleep_interruptible(data * 1000);
  1559. }
  1560. e1000_led_off(&adapter->hw);
  1561. clear_bit(E1000_LED_ON, &adapter->led_status);
  1562. e1000_cleanup_led(&adapter->hw);
  1563. return 0;
  1564. }
  1565. static int
  1566. e1000_nway_reset(struct net_device *netdev)
  1567. {
  1568. struct e1000_adapter *adapter = netdev_priv(netdev);
  1569. if (netif_running(netdev))
  1570. e1000_reinit_locked(adapter);
  1571. return 0;
  1572. }
  1573. static int
  1574. e1000_get_stats_count(struct net_device *netdev)
  1575. {
  1576. return E1000_STATS_LEN;
  1577. }
  1578. static void
  1579. e1000_get_ethtool_stats(struct net_device *netdev,
  1580. struct ethtool_stats *stats, uint64_t *data)
  1581. {
  1582. struct e1000_adapter *adapter = netdev_priv(netdev);
  1583. int i;
  1584. e1000_update_stats(adapter);
  1585. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
  1586. char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
  1587. data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
  1588. sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
  1589. }
  1590. /* BUG_ON(i != E1000_STATS_LEN); */
  1591. }
  1592. static void
  1593. e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
  1594. {
  1595. uint8_t *p = data;
  1596. int i;
  1597. switch (stringset) {
  1598. case ETH_SS_TEST:
  1599. memcpy(data, *e1000_gstrings_test,
  1600. E1000_TEST_LEN*ETH_GSTRING_LEN);
  1601. break;
  1602. case ETH_SS_STATS:
  1603. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
  1604. memcpy(p, e1000_gstrings_stats[i].stat_string,
  1605. ETH_GSTRING_LEN);
  1606. p += ETH_GSTRING_LEN;
  1607. }
  1608. /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
  1609. break;
  1610. }
  1611. }
  1612. static struct ethtool_ops e1000_ethtool_ops = {
  1613. .get_settings = e1000_get_settings,
  1614. .set_settings = e1000_set_settings,
  1615. .get_drvinfo = e1000_get_drvinfo,
  1616. .get_regs_len = e1000_get_regs_len,
  1617. .get_regs = e1000_get_regs,
  1618. .get_wol = e1000_get_wol,
  1619. .set_wol = e1000_set_wol,
  1620. .get_msglevel = e1000_get_msglevel,
  1621. .set_msglevel = e1000_set_msglevel,
  1622. .nway_reset = e1000_nway_reset,
  1623. .get_link = ethtool_op_get_link,
  1624. .get_eeprom_len = e1000_get_eeprom_len,
  1625. .get_eeprom = e1000_get_eeprom,
  1626. .set_eeprom = e1000_set_eeprom,
  1627. .get_ringparam = e1000_get_ringparam,
  1628. .set_ringparam = e1000_set_ringparam,
  1629. .get_pauseparam = e1000_get_pauseparam,
  1630. .set_pauseparam = e1000_set_pauseparam,
  1631. .get_rx_csum = e1000_get_rx_csum,
  1632. .set_rx_csum = e1000_set_rx_csum,
  1633. .get_tx_csum = e1000_get_tx_csum,
  1634. .set_tx_csum = e1000_set_tx_csum,
  1635. .get_sg = ethtool_op_get_sg,
  1636. .set_sg = ethtool_op_set_sg,
  1637. #ifdef NETIF_F_TSO
  1638. .get_tso = ethtool_op_get_tso,
  1639. .set_tso = e1000_set_tso,
  1640. #endif
  1641. .self_test_count = e1000_diag_test_count,
  1642. .self_test = e1000_diag_test,
  1643. .get_strings = e1000_get_strings,
  1644. .phys_id = e1000_phys_id,
  1645. .get_stats_count = e1000_get_stats_count,
  1646. .get_ethtool_stats = e1000_get_ethtool_stats,
  1647. .get_perm_addr = ethtool_op_get_perm_addr,
  1648. };
  1649. void e1000_set_ethtool_ops(struct net_device *netdev)
  1650. {
  1651. SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
  1652. }