mach-crag6410.c 18 KB

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  1. /* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
  2. *
  3. * Copyright 2011 Wolfson Microelectronics plc
  4. * Mark Brown <broonie@opensource.wolfsonmicro.com>
  5. *
  6. * Copyright 2011 Simtec Electronics
  7. * Ben Dooks <ben@simtec.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/list.h>
  15. #include <linux/serial_core.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/fb.h>
  18. #include <linux/io.h>
  19. #include <linux/init.h>
  20. #include <linux/gpio.h>
  21. #include <linux/delay.h>
  22. #include <linux/regulator/machine.h>
  23. #include <linux/regulator/fixed.h>
  24. #include <linux/pwm_backlight.h>
  25. #include <linux/dm9000.h>
  26. #include <linux/gpio_keys.h>
  27. #include <linux/basic_mmio_gpio.h>
  28. #include <linux/spi/spi.h>
  29. #include <linux/i2c/pca953x.h>
  30. #include <video/platform_lcd.h>
  31. #include <linux/mfd/wm831x/core.h>
  32. #include <linux/mfd/wm831x/pdata.h>
  33. #include <linux/mfd/wm831x/irq.h>
  34. #include <linux/mfd/wm831x/gpio.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach-types.h>
  37. #include <mach/hardware.h>
  38. #include <mach/map.h>
  39. #include <mach/s3c6410.h>
  40. #include <mach/regs-sys.h>
  41. #include <mach/regs-gpio.h>
  42. #include <mach/regs-modem.h>
  43. #include <mach/regs-gpio-memport.h>
  44. #include <plat/regs-serial.h>
  45. #include <plat/regs-fb-v4.h>
  46. #include <plat/fb.h>
  47. #include <plat/sdhci.h>
  48. #include <plat/gpio-cfg.h>
  49. #include <plat/s3c64xx-spi.h>
  50. #include <plat/keypad.h>
  51. #include <plat/clock.h>
  52. #include <plat/devs.h>
  53. #include <plat/cpu.h>
  54. #include <plat/adc.h>
  55. #include <plat/iic.h>
  56. #include <plat/pm.h>
  57. #include <sound/wm8915.h>
  58. #include <sound/wm8962.h>
  59. #include <sound/wm9081.h>
  60. #define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START
  61. #define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64)
  62. #define PCA935X_GPIO_BASE GPIO_BOARD_START
  63. #define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
  64. #define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16)
  65. /* serial port setup */
  66. #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
  67. #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
  68. #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
  69. static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
  70. [0] = {
  71. .hwport = 0,
  72. .flags = 0,
  73. .ucon = UCON,
  74. .ulcon = ULCON,
  75. .ufcon = UFCON,
  76. },
  77. [1] = {
  78. .hwport = 1,
  79. .flags = 0,
  80. .ucon = UCON,
  81. .ulcon = ULCON,
  82. .ufcon = UFCON,
  83. },
  84. [2] = {
  85. .hwport = 2,
  86. .flags = 0,
  87. .ucon = UCON,
  88. .ulcon = ULCON,
  89. .ufcon = UFCON,
  90. },
  91. [3] = {
  92. .hwport = 3,
  93. .flags = 0,
  94. .ucon = UCON,
  95. .ulcon = ULCON,
  96. .ufcon = UFCON,
  97. },
  98. };
  99. static struct platform_pwm_backlight_data crag6410_backlight_data = {
  100. .pwm_id = 0,
  101. .max_brightness = 1000,
  102. .dft_brightness = 600,
  103. .pwm_period_ns = 100000, /* about 1kHz */
  104. };
  105. static struct platform_device crag6410_backlight_device = {
  106. .name = "pwm-backlight",
  107. .id = -1,
  108. .dev = {
  109. .parent = &s3c_device_timer[0].dev,
  110. .platform_data = &crag6410_backlight_data,
  111. },
  112. };
  113. static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
  114. {
  115. pr_debug("%s: setting power %d\n", __func__, power);
  116. if (power) {
  117. gpio_set_value(S3C64XX_GPB(0), 1);
  118. msleep(1);
  119. s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
  120. } else {
  121. gpio_direction_output(S3C64XX_GPF(14), 0);
  122. gpio_set_value(S3C64XX_GPB(0), 0);
  123. }
  124. }
  125. static struct platform_device crag6410_lcd_powerdev = {
  126. .name = "platform-lcd",
  127. .id = -1,
  128. .dev.parent = &s3c_device_fb.dev,
  129. .dev.platform_data = &(struct plat_lcd_data) {
  130. .set_power = crag6410_lcd_power_set,
  131. },
  132. };
  133. /* 640x480 URT */
  134. static struct s3c_fb_pd_win crag6410_fb_win0 = {
  135. /* this is to ensure we use win0 */
  136. .win_mode = {
  137. .left_margin = 150,
  138. .right_margin = 80,
  139. .upper_margin = 40,
  140. .lower_margin = 5,
  141. .hsync_len = 40,
  142. .vsync_len = 5,
  143. .xres = 640,
  144. .yres = 480,
  145. },
  146. .max_bpp = 32,
  147. .default_bpp = 16,
  148. .virtual_y = 480 * 2,
  149. .virtual_x = 640,
  150. };
  151. /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
  152. static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
  153. .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
  154. .win[0] = &crag6410_fb_win0,
  155. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  156. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  157. };
  158. /* 2x6 keypad */
  159. static uint32_t crag6410_keymap[] __initdata = {
  160. /* KEY(row, col, keycode) */
  161. KEY(0, 0, KEY_VOLUMEUP),
  162. KEY(0, 1, KEY_HOME),
  163. KEY(0, 2, KEY_VOLUMEDOWN),
  164. KEY(0, 3, KEY_HELP),
  165. KEY(0, 4, KEY_MENU),
  166. KEY(0, 5, KEY_MEDIA),
  167. KEY(1, 0, 232),
  168. KEY(1, 1, KEY_DOWN),
  169. KEY(1, 2, KEY_LEFT),
  170. KEY(1, 3, KEY_UP),
  171. KEY(1, 4, KEY_RIGHT),
  172. KEY(1, 5, KEY_CAMERA),
  173. };
  174. static struct matrix_keymap_data crag6410_keymap_data __initdata = {
  175. .keymap = crag6410_keymap,
  176. .keymap_size = ARRAY_SIZE(crag6410_keymap),
  177. };
  178. static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
  179. .keymap_data = &crag6410_keymap_data,
  180. .rows = 2,
  181. .cols = 6,
  182. };
  183. static struct gpio_keys_button crag6410_gpio_keys[] = {
  184. [0] = {
  185. .code = KEY_SUSPEND,
  186. .gpio = S3C64XX_GPL(10), /* EINT 18 */
  187. .type = EV_KEY,
  188. .wakeup = 1,
  189. .active_low = 1,
  190. },
  191. [1] = {
  192. .code = SW_FRONT_PROXIMITY,
  193. .gpio = S3C64XX_GPN(11), /* EINT 11 */
  194. .type = EV_SW,
  195. },
  196. };
  197. static struct gpio_keys_platform_data crag6410_gpio_keydata = {
  198. .buttons = crag6410_gpio_keys,
  199. .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
  200. };
  201. static struct platform_device crag6410_gpio_keydev = {
  202. .name = "gpio-keys",
  203. .id = 0,
  204. .dev.platform_data = &crag6410_gpio_keydata,
  205. };
  206. static struct resource crag6410_dm9k_resource[] = {
  207. [0] = {
  208. .start = S3C64XX_PA_XM0CSN5,
  209. .end = S3C64XX_PA_XM0CSN5 + 1,
  210. .flags = IORESOURCE_MEM,
  211. },
  212. [1] = {
  213. .start = S3C64XX_PA_XM0CSN5 + (1 << 8),
  214. .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
  215. .flags = IORESOURCE_MEM,
  216. },
  217. [2] = {
  218. .start = S3C_EINT(17),
  219. .end = S3C_EINT(17),
  220. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  221. },
  222. };
  223. static struct dm9000_plat_data mini6410_dm9k_pdata = {
  224. .flags = DM9000_PLATF_16BITONLY,
  225. };
  226. static struct platform_device crag6410_dm9k_device = {
  227. .name = "dm9000",
  228. .id = -1,
  229. .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
  230. .resource = crag6410_dm9k_resource,
  231. .dev.platform_data = &mini6410_dm9k_pdata,
  232. };
  233. static struct resource crag6410_mmgpio_resource[] = {
  234. [0] = {
  235. .start = S3C64XX_PA_XM0CSN4 + 1,
  236. .end = S3C64XX_PA_XM0CSN4 + 1,
  237. .flags = IORESOURCE_MEM,
  238. },
  239. };
  240. static struct platform_device crag6410_mmgpio = {
  241. .name = "basic-mmio-gpio",
  242. .id = -1,
  243. .resource = crag6410_mmgpio_resource,
  244. .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
  245. .dev.platform_data = &(struct bgpio_pdata) {
  246. .base = -1,
  247. },
  248. };
  249. static struct platform_device speyside_device = {
  250. .name = "speyside",
  251. .id = -1,
  252. };
  253. static struct platform_device speyside_wm8962_device = {
  254. .name = "speyside-wm8962",
  255. .id = -1,
  256. };
  257. static struct regulator_consumer_supply wallvdd_consumers[] = {
  258. REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
  259. REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
  260. };
  261. static struct regulator_init_data wallvdd_data = {
  262. .constraints = {
  263. .always_on = 1,
  264. },
  265. .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
  266. .consumer_supplies = wallvdd_consumers,
  267. };
  268. static struct fixed_voltage_config wallvdd_pdata = {
  269. .supply_name = "WALLVDD",
  270. .microvolts = 5000000,
  271. .init_data = &wallvdd_data,
  272. .gpio = -EINVAL,
  273. };
  274. static struct platform_device wallvdd_device = {
  275. .name = "reg-fixed-voltage",
  276. .id = -1,
  277. .dev = {
  278. .platform_data = &wallvdd_pdata,
  279. },
  280. };
  281. static struct platform_device *crag6410_devices[] __initdata = {
  282. &s3c_device_hsmmc0,
  283. &s3c_device_hsmmc1,
  284. &s3c_device_hsmmc2,
  285. &s3c_device_i2c0,
  286. &s3c_device_i2c1,
  287. &s3c_device_fb,
  288. &s3c_device_ohci,
  289. &s3c_device_usb_hsotg,
  290. &s3c_device_adc,
  291. &s3c_device_rtc,
  292. &s3c_device_ts,
  293. &s3c_device_timer[0],
  294. &s3c64xx_device_iis0,
  295. &s3c64xx_device_iis1,
  296. &samsung_asoc_dma,
  297. &samsung_device_keypad,
  298. &crag6410_gpio_keydev,
  299. &crag6410_dm9k_device,
  300. &s3c64xx_device_spi0,
  301. &crag6410_mmgpio,
  302. &crag6410_lcd_powerdev,
  303. &crag6410_backlight_device,
  304. &speyside_device,
  305. &speyside_wm8962_device,
  306. &wallvdd_device,
  307. };
  308. static struct pca953x_platform_data crag6410_pca_data = {
  309. .gpio_base = PCA935X_GPIO_BASE,
  310. .irq_base = 0,
  311. };
  312. static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
  313. REGULATOR_SUPPLY("vddarm", NULL),
  314. };
  315. static struct regulator_init_data vddarm __initdata = {
  316. .constraints = {
  317. .name = "VDDARM",
  318. .min_uV = 1000000,
  319. .max_uV = 1300000,
  320. .always_on = 1,
  321. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  322. },
  323. .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
  324. .consumer_supplies = vddarm_consumers,
  325. };
  326. static struct regulator_init_data vddint __initdata = {
  327. .constraints = {
  328. .name = "VDDINT",
  329. .min_uV = 1000000,
  330. .max_uV = 1200000,
  331. .always_on = 1,
  332. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  333. },
  334. };
  335. static struct regulator_init_data vddmem __initdata = {
  336. .constraints = {
  337. .name = "VDDMEM",
  338. .always_on = 1,
  339. },
  340. };
  341. static struct regulator_init_data vddsys __initdata = {
  342. .constraints = {
  343. .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
  344. .always_on = 1,
  345. },
  346. };
  347. static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
  348. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
  349. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
  350. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
  351. };
  352. static struct regulator_init_data vddmmc __initdata = {
  353. .constraints = {
  354. .name = "VDDMMC,UH",
  355. .always_on = 1,
  356. },
  357. .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
  358. .consumer_supplies = vddmmc_consumers,
  359. };
  360. static struct regulator_init_data vddotgi __initdata = {
  361. .constraints = {
  362. .name = "VDDOTGi",
  363. .always_on = 1,
  364. },
  365. };
  366. static struct regulator_init_data vddotg __initdata = {
  367. .constraints = {
  368. .name = "VDDOTG",
  369. .always_on = 1,
  370. },
  371. };
  372. static struct regulator_init_data vddhi __initdata = {
  373. .constraints = {
  374. .name = "VDDHI",
  375. .always_on = 1,
  376. },
  377. };
  378. static struct regulator_init_data vddadc __initdata = {
  379. .constraints = {
  380. .name = "VDDADC,VDDDAC",
  381. .always_on = 1,
  382. },
  383. };
  384. static struct regulator_init_data vddmem0 __initdata = {
  385. .constraints = {
  386. .name = "VDDMEM0",
  387. .always_on = 1,
  388. },
  389. };
  390. static struct regulator_init_data vddpll __initdata = {
  391. .constraints = {
  392. .name = "VDDPLL",
  393. .always_on = 1,
  394. },
  395. };
  396. static struct regulator_init_data vddlcd __initdata = {
  397. .constraints = {
  398. .name = "VDDLCD",
  399. .always_on = 1,
  400. },
  401. };
  402. static struct regulator_init_data vddalive __initdata = {
  403. .constraints = {
  404. .name = "VDDALIVE",
  405. .always_on = 1,
  406. },
  407. };
  408. static struct wm831x_status_pdata banff_red_led __initdata = {
  409. .name = "banff:red:",
  410. .default_src = WM831X_STATUS_MANUAL,
  411. };
  412. static struct wm831x_status_pdata banff_green_led __initdata = {
  413. .name = "banff:green:",
  414. .default_src = WM831X_STATUS_MANUAL,
  415. };
  416. static struct wm831x_touch_pdata touch_pdata __initdata = {
  417. .data_irq = S3C_EINT(26),
  418. .pd_irq = S3C_EINT(27),
  419. };
  420. static struct wm831x_pdata crag_pmic_pdata __initdata = {
  421. .wm831x_num = 1,
  422. .irq_base = BANFF_PMIC_IRQ_BASE,
  423. .gpio_base = GPIO_BOARD_START + 8,
  424. .gpio_defaults = {
  425. /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
  426. [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
  427. /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
  428. [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
  429. },
  430. .dcdc = {
  431. &vddarm, /* DCDC1 */
  432. &vddint, /* DCDC2 */
  433. &vddmem, /* DCDC3 */
  434. },
  435. .ldo = {
  436. &vddsys, /* LDO1 */
  437. &vddmmc, /* LDO2 */
  438. NULL, /* LDO3 */
  439. &vddotgi, /* LDO4 */
  440. &vddotg, /* LDO5 */
  441. &vddhi, /* LDO6 */
  442. &vddadc, /* LDO7 */
  443. &vddmem0, /* LDO8 */
  444. &vddpll, /* LDO9 */
  445. &vddlcd, /* LDO10 */
  446. &vddalive, /* LDO11 */
  447. },
  448. .status = {
  449. &banff_green_led,
  450. &banff_red_led,
  451. },
  452. .touch = &touch_pdata,
  453. };
  454. static struct i2c_board_info i2c_devs0[] __initdata = {
  455. { I2C_BOARD_INFO("24c08", 0x50), },
  456. { I2C_BOARD_INFO("tca6408", 0x20),
  457. .platform_data = &crag6410_pca_data,
  458. },
  459. { I2C_BOARD_INFO("wm8312", 0x34),
  460. .platform_data = &crag_pmic_pdata,
  461. .irq = S3C_EINT(23),
  462. },
  463. };
  464. static struct s3c2410_platform_i2c i2c0_pdata = {
  465. .frequency = 400000,
  466. };
  467. static struct regulator_init_data pvdd_1v2 __initdata = {
  468. .constraints = {
  469. .name = "PVDD_1V2",
  470. .always_on = 1,
  471. },
  472. };
  473. static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
  474. REGULATOR_SUPPLY("PLLVDD", "1-001a"),
  475. REGULATOR_SUPPLY("DBVDD", "1-001a"),
  476. REGULATOR_SUPPLY("CPVDD", "1-001a"),
  477. REGULATOR_SUPPLY("AVDD2", "1-001a"),
  478. REGULATOR_SUPPLY("DCVDD", "1-001a"),
  479. REGULATOR_SUPPLY("AVDD", "1-001a"),
  480. };
  481. static struct regulator_init_data pvdd_1v8 __initdata = {
  482. .constraints = {
  483. .name = "PVDD_1V8",
  484. .always_on = 1,
  485. },
  486. .consumer_supplies = pvdd_1v8_consumers,
  487. .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
  488. };
  489. static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
  490. REGULATOR_SUPPLY("MICVDD", "1-001a"),
  491. REGULATOR_SUPPLY("AVDD1", "1-001a"),
  492. };
  493. static struct regulator_init_data pvdd_3v3 __initdata = {
  494. .constraints = {
  495. .name = "PVDD_3V3",
  496. .always_on = 1,
  497. },
  498. .consumer_supplies = pvdd_3v3_consumers,
  499. .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
  500. };
  501. static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
  502. .wm831x_num = 2,
  503. .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
  504. .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
  505. .gpio_defaults = {
  506. /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
  507. [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  508. [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  509. [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  510. },
  511. .dcdc = {
  512. &pvdd_1v2, /* DCDC1 */
  513. &pvdd_1v8, /* DCDC2 */
  514. &pvdd_3v3, /* DCDC3 */
  515. },
  516. .disable_touch = true,
  517. };
  518. static struct wm8915_retune_mobile_config wm8915_retune[] = {
  519. {
  520. .name = "Sub LPF",
  521. .rate = 48000,
  522. .regs = {
  523. 0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
  524. 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
  525. 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
  526. },
  527. },
  528. {
  529. .name = "Sub HPF",
  530. .rate = 48000,
  531. .regs = {
  532. 0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
  533. 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
  534. 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
  535. },
  536. },
  537. };
  538. static struct wm8915_pdata wm8915_pdata __initdata = {
  539. .ldo_ena = S3C64XX_GPN(7),
  540. .gpio_base = CODEC_GPIO_BASE,
  541. .micdet_def = 1,
  542. .inl_mode = WM8915_DIFFERRENTIAL_1,
  543. .inr_mode = WM8915_DIFFERRENTIAL_1,
  544. .irq_flags = IRQF_TRIGGER_FALLING,
  545. .gpio_default = {
  546. 0x8001, /* GPIO1 == ADCLRCLK1 */
  547. 0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
  548. 0x0141, /* GPIO3 == HP_SEL */
  549. 0x0002, /* GPIO4 == IRQ */
  550. 0x020e, /* GPIO5 == CLKOUT */
  551. },
  552. .retune_mobile_cfgs = wm8915_retune,
  553. .num_retune_mobile_cfgs = ARRAY_SIZE(wm8915_retune),
  554. };
  555. static struct wm8962_pdata wm8962_pdata __initdata = {
  556. .gpio_init = {
  557. 0,
  558. WM8962_GPIO_FN_OPCLK,
  559. WM8962_GPIO_FN_DMICCLK,
  560. 0,
  561. 0x8000 | WM8962_GPIO_FN_DMICDAT,
  562. WM8962_GPIO_FN_IRQ, /* Open drain mode */
  563. },
  564. .irq_active_low = true,
  565. };
  566. static struct wm9081_pdata wm9081_pdata __initdata = {
  567. .irq_high = false,
  568. .irq_cmos = false,
  569. };
  570. static struct i2c_board_info i2c_devs1[] __initdata = {
  571. { I2C_BOARD_INFO("wm8311", 0x34),
  572. .irq = S3C_EINT(0),
  573. .platform_data = &glenfarclas_pmic_pdata },
  574. { I2C_BOARD_INFO("wm1250-ev1", 0x27) },
  575. { I2C_BOARD_INFO("wm8915", 0x1a),
  576. .platform_data = &wm8915_pdata,
  577. .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
  578. },
  579. { I2C_BOARD_INFO("wm9081", 0x6c),
  580. .platform_data = &wm9081_pdata, },
  581. { I2C_BOARD_INFO("wm8962", 0x1a),
  582. .platform_data = &wm8962_pdata,
  583. .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
  584. },
  585. };
  586. static void __init crag6410_map_io(void)
  587. {
  588. s3c64xx_init_io(NULL, 0);
  589. s3c24xx_init_clocks(12000000);
  590. s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
  591. /* LCD type and Bypass set by bootloader */
  592. }
  593. static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
  594. .max_width = 4,
  595. .cd_type = S3C_SDHCI_CD_PERMANENT,
  596. };
  597. static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
  598. .max_width = 4,
  599. .cd_type = S3C_SDHCI_CD_GPIO,
  600. .ext_cd_gpio = S3C64XX_GPF(11),
  601. };
  602. static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
  603. {
  604. /* Set all the necessary GPG pins to special-function 2 */
  605. s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
  606. /* force card-detected for prototype 0 */
  607. s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
  608. }
  609. static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
  610. .max_width = 4,
  611. .cd_type = S3C_SDHCI_CD_INTERNAL,
  612. .cfg_gpio = crag6410_cfg_sdhci0,
  613. };
  614. static void __init crag6410_machine_init(void)
  615. {
  616. /* Open drain IRQs need pullups */
  617. s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
  618. s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
  619. gpio_request(S3C64XX_GPB(0), "LCD power");
  620. gpio_direction_output(S3C64XX_GPB(0), 0);
  621. gpio_request(S3C64XX_GPF(14), "LCD PWM");
  622. gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
  623. gpio_request(S3C64XX_GPB(1), "SD power");
  624. gpio_direction_output(S3C64XX_GPB(1), 0);
  625. gpio_request(S3C64XX_GPF(10), "nRESETSEL");
  626. gpio_direction_output(S3C64XX_GPF(10), 1);
  627. s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
  628. s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
  629. s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
  630. s3c_i2c0_set_platdata(&i2c0_pdata);
  631. s3c_i2c1_set_platdata(NULL);
  632. s3c_fb_set_platdata(&crag6410_lcd_pdata);
  633. i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
  634. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  635. samsung_keypad_set_platdata(&crag6410_keypad_data);
  636. platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
  637. regulator_has_full_constraints();
  638. s3c_pm_init();
  639. }
  640. MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
  641. /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
  642. .boot_params = S3C64XX_PA_SDRAM + 0x100,
  643. .init_irq = s3c6410_init_irq,
  644. .map_io = crag6410_map_io,
  645. .init_machine = crag6410_machine_init,
  646. .timer = &s3c24xx_timer,
  647. MACHINE_END