pn544_hci.c 23 KB

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  1. /*
  2. * HCI based Driver for NXP PN544 NFC Chip
  3. *
  4. * Copyright (C) 2012 Intel Corporation. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the
  17. * Free Software Foundation, Inc.,
  18. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19. */
  20. #include <linux/crc-ccitt.h>
  21. #include <linux/module.h>
  22. #include <linux/delay.h>
  23. #include <linux/slab.h>
  24. #include <linux/miscdevice.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/gpio.h>
  27. #include <linux/i2c.h>
  28. #include <linux/nfc.h>
  29. #include <net/nfc/hci.h>
  30. #include <net/nfc/shdlc.h>
  31. #include <linux/nfc/pn544.h>
  32. #define DRIVER_DESC "HCI NFC driver for PN544"
  33. #define PN544_HCI_DRIVER_NAME "pn544_hci"
  34. /* Timing restrictions (ms) */
  35. #define PN544_HCI_RESETVEN_TIME 30
  36. static struct i2c_device_id pn544_hci_id_table[] = {
  37. {"pn544", 0},
  38. {}
  39. };
  40. MODULE_DEVICE_TABLE(i2c, pn544_hci_id_table);
  41. #define HCI_MODE 0
  42. #define FW_MODE 1
  43. /* framing in HCI mode */
  44. #define PN544_HCI_LLC_LEN 1
  45. #define PN544_HCI_LLC_CRC 2
  46. #define PN544_HCI_LLC_LEN_CRC (PN544_HCI_LLC_LEN + PN544_HCI_LLC_CRC)
  47. #define PN544_HCI_LLC_MIN_SIZE (1 + PN544_HCI_LLC_LEN_CRC)
  48. #define PN544_HCI_LLC_MAX_PAYLOAD 29
  49. #define PN544_HCI_LLC_MAX_SIZE (PN544_HCI_LLC_LEN_CRC + 1 + \
  50. PN544_HCI_LLC_MAX_PAYLOAD)
  51. enum pn544_state {
  52. PN544_ST_COLD,
  53. PN544_ST_FW_READY,
  54. PN544_ST_READY,
  55. };
  56. #define FULL_VERSION_LEN 11
  57. /* Proprietary commands */
  58. #define PN544_WRITE 0x3f
  59. /* Proprietary gates, events, commands and registers */
  60. /* NFC_HCI_RF_READER_A_GATE additional registers and commands */
  61. #define PN544_RF_READER_A_AUTO_ACTIVATION 0x10
  62. #define PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION 0x12
  63. #define PN544_MIFARE_CMD 0x21
  64. /* Commands that apply to all RF readers */
  65. #define PN544_RF_READER_CMD_PRESENCE_CHECK 0x30
  66. #define PN544_RF_READER_CMD_ACTIVATE_NEXT 0x32
  67. /* NFC_HCI_ID_MGMT_GATE additional registers */
  68. #define PN544_ID_MGMT_FULL_VERSION_SW 0x10
  69. #define PN544_RF_READER_ISO15693_GATE 0x12
  70. #define PN544_RF_READER_F_GATE 0x14
  71. #define PN544_FELICA_ID 0x04
  72. #define PN544_FELICA_RAW 0x20
  73. #define PN544_RF_READER_JEWEL_GATE 0x15
  74. #define PN544_JEWEL_RAW_CMD 0x23
  75. #define PN544_RF_READER_NFCIP1_INITIATOR_GATE 0x30
  76. #define PN544_RF_READER_NFCIP1_TARGET_GATE 0x31
  77. #define PN544_SYS_MGMT_GATE 0x90
  78. #define PN544_SYS_MGMT_INFO_NOTIFICATION 0x02
  79. #define PN544_POLLING_LOOP_MGMT_GATE 0x94
  80. #define PN544_PL_RDPHASES 0x06
  81. #define PN544_PL_EMULATION 0x07
  82. #define PN544_PL_NFCT_DEACTIVATED 0x09
  83. #define PN544_SWP_MGMT_GATE 0xA0
  84. #define PN544_NFC_WI_MGMT_GATE 0xA1
  85. static struct nfc_hci_gate pn544_gates[] = {
  86. {NFC_HCI_ADMIN_GATE, NFC_HCI_INVALID_PIPE},
  87. {NFC_HCI_LOOPBACK_GATE, NFC_HCI_INVALID_PIPE},
  88. {NFC_HCI_ID_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  89. {NFC_HCI_LINK_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  90. {NFC_HCI_RF_READER_B_GATE, NFC_HCI_INVALID_PIPE},
  91. {NFC_HCI_RF_READER_A_GATE, NFC_HCI_INVALID_PIPE},
  92. {PN544_SYS_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  93. {PN544_SWP_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  94. {PN544_POLLING_LOOP_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  95. {PN544_NFC_WI_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  96. {PN544_RF_READER_F_GATE, NFC_HCI_INVALID_PIPE},
  97. {PN544_RF_READER_JEWEL_GATE, NFC_HCI_INVALID_PIPE},
  98. {PN544_RF_READER_ISO15693_GATE, NFC_HCI_INVALID_PIPE},
  99. {PN544_RF_READER_NFCIP1_INITIATOR_GATE, NFC_HCI_INVALID_PIPE},
  100. {PN544_RF_READER_NFCIP1_TARGET_GATE, NFC_HCI_INVALID_PIPE}
  101. };
  102. /* Largest headroom needed for outgoing custom commands */
  103. #define PN544_CMDS_HEADROOM 2
  104. #define PN544_FRAME_HEADROOM 1
  105. #define PN544_FRAME_TAILROOM 2
  106. struct pn544_hci_info {
  107. struct i2c_client *i2c_dev;
  108. struct nfc_shdlc *shdlc;
  109. enum pn544_state state;
  110. struct mutex info_lock;
  111. unsigned int gpio_en;
  112. unsigned int gpio_irq;
  113. unsigned int gpio_fw;
  114. unsigned int en_polarity;
  115. int hard_fault; /*
  116. * < 0 if hardware error occured (e.g. i2c err)
  117. * and prevents normal operation.
  118. */
  119. };
  120. static void pn544_hci_platform_init(struct pn544_hci_info *info)
  121. {
  122. int polarity, retry, ret;
  123. char rset_cmd[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 };
  124. int count = sizeof(rset_cmd);
  125. pr_info(DRIVER_DESC ": %s\n", __func__);
  126. dev_info(&info->i2c_dev->dev, "Detecting nfc_en polarity\n");
  127. /* Disable fw download */
  128. gpio_set_value(info->gpio_fw, 0);
  129. for (polarity = 0; polarity < 2; polarity++) {
  130. info->en_polarity = polarity;
  131. retry = 3;
  132. while (retry--) {
  133. /* power off */
  134. gpio_set_value(info->gpio_en, !info->en_polarity);
  135. usleep_range(10000, 15000);
  136. /* power on */
  137. gpio_set_value(info->gpio_en, info->en_polarity);
  138. usleep_range(10000, 15000);
  139. /* send reset */
  140. dev_dbg(&info->i2c_dev->dev, "Sending reset cmd\n");
  141. ret = i2c_master_send(info->i2c_dev, rset_cmd, count);
  142. if (ret == count) {
  143. dev_info(&info->i2c_dev->dev,
  144. "nfc_en polarity : active %s\n",
  145. (polarity == 0 ? "low" : "high"));
  146. goto out;
  147. }
  148. }
  149. }
  150. dev_err(&info->i2c_dev->dev,
  151. "Could not detect nfc_en polarity, fallback to active high\n");
  152. out:
  153. gpio_set_value(info->gpio_en, !info->en_polarity);
  154. }
  155. static int pn544_hci_enable(struct pn544_hci_info *info, int mode)
  156. {
  157. pr_info(DRIVER_DESC ": %s\n", __func__);
  158. gpio_set_value(info->gpio_fw, 0);
  159. gpio_set_value(info->gpio_en, info->en_polarity);
  160. usleep_range(10000, 15000);
  161. return 0;
  162. }
  163. static void pn544_hci_disable(struct pn544_hci_info *info)
  164. {
  165. pr_info(DRIVER_DESC ": %s\n", __func__);
  166. gpio_set_value(info->gpio_fw, 0);
  167. gpio_set_value(info->gpio_en, !info->en_polarity);
  168. usleep_range(10000, 15000);
  169. gpio_set_value(info->gpio_en, info->en_polarity);
  170. usleep_range(10000, 15000);
  171. gpio_set_value(info->gpio_en, !info->en_polarity);
  172. usleep_range(10000, 15000);
  173. }
  174. static int pn544_hci_i2c_write(struct i2c_client *client, u8 *buf, int len)
  175. {
  176. int r;
  177. usleep_range(3000, 6000);
  178. r = i2c_master_send(client, buf, len);
  179. if (r == -EREMOTEIO) { /* Retry, chip was in standby */
  180. usleep_range(6000, 10000);
  181. r = i2c_master_send(client, buf, len);
  182. }
  183. if (r >= 0 && r != len)
  184. r = -EREMOTEIO;
  185. return r;
  186. }
  187. static int check_crc(u8 *buf, int buflen)
  188. {
  189. int len;
  190. u16 crc;
  191. len = buf[0] + 1;
  192. crc = crc_ccitt(0xffff, buf, len - 2);
  193. crc = ~crc;
  194. if (buf[len - 2] != (crc & 0xff) || buf[len - 1] != (crc >> 8)) {
  195. pr_err(PN544_HCI_DRIVER_NAME ": CRC error 0x%x != 0x%x 0x%x\n",
  196. crc, buf[len - 1], buf[len - 2]);
  197. pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__);
  198. print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE,
  199. 16, 2, buf, buflen, false);
  200. return -EPERM;
  201. }
  202. return 0;
  203. }
  204. /*
  205. * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees
  206. * that i2c bus will be flushed and that next read will start on a new frame.
  207. * returned skb contains only LLC header and payload.
  208. * returns:
  209. * -EREMOTEIO : i2c read error (fatal)
  210. * -EBADMSG : frame was incorrect and discarded
  211. * -ENOMEM : cannot allocate skb, frame dropped
  212. */
  213. static int pn544_hci_i2c_read(struct i2c_client *client, struct sk_buff **skb)
  214. {
  215. int r;
  216. u8 len;
  217. u8 tmp[PN544_HCI_LLC_MAX_SIZE - 1];
  218. r = i2c_master_recv(client, &len, 1);
  219. if (r != 1) {
  220. dev_err(&client->dev, "cannot read len byte\n");
  221. return -EREMOTEIO;
  222. }
  223. if ((len < (PN544_HCI_LLC_MIN_SIZE - 1)) ||
  224. (len > (PN544_HCI_LLC_MAX_SIZE - 1))) {
  225. dev_err(&client->dev, "invalid len byte\n");
  226. r = -EBADMSG;
  227. goto flush;
  228. }
  229. *skb = alloc_skb(1 + len, GFP_KERNEL);
  230. if (*skb == NULL) {
  231. r = -ENOMEM;
  232. goto flush;
  233. }
  234. *skb_put(*skb, 1) = len;
  235. r = i2c_master_recv(client, skb_put(*skb, len), len);
  236. if (r != len) {
  237. kfree_skb(*skb);
  238. return -EREMOTEIO;
  239. }
  240. r = check_crc((*skb)->data, (*skb)->len);
  241. if (r != 0) {
  242. kfree_skb(*skb);
  243. r = -EBADMSG;
  244. goto flush;
  245. }
  246. skb_pull(*skb, 1);
  247. skb_trim(*skb, (*skb)->len - 2);
  248. usleep_range(3000, 6000);
  249. return 0;
  250. flush:
  251. if (i2c_master_recv(client, tmp, sizeof(tmp)) < 0)
  252. r = -EREMOTEIO;
  253. usleep_range(3000, 6000);
  254. return r;
  255. }
  256. /*
  257. * Reads an shdlc frame from the chip. This is not as straightforward as it
  258. * seems. There are cases where we could loose the frame start synchronization.
  259. * The frame format is len-data-crc, and corruption can occur anywhere while
  260. * transiting on i2c bus, such that we could read an invalid len.
  261. * In order to recover synchronization with the next frame, we must be sure
  262. * to read the real amount of data without using the len byte. We do this by
  263. * assuming the following:
  264. * - the chip will always present only one single complete frame on the bus
  265. * before triggering the interrupt
  266. * - the chip will not present a new frame until we have completely read
  267. * the previous one (or until we have handled the interrupt).
  268. * The tricky case is when we read a corrupted len that is less than the real
  269. * len. We must detect this here in order to determine that we need to flush
  270. * the bus. This is the reason why we check the crc here.
  271. */
  272. static irqreturn_t pn544_hci_irq_thread_fn(int irq, void *dev_id)
  273. {
  274. struct pn544_hci_info *info = dev_id;
  275. struct i2c_client *client = info->i2c_dev;
  276. struct sk_buff *skb = NULL;
  277. int r;
  278. BUG_ON(!info);
  279. BUG_ON(irq != info->i2c_dev->irq);
  280. dev_dbg(&client->dev, "IRQ\n");
  281. if (info->hard_fault != 0)
  282. return IRQ_HANDLED;
  283. r = pn544_hci_i2c_read(client, &skb);
  284. if (r == -EREMOTEIO) {
  285. info->hard_fault = r;
  286. nfc_shdlc_recv_frame(info->shdlc, NULL);
  287. return IRQ_HANDLED;
  288. } else if ((r == -ENOMEM) || (r == -EBADMSG)) {
  289. return IRQ_HANDLED;
  290. }
  291. nfc_shdlc_recv_frame(info->shdlc, skb);
  292. return IRQ_HANDLED;
  293. }
  294. static int pn544_hci_open(struct nfc_shdlc *shdlc)
  295. {
  296. struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
  297. int r = 0;
  298. mutex_lock(&info->info_lock);
  299. if (info->state != PN544_ST_COLD) {
  300. r = -EBUSY;
  301. goto out;
  302. }
  303. r = pn544_hci_enable(info, HCI_MODE);
  304. if (r == 0)
  305. info->state = PN544_ST_READY;
  306. out:
  307. mutex_unlock(&info->info_lock);
  308. return r;
  309. }
  310. static void pn544_hci_close(struct nfc_shdlc *shdlc)
  311. {
  312. struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
  313. mutex_lock(&info->info_lock);
  314. if (info->state == PN544_ST_COLD)
  315. goto out;
  316. pn544_hci_disable(info);
  317. info->state = PN544_ST_COLD;
  318. out:
  319. mutex_unlock(&info->info_lock);
  320. }
  321. static int pn544_hci_ready(struct nfc_shdlc *shdlc)
  322. {
  323. struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
  324. struct sk_buff *skb;
  325. static struct hw_config {
  326. u8 adr[2];
  327. u8 value;
  328. } hw_config[] = {
  329. {{0x9f, 0x9a}, 0x00},
  330. {{0x98, 0x10}, 0xbc},
  331. {{0x9e, 0x71}, 0x00},
  332. {{0x98, 0x09}, 0x00},
  333. {{0x9e, 0xb4}, 0x00},
  334. {{0x9e, 0xd9}, 0xff},
  335. {{0x9e, 0xda}, 0xff},
  336. {{0x9e, 0xdb}, 0x23},
  337. {{0x9e, 0xdc}, 0x21},
  338. {{0x9e, 0xdd}, 0x22},
  339. {{0x9e, 0xde}, 0x24},
  340. {{0x9c, 0x01}, 0x08},
  341. {{0x9e, 0xaa}, 0x01},
  342. {{0x9b, 0xd1}, 0x0d},
  343. {{0x9b, 0xd2}, 0x24},
  344. {{0x9b, 0xd3}, 0x0a},
  345. {{0x9b, 0xd4}, 0x22},
  346. {{0x9b, 0xd5}, 0x08},
  347. {{0x9b, 0xd6}, 0x1e},
  348. {{0x9b, 0xdd}, 0x1c},
  349. {{0x9b, 0x84}, 0x13},
  350. {{0x99, 0x81}, 0x7f},
  351. {{0x99, 0x31}, 0x70},
  352. {{0x98, 0x00}, 0x3f},
  353. {{0x9f, 0x09}, 0x00},
  354. {{0x9f, 0x0a}, 0x05},
  355. {{0x9e, 0xd1}, 0xa1},
  356. {{0x99, 0x23}, 0x00},
  357. {{0x9e, 0x74}, 0x80},
  358. {{0x9f, 0x28}, 0x10},
  359. {{0x9f, 0x35}, 0x14},
  360. {{0x9f, 0x36}, 0x60},
  361. {{0x9c, 0x31}, 0x00},
  362. {{0x9c, 0x32}, 0xc8},
  363. {{0x9c, 0x19}, 0x40},
  364. {{0x9c, 0x1a}, 0x40},
  365. {{0x9c, 0x0c}, 0x00},
  366. {{0x9c, 0x0d}, 0x00},
  367. {{0x9c, 0x12}, 0x00},
  368. {{0x9c, 0x13}, 0x00},
  369. {{0x98, 0xa2}, 0x0e},
  370. {{0x98, 0x93}, 0x40},
  371. {{0x98, 0x7d}, 0x02},
  372. {{0x98, 0x7e}, 0x00},
  373. {{0x9f, 0xc8}, 0x01},
  374. };
  375. struct hw_config *p = hw_config;
  376. int count = ARRAY_SIZE(hw_config);
  377. struct sk_buff *res_skb;
  378. u8 param[4];
  379. int r;
  380. param[0] = 0;
  381. while (count--) {
  382. param[1] = p->adr[0];
  383. param[2] = p->adr[1];
  384. param[3] = p->value;
  385. r = nfc_hci_send_cmd(hdev, PN544_SYS_MGMT_GATE, PN544_WRITE,
  386. param, 4, &res_skb);
  387. if (r < 0)
  388. return r;
  389. if (res_skb->len != 1) {
  390. kfree_skb(res_skb);
  391. return -EPROTO;
  392. }
  393. if (res_skb->data[0] != p->value) {
  394. kfree_skb(res_skb);
  395. return -EIO;
  396. }
  397. kfree_skb(res_skb);
  398. p++;
  399. }
  400. param[0] = NFC_HCI_UICC_HOST_ID;
  401. r = nfc_hci_set_param(hdev, NFC_HCI_ADMIN_GATE,
  402. NFC_HCI_ADMIN_WHITELIST, param, 1);
  403. if (r < 0)
  404. return r;
  405. param[0] = 0x3d;
  406. r = nfc_hci_set_param(hdev, PN544_SYS_MGMT_GATE,
  407. PN544_SYS_MGMT_INFO_NOTIFICATION, param, 1);
  408. if (r < 0)
  409. return r;
  410. param[0] = 0x0;
  411. r = nfc_hci_set_param(hdev, NFC_HCI_RF_READER_A_GATE,
  412. PN544_RF_READER_A_AUTO_ACTIVATION, param, 1);
  413. if (r < 0)
  414. return r;
  415. r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  416. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  417. if (r < 0)
  418. return r;
  419. param[0] = 0x1;
  420. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  421. PN544_PL_NFCT_DEACTIVATED, param, 1);
  422. if (r < 0)
  423. return r;
  424. param[0] = 0x0;
  425. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  426. PN544_PL_RDPHASES, param, 1);
  427. if (r < 0)
  428. return r;
  429. r = nfc_hci_get_param(hdev, NFC_HCI_ID_MGMT_GATE,
  430. PN544_ID_MGMT_FULL_VERSION_SW, &skb);
  431. if (r < 0)
  432. return r;
  433. if (skb->len != FULL_VERSION_LEN) {
  434. kfree_skb(skb);
  435. return -EINVAL;
  436. }
  437. print_hex_dump(KERN_DEBUG, "FULL VERSION SOFTWARE INFO: ",
  438. DUMP_PREFIX_NONE, 16, 1,
  439. skb->data, FULL_VERSION_LEN, false);
  440. kfree_skb(skb);
  441. return 0;
  442. }
  443. static void pn544_hci_add_len_crc(struct sk_buff *skb)
  444. {
  445. u16 crc;
  446. int len;
  447. len = skb->len + 2;
  448. *skb_push(skb, 1) = len;
  449. crc = crc_ccitt(0xffff, skb->data, skb->len);
  450. crc = ~crc;
  451. *skb_put(skb, 1) = crc & 0xff;
  452. *skb_put(skb, 1) = crc >> 8;
  453. }
  454. static void pn544_hci_remove_len_crc(struct sk_buff *skb)
  455. {
  456. skb_pull(skb, PN544_FRAME_HEADROOM);
  457. skb_trim(skb, PN544_FRAME_TAILROOM);
  458. }
  459. static int pn544_hci_xmit(struct nfc_shdlc *shdlc, struct sk_buff *skb)
  460. {
  461. struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
  462. struct i2c_client *client = info->i2c_dev;
  463. int r;
  464. if (info->hard_fault != 0)
  465. return info->hard_fault;
  466. pn544_hci_add_len_crc(skb);
  467. r = pn544_hci_i2c_write(client, skb->data, skb->len);
  468. pn544_hci_remove_len_crc(skb);
  469. return r;
  470. }
  471. static int pn544_hci_start_poll(struct nfc_shdlc *shdlc,
  472. u32 im_protocols, u32 tm_protocols)
  473. {
  474. struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
  475. u8 phases = 0;
  476. int r;
  477. u8 duration[2];
  478. u8 activated;
  479. pr_info(DRIVER_DESC ": %s protocols 0x%x 0x%x\n",
  480. __func__, im_protocols, tm_protocols);
  481. r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  482. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  483. if (r < 0)
  484. return r;
  485. duration[0] = 0x18;
  486. duration[1] = 0x6a;
  487. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  488. PN544_PL_EMULATION, duration, 2);
  489. if (r < 0)
  490. return r;
  491. activated = 0;
  492. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  493. PN544_PL_NFCT_DEACTIVATED, &activated, 1);
  494. if (r < 0)
  495. return r;
  496. if (im_protocols & (NFC_PROTO_ISO14443_MASK | NFC_PROTO_MIFARE_MASK |
  497. NFC_PROTO_JEWEL_MASK))
  498. phases |= 1; /* Type A */
  499. if (im_protocols & NFC_PROTO_FELICA_MASK) {
  500. phases |= (1 << 2); /* Type F 212 */
  501. phases |= (1 << 3); /* Type F 424 */
  502. }
  503. phases |= (1 << 5); /* NFC active */
  504. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  505. PN544_PL_RDPHASES, &phases, 1);
  506. if (r < 0)
  507. return r;
  508. r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  509. NFC_HCI_EVT_READER_REQUESTED, NULL, 0);
  510. if (r < 0)
  511. nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  512. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  513. return r;
  514. }
  515. static int pn544_hci_target_from_gate(struct nfc_shdlc *shdlc, u8 gate,
  516. struct nfc_target *target)
  517. {
  518. switch (gate) {
  519. case PN544_RF_READER_F_GATE:
  520. target->supported_protocols = NFC_PROTO_FELICA_MASK;
  521. break;
  522. case PN544_RF_READER_JEWEL_GATE:
  523. target->supported_protocols = NFC_PROTO_JEWEL_MASK;
  524. target->sens_res = 0x0c00;
  525. break;
  526. default:
  527. return -EPROTO;
  528. }
  529. return 0;
  530. }
  531. static int pn544_hci_complete_target_discovered(struct nfc_shdlc *shdlc,
  532. u8 gate,
  533. struct nfc_target *target)
  534. {
  535. struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
  536. struct sk_buff *uid_skb;
  537. int r = 0;
  538. if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) {
  539. if (target->nfcid1_len != 4 && target->nfcid1_len != 7 &&
  540. target->nfcid1_len != 10)
  541. return -EPROTO;
  542. r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,
  543. PN544_RF_READER_CMD_ACTIVATE_NEXT,
  544. target->nfcid1, target->nfcid1_len, NULL);
  545. } else if (target->supported_protocols & NFC_PROTO_FELICA_MASK) {
  546. r = nfc_hci_get_param(hdev, PN544_RF_READER_F_GATE,
  547. PN544_FELICA_ID, &uid_skb);
  548. if (r < 0)
  549. return r;
  550. if (uid_skb->len != 8) {
  551. kfree_skb(uid_skb);
  552. return -EPROTO;
  553. }
  554. r = nfc_hci_send_cmd(hdev, PN544_RF_READER_F_GATE,
  555. PN544_RF_READER_CMD_ACTIVATE_NEXT,
  556. uid_skb->data, uid_skb->len, NULL);
  557. kfree_skb(uid_skb);
  558. } else if (target->supported_protocols & NFC_PROTO_ISO14443_MASK) {
  559. /*
  560. * TODO: maybe other ISO 14443 require some kind of continue
  561. * activation, but for now we've seen only this one below.
  562. */
  563. if (target->sens_res == 0x4403) /* Type 4 Mifare DESFire */
  564. r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,
  565. PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION,
  566. NULL, 0, NULL);
  567. }
  568. return r;
  569. }
  570. #define MIFARE_CMD_AUTH_KEY_A 0x60
  571. #define MIFARE_CMD_AUTH_KEY_B 0x61
  572. #define MIFARE_CMD_HEADER 2
  573. #define MIFARE_UID_LEN 4
  574. #define MIFARE_KEY_LEN 6
  575. #define MIFARE_CMD_LEN 12
  576. /*
  577. * Returns:
  578. * <= 0: driver handled the data exchange
  579. * 1: driver doesn't especially handle, please do standard processing
  580. */
  581. static int pn544_hci_data_exchange(struct nfc_shdlc *shdlc,
  582. struct nfc_target *target,
  583. struct sk_buff *skb,
  584. struct sk_buff **res_skb)
  585. {
  586. struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
  587. int r;
  588. pr_info(DRIVER_DESC ": %s for gate=%d\n", __func__,
  589. target->hci_reader_gate);
  590. switch (target->hci_reader_gate) {
  591. case NFC_HCI_RF_READER_A_GATE:
  592. if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) {
  593. /*
  594. * It seems that pn544 is inverting key and UID for
  595. * MIFARE authentication commands.
  596. */
  597. if (skb->len == MIFARE_CMD_LEN &&
  598. (skb->data[0] == MIFARE_CMD_AUTH_KEY_A ||
  599. skb->data[0] == MIFARE_CMD_AUTH_KEY_B)) {
  600. u8 uid[MIFARE_UID_LEN];
  601. u8 *data = skb->data + MIFARE_CMD_HEADER;
  602. memcpy(uid, data + MIFARE_KEY_LEN,
  603. MIFARE_UID_LEN);
  604. memmove(data + MIFARE_UID_LEN, data,
  605. MIFARE_KEY_LEN);
  606. memcpy(data, uid, MIFARE_UID_LEN);
  607. }
  608. return nfc_hci_send_cmd(hdev, target->hci_reader_gate,
  609. PN544_MIFARE_CMD,
  610. skb->data, skb->len, res_skb);
  611. } else
  612. return 1;
  613. case PN544_RF_READER_F_GATE:
  614. *skb_push(skb, 1) = 0;
  615. *skb_push(skb, 1) = 0;
  616. r = nfc_hci_send_cmd(hdev, target->hci_reader_gate,
  617. PN544_FELICA_RAW,
  618. skb->data, skb->len, res_skb);
  619. if (r == 0)
  620. skb_pull(*res_skb, 1);
  621. return r;
  622. case PN544_RF_READER_JEWEL_GATE:
  623. return nfc_hci_send_cmd(hdev, target->hci_reader_gate,
  624. PN544_JEWEL_RAW_CMD,
  625. skb->data, skb->len, res_skb);
  626. default:
  627. return 1;
  628. }
  629. }
  630. static int pn544_hci_check_presence(struct nfc_shdlc *shdlc,
  631. struct nfc_target *target)
  632. {
  633. struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
  634. return nfc_hci_send_cmd(hdev, target->hci_reader_gate,
  635. PN544_RF_READER_CMD_PRESENCE_CHECK,
  636. NULL, 0, NULL);
  637. }
  638. static struct nfc_shdlc_ops pn544_shdlc_ops = {
  639. .open = pn544_hci_open,
  640. .close = pn544_hci_close,
  641. .hci_ready = pn544_hci_ready,
  642. .xmit = pn544_hci_xmit,
  643. .start_poll = pn544_hci_start_poll,
  644. .target_from_gate = pn544_hci_target_from_gate,
  645. .complete_target_discovered = pn544_hci_complete_target_discovered,
  646. .data_exchange = pn544_hci_data_exchange,
  647. .check_presence = pn544_hci_check_presence,
  648. };
  649. static int __devinit pn544_hci_probe(struct i2c_client *client,
  650. const struct i2c_device_id *id)
  651. {
  652. struct pn544_hci_info *info;
  653. struct pn544_nfc_platform_data *pdata;
  654. int r = 0;
  655. u32 protocols;
  656. struct nfc_hci_init_data init_data;
  657. dev_dbg(&client->dev, "%s\n", __func__);
  658. dev_dbg(&client->dev, "IRQ: %d\n", client->irq);
  659. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
  660. dev_err(&client->dev, "Need I2C_FUNC_I2C\n");
  661. return -ENODEV;
  662. }
  663. info = kzalloc(sizeof(struct pn544_hci_info), GFP_KERNEL);
  664. if (!info) {
  665. dev_err(&client->dev,
  666. "Cannot allocate memory for pn544_hci_info.\n");
  667. r = -ENOMEM;
  668. goto err_info_alloc;
  669. }
  670. info->i2c_dev = client;
  671. info->state = PN544_ST_COLD;
  672. mutex_init(&info->info_lock);
  673. i2c_set_clientdata(client, info);
  674. pdata = client->dev.platform_data;
  675. if (pdata == NULL) {
  676. dev_err(&client->dev, "No platform data\n");
  677. r = -EINVAL;
  678. goto err_pdata;
  679. }
  680. if (pdata->request_resources == NULL) {
  681. dev_err(&client->dev, "request_resources() missing\n");
  682. r = -EINVAL;
  683. goto err_pdata;
  684. }
  685. r = pdata->request_resources(client);
  686. if (r) {
  687. dev_err(&client->dev, "Cannot get platform resources\n");
  688. goto err_pdata;
  689. }
  690. info->gpio_en = pdata->get_gpio(NFC_GPIO_ENABLE);
  691. info->gpio_fw = pdata->get_gpio(NFC_GPIO_FW_RESET);
  692. info->gpio_irq = pdata->get_gpio(NFC_GPIO_IRQ);
  693. pn544_hci_platform_init(info);
  694. r = request_threaded_irq(client->irq, NULL, pn544_hci_irq_thread_fn,
  695. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  696. PN544_HCI_DRIVER_NAME, info);
  697. if (r < 0) {
  698. dev_err(&client->dev, "Unable to register IRQ handler\n");
  699. goto err_rti;
  700. }
  701. init_data.gate_count = ARRAY_SIZE(pn544_gates);
  702. memcpy(init_data.gates, pn544_gates, sizeof(pn544_gates));
  703. /*
  704. * TODO: Session id must include the driver name + some bus addr
  705. * persistent info to discriminate 2 identical chips
  706. */
  707. strcpy(init_data.session_id, "ID544HCI");
  708. protocols = NFC_PROTO_JEWEL_MASK |
  709. NFC_PROTO_MIFARE_MASK |
  710. NFC_PROTO_FELICA_MASK |
  711. NFC_PROTO_ISO14443_MASK |
  712. NFC_PROTO_ISO14443_B_MASK |
  713. NFC_PROTO_NFC_DEP_MASK;
  714. info->shdlc = nfc_shdlc_allocate(&pn544_shdlc_ops,
  715. &init_data, protocols,
  716. PN544_FRAME_HEADROOM + PN544_CMDS_HEADROOM,
  717. PN544_FRAME_TAILROOM,
  718. PN544_HCI_LLC_MAX_PAYLOAD,
  719. dev_name(&client->dev));
  720. if (!info->shdlc) {
  721. dev_err(&client->dev, "Cannot allocate nfc shdlc.\n");
  722. r = -ENOMEM;
  723. goto err_allocshdlc;
  724. }
  725. nfc_shdlc_set_clientdata(info->shdlc, info);
  726. return 0;
  727. err_allocshdlc:
  728. free_irq(client->irq, info);
  729. err_rti:
  730. if (pdata->free_resources != NULL)
  731. pdata->free_resources();
  732. err_pdata:
  733. kfree(info);
  734. err_info_alloc:
  735. return r;
  736. }
  737. static __devexit int pn544_hci_remove(struct i2c_client *client)
  738. {
  739. struct pn544_hci_info *info = i2c_get_clientdata(client);
  740. struct pn544_nfc_platform_data *pdata = client->dev.platform_data;
  741. dev_dbg(&client->dev, "%s\n", __func__);
  742. nfc_shdlc_free(info->shdlc);
  743. if (info->state != PN544_ST_COLD) {
  744. if (pdata->disable)
  745. pdata->disable();
  746. }
  747. free_irq(client->irq, info);
  748. if (pdata->free_resources)
  749. pdata->free_resources();
  750. kfree(info);
  751. return 0;
  752. }
  753. static struct i2c_driver pn544_hci_driver = {
  754. .driver = {
  755. .name = PN544_HCI_DRIVER_NAME,
  756. },
  757. .probe = pn544_hci_probe,
  758. .id_table = pn544_hci_id_table,
  759. .remove = __devexit_p(pn544_hci_remove),
  760. };
  761. static int __init pn544_hci_init(void)
  762. {
  763. int r;
  764. pr_debug(DRIVER_DESC ": %s\n", __func__);
  765. r = i2c_add_driver(&pn544_hci_driver);
  766. if (r) {
  767. pr_err(PN544_HCI_DRIVER_NAME ": driver registration failed\n");
  768. return r;
  769. }
  770. return 0;
  771. }
  772. static void __exit pn544_hci_exit(void)
  773. {
  774. i2c_del_driver(&pn544_hci_driver);
  775. }
  776. module_init(pn544_hci_init);
  777. module_exit(pn544_hci_exit);
  778. MODULE_LICENSE("GPL");
  779. MODULE_DESCRIPTION(DRIVER_DESC);