init.c 35 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/mmc/sdio_func.h>
  17. #include "core.h"
  18. #include "cfg80211.h"
  19. #include "target.h"
  20. #include "debug.h"
  21. #include "hif-ops.h"
  22. unsigned int debug_mask;
  23. static unsigned int testmode;
  24. module_param(debug_mask, uint, 0644);
  25. module_param(testmode, uint, 0644);
  26. /*
  27. * Include definitions here that can be used to tune the WLAN module
  28. * behavior. Different customers can tune the behavior as per their needs,
  29. * here.
  30. */
  31. /*
  32. * This configuration item enable/disable keepalive support.
  33. * Keepalive support: In the absence of any data traffic to AP, null
  34. * frames will be sent to the AP at periodic interval, to keep the association
  35. * active. This configuration item defines the periodic interval.
  36. * Use value of zero to disable keepalive support
  37. * Default: 60 seconds
  38. */
  39. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  40. /*
  41. * This configuration item sets the value of disconnect timeout
  42. * Firmware delays sending the disconnec event to the host for this
  43. * timeout after is gets disconnected from the current AP.
  44. * If the firmware successly roams within the disconnect timeout
  45. * it sends a new connect event
  46. */
  47. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  48. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  49. enum addr_type {
  50. DATASET_PATCH_ADDR,
  51. APP_LOAD_ADDR,
  52. APP_START_OVERRIDE_ADDR,
  53. };
  54. #define ATH6KL_DATA_OFFSET 64
  55. struct sk_buff *ath6kl_buf_alloc(int size)
  56. {
  57. struct sk_buff *skb;
  58. u16 reserved;
  59. /* Add chacheline space at front and back of buffer */
  60. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  61. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  62. skb = dev_alloc_skb(size + reserved);
  63. if (skb)
  64. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  65. return skb;
  66. }
  67. void ath6kl_init_profile_info(struct ath6kl *ar)
  68. {
  69. ar->ssid_len = 0;
  70. memset(ar->ssid, 0, sizeof(ar->ssid));
  71. ar->dot11_auth_mode = OPEN_AUTH;
  72. ar->auth_mode = NONE_AUTH;
  73. ar->prwise_crypto = NONE_CRYPT;
  74. ar->prwise_crypto_len = 0;
  75. ar->grp_crypto = NONE_CRYPT;
  76. ar->grp_crypto_len = 0;
  77. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  78. memset(ar->req_bssid, 0, sizeof(ar->req_bssid));
  79. memset(ar->bssid, 0, sizeof(ar->bssid));
  80. ar->bss_ch = 0;
  81. ar->nw_type = ar->next_mode = INFRA_NETWORK;
  82. }
  83. static u8 ath6kl_get_fw_iftype(struct ath6kl *ar)
  84. {
  85. switch (ar->nw_type) {
  86. case INFRA_NETWORK:
  87. return HI_OPTION_FW_MODE_BSS_STA;
  88. case ADHOC_NETWORK:
  89. return HI_OPTION_FW_MODE_IBSS;
  90. case AP_NETWORK:
  91. return HI_OPTION_FW_MODE_AP;
  92. default:
  93. ath6kl_err("Unsupported interface type :%d\n", ar->nw_type);
  94. return 0xff;
  95. }
  96. }
  97. static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
  98. u32 item_offset)
  99. {
  100. u32 addr = 0;
  101. if (ar->target_type == TARGET_TYPE_AR6003)
  102. addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
  103. else if (ar->target_type == TARGET_TYPE_AR6004)
  104. addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
  105. return addr;
  106. }
  107. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  108. {
  109. u32 address, data;
  110. struct host_app_area host_app_area;
  111. /* Fetch the address of the host_app_area_s
  112. * instance in the host interest area */
  113. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  114. address = TARG_VTOP(ar->target_type, address);
  115. if (ath6kl_diag_read32(ar, address, &data))
  116. return -EIO;
  117. address = TARG_VTOP(ar->target_type, data);
  118. host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION;
  119. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  120. sizeof(struct host_app_area)))
  121. return -EIO;
  122. return 0;
  123. }
  124. static inline void set_ac2_ep_map(struct ath6kl *ar,
  125. u8 ac,
  126. enum htc_endpoint_id ep)
  127. {
  128. ar->ac2ep_map[ac] = ep;
  129. ar->ep2ac_map[ep] = ac;
  130. }
  131. /* connect to a service */
  132. static int ath6kl_connectservice(struct ath6kl *ar,
  133. struct htc_service_connect_req *con_req,
  134. char *desc)
  135. {
  136. int status;
  137. struct htc_service_connect_resp response;
  138. memset(&response, 0, sizeof(response));
  139. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  140. if (status) {
  141. ath6kl_err("failed to connect to %s service status:%d\n",
  142. desc, status);
  143. return status;
  144. }
  145. switch (con_req->svc_id) {
  146. case WMI_CONTROL_SVC:
  147. if (test_bit(WMI_ENABLED, &ar->flag))
  148. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  149. ar->ctrl_ep = response.endpoint;
  150. break;
  151. case WMI_DATA_BE_SVC:
  152. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  153. break;
  154. case WMI_DATA_BK_SVC:
  155. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  156. break;
  157. case WMI_DATA_VI_SVC:
  158. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  159. break;
  160. case WMI_DATA_VO_SVC:
  161. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  162. break;
  163. default:
  164. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  165. return -EINVAL;
  166. }
  167. return 0;
  168. }
  169. static int ath6kl_init_service_ep(struct ath6kl *ar)
  170. {
  171. struct htc_service_connect_req connect;
  172. memset(&connect, 0, sizeof(connect));
  173. /* these fields are the same for all service endpoints */
  174. connect.ep_cb.rx = ath6kl_rx;
  175. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  176. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  177. /*
  178. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  179. * gets called.
  180. */
  181. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  182. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  183. if (!connect.ep_cb.rx_refill_thresh)
  184. connect.ep_cb.rx_refill_thresh++;
  185. /* connect to control service */
  186. connect.svc_id = WMI_CONTROL_SVC;
  187. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  188. return -EIO;
  189. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  190. /*
  191. * Limit the HTC message size on the send path, although e can
  192. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  193. * (802.3) frames on the send path.
  194. */
  195. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  196. /*
  197. * To reduce the amount of committed memory for larger A_MSDU
  198. * frames, use the recv-alloc threshold mechanism for larger
  199. * packets.
  200. */
  201. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  202. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  203. /*
  204. * For the remaining data services set the connection flag to
  205. * reduce dribbling, if configured to do so.
  206. */
  207. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  208. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  209. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  210. connect.svc_id = WMI_DATA_BE_SVC;
  211. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  212. return -EIO;
  213. /* connect to back-ground map this to WMI LOW_PRI */
  214. connect.svc_id = WMI_DATA_BK_SVC;
  215. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  216. return -EIO;
  217. /* connect to Video service, map this to to HI PRI */
  218. connect.svc_id = WMI_DATA_VI_SVC;
  219. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  220. return -EIO;
  221. /*
  222. * Connect to VO service, this is currently not mapped to a WMI
  223. * priority stream due to historical reasons. WMI originally
  224. * defined 3 priorities over 3 mailboxes We can change this when
  225. * WMI is reworked so that priorities are not dependent on
  226. * mailboxes.
  227. */
  228. connect.svc_id = WMI_DATA_VO_SVC;
  229. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  230. return -EIO;
  231. return 0;
  232. }
  233. static void ath6kl_init_control_info(struct ath6kl *ar)
  234. {
  235. u8 ctr;
  236. clear_bit(WMI_ENABLED, &ar->flag);
  237. ath6kl_init_profile_info(ar);
  238. ar->def_txkey_index = 0;
  239. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  240. ar->ch_hint = 0;
  241. ar->listen_intvl_t = A_DEFAULT_LISTEN_INTERVAL;
  242. ar->listen_intvl_b = 0;
  243. ar->tx_pwr = 0;
  244. clear_bit(SKIP_SCAN, &ar->flag);
  245. set_bit(WMM_ENABLED, &ar->flag);
  246. ar->intra_bss = 1;
  247. memset(&ar->sc_params, 0, sizeof(ar->sc_params));
  248. ar->sc_params.short_scan_ratio = WMI_SHORTSCANRATIO_DEFAULT;
  249. ar->sc_params.scan_ctrl_flags = DEFAULT_SCAN_CTRL_FLAGS;
  250. memset((u8 *)ar->sta_list, 0,
  251. AP_MAX_NUM_STA * sizeof(struct ath6kl_sta));
  252. spin_lock_init(&ar->mcastpsq_lock);
  253. /* Init the PS queues */
  254. for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
  255. spin_lock_init(&ar->sta_list[ctr].psq_lock);
  256. skb_queue_head_init(&ar->sta_list[ctr].psq);
  257. }
  258. skb_queue_head_init(&ar->mcastpsq);
  259. memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3);
  260. }
  261. /*
  262. * Set HTC/Mbox operational parameters, this can only be called when the
  263. * target is in the BMI phase.
  264. */
  265. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  266. u8 htc_ctrl_buf)
  267. {
  268. int status;
  269. u32 blk_size;
  270. blk_size = ar->mbox_info.block_size;
  271. if (htc_ctrl_buf)
  272. blk_size |= ((u32)htc_ctrl_buf) << 16;
  273. /* set the host interest area for the block size */
  274. status = ath6kl_bmi_write(ar,
  275. ath6kl_get_hi_item_addr(ar,
  276. HI_ITEM(hi_mbox_io_block_sz)),
  277. (u8 *)&blk_size,
  278. 4);
  279. if (status) {
  280. ath6kl_err("bmi_write_memory for IO block size failed\n");
  281. goto out;
  282. }
  283. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  284. blk_size,
  285. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  286. if (mbox_isr_yield_val) {
  287. /* set the host interest area for the mbox ISR yield limit */
  288. status = ath6kl_bmi_write(ar,
  289. ath6kl_get_hi_item_addr(ar,
  290. HI_ITEM(hi_mbox_isr_yield_limit)),
  291. (u8 *)&mbox_isr_yield_val,
  292. 4);
  293. if (status) {
  294. ath6kl_err("bmi_write_memory for yield limit failed\n");
  295. goto out;
  296. }
  297. }
  298. out:
  299. return status;
  300. }
  301. #define REG_DUMP_COUNT_AR6003 60
  302. #define REGISTER_DUMP_LEN_MAX 60
  303. static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
  304. {
  305. u32 address;
  306. u32 regdump_loc = 0;
  307. int status;
  308. u32 regdump_val[REGISTER_DUMP_LEN_MAX];
  309. u32 i;
  310. if (ar->target_type != TARGET_TYPE_AR6003)
  311. return;
  312. /* the reg dump pointer is copied to the host interest area */
  313. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
  314. address = TARG_VTOP(ar->target_type, address);
  315. /* read RAM location through diagnostic window */
  316. status = ath6kl_diag_read32(ar, address, &regdump_loc);
  317. if (status || !regdump_loc) {
  318. ath6kl_err("failed to get ptr to register dump area\n");
  319. return;
  320. }
  321. ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
  322. regdump_loc);
  323. regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
  324. /* fetch register dump data */
  325. status = ath6kl_diag_read(ar, regdump_loc, (u8 *)&regdump_val[0],
  326. REG_DUMP_COUNT_AR6003 * (sizeof(u32)));
  327. if (status) {
  328. ath6kl_err("failed to get register dump\n");
  329. return;
  330. }
  331. ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
  332. for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
  333. ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
  334. i, regdump_val[i]);
  335. }
  336. void ath6kl_target_failure(struct ath6kl *ar)
  337. {
  338. ath6kl_err("target asserted\n");
  339. /* try dumping target assertion information (if any) */
  340. ath6kl_dump_target_assert_info(ar);
  341. }
  342. static int ath6kl_target_config_wlan_params(struct ath6kl *ar)
  343. {
  344. int status = 0;
  345. int ret;
  346. /*
  347. * Configure the device for rx dot11 header rules. "0,0" are the
  348. * default values. Required if checksum offload is needed. Set
  349. * RxMetaVersion to 2.
  350. */
  351. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi,
  352. ar->rx_meta_ver, 0, 0)) {
  353. ath6kl_err("unable to set the rx frame format\n");
  354. status = -EIO;
  355. }
  356. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  357. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1,
  358. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  359. ath6kl_err("unable to set power save fail event policy\n");
  360. status = -EIO;
  361. }
  362. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  363. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0,
  364. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  365. ath6kl_err("unable to set barker preamble policy\n");
  366. status = -EIO;
  367. }
  368. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi,
  369. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  370. ath6kl_err("unable to set keep alive interval\n");
  371. status = -EIO;
  372. }
  373. if (ath6kl_wmi_disctimeout_cmd(ar->wmi,
  374. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  375. ath6kl_err("unable to set disconnect timeout\n");
  376. status = -EIO;
  377. }
  378. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  379. if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) {
  380. ath6kl_err("unable to set txop bursting\n");
  381. status = -EIO;
  382. }
  383. ret = ath6kl_wmi_info_req_cmd(ar->wmi, P2P_FLAG_CAPABILITIES_REQ |
  384. P2P_FLAG_MACADDR_REQ |
  385. P2P_FLAG_HMODEL_REQ);
  386. if (ret) {
  387. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  388. "capabilities (%d) - assuming P2P not supported\n",
  389. ret);
  390. }
  391. return status;
  392. }
  393. int ath6kl_configure_target(struct ath6kl *ar)
  394. {
  395. u32 param, ram_reserved_size;
  396. u8 fw_iftype;
  397. fw_iftype = ath6kl_get_fw_iftype(ar);
  398. if (fw_iftype == 0xff)
  399. return -EINVAL;
  400. /* Tell target which HTC version it is used*/
  401. param = HTC_PROTOCOL_VERSION;
  402. if (ath6kl_bmi_write(ar,
  403. ath6kl_get_hi_item_addr(ar,
  404. HI_ITEM(hi_app_host_interest)),
  405. (u8 *)&param, 4) != 0) {
  406. ath6kl_err("bmi_write_memory for htc version failed\n");
  407. return -EIO;
  408. }
  409. /* set the firmware mode to STA/IBSS/AP */
  410. param = 0;
  411. if (ath6kl_bmi_read(ar,
  412. ath6kl_get_hi_item_addr(ar,
  413. HI_ITEM(hi_option_flag)),
  414. (u8 *)&param, 4) != 0) {
  415. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  416. return -EIO;
  417. }
  418. param |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  419. param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT);
  420. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  421. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  422. if (ath6kl_bmi_write(ar,
  423. ath6kl_get_hi_item_addr(ar,
  424. HI_ITEM(hi_option_flag)),
  425. (u8 *)&param,
  426. 4) != 0) {
  427. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  428. return -EIO;
  429. }
  430. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  431. /*
  432. * Hardcode the address use for the extended board data
  433. * Ideally this should be pre-allocate by the OS at boot time
  434. * But since it is a new feature and board data is loaded
  435. * at init time, we have to workaround this from host.
  436. * It is difficult to patch the firmware boot code,
  437. * but possible in theory.
  438. */
  439. if (ar->target_type == TARGET_TYPE_AR6003 ||
  440. ar->target_type == TARGET_TYPE_AR6004) {
  441. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  442. param = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
  443. ram_reserved_size = AR6003_REV2_RAM_RESERVE_SIZE;
  444. } else if (ar->version.target_ver == AR6004_REV1_VERSION) {
  445. param = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
  446. ram_reserved_size = AR6004_REV1_RAM_RESERVE_SIZE;
  447. } else {
  448. param = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
  449. ram_reserved_size = AR6003_REV3_RAM_RESERVE_SIZE;
  450. }
  451. if (ath6kl_bmi_write(ar,
  452. ath6kl_get_hi_item_addr(ar,
  453. HI_ITEM(hi_board_ext_data)),
  454. (u8 *)&param, 4) != 0) {
  455. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  456. return -EIO;
  457. }
  458. if (ath6kl_bmi_write(ar,
  459. ath6kl_get_hi_item_addr(ar,
  460. HI_ITEM(hi_end_ram_reserve_sz)),
  461. (u8 *)&ram_reserved_size, 4) != 0) {
  462. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  463. return -EIO;
  464. }
  465. }
  466. /* set the block size for the target */
  467. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  468. /* use default number of control buffers */
  469. return -EIO;
  470. return 0;
  471. }
  472. struct ath6kl *ath6kl_core_alloc(struct device *sdev)
  473. {
  474. struct net_device *dev;
  475. struct ath6kl *ar;
  476. struct wireless_dev *wdev;
  477. wdev = ath6kl_cfg80211_init(sdev);
  478. if (!wdev) {
  479. ath6kl_err("ath6kl_cfg80211_init failed\n");
  480. return NULL;
  481. }
  482. ar = wdev_priv(wdev);
  483. ar->dev = sdev;
  484. ar->wdev = wdev;
  485. wdev->iftype = NL80211_IFTYPE_STATION;
  486. if (ath6kl_debug_init(ar)) {
  487. ath6kl_err("Failed to initialize debugfs\n");
  488. ath6kl_cfg80211_deinit(ar);
  489. return NULL;
  490. }
  491. dev = alloc_netdev(0, "wlan%d", ether_setup);
  492. if (!dev) {
  493. ath6kl_err("no memory for network device instance\n");
  494. ath6kl_cfg80211_deinit(ar);
  495. return NULL;
  496. }
  497. dev->ieee80211_ptr = wdev;
  498. SET_NETDEV_DEV(dev, wiphy_dev(wdev->wiphy));
  499. wdev->netdev = dev;
  500. ar->sme_state = SME_DISCONNECTED;
  501. ar->auto_auth_stage = AUTH_IDLE;
  502. init_netdev(dev);
  503. ar->net_dev = dev;
  504. set_bit(WLAN_ENABLED, &ar->flag);
  505. ar->wlan_pwr_state = WLAN_POWER_STATE_ON;
  506. spin_lock_init(&ar->lock);
  507. ath6kl_init_control_info(ar);
  508. init_waitqueue_head(&ar->event_wq);
  509. sema_init(&ar->sem, 1);
  510. clear_bit(DESTROY_IN_PROGRESS, &ar->flag);
  511. INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue);
  512. setup_timer(&ar->disconnect_timer, disconnect_timer_handler,
  513. (unsigned long) dev);
  514. return ar;
  515. }
  516. int ath6kl_unavail_ev(struct ath6kl *ar)
  517. {
  518. ath6kl_destroy(ar->net_dev, 1);
  519. return 0;
  520. }
  521. /* firmware upload */
  522. static u32 ath6kl_get_load_address(u32 target_ver, enum addr_type type)
  523. {
  524. WARN_ON(target_ver != AR6003_REV2_VERSION &&
  525. target_ver != AR6003_REV3_VERSION &&
  526. target_ver != AR6004_REV1_VERSION);
  527. switch (type) {
  528. case DATASET_PATCH_ADDR:
  529. return (target_ver == AR6003_REV2_VERSION) ?
  530. AR6003_REV2_DATASET_PATCH_ADDRESS :
  531. AR6003_REV3_DATASET_PATCH_ADDRESS;
  532. case APP_LOAD_ADDR:
  533. return (target_ver == AR6003_REV2_VERSION) ?
  534. AR6003_REV2_APP_LOAD_ADDRESS :
  535. 0x1234;
  536. case APP_START_OVERRIDE_ADDR:
  537. return (target_ver == AR6003_REV2_VERSION) ?
  538. AR6003_REV2_APP_START_OVERRIDE :
  539. AR6003_REV3_APP_START_OVERRIDE;
  540. default:
  541. return 0;
  542. }
  543. }
  544. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  545. u8 **fw, size_t *fw_len)
  546. {
  547. const struct firmware *fw_entry;
  548. int ret;
  549. ret = request_firmware(&fw_entry, filename, ar->dev);
  550. if (ret)
  551. return ret;
  552. *fw_len = fw_entry->size;
  553. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  554. if (*fw == NULL)
  555. ret = -ENOMEM;
  556. release_firmware(fw_entry);
  557. return ret;
  558. }
  559. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  560. {
  561. const char *filename;
  562. int ret;
  563. switch (ar->version.target_ver) {
  564. case AR6003_REV2_VERSION:
  565. filename = AR6003_REV2_BOARD_DATA_FILE;
  566. break;
  567. case AR6004_REV1_VERSION:
  568. filename = AR6004_REV1_BOARD_DATA_FILE;
  569. break;
  570. default:
  571. filename = AR6003_REV3_BOARD_DATA_FILE;
  572. break;
  573. }
  574. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  575. &ar->fw_board_len);
  576. if (ret == 0) {
  577. /* managed to get proper board file */
  578. return 0;
  579. }
  580. /* there was no proper board file, try to use default instead */
  581. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  582. filename, ret);
  583. switch (ar->version.target_ver) {
  584. case AR6003_REV2_VERSION:
  585. filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
  586. break;
  587. case AR6004_REV1_VERSION:
  588. filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
  589. break;
  590. default:
  591. filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
  592. break;
  593. }
  594. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  595. &ar->fw_board_len);
  596. if (ret) {
  597. ath6kl_err("Failed to get default board file %s: %d\n",
  598. filename, ret);
  599. return ret;
  600. }
  601. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  602. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  603. return 0;
  604. }
  605. static int ath6kl_upload_board_file(struct ath6kl *ar)
  606. {
  607. u32 board_address, board_ext_address, param;
  608. u32 board_data_size, board_ext_data_size;
  609. int ret;
  610. if (ar->fw_board == NULL) {
  611. ret = ath6kl_fetch_board_file(ar);
  612. if (ret)
  613. return ret;
  614. }
  615. /*
  616. * Determine where in Target RAM to write Board Data.
  617. * For AR6004, host determine Target RAM address for
  618. * writing board data.
  619. */
  620. if (ar->target_type == TARGET_TYPE_AR6004) {
  621. board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
  622. ath6kl_bmi_write(ar,
  623. ath6kl_get_hi_item_addr(ar,
  624. HI_ITEM(hi_board_data)),
  625. (u8 *) &board_address, 4);
  626. } else {
  627. ath6kl_bmi_read(ar,
  628. ath6kl_get_hi_item_addr(ar,
  629. HI_ITEM(hi_board_data)),
  630. (u8 *) &board_address, 4);
  631. }
  632. ath6kl_dbg(ATH6KL_DBG_TRC, "board data download addr: 0x%x\n",
  633. board_address);
  634. /* determine where in target ram to write extended board data */
  635. ath6kl_bmi_read(ar,
  636. ath6kl_get_hi_item_addr(ar,
  637. HI_ITEM(hi_board_ext_data)),
  638. (u8 *) &board_ext_address, 4);
  639. ath6kl_dbg(ATH6KL_DBG_TRC, "board file download addr: 0x%x\n",
  640. board_ext_address);
  641. if (board_ext_address == 0) {
  642. ath6kl_err("Failed to get board file target address.\n");
  643. return -EINVAL;
  644. }
  645. switch (ar->target_type) {
  646. case TARGET_TYPE_AR6003:
  647. board_data_size = AR6003_BOARD_DATA_SZ;
  648. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  649. break;
  650. case TARGET_TYPE_AR6004:
  651. board_data_size = AR6004_BOARD_DATA_SZ;
  652. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  653. break;
  654. default:
  655. WARN_ON(1);
  656. return -EINVAL;
  657. break;
  658. }
  659. if (ar->fw_board_len == (board_data_size +
  660. board_ext_data_size)) {
  661. /* write extended board data */
  662. ret = ath6kl_bmi_write(ar, board_ext_address,
  663. ar->fw_board + board_data_size,
  664. board_ext_data_size);
  665. if (ret) {
  666. ath6kl_err("Failed to write extended board data: %d\n",
  667. ret);
  668. return ret;
  669. }
  670. /* record that extended board data is initialized */
  671. param = (board_ext_data_size << 16) | 1;
  672. ath6kl_bmi_write(ar,
  673. ath6kl_get_hi_item_addr(ar,
  674. HI_ITEM(hi_board_ext_data_config)),
  675. (unsigned char *) &param, 4);
  676. }
  677. if (ar->fw_board_len < board_data_size) {
  678. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  679. ret = -EINVAL;
  680. return ret;
  681. }
  682. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  683. board_data_size);
  684. if (ret) {
  685. ath6kl_err("Board file bmi write failed: %d\n", ret);
  686. return ret;
  687. }
  688. /* record the fact that Board Data IS initialized */
  689. param = 1;
  690. ath6kl_bmi_write(ar,
  691. ath6kl_get_hi_item_addr(ar,
  692. HI_ITEM(hi_board_data_initialized)),
  693. (u8 *)&param, 4);
  694. return ret;
  695. }
  696. static int ath6kl_upload_otp(struct ath6kl *ar)
  697. {
  698. const char *filename;
  699. u32 address, param;
  700. int ret;
  701. switch (ar->version.target_ver) {
  702. case AR6003_REV2_VERSION:
  703. filename = AR6003_REV2_OTP_FILE;
  704. break;
  705. case AR6004_REV1_VERSION:
  706. ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
  707. return 0;
  708. break;
  709. default:
  710. filename = AR6003_REV3_OTP_FILE;
  711. break;
  712. }
  713. if (ar->fw_otp == NULL) {
  714. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  715. &ar->fw_otp_len);
  716. if (ret) {
  717. ath6kl_err("Failed to get OTP file %s: %d\n",
  718. filename, ret);
  719. return ret;
  720. }
  721. }
  722. address = ath6kl_get_load_address(ar->version.target_ver,
  723. APP_LOAD_ADDR);
  724. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  725. ar->fw_otp_len);
  726. if (ret) {
  727. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  728. return ret;
  729. }
  730. /* execute the OTP code */
  731. param = 0;
  732. address = ath6kl_get_load_address(ar->version.target_ver,
  733. APP_START_OVERRIDE_ADDR);
  734. ath6kl_bmi_execute(ar, address, &param);
  735. return ret;
  736. }
  737. static int ath6kl_upload_firmware(struct ath6kl *ar)
  738. {
  739. const char *filename;
  740. u32 address;
  741. int ret;
  742. if (testmode) {
  743. switch (ar->version.target_ver) {
  744. case AR6003_REV2_VERSION:
  745. filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
  746. break;
  747. case AR6003_REV3_VERSION:
  748. filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
  749. break;
  750. case AR6004_REV1_VERSION:
  751. ath6kl_warn("testmode not supported with ar6004\n");
  752. return -EOPNOTSUPP;
  753. default:
  754. ath6kl_warn("unknown target version: 0x%x\n",
  755. ar->version.target_ver);
  756. return -EINVAL;
  757. }
  758. set_bit(TESTMODE, &ar->flag);
  759. goto get_fw;
  760. }
  761. switch (ar->version.target_ver) {
  762. case AR6003_REV2_VERSION:
  763. filename = AR6003_REV2_FIRMWARE_FILE;
  764. break;
  765. case AR6004_REV1_VERSION:
  766. filename = AR6004_REV1_FIRMWARE_FILE;
  767. break;
  768. default:
  769. filename = AR6003_REV3_FIRMWARE_FILE;
  770. break;
  771. }
  772. get_fw:
  773. if (ar->fw == NULL) {
  774. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  775. if (ret) {
  776. ath6kl_err("Failed to get firmware file %s: %d\n",
  777. filename, ret);
  778. return ret;
  779. }
  780. }
  781. address = ath6kl_get_load_address(ar->version.target_ver,
  782. APP_LOAD_ADDR);
  783. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  784. if (ret) {
  785. ath6kl_err("Failed to write firmware: %d\n", ret);
  786. return ret;
  787. }
  788. /*
  789. * Set starting address for firmware
  790. * Don't need to setup app_start override addr on AR6004
  791. */
  792. if (ar->target_type != TARGET_TYPE_AR6004) {
  793. address = ath6kl_get_load_address(ar->version.target_ver,
  794. APP_START_OVERRIDE_ADDR);
  795. ath6kl_bmi_set_app_start(ar, address);
  796. }
  797. return ret;
  798. }
  799. static int ath6kl_upload_patch(struct ath6kl *ar)
  800. {
  801. const char *filename;
  802. u32 address, param;
  803. int ret;
  804. switch (ar->version.target_ver) {
  805. case AR6003_REV2_VERSION:
  806. filename = AR6003_REV2_PATCH_FILE;
  807. break;
  808. case AR6004_REV1_VERSION:
  809. /* FIXME: implement for AR6004 */
  810. return 0;
  811. break;
  812. default:
  813. filename = AR6003_REV3_PATCH_FILE;
  814. break;
  815. }
  816. if (ar->fw_patch == NULL) {
  817. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  818. &ar->fw_patch_len);
  819. if (ret) {
  820. ath6kl_err("Failed to get patch file %s: %d\n",
  821. filename, ret);
  822. return ret;
  823. }
  824. }
  825. address = ath6kl_get_load_address(ar->version.target_ver,
  826. DATASET_PATCH_ADDR);
  827. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  828. if (ret) {
  829. ath6kl_err("Failed to write patch file: %d\n", ret);
  830. return ret;
  831. }
  832. param = address;
  833. ath6kl_bmi_write(ar,
  834. ath6kl_get_hi_item_addr(ar,
  835. HI_ITEM(hi_dset_list_head)),
  836. (unsigned char *) &param, 4);
  837. return 0;
  838. }
  839. static int ath6kl_init_upload(struct ath6kl *ar)
  840. {
  841. u32 param, options, sleep, address;
  842. int status = 0;
  843. if (ar->target_type != TARGET_TYPE_AR6003 &&
  844. ar->target_type != TARGET_TYPE_AR6004)
  845. return -EINVAL;
  846. /* temporarily disable system sleep */
  847. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  848. status = ath6kl_bmi_reg_read(ar, address, &param);
  849. if (status)
  850. return status;
  851. options = param;
  852. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  853. status = ath6kl_bmi_reg_write(ar, address, param);
  854. if (status)
  855. return status;
  856. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  857. status = ath6kl_bmi_reg_read(ar, address, &param);
  858. if (status)
  859. return status;
  860. sleep = param;
  861. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  862. status = ath6kl_bmi_reg_write(ar, address, param);
  863. if (status)
  864. return status;
  865. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  866. options, sleep);
  867. /* program analog PLL register */
  868. /* no need to control 40/44MHz clock on AR6004 */
  869. if (ar->target_type != TARGET_TYPE_AR6004) {
  870. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  871. 0xF9104001);
  872. if (status)
  873. return status;
  874. /* Run at 80/88MHz by default */
  875. param = SM(CPU_CLOCK_STANDARD, 1);
  876. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  877. status = ath6kl_bmi_reg_write(ar, address, param);
  878. if (status)
  879. return status;
  880. }
  881. param = 0;
  882. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  883. param = SM(LPO_CAL_ENABLE, 1);
  884. status = ath6kl_bmi_reg_write(ar, address, param);
  885. if (status)
  886. return status;
  887. /* WAR to avoid SDIO CRC err */
  888. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  889. ath6kl_err("temporary war to avoid sdio crc error\n");
  890. param = 0x20;
  891. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  892. status = ath6kl_bmi_reg_write(ar, address, param);
  893. if (status)
  894. return status;
  895. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  896. status = ath6kl_bmi_reg_write(ar, address, param);
  897. if (status)
  898. return status;
  899. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  900. status = ath6kl_bmi_reg_write(ar, address, param);
  901. if (status)
  902. return status;
  903. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  904. status = ath6kl_bmi_reg_write(ar, address, param);
  905. if (status)
  906. return status;
  907. }
  908. /* write EEPROM data to Target RAM */
  909. status = ath6kl_upload_board_file(ar);
  910. if (status)
  911. return status;
  912. /* transfer One time Programmable data */
  913. status = ath6kl_upload_otp(ar);
  914. if (status)
  915. return status;
  916. /* Download Target firmware */
  917. status = ath6kl_upload_firmware(ar);
  918. if (status)
  919. return status;
  920. status = ath6kl_upload_patch(ar);
  921. if (status)
  922. return status;
  923. /* Restore system sleep */
  924. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  925. status = ath6kl_bmi_reg_write(ar, address, sleep);
  926. if (status)
  927. return status;
  928. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  929. param = options | 0x20;
  930. status = ath6kl_bmi_reg_write(ar, address, param);
  931. if (status)
  932. return status;
  933. /* Configure GPIO AR6003 UART */
  934. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  935. status = ath6kl_bmi_write(ar,
  936. ath6kl_get_hi_item_addr(ar,
  937. HI_ITEM(hi_dbg_uart_txpin)),
  938. (u8 *)&param, 4);
  939. return status;
  940. }
  941. static int ath6kl_init(struct net_device *dev)
  942. {
  943. struct ath6kl *ar = ath6kl_priv(dev);
  944. int status = 0;
  945. s32 timeleft;
  946. if (!ar)
  947. return -EIO;
  948. /* Do we need to finish the BMI phase */
  949. if (ath6kl_bmi_done(ar)) {
  950. status = -EIO;
  951. goto ath6kl_init_done;
  952. }
  953. /* Indicate that WMI is enabled (although not ready yet) */
  954. set_bit(WMI_ENABLED, &ar->flag);
  955. ar->wmi = ath6kl_wmi_init(ar);
  956. if (!ar->wmi) {
  957. ath6kl_err("failed to initialize wmi\n");
  958. status = -EIO;
  959. goto ath6kl_init_done;
  960. }
  961. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  962. wlan_node_table_init(&ar->scan_table);
  963. /*
  964. * The reason we have to wait for the target here is that the
  965. * driver layer has to init BMI in order to set the host block
  966. * size.
  967. */
  968. if (ath6kl_htc_wait_target(ar->htc_target)) {
  969. status = -EIO;
  970. goto err_node_cleanup;
  971. }
  972. if (ath6kl_init_service_ep(ar)) {
  973. status = -EIO;
  974. goto err_cleanup_scatter;
  975. }
  976. /* setup access class priority mappings */
  977. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  978. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  979. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  980. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  981. /* give our connected endpoints some buffers */
  982. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  983. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  984. /* allocate some buffers that handle larger AMSDU frames */
  985. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  986. /* setup credit distribution */
  987. ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info);
  988. ath6kl_cookie_init(ar);
  989. /* start HTC */
  990. status = ath6kl_htc_start(ar->htc_target);
  991. if (status) {
  992. ath6kl_cookie_cleanup(ar);
  993. goto err_rxbuf_cleanup;
  994. }
  995. /* Wait for Wmi event to be ready */
  996. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  997. test_bit(WMI_READY,
  998. &ar->flag),
  999. WMI_TIMEOUT);
  1000. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1001. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1002. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1003. status = -EIO;
  1004. goto err_htc_stop;
  1005. }
  1006. if (!timeleft || signal_pending(current)) {
  1007. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1008. status = -EIO;
  1009. goto err_htc_stop;
  1010. }
  1011. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1012. /* communicate the wmi protocol verision to the target */
  1013. if ((ath6kl_set_host_app_area(ar)) != 0)
  1014. ath6kl_err("unable to set the host app area\n");
  1015. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1016. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1017. status = ath6kl_target_config_wlan_params(ar);
  1018. if (!status)
  1019. goto ath6kl_init_done;
  1020. err_htc_stop:
  1021. ath6kl_htc_stop(ar->htc_target);
  1022. err_rxbuf_cleanup:
  1023. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1024. ath6kl_cleanup_amsdu_rxbufs(ar);
  1025. err_cleanup_scatter:
  1026. ath6kl_hif_cleanup_scatter(ar);
  1027. err_node_cleanup:
  1028. wlan_node_table_cleanup(&ar->scan_table);
  1029. ath6kl_wmi_shutdown(ar->wmi);
  1030. clear_bit(WMI_ENABLED, &ar->flag);
  1031. ar->wmi = NULL;
  1032. ath6kl_init_done:
  1033. return status;
  1034. }
  1035. int ath6kl_core_init(struct ath6kl *ar)
  1036. {
  1037. int ret = 0;
  1038. struct ath6kl_bmi_target_info targ_info;
  1039. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1040. if (!ar->ath6kl_wq)
  1041. return -ENOMEM;
  1042. ret = ath6kl_bmi_init(ar);
  1043. if (ret)
  1044. goto err_wq;
  1045. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1046. if (ret)
  1047. goto err_bmi_cleanup;
  1048. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1049. ar->target_type = le32_to_cpu(targ_info.type);
  1050. ar->wdev->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1051. ret = ath6kl_configure_target(ar);
  1052. if (ret)
  1053. goto err_bmi_cleanup;
  1054. ar->htc_target = ath6kl_htc_create(ar);
  1055. if (!ar->htc_target) {
  1056. ret = -ENOMEM;
  1057. goto err_bmi_cleanup;
  1058. }
  1059. ar->aggr_cntxt = aggr_init(ar->net_dev);
  1060. if (!ar->aggr_cntxt) {
  1061. ath6kl_err("failed to initialize aggr\n");
  1062. ret = -ENOMEM;
  1063. goto err_htc_cleanup;
  1064. }
  1065. ret = ath6kl_init_upload(ar);
  1066. if (ret)
  1067. goto err_htc_cleanup;
  1068. ret = ath6kl_init(ar->net_dev);
  1069. if (ret)
  1070. goto err_htc_cleanup;
  1071. /* This runs the init function if registered */
  1072. ret = register_netdev(ar->net_dev);
  1073. if (ret) {
  1074. ath6kl_err("register_netdev failed\n");
  1075. ath6kl_destroy(ar->net_dev, 0);
  1076. return ret;
  1077. }
  1078. set_bit(NETDEV_REGISTERED, &ar->flag);
  1079. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1080. __func__, ar->net_dev->name, ar->net_dev, ar);
  1081. return ret;
  1082. err_htc_cleanup:
  1083. ath6kl_htc_cleanup(ar->htc_target);
  1084. err_bmi_cleanup:
  1085. ath6kl_bmi_cleanup(ar);
  1086. err_wq:
  1087. destroy_workqueue(ar->ath6kl_wq);
  1088. return ret;
  1089. }
  1090. void ath6kl_stop_txrx(struct ath6kl *ar)
  1091. {
  1092. struct net_device *ndev = ar->net_dev;
  1093. if (!ndev)
  1094. return;
  1095. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1096. if (down_interruptible(&ar->sem)) {
  1097. ath6kl_err("down_interruptible failed\n");
  1098. return;
  1099. }
  1100. if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR)
  1101. ath6kl_stop_endpoint(ndev, false, true);
  1102. clear_bit(WLAN_ENABLED, &ar->flag);
  1103. }
  1104. /*
  1105. * We need to differentiate between the surprise and planned removal of the
  1106. * device because of the following consideration:
  1107. *
  1108. * - In case of surprise removal, the hcd already frees up the pending
  1109. * for the device and hence there is no need to unregister the function
  1110. * driver inorder to get these requests. For planned removal, the function
  1111. * driver has to explicitly unregister itself to have the hcd return all the
  1112. * pending requests before the data structures for the devices are freed up.
  1113. * Note that as per the current implementation, the function driver will
  1114. * end up releasing all the devices since there is no API to selectively
  1115. * release a particular device.
  1116. *
  1117. * - Certain commands issued to the target can be skipped for surprise
  1118. * removal since they will anyway not go through.
  1119. */
  1120. void ath6kl_destroy(struct net_device *dev, unsigned int unregister)
  1121. {
  1122. struct ath6kl *ar;
  1123. if (!dev || !ath6kl_priv(dev)) {
  1124. ath6kl_err("failed to get device structure\n");
  1125. return;
  1126. }
  1127. ar = ath6kl_priv(dev);
  1128. destroy_workqueue(ar->ath6kl_wq);
  1129. if (ar->htc_target)
  1130. ath6kl_htc_cleanup(ar->htc_target);
  1131. aggr_module_destroy(ar->aggr_cntxt);
  1132. ath6kl_cookie_cleanup(ar);
  1133. ath6kl_cleanup_amsdu_rxbufs(ar);
  1134. ath6kl_bmi_cleanup(ar);
  1135. ath6kl_debug_cleanup(ar);
  1136. if (unregister && test_bit(NETDEV_REGISTERED, &ar->flag)) {
  1137. unregister_netdev(dev);
  1138. clear_bit(NETDEV_REGISTERED, &ar->flag);
  1139. }
  1140. free_netdev(dev);
  1141. wlan_node_table_cleanup(&ar->scan_table);
  1142. kfree(ar->fw_board);
  1143. kfree(ar->fw_otp);
  1144. kfree(ar->fw);
  1145. kfree(ar->fw_patch);
  1146. ath6kl_cfg80211_deinit(ar);
  1147. }