cx18-streams.c 24 KB

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  1. /*
  2. * cx18 init/start/stop/exit stream functions
  3. *
  4. * Derived from ivtv-streams.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@radix.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-io.h"
  26. #include "cx18-fileops.h"
  27. #include "cx18-mailbox.h"
  28. #include "cx18-i2c.h"
  29. #include "cx18-queue.h"
  30. #include "cx18-ioctl.h"
  31. #include "cx18-streams.h"
  32. #include "cx18-cards.h"
  33. #include "cx18-scb.h"
  34. #include "cx18-dvb.h"
  35. #define CX18_DSP0_INTERRUPT_MASK 0xd0004C
  36. static struct v4l2_file_operations cx18_v4l2_enc_fops = {
  37. .owner = THIS_MODULE,
  38. .read = cx18_v4l2_read,
  39. .open = cx18_v4l2_open,
  40. /* FIXME change to video_ioctl2 if serialization lock can be removed */
  41. .ioctl = cx18_v4l2_ioctl,
  42. .release = cx18_v4l2_close,
  43. .poll = cx18_v4l2_enc_poll,
  44. };
  45. /* offset from 0 to register ts v4l2 minors on */
  46. #define CX18_V4L2_ENC_TS_OFFSET 16
  47. /* offset from 0 to register pcm v4l2 minors on */
  48. #define CX18_V4L2_ENC_PCM_OFFSET 24
  49. /* offset from 0 to register yuv v4l2 minors on */
  50. #define CX18_V4L2_ENC_YUV_OFFSET 32
  51. static struct {
  52. const char *name;
  53. int vfl_type;
  54. int num_offset;
  55. int dma;
  56. enum v4l2_buf_type buf_type;
  57. } cx18_stream_info[] = {
  58. { /* CX18_ENC_STREAM_TYPE_MPG */
  59. "encoder MPEG",
  60. VFL_TYPE_GRABBER, 0,
  61. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  62. },
  63. { /* CX18_ENC_STREAM_TYPE_TS */
  64. "TS",
  65. VFL_TYPE_GRABBER, -1,
  66. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  67. },
  68. { /* CX18_ENC_STREAM_TYPE_YUV */
  69. "encoder YUV",
  70. VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
  71. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  72. },
  73. { /* CX18_ENC_STREAM_TYPE_VBI */
  74. "encoder VBI",
  75. VFL_TYPE_VBI, 0,
  76. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE,
  77. },
  78. { /* CX18_ENC_STREAM_TYPE_PCM */
  79. "encoder PCM audio",
  80. VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
  81. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE,
  82. },
  83. { /* CX18_ENC_STREAM_TYPE_IDX */
  84. "encoder IDX",
  85. VFL_TYPE_GRABBER, -1,
  86. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  87. },
  88. { /* CX18_ENC_STREAM_TYPE_RAD */
  89. "encoder radio",
  90. VFL_TYPE_RADIO, 0,
  91. PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE,
  92. },
  93. };
  94. static void cx18_stream_init(struct cx18 *cx, int type)
  95. {
  96. struct cx18_stream *s = &cx->streams[type];
  97. struct video_device *video_dev = s->video_dev;
  98. /* we need to keep video_dev, so restore it afterwards */
  99. memset(s, 0, sizeof(*s));
  100. s->video_dev = video_dev;
  101. /* initialize cx18_stream fields */
  102. s->cx = cx;
  103. s->type = type;
  104. s->name = cx18_stream_info[type].name;
  105. s->handle = CX18_INVALID_TASK_HANDLE;
  106. s->dma = cx18_stream_info[type].dma;
  107. s->buffers = cx->stream_buffers[type];
  108. s->buf_size = cx->stream_buf_size[type];
  109. INIT_LIST_HEAD(&s->buf_pool);
  110. s->bufs_per_mdl = 1;
  111. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  112. init_waitqueue_head(&s->waitq);
  113. s->id = -1;
  114. spin_lock_init(&s->q_free.lock);
  115. cx18_queue_init(&s->q_free);
  116. spin_lock_init(&s->q_busy.lock);
  117. cx18_queue_init(&s->q_busy);
  118. spin_lock_init(&s->q_full.lock);
  119. cx18_queue_init(&s->q_full);
  120. spin_lock_init(&s->q_idle.lock);
  121. cx18_queue_init(&s->q_idle);
  122. INIT_WORK(&s->out_work_order, cx18_out_work_handler);
  123. }
  124. static int cx18_prep_dev(struct cx18 *cx, int type)
  125. {
  126. struct cx18_stream *s = &cx->streams[type];
  127. u32 cap = cx->v4l2_cap;
  128. int num_offset = cx18_stream_info[type].num_offset;
  129. int num = cx->instance + cx18_first_minor + num_offset;
  130. /* These four fields are always initialized. If video_dev == NULL, then
  131. this stream is not in use. In that case no other fields but these
  132. four can be used. */
  133. s->video_dev = NULL;
  134. s->cx = cx;
  135. s->type = type;
  136. s->name = cx18_stream_info[type].name;
  137. /* Check whether the radio is supported */
  138. if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
  139. return 0;
  140. /* Check whether VBI is supported */
  141. if (type == CX18_ENC_STREAM_TYPE_VBI &&
  142. !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
  143. return 0;
  144. /* User explicitly selected 0 buffers for these streams, so don't
  145. create them. */
  146. if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
  147. cx->stream_buffers[type] == 0) {
  148. CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
  149. return 0;
  150. }
  151. cx18_stream_init(cx, type);
  152. if (num_offset == -1)
  153. return 0;
  154. /* allocate and initialize the v4l2 video device structure */
  155. s->video_dev = video_device_alloc();
  156. if (s->video_dev == NULL) {
  157. CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
  158. s->name);
  159. return -ENOMEM;
  160. }
  161. snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s",
  162. cx->v4l2_dev.name, s->name);
  163. s->video_dev->num = num;
  164. s->video_dev->v4l2_dev = &cx->v4l2_dev;
  165. s->video_dev->fops = &cx18_v4l2_enc_fops;
  166. s->video_dev->release = video_device_release;
  167. s->video_dev->tvnorms = V4L2_STD_ALL;
  168. cx18_set_funcs(s->video_dev);
  169. return 0;
  170. }
  171. /* Initialize v4l2 variables and register v4l2 devices */
  172. int cx18_streams_setup(struct cx18 *cx)
  173. {
  174. int type, ret;
  175. /* Setup V4L2 Devices */
  176. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  177. /* Prepare device */
  178. ret = cx18_prep_dev(cx, type);
  179. if (ret < 0)
  180. break;
  181. /* Allocate Stream */
  182. ret = cx18_stream_alloc(&cx->streams[type]);
  183. if (ret < 0)
  184. break;
  185. }
  186. if (type == CX18_MAX_STREAMS)
  187. return 0;
  188. /* One or more streams could not be initialized. Clean 'em all up. */
  189. cx18_streams_cleanup(cx, 0);
  190. return ret;
  191. }
  192. static int cx18_reg_dev(struct cx18 *cx, int type)
  193. {
  194. struct cx18_stream *s = &cx->streams[type];
  195. int vfl_type = cx18_stream_info[type].vfl_type;
  196. const char *name;
  197. int num, ret;
  198. /* TODO: Shouldn't this be a VFL_TYPE_TRANSPORT or something?
  199. * We need a VFL_TYPE_TS defined.
  200. */
  201. if (strcmp("TS", s->name) == 0) {
  202. /* just return if no DVB is supported */
  203. if ((cx->card->hw_all & CX18_HW_DVB) == 0)
  204. return 0;
  205. ret = cx18_dvb_register(s);
  206. if (ret < 0) {
  207. CX18_ERR("DVB failed to register\n");
  208. return ret;
  209. }
  210. }
  211. if (s->video_dev == NULL)
  212. return 0;
  213. num = s->video_dev->num;
  214. /* card number + user defined offset + device offset */
  215. if (type != CX18_ENC_STREAM_TYPE_MPG) {
  216. struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
  217. if (s_mpg->video_dev)
  218. num = s_mpg->video_dev->num
  219. + cx18_stream_info[type].num_offset;
  220. }
  221. video_set_drvdata(s->video_dev, s);
  222. /* Register device. First try the desired minor, then any free one. */
  223. ret = video_register_device_no_warn(s->video_dev, vfl_type, num);
  224. if (ret < 0) {
  225. CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
  226. s->name, num);
  227. video_device_release(s->video_dev);
  228. s->video_dev = NULL;
  229. return ret;
  230. }
  231. name = video_device_node_name(s->video_dev);
  232. switch (vfl_type) {
  233. case VFL_TYPE_GRABBER:
  234. CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
  235. name, s->name, cx->stream_buffers[type],
  236. cx->stream_buf_size[type] / 1024,
  237. (cx->stream_buf_size[type] * 100 / 1024) % 100);
  238. break;
  239. case VFL_TYPE_RADIO:
  240. CX18_INFO("Registered device %s for %s\n", name, s->name);
  241. break;
  242. case VFL_TYPE_VBI:
  243. if (cx->stream_buffers[type])
  244. CX18_INFO("Registered device %s for %s "
  245. "(%d x %d bytes)\n",
  246. name, s->name, cx->stream_buffers[type],
  247. cx->stream_buf_size[type]);
  248. else
  249. CX18_INFO("Registered device %s for %s\n",
  250. name, s->name);
  251. break;
  252. }
  253. return 0;
  254. }
  255. /* Register v4l2 devices */
  256. int cx18_streams_register(struct cx18 *cx)
  257. {
  258. int type;
  259. int err;
  260. int ret = 0;
  261. /* Register V4L2 devices */
  262. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  263. err = cx18_reg_dev(cx, type);
  264. if (err && ret == 0)
  265. ret = err;
  266. }
  267. if (ret == 0)
  268. return 0;
  269. /* One or more streams could not be initialized. Clean 'em all up. */
  270. cx18_streams_cleanup(cx, 1);
  271. return ret;
  272. }
  273. /* Unregister v4l2 devices */
  274. void cx18_streams_cleanup(struct cx18 *cx, int unregister)
  275. {
  276. struct video_device *vdev;
  277. int type;
  278. /* Teardown all streams */
  279. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  280. /* No struct video_device, but can have buffers allocated */
  281. if (type == CX18_ENC_STREAM_TYPE_TS) {
  282. if (cx->streams[type].dvb.enabled) {
  283. cx18_dvb_unregister(&cx->streams[type]);
  284. cx->streams[type].dvb.enabled = false;
  285. cx18_stream_free(&cx->streams[type]);
  286. }
  287. continue;
  288. }
  289. /* No struct video_device, but can have buffers allocated */
  290. if (type == CX18_ENC_STREAM_TYPE_IDX) {
  291. if (cx->stream_buffers[type] != 0) {
  292. cx->stream_buffers[type] = 0;
  293. cx18_stream_free(&cx->streams[type]);
  294. }
  295. continue;
  296. }
  297. /* If struct video_device exists, can have buffers allocated */
  298. vdev = cx->streams[type].video_dev;
  299. cx->streams[type].video_dev = NULL;
  300. if (vdev == NULL)
  301. continue;
  302. cx18_stream_free(&cx->streams[type]);
  303. /* Unregister or release device */
  304. if (unregister)
  305. video_unregister_device(vdev);
  306. else
  307. video_device_release(vdev);
  308. }
  309. }
  310. static void cx18_vbi_setup(struct cx18_stream *s)
  311. {
  312. struct cx18 *cx = s->cx;
  313. int raw = cx18_raw_vbi(cx);
  314. u32 data[CX2341X_MBOX_MAX_DATA];
  315. int lines;
  316. if (cx->is_60hz) {
  317. cx->vbi.count = 12;
  318. cx->vbi.start[0] = 10;
  319. cx->vbi.start[1] = 273;
  320. } else { /* PAL/SECAM */
  321. cx->vbi.count = 18;
  322. cx->vbi.start[0] = 6;
  323. cx->vbi.start[1] = 318;
  324. }
  325. /* setup VBI registers */
  326. if (raw)
  327. v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
  328. else
  329. v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
  330. /*
  331. * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
  332. * VBI when the first analog capture channel starts, as once it starts
  333. * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
  334. * (i.e. for the VBI capture channels). We also send it for each
  335. * analog capture channel anyway just to make sure we get the proper
  336. * behavior
  337. */
  338. if (raw) {
  339. lines = cx->vbi.count * 2;
  340. } else {
  341. /*
  342. * For 525/60 systems, according to the VIP 2 & BT.656 std:
  343. * The EAV RP code's Field bit toggles on line 4, a few lines
  344. * after the Vertcal Blank bit has already toggled.
  345. * Tell the encoder to capture 21-4+1=18 lines per field,
  346. * since we want lines 10 through 21.
  347. *
  348. * For 625/50 systems, according to the VIP 2 & BT.656 std:
  349. * The EAV RP code's Field bit toggles on line 1, a few lines
  350. * after the Vertcal Blank bit has already toggled.
  351. * (We've actually set the digitizer so that the Field bit
  352. * toggles on line 2.) Tell the encoder to capture 23-2+1=22
  353. * lines per field, since we want lines 6 through 23.
  354. */
  355. lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
  356. }
  357. data[0] = s->handle;
  358. /* Lines per field */
  359. data[1] = (lines / 2) | ((lines / 2) << 16);
  360. /* bytes per line */
  361. data[2] = (raw ? vbi_active_samples
  362. : (cx->is_60hz ? vbi_hblank_samples_60Hz
  363. : vbi_hblank_samples_50Hz));
  364. /* Every X number of frames a VBI interrupt arrives
  365. (frames as in 25 or 30 fps) */
  366. data[3] = 1;
  367. /*
  368. * Set the SAV/EAV RP codes to look for as start/stop points
  369. * when in VIP-1.1 mode
  370. */
  371. if (raw) {
  372. /*
  373. * Start codes for beginning of "active" line in vertical blank
  374. * 0x20 ( VerticalBlank )
  375. * 0x60 ( EvenField VerticalBlank )
  376. */
  377. data[4] = 0x20602060;
  378. /*
  379. * End codes for end of "active" raw lines and regular lines
  380. * 0x30 ( VerticalBlank HorizontalBlank)
  381. * 0x70 ( EvenField VerticalBlank HorizontalBlank)
  382. * 0x90 (Task HorizontalBlank)
  383. * 0xd0 (Task EvenField HorizontalBlank)
  384. */
  385. data[5] = 0x307090d0;
  386. } else {
  387. /*
  388. * End codes for active video, we want data in the hblank region
  389. * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
  390. * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
  391. *
  392. * Since the V bit is only allowed to toggle in the EAV RP code,
  393. * just before the first active region line, these two
  394. * are problematic:
  395. * 0x90 (Task HorizontalBlank)
  396. * 0xd0 (Task EvenField HorizontalBlank)
  397. *
  398. * We have set the digitzer such that we don't have to worry
  399. * about these problem codes.
  400. */
  401. data[4] = 0xB0F0B0F0;
  402. /*
  403. * Start codes for beginning of active line in vertical blank
  404. * 0xa0 (Task VerticalBlank )
  405. * 0xe0 (Task EvenField VerticalBlank )
  406. */
  407. data[5] = 0xA0E0A0E0;
  408. }
  409. CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
  410. data[0], data[1], data[2], data[3], data[4], data[5]);
  411. cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
  412. }
  413. void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
  414. {
  415. struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  416. struct cx18_mdl *mdl;
  417. if (!cx18_stream_enabled(s))
  418. return;
  419. /* Return if the firmware is not running low on MDLs */
  420. if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
  421. CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
  422. return;
  423. /* Return if there are no MDLs to rotate back to the firmware */
  424. if (atomic_read(&s->q_full.depth) < 2)
  425. return;
  426. /*
  427. * Take the oldest IDX MDL still holding data, and discard its index
  428. * entries by scheduling the MDL to go back to the firmware
  429. */
  430. mdl = cx18_dequeue(s, &s->q_full);
  431. if (mdl != NULL)
  432. cx18_enqueue(s, mdl, &s->q_free);
  433. }
  434. static
  435. struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
  436. struct cx18_mdl *mdl)
  437. {
  438. struct cx18 *cx = s->cx;
  439. struct cx18_queue *q;
  440. /* Don't give it to the firmware, if we're not running a capture */
  441. if (s->handle == CX18_INVALID_TASK_HANDLE ||
  442. test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
  443. !test_bit(CX18_F_S_STREAMING, &s->s_flags))
  444. return cx18_enqueue(s, mdl, &s->q_free);
  445. q = cx18_enqueue(s, mdl, &s->q_busy);
  446. if (q != &s->q_busy)
  447. return q; /* The firmware has the max MDLs it can handle */
  448. cx18_mdl_sync_for_device(s, mdl);
  449. cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
  450. (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
  451. s->bufs_per_mdl, mdl->id, s->mdl_size);
  452. return q;
  453. }
  454. static
  455. void _cx18_stream_load_fw_queue(struct cx18_stream *s)
  456. {
  457. struct cx18_queue *q;
  458. struct cx18_mdl *mdl;
  459. if (atomic_read(&s->q_free.depth) == 0 ||
  460. atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
  461. return;
  462. /* Move from q_free to q_busy notifying the firmware, until the limit */
  463. do {
  464. mdl = cx18_dequeue(s, &s->q_free);
  465. if (mdl == NULL)
  466. break;
  467. q = _cx18_stream_put_mdl_fw(s, mdl);
  468. } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
  469. && q == &s->q_busy);
  470. }
  471. void cx18_out_work_handler(struct work_struct *work)
  472. {
  473. struct cx18_stream *s =
  474. container_of(work, struct cx18_stream, out_work_order);
  475. _cx18_stream_load_fw_queue(s);
  476. }
  477. static void cx18_stream_configure_mdls(struct cx18_stream *s)
  478. {
  479. cx18_unload_queues(s);
  480. switch (s->type) {
  481. case CX18_ENC_STREAM_TYPE_YUV:
  482. /*
  483. * Height should be a multiple of 32 lines.
  484. * Set the MDL size to the exact size needed for one frame.
  485. * Use enough buffers per MDL to cover the MDL size
  486. */
  487. s->mdl_size = 720 * s->cx->params.height * 3 / 2;
  488. s->bufs_per_mdl = s->mdl_size / s->buf_size;
  489. if (s->mdl_size % s->buf_size)
  490. s->bufs_per_mdl++;
  491. break;
  492. case CX18_ENC_STREAM_TYPE_VBI:
  493. s->bufs_per_mdl = 1;
  494. if (cx18_raw_vbi(s->cx)) {
  495. s->mdl_size = (s->cx->is_60hz ? 12 : 18)
  496. * 2 * vbi_active_samples;
  497. } else {
  498. /*
  499. * See comment in cx18_vbi_setup() below about the
  500. * extra lines we capture in sliced VBI mode due to
  501. * the lines on which EAV RP codes toggle.
  502. */
  503. s->mdl_size = s->cx->is_60hz
  504. ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz
  505. : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz;
  506. }
  507. break;
  508. default:
  509. s->bufs_per_mdl = 1;
  510. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  511. break;
  512. }
  513. cx18_load_queues(s);
  514. }
  515. int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
  516. {
  517. u32 data[MAX_MB_ARGUMENTS];
  518. struct cx18 *cx = s->cx;
  519. int captype = 0;
  520. struct cx18_api_func_private priv;
  521. struct cx18_stream *s_idx;
  522. if (!cx18_stream_enabled(s))
  523. return -EINVAL;
  524. CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
  525. switch (s->type) {
  526. case CX18_ENC_STREAM_TYPE_MPG:
  527. captype = CAPTURE_CHANNEL_TYPE_MPEG;
  528. cx->mpg_data_received = cx->vbi_data_inserted = 0;
  529. cx->dualwatch_jiffies = jiffies;
  530. cx->dualwatch_stereo_mode = cx->params.audio_properties & 0x300;
  531. cx->search_pack_header = 0;
  532. break;
  533. case CX18_ENC_STREAM_TYPE_IDX:
  534. captype = CAPTURE_CHANNEL_TYPE_INDEX;
  535. break;
  536. case CX18_ENC_STREAM_TYPE_TS:
  537. captype = CAPTURE_CHANNEL_TYPE_TS;
  538. break;
  539. case CX18_ENC_STREAM_TYPE_YUV:
  540. captype = CAPTURE_CHANNEL_TYPE_YUV;
  541. break;
  542. case CX18_ENC_STREAM_TYPE_PCM:
  543. captype = CAPTURE_CHANNEL_TYPE_PCM;
  544. break;
  545. case CX18_ENC_STREAM_TYPE_VBI:
  546. #ifdef CX18_ENCODER_PARSES_SLICED
  547. captype = cx18_raw_vbi(cx) ?
  548. CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
  549. #else
  550. /*
  551. * Currently we set things up so that Sliced VBI from the
  552. * digitizer is handled as Raw VBI by the encoder
  553. */
  554. captype = CAPTURE_CHANNEL_TYPE_VBI;
  555. #endif
  556. cx->vbi.frame = 0;
  557. cx->vbi.inserted_frame = 0;
  558. memset(cx->vbi.sliced_mpeg_size,
  559. 0, sizeof(cx->vbi.sliced_mpeg_size));
  560. break;
  561. default:
  562. return -EINVAL;
  563. }
  564. /* Clear Streamoff flags in case left from last capture */
  565. clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
  566. cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
  567. s->handle = data[0];
  568. cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
  569. /*
  570. * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
  571. * set up all the parameters, as it is not obvious which parameters the
  572. * firmware shares across capture channel types and which it does not.
  573. *
  574. * Some of the cx18_vapi() calls below apply to only certain capture
  575. * channel types. We're hoping there's no harm in calling most of them
  576. * anyway, as long as the values are all consistent. Setting some
  577. * shared parameters will have no effect once an analog capture channel
  578. * has started streaming.
  579. */
  580. if (captype != CAPTURE_CHANNEL_TYPE_TS) {
  581. cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
  582. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
  583. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
  584. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
  585. /*
  586. * Audio related reset according to
  587. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  588. */
  589. if (atomic_read(&cx->ana_capturing) == 0)
  590. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
  591. s->handle, 12);
  592. /*
  593. * Number of lines for Field 1 & Field 2 according to
  594. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  595. * Field 1 is 312 for 625 line systems in BT.656
  596. * Field 2 is 313 for 625 line systems in BT.656
  597. */
  598. cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
  599. s->handle, 312, 313);
  600. if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
  601. cx18_vbi_setup(s);
  602. /*
  603. * Select to receive I, P, and B frame index entries, if the
  604. * index stream is enabled. Otherwise disable index entry
  605. * generation.
  606. */
  607. s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  608. cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
  609. s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
  610. /* Call out to the common CX2341x API setup for user controls */
  611. priv.cx = cx;
  612. priv.s = s;
  613. cx2341x_update(&priv, cx18_api_func, NULL, &cx->params);
  614. /*
  615. * When starting a capture and we're set for radio,
  616. * ensure the video is muted, despite the user control.
  617. */
  618. if (!cx->params.video_mute &&
  619. test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
  620. cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
  621. (cx->params.video_mute_yuv << 8) | 1);
  622. }
  623. if (atomic_read(&cx->tot_capturing) == 0) {
  624. clear_bit(CX18_F_I_EOS, &cx->i_flags);
  625. cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
  626. }
  627. cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
  628. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
  629. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
  630. /* Init all the cpu_mdls for this stream */
  631. cx18_stream_configure_mdls(s);
  632. _cx18_stream_load_fw_queue(s);
  633. /* begin_capture */
  634. if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
  635. CX18_DEBUG_WARN("Error starting capture!\n");
  636. /* Ensure we're really not capturing before releasing MDLs */
  637. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  638. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  639. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
  640. else
  641. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  642. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  643. /* FIXME - CX18_F_S_STREAMOFF as well? */
  644. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  645. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  646. s->handle = CX18_INVALID_TASK_HANDLE;
  647. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  648. if (atomic_read(&cx->tot_capturing) == 0) {
  649. set_bit(CX18_F_I_EOS, &cx->i_flags);
  650. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  651. }
  652. return -EINVAL;
  653. }
  654. /* you're live! sit back and await interrupts :) */
  655. if (captype != CAPTURE_CHANNEL_TYPE_TS)
  656. atomic_inc(&cx->ana_capturing);
  657. atomic_inc(&cx->tot_capturing);
  658. return 0;
  659. }
  660. EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
  661. void cx18_stop_all_captures(struct cx18 *cx)
  662. {
  663. int i;
  664. for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
  665. struct cx18_stream *s = &cx->streams[i];
  666. if (!cx18_stream_enabled(s))
  667. continue;
  668. if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
  669. cx18_stop_v4l2_encode_stream(s, 0);
  670. }
  671. }
  672. int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
  673. {
  674. struct cx18 *cx = s->cx;
  675. unsigned long then;
  676. if (!cx18_stream_enabled(s))
  677. return -EINVAL;
  678. /* This function assumes that you are allowed to stop the capture
  679. and that we are actually capturing */
  680. CX18_DEBUG_INFO("Stop Capture\n");
  681. if (atomic_read(&cx->tot_capturing) == 0)
  682. return 0;
  683. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  684. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  685. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
  686. else
  687. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  688. then = jiffies;
  689. if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
  690. CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
  691. }
  692. if (s->type != CX18_ENC_STREAM_TYPE_TS)
  693. atomic_dec(&cx->ana_capturing);
  694. atomic_dec(&cx->tot_capturing);
  695. /* Clear capture and no-read bits */
  696. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  697. /* Tell the CX23418 it can't use our buffers anymore */
  698. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  699. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  700. s->handle = CX18_INVALID_TASK_HANDLE;
  701. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  702. if (atomic_read(&cx->tot_capturing) > 0)
  703. return 0;
  704. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  705. wake_up(&s->waitq);
  706. return 0;
  707. }
  708. EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
  709. u32 cx18_find_handle(struct cx18 *cx)
  710. {
  711. int i;
  712. /* find first available handle to be used for global settings */
  713. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  714. struct cx18_stream *s = &cx->streams[i];
  715. if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
  716. return s->handle;
  717. }
  718. return CX18_INVALID_TASK_HANDLE;
  719. }
  720. struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
  721. {
  722. int i;
  723. struct cx18_stream *s;
  724. if (handle == CX18_INVALID_TASK_HANDLE)
  725. return NULL;
  726. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  727. s = &cx->streams[i];
  728. if (s->handle != handle)
  729. continue;
  730. if (cx18_stream_enabled(s))
  731. return s;
  732. }
  733. return NULL;
  734. }