Kconfig 2.3 KB

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  1. if ARCH_TEGRA
  2. comment "NVIDIA Tegra options"
  3. config ARCH_TEGRA_2x_SOC
  4. bool "Enable support for Tegra20 family"
  5. select ARCH_REQUIRE_GPIOLIB
  6. select ARM_ERRATA_720789
  7. select ARM_ERRATA_742230
  8. select ARM_ERRATA_751472
  9. select ARM_ERRATA_754327
  10. select ARM_ERRATA_764369 if SMP
  11. select ARM_GIC
  12. select CPU_FREQ_TABLE if CPU_FREQ
  13. select CPU_V7
  14. select PINCTRL
  15. select PINCTRL_TEGRA20
  16. select PL310_ERRATA_727915 if CACHE_L2X0
  17. select PL310_ERRATA_769419 if CACHE_L2X0
  18. select USB_ARCH_HAS_EHCI if USB_SUPPORT
  19. select USB_ULPI if USB
  20. select USB_ULPI_VIEWPORT if USB_SUPPORT
  21. help
  22. Support for NVIDIA Tegra AP20 and T20 processors, based on the
  23. ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
  24. config ARCH_TEGRA_3x_SOC
  25. bool "Enable support for Tegra30 family"
  26. select ARCH_REQUIRE_GPIOLIB
  27. select ARM_ERRATA_743622
  28. select ARM_ERRATA_751472
  29. select ARM_ERRATA_754322
  30. select ARM_ERRATA_764369 if SMP
  31. select ARM_GIC
  32. select CPU_FREQ_TABLE if CPU_FREQ
  33. select CPU_V7
  34. select PINCTRL
  35. select PINCTRL_TEGRA30
  36. select PL310_ERRATA_769419 if CACHE_L2X0
  37. select USB_ARCH_HAS_EHCI if USB_SUPPORT
  38. select USB_ULPI if USB
  39. select USB_ULPI_VIEWPORT if USB_SUPPORT
  40. help
  41. Support for NVIDIA Tegra T30 processor family, based on the
  42. ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
  43. config TEGRA_PCI
  44. bool "PCI Express support"
  45. depends on ARCH_TEGRA_2x_SOC
  46. select PCI
  47. config TEGRA_AHB
  48. bool "Enable AHB driver for NVIDIA Tegra SoCs"
  49. default y
  50. help
  51. Adds AHB configuration functionality for NVIDIA Tegra SoCs,
  52. which controls AHB bus master arbitration and some
  53. perfomance parameters(priority, prefech size).
  54. choice
  55. prompt "Low-level debug console UART"
  56. config TEGRA_DEBUG_UART_AUTO_ODMDATA
  57. bool "Via ODMDATA"
  58. help
  59. Automatically determines which UART to use for low-level debug based
  60. on the ODMDATA value. This value is part of the BCT, and is written
  61. to the boot memory device using nvflash, or other flashing tool.
  62. When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
  63. 0/1/2/3/4 are UART A/B/C/D/E.
  64. config TEGRA_DEBUG_UARTA
  65. bool "UART-A"
  66. config TEGRA_DEBUG_UARTB
  67. bool "UART-B"
  68. config TEGRA_DEBUG_UARTC
  69. bool "UART-C"
  70. config TEGRA_DEBUG_UARTD
  71. bool "UART-D"
  72. config TEGRA_DEBUG_UARTE
  73. bool "UART-E"
  74. endchoice
  75. config TEGRA_EMC_SCALING_ENABLE
  76. bool "Enable scaling the memory frequency"
  77. endif