ide-dma.c 13 KB

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  1. /*
  2. * IDE DMA support (including IDE PCI BM-DMA).
  3. *
  4. * Copyright (C) 1995-1998 Mark Lord
  5. * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
  6. * Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz
  7. *
  8. * May be copied or modified under the terms of the GNU General Public License
  9. *
  10. * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
  11. */
  12. /*
  13. * Special Thanks to Mark for his Six years of work.
  14. */
  15. /*
  16. * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
  17. * fixing the problem with the BIOS on some Acer motherboards.
  18. *
  19. * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
  20. * "TX" chipset compatibility and for providing patches for the "TX" chipset.
  21. *
  22. * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
  23. * at generic DMA -- his patches were referred to when preparing this code.
  24. *
  25. * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
  26. * for supplying a Promise UDMA board & WD UDMA drive for this work!
  27. */
  28. #include <linux/types.h>
  29. #include <linux/kernel.h>
  30. #include <linux/ide.h>
  31. #include <linux/scatterlist.h>
  32. #include <linux/dma-mapping.h>
  33. static const struct drive_list_entry drive_whitelist[] = {
  34. { "Micropolis 2112A" , NULL },
  35. { "CONNER CTMA 4000" , NULL },
  36. { "CONNER CTT8000-A" , NULL },
  37. { "ST34342A" , NULL },
  38. { NULL , NULL }
  39. };
  40. static const struct drive_list_entry drive_blacklist[] = {
  41. { "WDC AC11000H" , NULL },
  42. { "WDC AC22100H" , NULL },
  43. { "WDC AC32500H" , NULL },
  44. { "WDC AC33100H" , NULL },
  45. { "WDC AC31600H" , NULL },
  46. { "WDC AC32100H" , "24.09P07" },
  47. { "WDC AC23200L" , "21.10N21" },
  48. { "Compaq CRD-8241B" , NULL },
  49. { "CRD-8400B" , NULL },
  50. { "CRD-8480B", NULL },
  51. { "CRD-8482B", NULL },
  52. { "CRD-84" , NULL },
  53. { "SanDisk SDP3B" , NULL },
  54. { "SanDisk SDP3B-64" , NULL },
  55. { "SANYO CD-ROM CRD" , NULL },
  56. { "HITACHI CDR-8" , NULL },
  57. { "HITACHI CDR-8335" , NULL },
  58. { "HITACHI CDR-8435" , NULL },
  59. { "Toshiba CD-ROM XM-6202B" , NULL },
  60. { "TOSHIBA CD-ROM XM-1702BC", NULL },
  61. { "CD-532E-A" , NULL },
  62. { "E-IDE CD-ROM CR-840", NULL },
  63. { "CD-ROM Drive/F5A", NULL },
  64. { "WPI CDD-820", NULL },
  65. { "SAMSUNG CD-ROM SC-148C", NULL },
  66. { "SAMSUNG CD-ROM SC", NULL },
  67. { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
  68. { "_NEC DV5800A", NULL },
  69. { "SAMSUNG CD-ROM SN-124", "N001" },
  70. { "Seagate STT20000A", NULL },
  71. { "CD-ROM CDR_U200", "1.09" },
  72. { NULL , NULL }
  73. };
  74. /**
  75. * ide_dma_intr - IDE DMA interrupt handler
  76. * @drive: the drive the interrupt is for
  77. *
  78. * Handle an interrupt completing a read/write DMA transfer on an
  79. * IDE device
  80. */
  81. ide_startstop_t ide_dma_intr(ide_drive_t *drive)
  82. {
  83. ide_hwif_t *hwif = drive->hwif;
  84. u8 stat = 0, dma_stat = 0;
  85. dma_stat = hwif->dma_ops->dma_end(drive);
  86. stat = hwif->tp_ops->read_status(hwif);
  87. if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) {
  88. if (!dma_stat) {
  89. struct ide_cmd *cmd = &hwif->cmd;
  90. ide_finish_cmd(drive, cmd, stat);
  91. return ide_stopped;
  92. }
  93. printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n",
  94. drive->name, __func__, dma_stat);
  95. }
  96. return ide_error(drive, "dma_intr", stat);
  97. }
  98. EXPORT_SYMBOL_GPL(ide_dma_intr);
  99. int ide_dma_good_drive(ide_drive_t *drive)
  100. {
  101. return ide_in_drive_list(drive->id, drive_whitelist);
  102. }
  103. /**
  104. * ide_build_sglist - map IDE scatter gather for DMA I/O
  105. * @drive: the drive to build the DMA table for
  106. * @rq: the request holding the sg list
  107. *
  108. * Perform the DMA mapping magic necessary to access the source or
  109. * target buffers of a request via DMA. The lower layers of the
  110. * kernel provide the necessary cache management so that we can
  111. * operate in a portable fashion.
  112. */
  113. int ide_build_sglist(ide_drive_t *drive, struct request *rq)
  114. {
  115. ide_hwif_t *hwif = drive->hwif;
  116. struct scatterlist *sg = hwif->sg_table;
  117. int i;
  118. ide_map_sg(drive, rq);
  119. if (rq_data_dir(rq) == READ)
  120. hwif->sg_dma_direction = DMA_FROM_DEVICE;
  121. else
  122. hwif->sg_dma_direction = DMA_TO_DEVICE;
  123. i = dma_map_sg(hwif->dev, sg, hwif->sg_nents, hwif->sg_dma_direction);
  124. if (i == 0)
  125. ide_map_sg(drive, rq);
  126. else {
  127. hwif->orig_sg_nents = hwif->sg_nents;
  128. hwif->sg_nents = i;
  129. }
  130. return i;
  131. }
  132. /**
  133. * ide_destroy_dmatable - clean up DMA mapping
  134. * @drive: The drive to unmap
  135. *
  136. * Teardown mappings after DMA has completed. This must be called
  137. * after the completion of each use of ide_build_dmatable and before
  138. * the next use of ide_build_dmatable. Failure to do so will cause
  139. * an oops as only one mapping can be live for each target at a given
  140. * time.
  141. */
  142. void ide_destroy_dmatable(ide_drive_t *drive)
  143. {
  144. ide_hwif_t *hwif = drive->hwif;
  145. dma_unmap_sg(hwif->dev, hwif->sg_table, hwif->orig_sg_nents,
  146. hwif->sg_dma_direction);
  147. }
  148. EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
  149. /**
  150. * ide_dma_off_quietly - Generic DMA kill
  151. * @drive: drive to control
  152. *
  153. * Turn off the current DMA on this IDE controller.
  154. */
  155. void ide_dma_off_quietly(ide_drive_t *drive)
  156. {
  157. drive->dev_flags &= ~IDE_DFLAG_USING_DMA;
  158. ide_toggle_bounce(drive, 0);
  159. drive->hwif->dma_ops->dma_host_set(drive, 0);
  160. }
  161. EXPORT_SYMBOL(ide_dma_off_quietly);
  162. /**
  163. * ide_dma_off - disable DMA on a device
  164. * @drive: drive to disable DMA on
  165. *
  166. * Disable IDE DMA for a device on this IDE controller.
  167. * Inform the user that DMA has been disabled.
  168. */
  169. void ide_dma_off(ide_drive_t *drive)
  170. {
  171. printk(KERN_INFO "%s: DMA disabled\n", drive->name);
  172. ide_dma_off_quietly(drive);
  173. }
  174. EXPORT_SYMBOL(ide_dma_off);
  175. /**
  176. * ide_dma_on - Enable DMA on a device
  177. * @drive: drive to enable DMA on
  178. *
  179. * Enable IDE DMA for a device on this IDE controller.
  180. */
  181. void ide_dma_on(ide_drive_t *drive)
  182. {
  183. drive->dev_flags |= IDE_DFLAG_USING_DMA;
  184. ide_toggle_bounce(drive, 1);
  185. drive->hwif->dma_ops->dma_host_set(drive, 1);
  186. }
  187. int __ide_dma_bad_drive(ide_drive_t *drive)
  188. {
  189. u16 *id = drive->id;
  190. int blacklist = ide_in_drive_list(id, drive_blacklist);
  191. if (blacklist) {
  192. printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
  193. drive->name, (char *)&id[ATA_ID_PROD]);
  194. return blacklist;
  195. }
  196. return 0;
  197. }
  198. EXPORT_SYMBOL(__ide_dma_bad_drive);
  199. static const u8 xfer_mode_bases[] = {
  200. XFER_UDMA_0,
  201. XFER_MW_DMA_0,
  202. XFER_SW_DMA_0,
  203. };
  204. static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
  205. {
  206. u16 *id = drive->id;
  207. ide_hwif_t *hwif = drive->hwif;
  208. const struct ide_port_ops *port_ops = hwif->port_ops;
  209. unsigned int mask = 0;
  210. switch (base) {
  211. case XFER_UDMA_0:
  212. if ((id[ATA_ID_FIELD_VALID] & 4) == 0)
  213. break;
  214. if (port_ops && port_ops->udma_filter)
  215. mask = port_ops->udma_filter(drive);
  216. else
  217. mask = hwif->ultra_mask;
  218. mask &= id[ATA_ID_UDMA_MODES];
  219. /*
  220. * avoid false cable warning from eighty_ninty_three()
  221. */
  222. if (req_mode > XFER_UDMA_2) {
  223. if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
  224. mask &= 0x07;
  225. }
  226. break;
  227. case XFER_MW_DMA_0:
  228. if ((id[ATA_ID_FIELD_VALID] & 2) == 0)
  229. break;
  230. if (port_ops && port_ops->mdma_filter)
  231. mask = port_ops->mdma_filter(drive);
  232. else
  233. mask = hwif->mwdma_mask;
  234. mask &= id[ATA_ID_MWDMA_MODES];
  235. break;
  236. case XFER_SW_DMA_0:
  237. if (id[ATA_ID_FIELD_VALID] & 2) {
  238. mask = id[ATA_ID_SWDMA_MODES] & hwif->swdma_mask;
  239. } else if (id[ATA_ID_OLD_DMA_MODES] >> 8) {
  240. u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8;
  241. /*
  242. * if the mode is valid convert it to the mask
  243. * (the maximum allowed mode is XFER_SW_DMA_2)
  244. */
  245. if (mode <= 2)
  246. mask = ((2 << mode) - 1) & hwif->swdma_mask;
  247. }
  248. break;
  249. default:
  250. BUG();
  251. break;
  252. }
  253. return mask;
  254. }
  255. /**
  256. * ide_find_dma_mode - compute DMA speed
  257. * @drive: IDE device
  258. * @req_mode: requested mode
  259. *
  260. * Checks the drive/host capabilities and finds the speed to use for
  261. * the DMA transfer. The speed is then limited by the requested mode.
  262. *
  263. * Returns 0 if the drive/host combination is incapable of DMA transfers
  264. * or if the requested mode is not a DMA mode.
  265. */
  266. u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
  267. {
  268. ide_hwif_t *hwif = drive->hwif;
  269. unsigned int mask;
  270. int x, i;
  271. u8 mode = 0;
  272. if (drive->media != ide_disk) {
  273. if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
  274. return 0;
  275. }
  276. for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
  277. if (req_mode < xfer_mode_bases[i])
  278. continue;
  279. mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
  280. x = fls(mask) - 1;
  281. if (x >= 0) {
  282. mode = xfer_mode_bases[i] + x;
  283. break;
  284. }
  285. }
  286. if (hwif->chipset == ide_acorn && mode == 0) {
  287. /*
  288. * is this correct?
  289. */
  290. if (ide_dma_good_drive(drive) &&
  291. drive->id[ATA_ID_EIDE_DMA_TIME] < 150)
  292. mode = XFER_MW_DMA_1;
  293. }
  294. mode = min(mode, req_mode);
  295. printk(KERN_INFO "%s: %s mode selected\n", drive->name,
  296. mode ? ide_xfer_verbose(mode) : "no DMA");
  297. return mode;
  298. }
  299. EXPORT_SYMBOL_GPL(ide_find_dma_mode);
  300. static int ide_tune_dma(ide_drive_t *drive)
  301. {
  302. ide_hwif_t *hwif = drive->hwif;
  303. u8 speed;
  304. if (ata_id_has_dma(drive->id) == 0 ||
  305. (drive->dev_flags & IDE_DFLAG_NODMA))
  306. return 0;
  307. /* consult the list of known "bad" drives */
  308. if (__ide_dma_bad_drive(drive))
  309. return 0;
  310. if (ide_id_dma_bug(drive))
  311. return 0;
  312. if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
  313. return config_drive_for_dma(drive);
  314. speed = ide_max_dma_mode(drive);
  315. if (!speed)
  316. return 0;
  317. if (ide_set_dma_mode(drive, speed))
  318. return 0;
  319. return 1;
  320. }
  321. static int ide_dma_check(ide_drive_t *drive)
  322. {
  323. ide_hwif_t *hwif = drive->hwif;
  324. if (ide_tune_dma(drive))
  325. return 0;
  326. /* TODO: always do PIO fallback */
  327. if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
  328. return -1;
  329. ide_set_max_pio(drive);
  330. return -1;
  331. }
  332. int ide_id_dma_bug(ide_drive_t *drive)
  333. {
  334. u16 *id = drive->id;
  335. if (id[ATA_ID_FIELD_VALID] & 4) {
  336. if ((id[ATA_ID_UDMA_MODES] >> 8) &&
  337. (id[ATA_ID_MWDMA_MODES] >> 8))
  338. goto err_out;
  339. } else if (id[ATA_ID_FIELD_VALID] & 2) {
  340. if ((id[ATA_ID_MWDMA_MODES] >> 8) &&
  341. (id[ATA_ID_SWDMA_MODES] >> 8))
  342. goto err_out;
  343. }
  344. return 0;
  345. err_out:
  346. printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name);
  347. return 1;
  348. }
  349. int ide_set_dma(ide_drive_t *drive)
  350. {
  351. int rc;
  352. /*
  353. * Force DMAing for the beginning of the check.
  354. * Some chipsets appear to do interesting
  355. * things, if not checked and cleared.
  356. * PARANOIA!!!
  357. */
  358. ide_dma_off_quietly(drive);
  359. rc = ide_dma_check(drive);
  360. if (rc)
  361. return rc;
  362. ide_dma_on(drive);
  363. return 0;
  364. }
  365. void ide_check_dma_crc(ide_drive_t *drive)
  366. {
  367. u8 mode;
  368. ide_dma_off_quietly(drive);
  369. drive->crc_count = 0;
  370. mode = drive->current_speed;
  371. /*
  372. * Don't try non Ultra-DMA modes without iCRC's. Force the
  373. * device to PIO and make the user enable SWDMA/MWDMA modes.
  374. */
  375. if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7)
  376. mode--;
  377. else
  378. mode = XFER_PIO_4;
  379. ide_set_xfer_rate(drive, mode);
  380. if (drive->current_speed >= XFER_SW_DMA_0)
  381. ide_dma_on(drive);
  382. }
  383. void ide_dma_lost_irq(ide_drive_t *drive)
  384. {
  385. printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name);
  386. }
  387. EXPORT_SYMBOL_GPL(ide_dma_lost_irq);
  388. void ide_dma_timeout(ide_drive_t *drive)
  389. {
  390. ide_hwif_t *hwif = drive->hwif;
  391. printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
  392. if (hwif->dma_ops->dma_test_irq(drive))
  393. return;
  394. ide_dump_status(drive, "DMA timeout", hwif->tp_ops->read_status(hwif));
  395. hwif->dma_ops->dma_end(drive);
  396. }
  397. EXPORT_SYMBOL_GPL(ide_dma_timeout);
  398. /*
  399. * un-busy the port etc, and clear any pending DMA status. we want to
  400. * retry the current request in pio mode instead of risking tossing it
  401. * all away
  402. */
  403. ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
  404. {
  405. ide_hwif_t *hwif = drive->hwif;
  406. struct request *rq;
  407. ide_startstop_t ret = ide_stopped;
  408. /*
  409. * end current dma transaction
  410. */
  411. if (error < 0) {
  412. printk(KERN_WARNING "%s: DMA timeout error\n", drive->name);
  413. (void)hwif->dma_ops->dma_end(drive);
  414. ret = ide_error(drive, "dma timeout error",
  415. hwif->tp_ops->read_status(hwif));
  416. } else {
  417. printk(KERN_WARNING "%s: DMA timeout retry\n", drive->name);
  418. hwif->dma_ops->dma_timeout(drive);
  419. }
  420. /*
  421. * disable dma for now, but remember that we did so because of
  422. * a timeout -- we'll reenable after we finish this next request
  423. * (or rather the first chunk of it) in pio.
  424. */
  425. drive->dev_flags |= IDE_DFLAG_DMA_PIO_RETRY;
  426. drive->retry_pio++;
  427. ide_dma_off_quietly(drive);
  428. /*
  429. * un-busy drive etc and make sure request is sane
  430. */
  431. rq = hwif->rq;
  432. if (!rq)
  433. goto out;
  434. hwif->rq = NULL;
  435. rq->errors = 0;
  436. if (!rq->bio)
  437. goto out;
  438. rq->sector = rq->bio->bi_sector;
  439. rq->current_nr_sectors = bio_iovec(rq->bio)->bv_len >> 9;
  440. rq->hard_cur_sectors = rq->current_nr_sectors;
  441. rq->buffer = bio_data(rq->bio);
  442. out:
  443. return ret;
  444. }
  445. void ide_release_dma_engine(ide_hwif_t *hwif)
  446. {
  447. if (hwif->dmatable_cpu) {
  448. int prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
  449. dma_free_coherent(hwif->dev, prd_size,
  450. hwif->dmatable_cpu, hwif->dmatable_dma);
  451. hwif->dmatable_cpu = NULL;
  452. }
  453. }
  454. EXPORT_SYMBOL_GPL(ide_release_dma_engine);
  455. int ide_allocate_dma_engine(ide_hwif_t *hwif)
  456. {
  457. int prd_size;
  458. if (hwif->prd_max_nents == 0)
  459. hwif->prd_max_nents = PRD_ENTRIES;
  460. if (hwif->prd_ent_size == 0)
  461. hwif->prd_ent_size = PRD_BYTES;
  462. prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
  463. hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size,
  464. &hwif->dmatable_dma,
  465. GFP_ATOMIC);
  466. if (hwif->dmatable_cpu == NULL) {
  467. printk(KERN_ERR "%s: unable to allocate PRD table\n",
  468. hwif->name);
  469. return -ENOMEM;
  470. }
  471. return 0;
  472. }
  473. EXPORT_SYMBOL_GPL(ide_allocate_dma_engine);