fsl_ocp.h 1.4 KB

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  1. /*
  2. * include/asm-ppc/fsl_ocp.h
  3. *
  4. * Definitions for the on-chip peripherals on Freescale PPC processors
  5. *
  6. * Maintainer: Kumar Gala (kumar.gala@freescale.com)
  7. *
  8. * Copyright 2004 Freescale Semiconductor, Inc
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. */
  15. #ifdef __KERNEL__
  16. #ifndef __ASM_FS_OCP_H__
  17. #define __ASM_FS_OCP_H__
  18. /* A table of information for supporting the Gianfar Ethernet Controller
  19. * This helps identify which enet controller we are dealing with,
  20. * and what type of enet controller it is
  21. */
  22. struct ocp_gfar_data {
  23. uint interruptTransmit;
  24. uint interruptError;
  25. uint interruptReceive;
  26. uint interruptPHY;
  27. uint flags;
  28. uint phyid;
  29. uint phyregidx;
  30. unsigned char mac_addr[6];
  31. };
  32. /* Flags in the flags field */
  33. #define GFAR_HAS_COALESCE 0x20
  34. #define GFAR_HAS_RMON 0x10
  35. #define GFAR_HAS_MULTI_INTR 0x08
  36. #define GFAR_FIRM_SET_MACADDR 0x04
  37. #define GFAR_HAS_PHY_INTR 0x02 /* if not set use a timer */
  38. #define GFAR_HAS_GIGABIT 0x01
  39. /* Data structure for I2C support. Just contains a couple flags
  40. * to distinguish various I2C implementations*/
  41. struct ocp_fs_i2c_data {
  42. uint flags;
  43. };
  44. /* Flags for I2C */
  45. #define FS_I2C_SEPARATE_DFSRR 0x02
  46. #define FS_I2C_CLOCK_5200 0x01
  47. #endif /* __ASM_FS_OCP_H__ */
  48. #endif /* __KERNEL__ */