indirect_pci.c 3.2 KB

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  1. /*
  2. * Support for indirect PCI bridges.
  3. *
  4. * Copyright (C) 1998 Gabriel Paubert.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/pci.h>
  13. #include <linux/delay.h>
  14. #include <linux/string.h>
  15. #include <linux/init.h>
  16. #include <linux/bootmem.h>
  17. #include <asm/io.h>
  18. #include <asm/prom.h>
  19. #include <asm/pci-bridge.h>
  20. #include <asm/machdep.h>
  21. #ifdef CONFIG_PPC_INDIRECT_PCI_BE
  22. #define PCI_CFG_OUT out_be32
  23. #else
  24. #define PCI_CFG_OUT out_le32
  25. #endif
  26. static int
  27. indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
  28. int len, u32 *val)
  29. {
  30. struct pci_controller *hose = bus->sysdata;
  31. volatile void __iomem *cfg_data;
  32. u8 cfg_type = 0;
  33. if (ppc_md.pci_exclude_device)
  34. if (ppc_md.pci_exclude_device(bus->number, devfn))
  35. return PCIBIOS_DEVICE_NOT_FOUND;
  36. if (hose->set_cfg_type)
  37. if (bus->number != hose->first_busno)
  38. cfg_type = 1;
  39. PCI_CFG_OUT(hose->cfg_addr,
  40. (0x80000000 | ((bus->number - hose->bus_offset) << 16)
  41. | (devfn << 8) | ((offset & 0xfc) | cfg_type)));
  42. /*
  43. * Note: the caller has already checked that offset is
  44. * suitably aligned and that len is 1, 2 or 4.
  45. */
  46. cfg_data = hose->cfg_data + (offset & 3);
  47. switch (len) {
  48. case 1:
  49. *val = in_8(cfg_data);
  50. break;
  51. case 2:
  52. *val = in_le16(cfg_data);
  53. break;
  54. default:
  55. *val = in_le32(cfg_data);
  56. break;
  57. }
  58. return PCIBIOS_SUCCESSFUL;
  59. }
  60. static int
  61. indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
  62. int len, u32 val)
  63. {
  64. struct pci_controller *hose = bus->sysdata;
  65. volatile void __iomem *cfg_data;
  66. u8 cfg_type = 0;
  67. if (ppc_md.pci_exclude_device)
  68. if (ppc_md.pci_exclude_device(bus->number, devfn))
  69. return PCIBIOS_DEVICE_NOT_FOUND;
  70. if (hose->set_cfg_type)
  71. if (bus->number != hose->first_busno)
  72. cfg_type = 1;
  73. PCI_CFG_OUT(hose->cfg_addr,
  74. (0x80000000 | ((bus->number - hose->bus_offset) << 16)
  75. | (devfn << 8) | ((offset & 0xfc) | cfg_type)));
  76. /*
  77. * Note: the caller has already checked that offset is
  78. * suitably aligned and that len is 1, 2 or 4.
  79. */
  80. cfg_data = hose->cfg_data + (offset & 3);
  81. switch (len) {
  82. case 1:
  83. out_8(cfg_data, val);
  84. break;
  85. case 2:
  86. out_le16(cfg_data, val);
  87. break;
  88. default:
  89. out_le32(cfg_data, val);
  90. break;
  91. }
  92. return PCIBIOS_SUCCESSFUL;
  93. }
  94. static struct pci_ops indirect_pci_ops =
  95. {
  96. indirect_read_config,
  97. indirect_write_config
  98. };
  99. void __init
  100. setup_indirect_pci_nomap(struct pci_controller* hose, void __iomem * cfg_addr,
  101. void __iomem * cfg_data)
  102. {
  103. hose->cfg_addr = cfg_addr;
  104. hose->cfg_data = cfg_data;
  105. hose->ops = &indirect_pci_ops;
  106. }
  107. void __init
  108. setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
  109. {
  110. unsigned long base = cfg_addr & PAGE_MASK;
  111. void __iomem *mbase, *addr, *data;
  112. mbase = ioremap(base, PAGE_SIZE);
  113. addr = mbase + (cfg_addr & ~PAGE_MASK);
  114. if ((cfg_data & PAGE_MASK) != base)
  115. mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE);
  116. data = mbase + (cfg_data & ~PAGE_MASK);
  117. setup_indirect_pci_nomap(hose, addr, data);
  118. }