pcbios.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487
  1. /*
  2. * BIOS32 and PCI BIOS handling.
  3. */
  4. #include <linux/pci.h>
  5. #include <linux/init.h>
  6. #include "pci.h"
  7. #include "pci-functions.h"
  8. /* BIOS32 signature: "_32_" */
  9. #define BIOS32_SIGNATURE (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24))
  10. /* PCI signature: "PCI " */
  11. #define PCI_SIGNATURE (('P' << 0) + ('C' << 8) + ('I' << 16) + (' ' << 24))
  12. /* PCI service signature: "$PCI" */
  13. #define PCI_SERVICE (('$' << 0) + ('P' << 8) + ('C' << 16) + ('I' << 24))
  14. /* PCI BIOS hardware mechanism flags */
  15. #define PCIBIOS_HW_TYPE1 0x01
  16. #define PCIBIOS_HW_TYPE2 0x02
  17. #define PCIBIOS_HW_TYPE1_SPEC 0x10
  18. #define PCIBIOS_HW_TYPE2_SPEC 0x20
  19. /*
  20. * This is the standard structure used to identify the entry point
  21. * to the BIOS32 Service Directory, as documented in
  22. * Standard BIOS 32-bit Service Directory Proposal
  23. * Revision 0.4 May 24, 1993
  24. * Phoenix Technologies Ltd.
  25. * Norwood, MA
  26. * and the PCI BIOS specification.
  27. */
  28. union bios32 {
  29. struct {
  30. unsigned long signature; /* _32_ */
  31. unsigned long entry; /* 32 bit physical address */
  32. unsigned char revision; /* Revision level, 0 */
  33. unsigned char length; /* Length in paragraphs should be 01 */
  34. unsigned char checksum; /* All bytes must add up to zero */
  35. unsigned char reserved[5]; /* Must be zero */
  36. } fields;
  37. char chars[16];
  38. };
  39. /*
  40. * Physical address of the service directory. I don't know if we're
  41. * allowed to have more than one of these or not, so just in case
  42. * we'll make pcibios_present() take a memory start parameter and store
  43. * the array there.
  44. */
  45. static struct {
  46. unsigned long address;
  47. unsigned short segment;
  48. } bios32_indirect = { 0, __KERNEL_CS };
  49. /*
  50. * Returns the entry point for the given service, NULL on error
  51. */
  52. static unsigned long bios32_service(unsigned long service)
  53. {
  54. unsigned char return_code; /* %al */
  55. unsigned long address; /* %ebx */
  56. unsigned long length; /* %ecx */
  57. unsigned long entry; /* %edx */
  58. unsigned long flags;
  59. local_irq_save(flags);
  60. __asm__("lcall *(%%edi); cld"
  61. : "=a" (return_code),
  62. "=b" (address),
  63. "=c" (length),
  64. "=d" (entry)
  65. : "0" (service),
  66. "1" (0),
  67. "D" (&bios32_indirect));
  68. local_irq_restore(flags);
  69. switch (return_code) {
  70. case 0:
  71. return address + entry;
  72. case 0x80: /* Not present */
  73. printk(KERN_WARNING "bios32_service(0x%lx): not present\n", service);
  74. return 0;
  75. default: /* Shouldn't happen */
  76. printk(KERN_WARNING "bios32_service(0x%lx): returned 0x%x -- BIOS bug!\n",
  77. service, return_code);
  78. return 0;
  79. }
  80. }
  81. static struct {
  82. unsigned long address;
  83. unsigned short segment;
  84. } pci_indirect = { 0, __KERNEL_CS };
  85. static int pci_bios_present;
  86. static int __devinit check_pcibios(void)
  87. {
  88. u32 signature, eax, ebx, ecx;
  89. u8 status, major_ver, minor_ver, hw_mech;
  90. unsigned long flags, pcibios_entry;
  91. if ((pcibios_entry = bios32_service(PCI_SERVICE))) {
  92. pci_indirect.address = pcibios_entry + PAGE_OFFSET;
  93. local_irq_save(flags);
  94. __asm__(
  95. "lcall *(%%edi); cld\n\t"
  96. "jc 1f\n\t"
  97. "xor %%ah, %%ah\n"
  98. "1:"
  99. : "=d" (signature),
  100. "=a" (eax),
  101. "=b" (ebx),
  102. "=c" (ecx)
  103. : "1" (PCIBIOS_PCI_BIOS_PRESENT),
  104. "D" (&pci_indirect)
  105. : "memory");
  106. local_irq_restore(flags);
  107. status = (eax >> 8) & 0xff;
  108. hw_mech = eax & 0xff;
  109. major_ver = (ebx >> 8) & 0xff;
  110. minor_ver = ebx & 0xff;
  111. if (pcibios_last_bus < 0)
  112. pcibios_last_bus = ecx & 0xff;
  113. DBG("PCI: BIOS probe returned s=%02x hw=%02x ver=%02x.%02x l=%02x\n",
  114. status, hw_mech, major_ver, minor_ver, pcibios_last_bus);
  115. if (status || signature != PCI_SIGNATURE) {
  116. printk (KERN_ERR "PCI: BIOS BUG #%x[%08x] found\n",
  117. status, signature);
  118. return 0;
  119. }
  120. printk(KERN_INFO "PCI: PCI BIOS revision %x.%02x entry at 0x%lx, last bus=%d\n",
  121. major_ver, minor_ver, pcibios_entry, pcibios_last_bus);
  122. #ifdef CONFIG_PCI_DIRECT
  123. if (!(hw_mech & PCIBIOS_HW_TYPE1))
  124. pci_probe &= ~PCI_PROBE_CONF1;
  125. if (!(hw_mech & PCIBIOS_HW_TYPE2))
  126. pci_probe &= ~PCI_PROBE_CONF2;
  127. #endif
  128. return 1;
  129. }
  130. return 0;
  131. }
  132. static int __devinit pci_bios_find_device (unsigned short vendor, unsigned short device_id,
  133. unsigned short index, unsigned char *bus, unsigned char *device_fn)
  134. {
  135. unsigned short bx;
  136. unsigned short ret;
  137. __asm__("lcall *(%%edi); cld\n\t"
  138. "jc 1f\n\t"
  139. "xor %%ah, %%ah\n"
  140. "1:"
  141. : "=b" (bx),
  142. "=a" (ret)
  143. : "1" (PCIBIOS_FIND_PCI_DEVICE),
  144. "c" (device_id),
  145. "d" (vendor),
  146. "S" ((int) index),
  147. "D" (&pci_indirect));
  148. *bus = (bx >> 8) & 0xff;
  149. *device_fn = bx & 0xff;
  150. return (int) (ret & 0xff00) >> 8;
  151. }
  152. static int pci_bios_read(unsigned int seg, unsigned int bus,
  153. unsigned int devfn, int reg, int len, u32 *value)
  154. {
  155. unsigned long result = 0;
  156. unsigned long flags;
  157. unsigned long bx = (bus << 8) | devfn;
  158. if (!value || (bus > 255) || (devfn > 255) || (reg > 255))
  159. return -EINVAL;
  160. spin_lock_irqsave(&pci_config_lock, flags);
  161. switch (len) {
  162. case 1:
  163. __asm__("lcall *(%%esi); cld\n\t"
  164. "jc 1f\n\t"
  165. "xor %%ah, %%ah\n"
  166. "1:"
  167. : "=c" (*value),
  168. "=a" (result)
  169. : "1" (PCIBIOS_READ_CONFIG_BYTE),
  170. "b" (bx),
  171. "D" ((long)reg),
  172. "S" (&pci_indirect));
  173. break;
  174. case 2:
  175. __asm__("lcall *(%%esi); cld\n\t"
  176. "jc 1f\n\t"
  177. "xor %%ah, %%ah\n"
  178. "1:"
  179. : "=c" (*value),
  180. "=a" (result)
  181. : "1" (PCIBIOS_READ_CONFIG_WORD),
  182. "b" (bx),
  183. "D" ((long)reg),
  184. "S" (&pci_indirect));
  185. break;
  186. case 4:
  187. __asm__("lcall *(%%esi); cld\n\t"
  188. "jc 1f\n\t"
  189. "xor %%ah, %%ah\n"
  190. "1:"
  191. : "=c" (*value),
  192. "=a" (result)
  193. : "1" (PCIBIOS_READ_CONFIG_DWORD),
  194. "b" (bx),
  195. "D" ((long)reg),
  196. "S" (&pci_indirect));
  197. break;
  198. }
  199. spin_unlock_irqrestore(&pci_config_lock, flags);
  200. return (int)((result & 0xff00) >> 8);
  201. }
  202. static int pci_bios_write(unsigned int seg, unsigned int bus,
  203. unsigned int devfn, int reg, int len, u32 value)
  204. {
  205. unsigned long result = 0;
  206. unsigned long flags;
  207. unsigned long bx = (bus << 8) | devfn;
  208. if ((bus > 255) || (devfn > 255) || (reg > 255))
  209. return -EINVAL;
  210. spin_lock_irqsave(&pci_config_lock, flags);
  211. switch (len) {
  212. case 1:
  213. __asm__("lcall *(%%esi); cld\n\t"
  214. "jc 1f\n\t"
  215. "xor %%ah, %%ah\n"
  216. "1:"
  217. : "=a" (result)
  218. : "0" (PCIBIOS_WRITE_CONFIG_BYTE),
  219. "c" (value),
  220. "b" (bx),
  221. "D" ((long)reg),
  222. "S" (&pci_indirect));
  223. break;
  224. case 2:
  225. __asm__("lcall *(%%esi); cld\n\t"
  226. "jc 1f\n\t"
  227. "xor %%ah, %%ah\n"
  228. "1:"
  229. : "=a" (result)
  230. : "0" (PCIBIOS_WRITE_CONFIG_WORD),
  231. "c" (value),
  232. "b" (bx),
  233. "D" ((long)reg),
  234. "S" (&pci_indirect));
  235. break;
  236. case 4:
  237. __asm__("lcall *(%%esi); cld\n\t"
  238. "jc 1f\n\t"
  239. "xor %%ah, %%ah\n"
  240. "1:"
  241. : "=a" (result)
  242. : "0" (PCIBIOS_WRITE_CONFIG_DWORD),
  243. "c" (value),
  244. "b" (bx),
  245. "D" ((long)reg),
  246. "S" (&pci_indirect));
  247. break;
  248. }
  249. spin_unlock_irqrestore(&pci_config_lock, flags);
  250. return (int)((result & 0xff00) >> 8);
  251. }
  252. /*
  253. * Function table for BIOS32 access
  254. */
  255. static struct pci_raw_ops pci_bios_access = {
  256. .read = pci_bios_read,
  257. .write = pci_bios_write
  258. };
  259. /*
  260. * Try to find PCI BIOS.
  261. */
  262. static struct pci_raw_ops * __devinit pci_find_bios(void)
  263. {
  264. union bios32 *check;
  265. unsigned char sum;
  266. int i, length;
  267. /*
  268. * Follow the standard procedure for locating the BIOS32 Service
  269. * directory by scanning the permissible address range from
  270. * 0xe0000 through 0xfffff for a valid BIOS32 structure.
  271. */
  272. for (check = (union bios32 *) __va(0xe0000);
  273. check <= (union bios32 *) __va(0xffff0);
  274. ++check) {
  275. if (check->fields.signature != BIOS32_SIGNATURE)
  276. continue;
  277. length = check->fields.length * 16;
  278. if (!length)
  279. continue;
  280. sum = 0;
  281. for (i = 0; i < length ; ++i)
  282. sum += check->chars[i];
  283. if (sum != 0)
  284. continue;
  285. if (check->fields.revision != 0) {
  286. printk("PCI: unsupported BIOS32 revision %d at 0x%p\n",
  287. check->fields.revision, check);
  288. continue;
  289. }
  290. DBG("PCI: BIOS32 Service Directory structure at 0x%p\n", check);
  291. if (check->fields.entry >= 0x100000) {
  292. printk("PCI: BIOS32 entry (0x%p) in high memory, cannot use.\n", check);
  293. return NULL;
  294. } else {
  295. unsigned long bios32_entry = check->fields.entry;
  296. DBG("PCI: BIOS32 Service Directory entry at 0x%lx\n", bios32_entry);
  297. bios32_indirect.address = bios32_entry + PAGE_OFFSET;
  298. if (check_pcibios())
  299. return &pci_bios_access;
  300. }
  301. break; /* Hopefully more than one BIOS32 cannot happen... */
  302. }
  303. return NULL;
  304. }
  305. /*
  306. * Sort the device list according to PCI BIOS. Nasty hack, but since some
  307. * fool forgot to define the `correct' device order in the PCI BIOS specs
  308. * and we want to be (possibly bug-to-bug ;-]) compatible with older kernels
  309. * which used BIOS ordering, we are bound to do this...
  310. */
  311. void __devinit pcibios_sort(void)
  312. {
  313. LIST_HEAD(sorted_devices);
  314. struct list_head *ln;
  315. struct pci_dev *dev, *d;
  316. int idx, found;
  317. unsigned char bus, devfn;
  318. DBG("PCI: Sorting device list...\n");
  319. while (!list_empty(&pci_devices)) {
  320. ln = pci_devices.next;
  321. dev = pci_dev_g(ln);
  322. idx = found = 0;
  323. while (pci_bios_find_device(dev->vendor, dev->device, idx, &bus, &devfn) == PCIBIOS_SUCCESSFUL) {
  324. idx++;
  325. list_for_each(ln, &pci_devices) {
  326. d = pci_dev_g(ln);
  327. if (d->bus->number == bus && d->devfn == devfn) {
  328. list_del(&d->global_list);
  329. list_add_tail(&d->global_list, &sorted_devices);
  330. if (d == dev)
  331. found = 1;
  332. break;
  333. }
  334. }
  335. if (ln == &pci_devices) {
  336. printk(KERN_WARNING "PCI: BIOS reporting unknown device %02x:%02x\n", bus, devfn);
  337. /*
  338. * We must not continue scanning as several buggy BIOSes
  339. * return garbage after the last device. Grr.
  340. */
  341. break;
  342. }
  343. }
  344. if (!found) {
  345. printk(KERN_WARNING "PCI: Device %s not found by BIOS\n",
  346. pci_name(dev));
  347. list_del(&dev->global_list);
  348. list_add_tail(&dev->global_list, &sorted_devices);
  349. }
  350. }
  351. list_splice(&sorted_devices, &pci_devices);
  352. }
  353. /*
  354. * BIOS Functions for IRQ Routing
  355. */
  356. struct irq_routing_options {
  357. u16 size;
  358. struct irq_info *table;
  359. u16 segment;
  360. } __attribute__((packed));
  361. struct irq_routing_table * __devinit pcibios_get_irq_routing_table(void)
  362. {
  363. struct irq_routing_options opt;
  364. struct irq_routing_table *rt = NULL;
  365. int ret, map;
  366. unsigned long page;
  367. if (!pci_bios_present)
  368. return NULL;
  369. page = __get_free_page(GFP_KERNEL);
  370. if (!page)
  371. return NULL;
  372. opt.table = (struct irq_info *) page;
  373. opt.size = PAGE_SIZE;
  374. opt.segment = __KERNEL_DS;
  375. DBG("PCI: Fetching IRQ routing table... ");
  376. __asm__("push %%es\n\t"
  377. "push %%ds\n\t"
  378. "pop %%es\n\t"
  379. "lcall *(%%esi); cld\n\t"
  380. "pop %%es\n\t"
  381. "jc 1f\n\t"
  382. "xor %%ah, %%ah\n"
  383. "1:"
  384. : "=a" (ret),
  385. "=b" (map),
  386. "=m" (opt)
  387. : "0" (PCIBIOS_GET_ROUTING_OPTIONS),
  388. "1" (0),
  389. "D" ((long) &opt),
  390. "S" (&pci_indirect),
  391. "m" (opt)
  392. : "memory");
  393. DBG("OK ret=%d, size=%d, map=%x\n", ret, opt.size, map);
  394. if (ret & 0xff00)
  395. printk(KERN_ERR "PCI: Error %02x when fetching IRQ routing table.\n", (ret >> 8) & 0xff);
  396. else if (opt.size) {
  397. rt = kmalloc(sizeof(struct irq_routing_table) + opt.size, GFP_KERNEL);
  398. if (rt) {
  399. memset(rt, 0, sizeof(struct irq_routing_table));
  400. rt->size = opt.size + sizeof(struct irq_routing_table);
  401. rt->exclusive_irqs = map;
  402. memcpy(rt->slots, (void *) page, opt.size);
  403. printk(KERN_INFO "PCI: Using BIOS Interrupt Routing Table\n");
  404. }
  405. }
  406. free_page(page);
  407. return rt;
  408. }
  409. int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq)
  410. {
  411. int ret;
  412. __asm__("lcall *(%%esi); cld\n\t"
  413. "jc 1f\n\t"
  414. "xor %%ah, %%ah\n"
  415. "1:"
  416. : "=a" (ret)
  417. : "0" (PCIBIOS_SET_PCI_HW_INT),
  418. "b" ((dev->bus->number << 8) | dev->devfn),
  419. "c" ((irq << 8) | (pin + 10)),
  420. "S" (&pci_indirect));
  421. return !(ret & 0xff00);
  422. }
  423. static int __init pci_pcbios_init(void)
  424. {
  425. if ((pci_probe & PCI_PROBE_BIOS)
  426. && ((raw_pci_ops = pci_find_bios()))) {
  427. pci_probe |= PCI_BIOS_SORT;
  428. pci_bios_present = 1;
  429. }
  430. return 0;
  431. }
  432. arch_initcall(pci_pcbios_init);