qla_mbx.c 106 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2011 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. #include <linux/gfp.h>
  10. /*
  11. * qla2x00_mailbox_command
  12. * Issue mailbox command and waits for completion.
  13. *
  14. * Input:
  15. * ha = adapter block pointer.
  16. * mcp = driver internal mbx struct pointer.
  17. *
  18. * Output:
  19. * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
  20. *
  21. * Returns:
  22. * 0 : QLA_SUCCESS = cmd performed success
  23. * 1 : QLA_FUNCTION_FAILED (error encountered)
  24. * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
  25. *
  26. * Context:
  27. * Kernel context.
  28. */
  29. static int
  30. qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
  31. {
  32. int rval;
  33. unsigned long flags = 0;
  34. device_reg_t __iomem *reg;
  35. uint8_t abort_active;
  36. uint8_t io_lock_on;
  37. uint16_t command = 0;
  38. uint16_t *iptr;
  39. uint16_t __iomem *optr;
  40. uint32_t cnt;
  41. uint32_t mboxes;
  42. unsigned long wait_time;
  43. struct qla_hw_data *ha = vha->hw;
  44. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  45. if (ha->pdev->error_state > pci_channel_io_frozen)
  46. return QLA_FUNCTION_TIMEOUT;
  47. if (vha->device_flags & DFLG_DEV_FAILED) {
  48. DEBUG2_3_11(qla_printk(KERN_WARNING, ha,
  49. "%s(%ld): Device in failed state, "
  50. "timeout MBX Exiting.\n",
  51. __func__, base_vha->host_no));
  52. return QLA_FUNCTION_TIMEOUT;
  53. }
  54. reg = ha->iobase;
  55. io_lock_on = base_vha->flags.init_done;
  56. rval = QLA_SUCCESS;
  57. abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  58. DEBUG11(printk("%s(%ld): entered.\n", __func__, base_vha->host_no));
  59. if (ha->flags.pci_channel_io_perm_failure) {
  60. DEBUG(printk("%s(%ld): Perm failure on EEH, timeout MBX "
  61. "Exiting.\n", __func__, vha->host_no));
  62. return QLA_FUNCTION_TIMEOUT;
  63. }
  64. if (ha->flags.isp82xx_fw_hung) {
  65. /* Setting Link-Down error */
  66. mcp->mb[0] = MBS_LINK_DOWN_ERROR;
  67. rval = QLA_FUNCTION_FAILED;
  68. goto premature_exit;
  69. }
  70. /*
  71. * Wait for active mailbox commands to finish by waiting at most tov
  72. * seconds. This is to serialize actual issuing of mailbox cmds during
  73. * non ISP abort time.
  74. */
  75. if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
  76. /* Timeout occurred. Return error. */
  77. DEBUG2_3_11(printk("%s(%ld): cmd access timeout. "
  78. "Exiting.\n", __func__, base_vha->host_no));
  79. return QLA_FUNCTION_TIMEOUT;
  80. }
  81. ha->flags.mbox_busy = 1;
  82. /* Save mailbox command for debug */
  83. ha->mcp = mcp;
  84. DEBUG11(printk("scsi(%ld): prepare to issue mbox cmd=0x%x.\n",
  85. base_vha->host_no, mcp->mb[0]));
  86. spin_lock_irqsave(&ha->hardware_lock, flags);
  87. /* Load mailbox registers. */
  88. if (IS_QLA82XX(ha))
  89. optr = (uint16_t __iomem *)&reg->isp82.mailbox_in[0];
  90. else if (IS_FWI2_CAPABLE(ha) && !IS_QLA82XX(ha))
  91. optr = (uint16_t __iomem *)&reg->isp24.mailbox0;
  92. else
  93. optr = (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 0);
  94. iptr = mcp->mb;
  95. command = mcp->mb[0];
  96. mboxes = mcp->out_mb;
  97. for (cnt = 0; cnt < ha->mbx_count; cnt++) {
  98. if (IS_QLA2200(ha) && cnt == 8)
  99. optr =
  100. (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 8);
  101. if (mboxes & BIT_0)
  102. WRT_REG_WORD(optr, *iptr);
  103. mboxes >>= 1;
  104. optr++;
  105. iptr++;
  106. }
  107. #if defined(QL_DEBUG_LEVEL_1)
  108. printk("%s(%ld): Loaded MBX registers (displayed in bytes) = \n",
  109. __func__, base_vha->host_no);
  110. qla2x00_dump_buffer((uint8_t *)mcp->mb, 16);
  111. printk("\n");
  112. qla2x00_dump_buffer(((uint8_t *)mcp->mb + 0x10), 16);
  113. printk("\n");
  114. qla2x00_dump_buffer(((uint8_t *)mcp->mb + 0x20), 8);
  115. printk("\n");
  116. printk("%s(%ld): I/O address = %p.\n", __func__, base_vha->host_no,
  117. optr);
  118. qla2x00_dump_regs(base_vha);
  119. #endif
  120. /* Issue set host interrupt command to send cmd out. */
  121. ha->flags.mbox_int = 0;
  122. clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  123. /* Unlock mbx registers and wait for interrupt */
  124. DEBUG11(printk("%s(%ld): going to unlock irq & waiting for interrupt. "
  125. "jiffies=%lx.\n", __func__, base_vha->host_no, jiffies));
  126. /* Wait for mbx cmd completion until timeout */
  127. if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
  128. set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
  129. if (IS_QLA82XX(ha)) {
  130. if (RD_REG_DWORD(&reg->isp82.hint) &
  131. HINT_MBX_INT_PENDING) {
  132. spin_unlock_irqrestore(&ha->hardware_lock,
  133. flags);
  134. DEBUG2_3_11(printk(KERN_INFO
  135. "%s(%ld): Pending Mailbox timeout. "
  136. "Exiting.\n", __func__, base_vha->host_no));
  137. rval = QLA_FUNCTION_TIMEOUT;
  138. goto premature_exit;
  139. }
  140. WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
  141. } else if (IS_FWI2_CAPABLE(ha))
  142. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
  143. else
  144. WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
  145. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  146. wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
  147. clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
  148. } else {
  149. DEBUG3_11(printk("%s(%ld): cmd=%x POLLING MODE.\n", __func__,
  150. base_vha->host_no, command));
  151. if (IS_QLA82XX(ha)) {
  152. if (RD_REG_DWORD(&reg->isp82.hint) &
  153. HINT_MBX_INT_PENDING) {
  154. spin_unlock_irqrestore(&ha->hardware_lock,
  155. flags);
  156. DEBUG2_3_11(printk(KERN_INFO
  157. "%s(%ld): Pending Mailbox timeout. "
  158. "Exiting.\n", __func__, base_vha->host_no));
  159. rval = QLA_FUNCTION_TIMEOUT;
  160. goto premature_exit;
  161. }
  162. WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
  163. } else if (IS_FWI2_CAPABLE(ha))
  164. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
  165. else
  166. WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
  167. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  168. wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
  169. while (!ha->flags.mbox_int) {
  170. if (time_after(jiffies, wait_time))
  171. break;
  172. /* Check for pending interrupts. */
  173. qla2x00_poll(ha->rsp_q_map[0]);
  174. if (!ha->flags.mbox_int &&
  175. !(IS_QLA2200(ha) &&
  176. command == MBC_LOAD_RISC_RAM_EXTENDED))
  177. msleep(10);
  178. } /* while */
  179. DEBUG17(qla_printk(KERN_WARNING, ha,
  180. "Waited %d sec\n",
  181. (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ)));
  182. }
  183. /* Check whether we timed out */
  184. if (ha->flags.mbox_int) {
  185. uint16_t *iptr2;
  186. DEBUG3_11(printk("%s(%ld): cmd %x completed.\n", __func__,
  187. base_vha->host_no, command));
  188. /* Got interrupt. Clear the flag. */
  189. ha->flags.mbox_int = 0;
  190. clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  191. if (ha->flags.isp82xx_fw_hung) {
  192. ha->flags.mbox_busy = 0;
  193. /* Setting Link-Down error */
  194. mcp->mb[0] = MBS_LINK_DOWN_ERROR;
  195. ha->mcp = NULL;
  196. rval = QLA_FUNCTION_FAILED;
  197. goto premature_exit;
  198. }
  199. if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
  200. rval = QLA_FUNCTION_FAILED;
  201. /* Load return mailbox registers. */
  202. iptr2 = mcp->mb;
  203. iptr = (uint16_t *)&ha->mailbox_out[0];
  204. mboxes = mcp->in_mb;
  205. for (cnt = 0; cnt < ha->mbx_count; cnt++) {
  206. if (mboxes & BIT_0)
  207. *iptr2 = *iptr;
  208. mboxes >>= 1;
  209. iptr2++;
  210. iptr++;
  211. }
  212. } else {
  213. #if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) || \
  214. defined(QL_DEBUG_LEVEL_11)
  215. uint16_t mb0;
  216. uint32_t ictrl;
  217. if (IS_FWI2_CAPABLE(ha)) {
  218. mb0 = RD_REG_WORD(&reg->isp24.mailbox0);
  219. ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
  220. } else {
  221. mb0 = RD_MAILBOX_REG(ha, &reg->isp, 0);
  222. ictrl = RD_REG_WORD(&reg->isp.ictrl);
  223. }
  224. printk("%s(%ld): **** MB Command Timeout for cmd %x ****\n",
  225. __func__, base_vha->host_no, command);
  226. printk("%s(%ld): icontrol=%x jiffies=%lx\n", __func__,
  227. base_vha->host_no, ictrl, jiffies);
  228. printk("%s(%ld): *** mailbox[0] = 0x%x ***\n", __func__,
  229. base_vha->host_no, mb0);
  230. qla2x00_dump_regs(base_vha);
  231. #endif
  232. rval = QLA_FUNCTION_TIMEOUT;
  233. }
  234. ha->flags.mbox_busy = 0;
  235. /* Clean up */
  236. ha->mcp = NULL;
  237. if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
  238. DEBUG11(printk("%s(%ld): checking for additional resp "
  239. "interrupt.\n", __func__, base_vha->host_no));
  240. /* polling mode for non isp_abort commands. */
  241. qla2x00_poll(ha->rsp_q_map[0]);
  242. }
  243. if (rval == QLA_FUNCTION_TIMEOUT &&
  244. mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
  245. if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
  246. ha->flags.eeh_busy) {
  247. /* not in dpc. schedule it for dpc to take over. */
  248. DEBUG(printk("%s(%ld): timeout schedule "
  249. "isp_abort_needed.\n", __func__,
  250. base_vha->host_no));
  251. DEBUG2_3_11(printk("%s(%ld): timeout schedule "
  252. "isp_abort_needed.\n", __func__,
  253. base_vha->host_no));
  254. if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
  255. !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
  256. !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  257. qla_printk(KERN_WARNING, ha,
  258. "Mailbox command timeout occurred. "
  259. "Scheduling ISP " "abort. eeh_busy: 0x%x\n",
  260. ha->flags.eeh_busy);
  261. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  262. qla2xxx_wake_dpc(vha);
  263. }
  264. } else if (!abort_active) {
  265. /* call abort directly since we are in the DPC thread */
  266. DEBUG(printk("%s(%ld): timeout calling abort_isp\n",
  267. __func__, base_vha->host_no));
  268. DEBUG2_3_11(printk("%s(%ld): timeout calling "
  269. "abort_isp\n", __func__, base_vha->host_no));
  270. if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
  271. !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
  272. !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  273. qla_printk(KERN_WARNING, ha,
  274. "Mailbox command timeout occurred. "
  275. "Issuing ISP abort.\n");
  276. set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
  277. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  278. if (ha->isp_ops->abort_isp(vha)) {
  279. /* Failed. retry later. */
  280. set_bit(ISP_ABORT_NEEDED,
  281. &vha->dpc_flags);
  282. }
  283. clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
  284. DEBUG(printk("%s(%ld): finished abort_isp\n",
  285. __func__, vha->host_no));
  286. DEBUG2_3_11(printk(
  287. "%s(%ld): finished abort_isp\n",
  288. __func__, vha->host_no));
  289. }
  290. }
  291. }
  292. premature_exit:
  293. /* Allow next mbx cmd to come in. */
  294. complete(&ha->mbx_cmd_comp);
  295. if (rval) {
  296. DEBUG2_3_11(printk("%s(%ld): **** FAILED. mbx0=%x, mbx1=%x, "
  297. "mbx2=%x, cmd=%x ****\n", __func__, base_vha->host_no,
  298. mcp->mb[0], mcp->mb[1], mcp->mb[2], command));
  299. } else {
  300. DEBUG11(printk("%s(%ld): done.\n", __func__,
  301. base_vha->host_no));
  302. }
  303. return rval;
  304. }
  305. int
  306. qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
  307. uint32_t risc_code_size)
  308. {
  309. int rval;
  310. struct qla_hw_data *ha = vha->hw;
  311. mbx_cmd_t mc;
  312. mbx_cmd_t *mcp = &mc;
  313. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  314. if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
  315. mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
  316. mcp->mb[8] = MSW(risc_addr);
  317. mcp->out_mb = MBX_8|MBX_0;
  318. } else {
  319. mcp->mb[0] = MBC_LOAD_RISC_RAM;
  320. mcp->out_mb = MBX_0;
  321. }
  322. mcp->mb[1] = LSW(risc_addr);
  323. mcp->mb[2] = MSW(req_dma);
  324. mcp->mb[3] = LSW(req_dma);
  325. mcp->mb[6] = MSW(MSD(req_dma));
  326. mcp->mb[7] = LSW(MSD(req_dma));
  327. mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
  328. if (IS_FWI2_CAPABLE(ha)) {
  329. mcp->mb[4] = MSW(risc_code_size);
  330. mcp->mb[5] = LSW(risc_code_size);
  331. mcp->out_mb |= MBX_5|MBX_4;
  332. } else {
  333. mcp->mb[4] = LSW(risc_code_size);
  334. mcp->out_mb |= MBX_4;
  335. }
  336. mcp->in_mb = MBX_0;
  337. mcp->tov = MBX_TOV_SECONDS;
  338. mcp->flags = 0;
  339. rval = qla2x00_mailbox_command(vha, mcp);
  340. if (rval != QLA_SUCCESS) {
  341. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  342. vha->host_no, rval, mcp->mb[0]));
  343. } else {
  344. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  345. }
  346. return rval;
  347. }
  348. #define EXTENDED_BB_CREDITS BIT_0
  349. /*
  350. * qla2x00_execute_fw
  351. * Start adapter firmware.
  352. *
  353. * Input:
  354. * ha = adapter block pointer.
  355. * TARGET_QUEUE_LOCK must be released.
  356. * ADAPTER_STATE_LOCK must be released.
  357. *
  358. * Returns:
  359. * qla2x00 local function return status code.
  360. *
  361. * Context:
  362. * Kernel context.
  363. */
  364. int
  365. qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
  366. {
  367. int rval;
  368. struct qla_hw_data *ha = vha->hw;
  369. mbx_cmd_t mc;
  370. mbx_cmd_t *mcp = &mc;
  371. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  372. mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
  373. mcp->out_mb = MBX_0;
  374. mcp->in_mb = MBX_0;
  375. if (IS_FWI2_CAPABLE(ha)) {
  376. mcp->mb[1] = MSW(risc_addr);
  377. mcp->mb[2] = LSW(risc_addr);
  378. mcp->mb[3] = 0;
  379. if (IS_QLA81XX(ha)) {
  380. struct nvram_81xx *nv = ha->nvram;
  381. mcp->mb[4] = (nv->enhanced_features &
  382. EXTENDED_BB_CREDITS);
  383. } else
  384. mcp->mb[4] = 0;
  385. mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
  386. mcp->in_mb |= MBX_1;
  387. } else {
  388. mcp->mb[1] = LSW(risc_addr);
  389. mcp->out_mb |= MBX_1;
  390. if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
  391. mcp->mb[2] = 0;
  392. mcp->out_mb |= MBX_2;
  393. }
  394. }
  395. mcp->tov = MBX_TOV_SECONDS;
  396. mcp->flags = 0;
  397. rval = qla2x00_mailbox_command(vha, mcp);
  398. if (rval != QLA_SUCCESS) {
  399. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  400. vha->host_no, rval, mcp->mb[0]));
  401. } else {
  402. if (IS_FWI2_CAPABLE(ha)) {
  403. DEBUG11(printk("%s(%ld): done exchanges=%x.\n",
  404. __func__, vha->host_no, mcp->mb[1]));
  405. } else {
  406. DEBUG11(printk("%s(%ld): done.\n", __func__,
  407. vha->host_no));
  408. }
  409. }
  410. return rval;
  411. }
  412. /*
  413. * qla2x00_get_fw_version
  414. * Get firmware version.
  415. *
  416. * Input:
  417. * ha: adapter state pointer.
  418. * major: pointer for major number.
  419. * minor: pointer for minor number.
  420. * subminor: pointer for subminor number.
  421. *
  422. * Returns:
  423. * qla2x00 local function return status code.
  424. *
  425. * Context:
  426. * Kernel context.
  427. */
  428. int
  429. qla2x00_get_fw_version(scsi_qla_host_t *vha, uint16_t *major, uint16_t *minor,
  430. uint16_t *subminor, uint16_t *attributes, uint32_t *memory, uint8_t *mpi,
  431. uint32_t *mpi_caps, uint8_t *phy)
  432. {
  433. int rval;
  434. mbx_cmd_t mc;
  435. mbx_cmd_t *mcp = &mc;
  436. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  437. mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
  438. mcp->out_mb = MBX_0;
  439. mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  440. if (IS_QLA81XX(vha->hw))
  441. mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
  442. mcp->flags = 0;
  443. mcp->tov = MBX_TOV_SECONDS;
  444. rval = qla2x00_mailbox_command(vha, mcp);
  445. if (rval != QLA_SUCCESS)
  446. goto failed;
  447. /* Return mailbox data. */
  448. *major = mcp->mb[1];
  449. *minor = mcp->mb[2];
  450. *subminor = mcp->mb[3];
  451. *attributes = mcp->mb[6];
  452. if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
  453. *memory = 0x1FFFF; /* Defaults to 128KB. */
  454. else
  455. *memory = (mcp->mb[5] << 16) | mcp->mb[4];
  456. if (IS_QLA81XX(vha->hw)) {
  457. mpi[0] = mcp->mb[10] & 0xff;
  458. mpi[1] = mcp->mb[11] >> 8;
  459. mpi[2] = mcp->mb[11] & 0xff;
  460. *mpi_caps = (mcp->mb[12] << 16) | mcp->mb[13];
  461. phy[0] = mcp->mb[8] & 0xff;
  462. phy[1] = mcp->mb[9] >> 8;
  463. phy[2] = mcp->mb[9] & 0xff;
  464. }
  465. failed:
  466. if (rval != QLA_SUCCESS) {
  467. /*EMPTY*/
  468. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  469. vha->host_no, rval));
  470. } else {
  471. /*EMPTY*/
  472. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  473. }
  474. return rval;
  475. }
  476. /*
  477. * qla2x00_get_fw_options
  478. * Set firmware options.
  479. *
  480. * Input:
  481. * ha = adapter block pointer.
  482. * fwopt = pointer for firmware options.
  483. *
  484. * Returns:
  485. * qla2x00 local function return status code.
  486. *
  487. * Context:
  488. * Kernel context.
  489. */
  490. int
  491. qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
  492. {
  493. int rval;
  494. mbx_cmd_t mc;
  495. mbx_cmd_t *mcp = &mc;
  496. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  497. mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
  498. mcp->out_mb = MBX_0;
  499. mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  500. mcp->tov = MBX_TOV_SECONDS;
  501. mcp->flags = 0;
  502. rval = qla2x00_mailbox_command(vha, mcp);
  503. if (rval != QLA_SUCCESS) {
  504. /*EMPTY*/
  505. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  506. vha->host_no, rval));
  507. } else {
  508. fwopts[0] = mcp->mb[0];
  509. fwopts[1] = mcp->mb[1];
  510. fwopts[2] = mcp->mb[2];
  511. fwopts[3] = mcp->mb[3];
  512. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  513. }
  514. return rval;
  515. }
  516. /*
  517. * qla2x00_set_fw_options
  518. * Set firmware options.
  519. *
  520. * Input:
  521. * ha = adapter block pointer.
  522. * fwopt = pointer for firmware options.
  523. *
  524. * Returns:
  525. * qla2x00 local function return status code.
  526. *
  527. * Context:
  528. * Kernel context.
  529. */
  530. int
  531. qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
  532. {
  533. int rval;
  534. mbx_cmd_t mc;
  535. mbx_cmd_t *mcp = &mc;
  536. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  537. mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
  538. mcp->mb[1] = fwopts[1];
  539. mcp->mb[2] = fwopts[2];
  540. mcp->mb[3] = fwopts[3];
  541. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  542. mcp->in_mb = MBX_0;
  543. if (IS_FWI2_CAPABLE(vha->hw)) {
  544. mcp->in_mb |= MBX_1;
  545. } else {
  546. mcp->mb[10] = fwopts[10];
  547. mcp->mb[11] = fwopts[11];
  548. mcp->mb[12] = 0; /* Undocumented, but used */
  549. mcp->out_mb |= MBX_12|MBX_11|MBX_10;
  550. }
  551. mcp->tov = MBX_TOV_SECONDS;
  552. mcp->flags = 0;
  553. rval = qla2x00_mailbox_command(vha, mcp);
  554. fwopts[0] = mcp->mb[0];
  555. if (rval != QLA_SUCCESS) {
  556. /*EMPTY*/
  557. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x/%x).\n", __func__,
  558. vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  559. } else {
  560. /*EMPTY*/
  561. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  562. }
  563. return rval;
  564. }
  565. /*
  566. * qla2x00_mbx_reg_test
  567. * Mailbox register wrap test.
  568. *
  569. * Input:
  570. * ha = adapter block pointer.
  571. * TARGET_QUEUE_LOCK must be released.
  572. * ADAPTER_STATE_LOCK must be released.
  573. *
  574. * Returns:
  575. * qla2x00 local function return status code.
  576. *
  577. * Context:
  578. * Kernel context.
  579. */
  580. int
  581. qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
  582. {
  583. int rval;
  584. mbx_cmd_t mc;
  585. mbx_cmd_t *mcp = &mc;
  586. DEBUG11(printk("qla2x00_mbx_reg_test(%ld): entered.\n", vha->host_no));
  587. mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
  588. mcp->mb[1] = 0xAAAA;
  589. mcp->mb[2] = 0x5555;
  590. mcp->mb[3] = 0xAA55;
  591. mcp->mb[4] = 0x55AA;
  592. mcp->mb[5] = 0xA5A5;
  593. mcp->mb[6] = 0x5A5A;
  594. mcp->mb[7] = 0x2525;
  595. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  596. mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  597. mcp->tov = MBX_TOV_SECONDS;
  598. mcp->flags = 0;
  599. rval = qla2x00_mailbox_command(vha, mcp);
  600. if (rval == QLA_SUCCESS) {
  601. if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
  602. mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
  603. rval = QLA_FUNCTION_FAILED;
  604. if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
  605. mcp->mb[7] != 0x2525)
  606. rval = QLA_FUNCTION_FAILED;
  607. }
  608. if (rval != QLA_SUCCESS) {
  609. /*EMPTY*/
  610. DEBUG2_3_11(printk("qla2x00_mbx_reg_test(%ld): failed=%x.\n",
  611. vha->host_no, rval));
  612. } else {
  613. /*EMPTY*/
  614. DEBUG11(printk("qla2x00_mbx_reg_test(%ld): done.\n",
  615. vha->host_no));
  616. }
  617. return rval;
  618. }
  619. /*
  620. * qla2x00_verify_checksum
  621. * Verify firmware checksum.
  622. *
  623. * Input:
  624. * ha = adapter block pointer.
  625. * TARGET_QUEUE_LOCK must be released.
  626. * ADAPTER_STATE_LOCK must be released.
  627. *
  628. * Returns:
  629. * qla2x00 local function return status code.
  630. *
  631. * Context:
  632. * Kernel context.
  633. */
  634. int
  635. qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
  636. {
  637. int rval;
  638. mbx_cmd_t mc;
  639. mbx_cmd_t *mcp = &mc;
  640. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  641. mcp->mb[0] = MBC_VERIFY_CHECKSUM;
  642. mcp->out_mb = MBX_0;
  643. mcp->in_mb = MBX_0;
  644. if (IS_FWI2_CAPABLE(vha->hw)) {
  645. mcp->mb[1] = MSW(risc_addr);
  646. mcp->mb[2] = LSW(risc_addr);
  647. mcp->out_mb |= MBX_2|MBX_1;
  648. mcp->in_mb |= MBX_2|MBX_1;
  649. } else {
  650. mcp->mb[1] = LSW(risc_addr);
  651. mcp->out_mb |= MBX_1;
  652. mcp->in_mb |= MBX_1;
  653. }
  654. mcp->tov = MBX_TOV_SECONDS;
  655. mcp->flags = 0;
  656. rval = qla2x00_mailbox_command(vha, mcp);
  657. if (rval != QLA_SUCCESS) {
  658. DEBUG2_3_11(printk("%s(%ld): failed=%x chk sum=%x.\n", __func__,
  659. vha->host_no, rval, IS_FWI2_CAPABLE(vha->hw) ?
  660. (mcp->mb[2] << 16) | mcp->mb[1]: mcp->mb[1]));
  661. } else {
  662. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  663. }
  664. return rval;
  665. }
  666. /*
  667. * qla2x00_issue_iocb
  668. * Issue IOCB using mailbox command
  669. *
  670. * Input:
  671. * ha = adapter state pointer.
  672. * buffer = buffer pointer.
  673. * phys_addr = physical address of buffer.
  674. * size = size of buffer.
  675. * TARGET_QUEUE_LOCK must be released.
  676. * ADAPTER_STATE_LOCK must be released.
  677. *
  678. * Returns:
  679. * qla2x00 local function return status code.
  680. *
  681. * Context:
  682. * Kernel context.
  683. */
  684. int
  685. qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
  686. dma_addr_t phys_addr, size_t size, uint32_t tov)
  687. {
  688. int rval;
  689. mbx_cmd_t mc;
  690. mbx_cmd_t *mcp = &mc;
  691. mcp->mb[0] = MBC_IOCB_COMMAND_A64;
  692. mcp->mb[1] = 0;
  693. mcp->mb[2] = MSW(phys_addr);
  694. mcp->mb[3] = LSW(phys_addr);
  695. mcp->mb[6] = MSW(MSD(phys_addr));
  696. mcp->mb[7] = LSW(MSD(phys_addr));
  697. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  698. mcp->in_mb = MBX_2|MBX_0;
  699. mcp->tov = tov;
  700. mcp->flags = 0;
  701. rval = qla2x00_mailbox_command(vha, mcp);
  702. if (rval != QLA_SUCCESS) {
  703. /*EMPTY*/
  704. DEBUG(printk("qla2x00_issue_iocb(%ld): failed rval 0x%x\n",
  705. vha->host_no, rval));
  706. } else {
  707. sts_entry_t *sts_entry = (sts_entry_t *) buffer;
  708. /* Mask reserved bits. */
  709. sts_entry->entry_status &=
  710. IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
  711. }
  712. return rval;
  713. }
  714. int
  715. qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
  716. size_t size)
  717. {
  718. return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
  719. MBX_TOV_SECONDS);
  720. }
  721. /*
  722. * qla2x00_abort_command
  723. * Abort command aborts a specified IOCB.
  724. *
  725. * Input:
  726. * ha = adapter block pointer.
  727. * sp = SB structure pointer.
  728. *
  729. * Returns:
  730. * qla2x00 local function return status code.
  731. *
  732. * Context:
  733. * Kernel context.
  734. */
  735. int
  736. qla2x00_abort_command(srb_t *sp)
  737. {
  738. unsigned long flags = 0;
  739. int rval;
  740. uint32_t handle = 0;
  741. mbx_cmd_t mc;
  742. mbx_cmd_t *mcp = &mc;
  743. fc_port_t *fcport = sp->fcport;
  744. scsi_qla_host_t *vha = fcport->vha;
  745. struct qla_hw_data *ha = vha->hw;
  746. struct req_que *req = vha->req;
  747. DEBUG11(printk("qla2x00_abort_command(%ld): entered.\n", vha->host_no));
  748. spin_lock_irqsave(&ha->hardware_lock, flags);
  749. for (handle = 1; handle < MAX_OUTSTANDING_COMMANDS; handle++) {
  750. if (req->outstanding_cmds[handle] == sp)
  751. break;
  752. }
  753. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  754. if (handle == MAX_OUTSTANDING_COMMANDS) {
  755. /* command not found */
  756. return QLA_FUNCTION_FAILED;
  757. }
  758. mcp->mb[0] = MBC_ABORT_COMMAND;
  759. if (HAS_EXTENDED_IDS(ha))
  760. mcp->mb[1] = fcport->loop_id;
  761. else
  762. mcp->mb[1] = fcport->loop_id << 8;
  763. mcp->mb[2] = (uint16_t)handle;
  764. mcp->mb[3] = (uint16_t)(handle >> 16);
  765. mcp->mb[6] = (uint16_t)sp->cmd->device->lun;
  766. mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  767. mcp->in_mb = MBX_0;
  768. mcp->tov = MBX_TOV_SECONDS;
  769. mcp->flags = 0;
  770. rval = qla2x00_mailbox_command(vha, mcp);
  771. if (rval != QLA_SUCCESS) {
  772. DEBUG2_3_11(printk("qla2x00_abort_command(%ld): failed=%x.\n",
  773. vha->host_no, rval));
  774. } else {
  775. DEBUG11(printk("qla2x00_abort_command(%ld): done.\n",
  776. vha->host_no));
  777. }
  778. return rval;
  779. }
  780. int
  781. qla2x00_abort_target(struct fc_port *fcport, unsigned int l, int tag)
  782. {
  783. int rval, rval2;
  784. mbx_cmd_t mc;
  785. mbx_cmd_t *mcp = &mc;
  786. scsi_qla_host_t *vha;
  787. struct req_que *req;
  788. struct rsp_que *rsp;
  789. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  790. l = l;
  791. vha = fcport->vha;
  792. req = vha->hw->req_q_map[0];
  793. rsp = req->rsp;
  794. mcp->mb[0] = MBC_ABORT_TARGET;
  795. mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
  796. if (HAS_EXTENDED_IDS(vha->hw)) {
  797. mcp->mb[1] = fcport->loop_id;
  798. mcp->mb[10] = 0;
  799. mcp->out_mb |= MBX_10;
  800. } else {
  801. mcp->mb[1] = fcport->loop_id << 8;
  802. }
  803. mcp->mb[2] = vha->hw->loop_reset_delay;
  804. mcp->mb[9] = vha->vp_idx;
  805. mcp->in_mb = MBX_0;
  806. mcp->tov = MBX_TOV_SECONDS;
  807. mcp->flags = 0;
  808. rval = qla2x00_mailbox_command(vha, mcp);
  809. if (rval != QLA_SUCCESS) {
  810. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  811. vha->host_no, rval));
  812. }
  813. /* Issue marker IOCB. */
  814. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
  815. MK_SYNC_ID);
  816. if (rval2 != QLA_SUCCESS) {
  817. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  818. "(%x).\n", __func__, vha->host_no, rval2));
  819. } else {
  820. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  821. }
  822. return rval;
  823. }
  824. int
  825. qla2x00_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
  826. {
  827. int rval, rval2;
  828. mbx_cmd_t mc;
  829. mbx_cmd_t *mcp = &mc;
  830. scsi_qla_host_t *vha;
  831. struct req_que *req;
  832. struct rsp_que *rsp;
  833. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  834. vha = fcport->vha;
  835. req = vha->hw->req_q_map[0];
  836. rsp = req->rsp;
  837. mcp->mb[0] = MBC_LUN_RESET;
  838. mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
  839. if (HAS_EXTENDED_IDS(vha->hw))
  840. mcp->mb[1] = fcport->loop_id;
  841. else
  842. mcp->mb[1] = fcport->loop_id << 8;
  843. mcp->mb[2] = l;
  844. mcp->mb[3] = 0;
  845. mcp->mb[9] = vha->vp_idx;
  846. mcp->in_mb = MBX_0;
  847. mcp->tov = MBX_TOV_SECONDS;
  848. mcp->flags = 0;
  849. rval = qla2x00_mailbox_command(vha, mcp);
  850. if (rval != QLA_SUCCESS) {
  851. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  852. vha->host_no, rval));
  853. }
  854. /* Issue marker IOCB. */
  855. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
  856. MK_SYNC_ID_LUN);
  857. if (rval2 != QLA_SUCCESS) {
  858. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  859. "(%x).\n", __func__, vha->host_no, rval2));
  860. } else {
  861. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  862. }
  863. return rval;
  864. }
  865. /*
  866. * qla2x00_get_adapter_id
  867. * Get adapter ID and topology.
  868. *
  869. * Input:
  870. * ha = adapter block pointer.
  871. * id = pointer for loop ID.
  872. * al_pa = pointer for AL_PA.
  873. * area = pointer for area.
  874. * domain = pointer for domain.
  875. * top = pointer for topology.
  876. * TARGET_QUEUE_LOCK must be released.
  877. * ADAPTER_STATE_LOCK must be released.
  878. *
  879. * Returns:
  880. * qla2x00 local function return status code.
  881. *
  882. * Context:
  883. * Kernel context.
  884. */
  885. int
  886. qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
  887. uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
  888. {
  889. int rval;
  890. mbx_cmd_t mc;
  891. mbx_cmd_t *mcp = &mc;
  892. DEBUG11(printk("qla2x00_get_adapter_id(%ld): entered.\n",
  893. vha->host_no));
  894. mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
  895. mcp->mb[9] = vha->vp_idx;
  896. mcp->out_mb = MBX_9|MBX_0;
  897. mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  898. if (IS_QLA8XXX_TYPE(vha->hw))
  899. mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
  900. mcp->tov = MBX_TOV_SECONDS;
  901. mcp->flags = 0;
  902. rval = qla2x00_mailbox_command(vha, mcp);
  903. if (mcp->mb[0] == MBS_COMMAND_ERROR)
  904. rval = QLA_COMMAND_ERROR;
  905. else if (mcp->mb[0] == MBS_INVALID_COMMAND)
  906. rval = QLA_INVALID_COMMAND;
  907. /* Return data. */
  908. *id = mcp->mb[1];
  909. *al_pa = LSB(mcp->mb[2]);
  910. *area = MSB(mcp->mb[2]);
  911. *domain = LSB(mcp->mb[3]);
  912. *top = mcp->mb[6];
  913. *sw_cap = mcp->mb[7];
  914. if (rval != QLA_SUCCESS) {
  915. /*EMPTY*/
  916. DEBUG2_3_11(printk("qla2x00_get_adapter_id(%ld): failed=%x.\n",
  917. vha->host_no, rval));
  918. } else {
  919. DEBUG11(printk("qla2x00_get_adapter_id(%ld): done.\n",
  920. vha->host_no));
  921. if (IS_QLA8XXX_TYPE(vha->hw)) {
  922. vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
  923. vha->fcoe_fcf_idx = mcp->mb[10];
  924. vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
  925. vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
  926. vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
  927. vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
  928. vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
  929. vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
  930. }
  931. }
  932. return rval;
  933. }
  934. /*
  935. * qla2x00_get_retry_cnt
  936. * Get current firmware login retry count and delay.
  937. *
  938. * Input:
  939. * ha = adapter block pointer.
  940. * retry_cnt = pointer to login retry count.
  941. * tov = pointer to login timeout value.
  942. *
  943. * Returns:
  944. * qla2x00 local function return status code.
  945. *
  946. * Context:
  947. * Kernel context.
  948. */
  949. int
  950. qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
  951. uint16_t *r_a_tov)
  952. {
  953. int rval;
  954. uint16_t ratov;
  955. mbx_cmd_t mc;
  956. mbx_cmd_t *mcp = &mc;
  957. DEBUG11(printk("qla2x00_get_retry_cnt(%ld): entered.\n",
  958. vha->host_no));
  959. mcp->mb[0] = MBC_GET_RETRY_COUNT;
  960. mcp->out_mb = MBX_0;
  961. mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  962. mcp->tov = MBX_TOV_SECONDS;
  963. mcp->flags = 0;
  964. rval = qla2x00_mailbox_command(vha, mcp);
  965. if (rval != QLA_SUCCESS) {
  966. /*EMPTY*/
  967. DEBUG2_3_11(printk("qla2x00_get_retry_cnt(%ld): failed = %x.\n",
  968. vha->host_no, mcp->mb[0]));
  969. } else {
  970. /* Convert returned data and check our values. */
  971. *r_a_tov = mcp->mb[3] / 2;
  972. ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
  973. if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
  974. /* Update to the larger values */
  975. *retry_cnt = (uint8_t)mcp->mb[1];
  976. *tov = ratov;
  977. }
  978. DEBUG11(printk("qla2x00_get_retry_cnt(%ld): done. mb3=%d "
  979. "ratov=%d.\n", vha->host_no, mcp->mb[3], ratov));
  980. }
  981. return rval;
  982. }
  983. /*
  984. * qla2x00_init_firmware
  985. * Initialize adapter firmware.
  986. *
  987. * Input:
  988. * ha = adapter block pointer.
  989. * dptr = Initialization control block pointer.
  990. * size = size of initialization control block.
  991. * TARGET_QUEUE_LOCK must be released.
  992. * ADAPTER_STATE_LOCK must be released.
  993. *
  994. * Returns:
  995. * qla2x00 local function return status code.
  996. *
  997. * Context:
  998. * Kernel context.
  999. */
  1000. int
  1001. qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
  1002. {
  1003. int rval;
  1004. mbx_cmd_t mc;
  1005. mbx_cmd_t *mcp = &mc;
  1006. struct qla_hw_data *ha = vha->hw;
  1007. DEBUG11(printk("qla2x00_init_firmware(%ld): entered.\n",
  1008. vha->host_no));
  1009. if (IS_QLA82XX(ha) && ql2xdbwr)
  1010. qla82xx_wr_32(ha, ha->nxdb_wr_ptr,
  1011. (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
  1012. if (ha->flags.npiv_supported)
  1013. mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
  1014. else
  1015. mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
  1016. mcp->mb[1] = 0;
  1017. mcp->mb[2] = MSW(ha->init_cb_dma);
  1018. mcp->mb[3] = LSW(ha->init_cb_dma);
  1019. mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
  1020. mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
  1021. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1022. if (IS_QLA81XX(ha) && ha->ex_init_cb->ex_version) {
  1023. mcp->mb[1] = BIT_0;
  1024. mcp->mb[10] = MSW(ha->ex_init_cb_dma);
  1025. mcp->mb[11] = LSW(ha->ex_init_cb_dma);
  1026. mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
  1027. mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
  1028. mcp->mb[14] = sizeof(*ha->ex_init_cb);
  1029. mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
  1030. }
  1031. mcp->in_mb = MBX_0;
  1032. mcp->buf_size = size;
  1033. mcp->flags = MBX_DMA_OUT;
  1034. mcp->tov = MBX_TOV_SECONDS;
  1035. rval = qla2x00_mailbox_command(vha, mcp);
  1036. if (rval != QLA_SUCCESS) {
  1037. /*EMPTY*/
  1038. DEBUG2_3_11(printk("qla2x00_init_firmware(%ld): failed=%x "
  1039. "mb0=%x.\n",
  1040. vha->host_no, rval, mcp->mb[0]));
  1041. } else {
  1042. /*EMPTY*/
  1043. DEBUG11(printk("qla2x00_init_firmware(%ld): done.\n",
  1044. vha->host_no));
  1045. }
  1046. return rval;
  1047. }
  1048. /*
  1049. * qla2x00_get_port_database
  1050. * Issue normal/enhanced get port database mailbox command
  1051. * and copy device name as necessary.
  1052. *
  1053. * Input:
  1054. * ha = adapter state pointer.
  1055. * dev = structure pointer.
  1056. * opt = enhanced cmd option byte.
  1057. *
  1058. * Returns:
  1059. * qla2x00 local function return status code.
  1060. *
  1061. * Context:
  1062. * Kernel context.
  1063. */
  1064. int
  1065. qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
  1066. {
  1067. int rval;
  1068. mbx_cmd_t mc;
  1069. mbx_cmd_t *mcp = &mc;
  1070. port_database_t *pd;
  1071. struct port_database_24xx *pd24;
  1072. dma_addr_t pd_dma;
  1073. struct qla_hw_data *ha = vha->hw;
  1074. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1075. pd24 = NULL;
  1076. pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
  1077. if (pd == NULL) {
  1078. DEBUG2_3(printk("%s(%ld): failed to allocate Port Database "
  1079. "structure.\n", __func__, vha->host_no));
  1080. return QLA_MEMORY_ALLOC_FAILED;
  1081. }
  1082. memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
  1083. mcp->mb[0] = MBC_GET_PORT_DATABASE;
  1084. if (opt != 0 && !IS_FWI2_CAPABLE(ha))
  1085. mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
  1086. mcp->mb[2] = MSW(pd_dma);
  1087. mcp->mb[3] = LSW(pd_dma);
  1088. mcp->mb[6] = MSW(MSD(pd_dma));
  1089. mcp->mb[7] = LSW(MSD(pd_dma));
  1090. mcp->mb[9] = vha->vp_idx;
  1091. mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1092. mcp->in_mb = MBX_0;
  1093. if (IS_FWI2_CAPABLE(ha)) {
  1094. mcp->mb[1] = fcport->loop_id;
  1095. mcp->mb[10] = opt;
  1096. mcp->out_mb |= MBX_10|MBX_1;
  1097. mcp->in_mb |= MBX_1;
  1098. } else if (HAS_EXTENDED_IDS(ha)) {
  1099. mcp->mb[1] = fcport->loop_id;
  1100. mcp->mb[10] = opt;
  1101. mcp->out_mb |= MBX_10|MBX_1;
  1102. } else {
  1103. mcp->mb[1] = fcport->loop_id << 8 | opt;
  1104. mcp->out_mb |= MBX_1;
  1105. }
  1106. mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
  1107. PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
  1108. mcp->flags = MBX_DMA_IN;
  1109. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1110. rval = qla2x00_mailbox_command(vha, mcp);
  1111. if (rval != QLA_SUCCESS)
  1112. goto gpd_error_out;
  1113. if (IS_FWI2_CAPABLE(ha)) {
  1114. pd24 = (struct port_database_24xx *) pd;
  1115. /* Check for logged in state. */
  1116. if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
  1117. pd24->last_login_state != PDS_PRLI_COMPLETE) {
  1118. DEBUG2(qla_printk(KERN_WARNING, ha,
  1119. "scsi(%ld): Unable to verify login-state (%x/%x) "
  1120. " - portid=%02x%02x%02x.\n", vha->host_no,
  1121. pd24->current_login_state, pd24->last_login_state,
  1122. fcport->d_id.b.domain, fcport->d_id.b.area,
  1123. fcport->d_id.b.al_pa));
  1124. rval = QLA_FUNCTION_FAILED;
  1125. goto gpd_error_out;
  1126. }
  1127. /* Names are little-endian. */
  1128. memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
  1129. memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
  1130. /* Get port_id of device. */
  1131. fcport->d_id.b.domain = pd24->port_id[0];
  1132. fcport->d_id.b.area = pd24->port_id[1];
  1133. fcport->d_id.b.al_pa = pd24->port_id[2];
  1134. fcport->d_id.b.rsvd_1 = 0;
  1135. /* If not target must be initiator or unknown type. */
  1136. if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
  1137. fcport->port_type = FCT_INITIATOR;
  1138. else
  1139. fcport->port_type = FCT_TARGET;
  1140. } else {
  1141. /* Check for logged in state. */
  1142. if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
  1143. pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
  1144. DEBUG2(qla_printk(KERN_WARNING, ha,
  1145. "scsi(%ld): Unable to verify login-state (%x/%x) "
  1146. " - portid=%02x%02x%02x.\n", vha->host_no,
  1147. pd->master_state, pd->slave_state,
  1148. fcport->d_id.b.domain, fcport->d_id.b.area,
  1149. fcport->d_id.b.al_pa));
  1150. rval = QLA_FUNCTION_FAILED;
  1151. goto gpd_error_out;
  1152. }
  1153. /* Names are little-endian. */
  1154. memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
  1155. memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
  1156. /* Get port_id of device. */
  1157. fcport->d_id.b.domain = pd->port_id[0];
  1158. fcport->d_id.b.area = pd->port_id[3];
  1159. fcport->d_id.b.al_pa = pd->port_id[2];
  1160. fcport->d_id.b.rsvd_1 = 0;
  1161. /* If not target must be initiator or unknown type. */
  1162. if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
  1163. fcport->port_type = FCT_INITIATOR;
  1164. else
  1165. fcport->port_type = FCT_TARGET;
  1166. /* Passback COS information. */
  1167. fcport->supported_classes = (pd->options & BIT_4) ?
  1168. FC_COS_CLASS2: FC_COS_CLASS3;
  1169. }
  1170. gpd_error_out:
  1171. dma_pool_free(ha->s_dma_pool, pd, pd_dma);
  1172. if (rval != QLA_SUCCESS) {
  1173. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  1174. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1175. } else {
  1176. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1177. }
  1178. return rval;
  1179. }
  1180. /*
  1181. * qla2x00_get_firmware_state
  1182. * Get adapter firmware state.
  1183. *
  1184. * Input:
  1185. * ha = adapter block pointer.
  1186. * dptr = pointer for firmware state.
  1187. * TARGET_QUEUE_LOCK must be released.
  1188. * ADAPTER_STATE_LOCK must be released.
  1189. *
  1190. * Returns:
  1191. * qla2x00 local function return status code.
  1192. *
  1193. * Context:
  1194. * Kernel context.
  1195. */
  1196. int
  1197. qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
  1198. {
  1199. int rval;
  1200. mbx_cmd_t mc;
  1201. mbx_cmd_t *mcp = &mc;
  1202. DEBUG11(printk("qla2x00_get_firmware_state(%ld): entered.\n",
  1203. vha->host_no));
  1204. mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
  1205. mcp->out_mb = MBX_0;
  1206. if (IS_FWI2_CAPABLE(vha->hw))
  1207. mcp->in_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  1208. else
  1209. mcp->in_mb = MBX_1|MBX_0;
  1210. mcp->tov = MBX_TOV_SECONDS;
  1211. mcp->flags = 0;
  1212. rval = qla2x00_mailbox_command(vha, mcp);
  1213. /* Return firmware states. */
  1214. states[0] = mcp->mb[1];
  1215. if (IS_FWI2_CAPABLE(vha->hw)) {
  1216. states[1] = mcp->mb[2];
  1217. states[2] = mcp->mb[3];
  1218. states[3] = mcp->mb[4];
  1219. states[4] = mcp->mb[5];
  1220. }
  1221. if (rval != QLA_SUCCESS) {
  1222. /*EMPTY*/
  1223. DEBUG2_3_11(printk("qla2x00_get_firmware_state(%ld): "
  1224. "failed=%x.\n", vha->host_no, rval));
  1225. } else {
  1226. /*EMPTY*/
  1227. DEBUG11(printk("qla2x00_get_firmware_state(%ld): done.\n",
  1228. vha->host_no));
  1229. }
  1230. return rval;
  1231. }
  1232. /*
  1233. * qla2x00_get_port_name
  1234. * Issue get port name mailbox command.
  1235. * Returned name is in big endian format.
  1236. *
  1237. * Input:
  1238. * ha = adapter block pointer.
  1239. * loop_id = loop ID of device.
  1240. * name = pointer for name.
  1241. * TARGET_QUEUE_LOCK must be released.
  1242. * ADAPTER_STATE_LOCK must be released.
  1243. *
  1244. * Returns:
  1245. * qla2x00 local function return status code.
  1246. *
  1247. * Context:
  1248. * Kernel context.
  1249. */
  1250. int
  1251. qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
  1252. uint8_t opt)
  1253. {
  1254. int rval;
  1255. mbx_cmd_t mc;
  1256. mbx_cmd_t *mcp = &mc;
  1257. DEBUG11(printk("qla2x00_get_port_name(%ld): entered.\n",
  1258. vha->host_no));
  1259. mcp->mb[0] = MBC_GET_PORT_NAME;
  1260. mcp->mb[9] = vha->vp_idx;
  1261. mcp->out_mb = MBX_9|MBX_1|MBX_0;
  1262. if (HAS_EXTENDED_IDS(vha->hw)) {
  1263. mcp->mb[1] = loop_id;
  1264. mcp->mb[10] = opt;
  1265. mcp->out_mb |= MBX_10;
  1266. } else {
  1267. mcp->mb[1] = loop_id << 8 | opt;
  1268. }
  1269. mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1270. mcp->tov = MBX_TOV_SECONDS;
  1271. mcp->flags = 0;
  1272. rval = qla2x00_mailbox_command(vha, mcp);
  1273. if (rval != QLA_SUCCESS) {
  1274. /*EMPTY*/
  1275. DEBUG2_3_11(printk("qla2x00_get_port_name(%ld): failed=%x.\n",
  1276. vha->host_no, rval));
  1277. } else {
  1278. if (name != NULL) {
  1279. /* This function returns name in big endian. */
  1280. name[0] = MSB(mcp->mb[2]);
  1281. name[1] = LSB(mcp->mb[2]);
  1282. name[2] = MSB(mcp->mb[3]);
  1283. name[3] = LSB(mcp->mb[3]);
  1284. name[4] = MSB(mcp->mb[6]);
  1285. name[5] = LSB(mcp->mb[6]);
  1286. name[6] = MSB(mcp->mb[7]);
  1287. name[7] = LSB(mcp->mb[7]);
  1288. }
  1289. DEBUG11(printk("qla2x00_get_port_name(%ld): done.\n",
  1290. vha->host_no));
  1291. }
  1292. return rval;
  1293. }
  1294. /*
  1295. * qla2x00_lip_reset
  1296. * Issue LIP reset mailbox command.
  1297. *
  1298. * Input:
  1299. * ha = adapter block pointer.
  1300. * TARGET_QUEUE_LOCK must be released.
  1301. * ADAPTER_STATE_LOCK must be released.
  1302. *
  1303. * Returns:
  1304. * qla2x00 local function return status code.
  1305. *
  1306. * Context:
  1307. * Kernel context.
  1308. */
  1309. int
  1310. qla2x00_lip_reset(scsi_qla_host_t *vha)
  1311. {
  1312. int rval;
  1313. mbx_cmd_t mc;
  1314. mbx_cmd_t *mcp = &mc;
  1315. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1316. if (IS_QLA8XXX_TYPE(vha->hw)) {
  1317. /* Logout across all FCFs. */
  1318. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1319. mcp->mb[1] = BIT_1;
  1320. mcp->mb[2] = 0;
  1321. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  1322. } else if (IS_FWI2_CAPABLE(vha->hw)) {
  1323. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1324. mcp->mb[1] = BIT_6;
  1325. mcp->mb[2] = 0;
  1326. mcp->mb[3] = vha->hw->loop_reset_delay;
  1327. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1328. } else {
  1329. mcp->mb[0] = MBC_LIP_RESET;
  1330. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1331. if (HAS_EXTENDED_IDS(vha->hw)) {
  1332. mcp->mb[1] = 0x00ff;
  1333. mcp->mb[10] = 0;
  1334. mcp->out_mb |= MBX_10;
  1335. } else {
  1336. mcp->mb[1] = 0xff00;
  1337. }
  1338. mcp->mb[2] = vha->hw->loop_reset_delay;
  1339. mcp->mb[3] = 0;
  1340. }
  1341. mcp->in_mb = MBX_0;
  1342. mcp->tov = MBX_TOV_SECONDS;
  1343. mcp->flags = 0;
  1344. rval = qla2x00_mailbox_command(vha, mcp);
  1345. if (rval != QLA_SUCCESS) {
  1346. /*EMPTY*/
  1347. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n",
  1348. __func__, vha->host_no, rval));
  1349. } else {
  1350. /*EMPTY*/
  1351. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1352. }
  1353. return rval;
  1354. }
  1355. /*
  1356. * qla2x00_send_sns
  1357. * Send SNS command.
  1358. *
  1359. * Input:
  1360. * ha = adapter block pointer.
  1361. * sns = pointer for command.
  1362. * cmd_size = command size.
  1363. * buf_size = response/command size.
  1364. * TARGET_QUEUE_LOCK must be released.
  1365. * ADAPTER_STATE_LOCK must be released.
  1366. *
  1367. * Returns:
  1368. * qla2x00 local function return status code.
  1369. *
  1370. * Context:
  1371. * Kernel context.
  1372. */
  1373. int
  1374. qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
  1375. uint16_t cmd_size, size_t buf_size)
  1376. {
  1377. int rval;
  1378. mbx_cmd_t mc;
  1379. mbx_cmd_t *mcp = &mc;
  1380. DEBUG11(printk("qla2x00_send_sns(%ld): entered.\n",
  1381. vha->host_no));
  1382. DEBUG11(printk("qla2x00_send_sns: retry cnt=%d ratov=%d total "
  1383. "tov=%d.\n", vha->hw->retry_count, vha->hw->login_timeout,
  1384. mcp->tov));
  1385. mcp->mb[0] = MBC_SEND_SNS_COMMAND;
  1386. mcp->mb[1] = cmd_size;
  1387. mcp->mb[2] = MSW(sns_phys_address);
  1388. mcp->mb[3] = LSW(sns_phys_address);
  1389. mcp->mb[6] = MSW(MSD(sns_phys_address));
  1390. mcp->mb[7] = LSW(MSD(sns_phys_address));
  1391. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1392. mcp->in_mb = MBX_0|MBX_1;
  1393. mcp->buf_size = buf_size;
  1394. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
  1395. mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
  1396. rval = qla2x00_mailbox_command(vha, mcp);
  1397. if (rval != QLA_SUCCESS) {
  1398. /*EMPTY*/
  1399. DEBUG(printk("qla2x00_send_sns(%ld): failed=%x mb[0]=%x "
  1400. "mb[1]=%x.\n", vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1401. DEBUG2_3_11(printk("qla2x00_send_sns(%ld): failed=%x mb[0]=%x "
  1402. "mb[1]=%x.\n", vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1403. } else {
  1404. /*EMPTY*/
  1405. DEBUG11(printk("qla2x00_send_sns(%ld): done.\n", vha->host_no));
  1406. }
  1407. return rval;
  1408. }
  1409. int
  1410. qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1411. uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
  1412. {
  1413. int rval;
  1414. struct logio_entry_24xx *lg;
  1415. dma_addr_t lg_dma;
  1416. uint32_t iop[2];
  1417. struct qla_hw_data *ha = vha->hw;
  1418. struct req_que *req;
  1419. struct rsp_que *rsp;
  1420. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1421. if (ha->flags.cpu_affinity_enabled)
  1422. req = ha->req_q_map[0];
  1423. else
  1424. req = vha->req;
  1425. rsp = req->rsp;
  1426. lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
  1427. if (lg == NULL) {
  1428. DEBUG2_3(printk("%s(%ld): failed to allocate Login IOCB.\n",
  1429. __func__, vha->host_no));
  1430. return QLA_MEMORY_ALLOC_FAILED;
  1431. }
  1432. memset(lg, 0, sizeof(struct logio_entry_24xx));
  1433. lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1434. lg->entry_count = 1;
  1435. lg->handle = MAKE_HANDLE(req->id, lg->handle);
  1436. lg->nport_handle = cpu_to_le16(loop_id);
  1437. lg->control_flags = __constant_cpu_to_le16(LCF_COMMAND_PLOGI);
  1438. if (opt & BIT_0)
  1439. lg->control_flags |= __constant_cpu_to_le16(LCF_COND_PLOGI);
  1440. if (opt & BIT_1)
  1441. lg->control_flags |= __constant_cpu_to_le16(LCF_SKIP_PRLI);
  1442. lg->port_id[0] = al_pa;
  1443. lg->port_id[1] = area;
  1444. lg->port_id[2] = domain;
  1445. lg->vp_index = vha->vp_idx;
  1446. rval = qla2x00_issue_iocb(vha, lg, lg_dma, 0);
  1447. if (rval != QLA_SUCCESS) {
  1448. DEBUG2_3_11(printk("%s(%ld): failed to issue Login IOCB "
  1449. "(%x).\n", __func__, vha->host_no, rval));
  1450. } else if (lg->entry_status != 0) {
  1451. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1452. "-- error status (%x).\n", __func__, vha->host_no,
  1453. lg->entry_status));
  1454. rval = QLA_FUNCTION_FAILED;
  1455. } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  1456. iop[0] = le32_to_cpu(lg->io_parameter[0]);
  1457. iop[1] = le32_to_cpu(lg->io_parameter[1]);
  1458. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1459. "-- completion status (%x) ioparam=%x/%x.\n", __func__,
  1460. vha->host_no, le16_to_cpu(lg->comp_status), iop[0],
  1461. iop[1]));
  1462. switch (iop[0]) {
  1463. case LSC_SCODE_PORTID_USED:
  1464. mb[0] = MBS_PORT_ID_USED;
  1465. mb[1] = LSW(iop[1]);
  1466. break;
  1467. case LSC_SCODE_NPORT_USED:
  1468. mb[0] = MBS_LOOP_ID_USED;
  1469. break;
  1470. case LSC_SCODE_NOLINK:
  1471. case LSC_SCODE_NOIOCB:
  1472. case LSC_SCODE_NOXCB:
  1473. case LSC_SCODE_CMD_FAILED:
  1474. case LSC_SCODE_NOFABRIC:
  1475. case LSC_SCODE_FW_NOT_READY:
  1476. case LSC_SCODE_NOT_LOGGED_IN:
  1477. case LSC_SCODE_NOPCB:
  1478. case LSC_SCODE_ELS_REJECT:
  1479. case LSC_SCODE_CMD_PARAM_ERR:
  1480. case LSC_SCODE_NONPORT:
  1481. case LSC_SCODE_LOGGED_IN:
  1482. case LSC_SCODE_NOFLOGI_ACC:
  1483. default:
  1484. mb[0] = MBS_COMMAND_ERROR;
  1485. break;
  1486. }
  1487. } else {
  1488. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1489. iop[0] = le32_to_cpu(lg->io_parameter[0]);
  1490. mb[0] = MBS_COMMAND_COMPLETE;
  1491. mb[1] = 0;
  1492. if (iop[0] & BIT_4) {
  1493. if (iop[0] & BIT_8)
  1494. mb[1] |= BIT_1;
  1495. } else
  1496. mb[1] = BIT_0;
  1497. /* Passback COS information. */
  1498. mb[10] = 0;
  1499. if (lg->io_parameter[7] || lg->io_parameter[8])
  1500. mb[10] |= BIT_0; /* Class 2. */
  1501. if (lg->io_parameter[9] || lg->io_parameter[10])
  1502. mb[10] |= BIT_1; /* Class 3. */
  1503. }
  1504. dma_pool_free(ha->s_dma_pool, lg, lg_dma);
  1505. return rval;
  1506. }
  1507. /*
  1508. * qla2x00_login_fabric
  1509. * Issue login fabric port mailbox command.
  1510. *
  1511. * Input:
  1512. * ha = adapter block pointer.
  1513. * loop_id = device loop ID.
  1514. * domain = device domain.
  1515. * area = device area.
  1516. * al_pa = device AL_PA.
  1517. * status = pointer for return status.
  1518. * opt = command options.
  1519. * TARGET_QUEUE_LOCK must be released.
  1520. * ADAPTER_STATE_LOCK must be released.
  1521. *
  1522. * Returns:
  1523. * qla2x00 local function return status code.
  1524. *
  1525. * Context:
  1526. * Kernel context.
  1527. */
  1528. int
  1529. qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1530. uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
  1531. {
  1532. int rval;
  1533. mbx_cmd_t mc;
  1534. mbx_cmd_t *mcp = &mc;
  1535. struct qla_hw_data *ha = vha->hw;
  1536. DEBUG11(printk("qla2x00_login_fabric(%ld): entered.\n", vha->host_no));
  1537. mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
  1538. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1539. if (HAS_EXTENDED_IDS(ha)) {
  1540. mcp->mb[1] = loop_id;
  1541. mcp->mb[10] = opt;
  1542. mcp->out_mb |= MBX_10;
  1543. } else {
  1544. mcp->mb[1] = (loop_id << 8) | opt;
  1545. }
  1546. mcp->mb[2] = domain;
  1547. mcp->mb[3] = area << 8 | al_pa;
  1548. mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
  1549. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1550. mcp->flags = 0;
  1551. rval = qla2x00_mailbox_command(vha, mcp);
  1552. /* Return mailbox statuses. */
  1553. if (mb != NULL) {
  1554. mb[0] = mcp->mb[0];
  1555. mb[1] = mcp->mb[1];
  1556. mb[2] = mcp->mb[2];
  1557. mb[6] = mcp->mb[6];
  1558. mb[7] = mcp->mb[7];
  1559. /* COS retrieved from Get-Port-Database mailbox command. */
  1560. mb[10] = 0;
  1561. }
  1562. if (rval != QLA_SUCCESS) {
  1563. /* RLU tmp code: need to change main mailbox_command function to
  1564. * return ok even when the mailbox completion value is not
  1565. * SUCCESS. The caller needs to be responsible to interpret
  1566. * the return values of this mailbox command if we're not
  1567. * to change too much of the existing code.
  1568. */
  1569. if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
  1570. mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
  1571. mcp->mb[0] == 0x4006)
  1572. rval = QLA_SUCCESS;
  1573. /*EMPTY*/
  1574. DEBUG2_3_11(printk("qla2x00_login_fabric(%ld): failed=%x "
  1575. "mb[0]=%x mb[1]=%x mb[2]=%x.\n", vha->host_no, rval,
  1576. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  1577. } else {
  1578. /*EMPTY*/
  1579. DEBUG11(printk("qla2x00_login_fabric(%ld): done.\n",
  1580. vha->host_no));
  1581. }
  1582. return rval;
  1583. }
  1584. /*
  1585. * qla2x00_login_local_device
  1586. * Issue login loop port mailbox command.
  1587. *
  1588. * Input:
  1589. * ha = adapter block pointer.
  1590. * loop_id = device loop ID.
  1591. * opt = command options.
  1592. *
  1593. * Returns:
  1594. * Return status code.
  1595. *
  1596. * Context:
  1597. * Kernel context.
  1598. *
  1599. */
  1600. int
  1601. qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
  1602. uint16_t *mb_ret, uint8_t opt)
  1603. {
  1604. int rval;
  1605. mbx_cmd_t mc;
  1606. mbx_cmd_t *mcp = &mc;
  1607. struct qla_hw_data *ha = vha->hw;
  1608. if (IS_FWI2_CAPABLE(ha))
  1609. return qla24xx_login_fabric(vha, fcport->loop_id,
  1610. fcport->d_id.b.domain, fcport->d_id.b.area,
  1611. fcport->d_id.b.al_pa, mb_ret, opt);
  1612. DEBUG3(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1613. mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
  1614. if (HAS_EXTENDED_IDS(ha))
  1615. mcp->mb[1] = fcport->loop_id;
  1616. else
  1617. mcp->mb[1] = fcport->loop_id << 8;
  1618. mcp->mb[2] = opt;
  1619. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  1620. mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
  1621. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1622. mcp->flags = 0;
  1623. rval = qla2x00_mailbox_command(vha, mcp);
  1624. /* Return mailbox statuses. */
  1625. if (mb_ret != NULL) {
  1626. mb_ret[0] = mcp->mb[0];
  1627. mb_ret[1] = mcp->mb[1];
  1628. mb_ret[6] = mcp->mb[6];
  1629. mb_ret[7] = mcp->mb[7];
  1630. }
  1631. if (rval != QLA_SUCCESS) {
  1632. /* AV tmp code: need to change main mailbox_command function to
  1633. * return ok even when the mailbox completion value is not
  1634. * SUCCESS. The caller needs to be responsible to interpret
  1635. * the return values of this mailbox command if we're not
  1636. * to change too much of the existing code.
  1637. */
  1638. if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
  1639. rval = QLA_SUCCESS;
  1640. DEBUG(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  1641. "mb[6]=%x mb[7]=%x.\n", __func__, vha->host_no, rval,
  1642. mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]));
  1643. DEBUG2_3(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  1644. "mb[6]=%x mb[7]=%x.\n", __func__, vha->host_no, rval,
  1645. mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]));
  1646. } else {
  1647. /*EMPTY*/
  1648. DEBUG3(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1649. }
  1650. return (rval);
  1651. }
  1652. int
  1653. qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1654. uint8_t area, uint8_t al_pa)
  1655. {
  1656. int rval;
  1657. struct logio_entry_24xx *lg;
  1658. dma_addr_t lg_dma;
  1659. struct qla_hw_data *ha = vha->hw;
  1660. struct req_que *req;
  1661. struct rsp_que *rsp;
  1662. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1663. lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
  1664. if (lg == NULL) {
  1665. DEBUG2_3(printk("%s(%ld): failed to allocate Logout IOCB.\n",
  1666. __func__, vha->host_no));
  1667. return QLA_MEMORY_ALLOC_FAILED;
  1668. }
  1669. memset(lg, 0, sizeof(struct logio_entry_24xx));
  1670. if (ql2xmaxqueues > 1)
  1671. req = ha->req_q_map[0];
  1672. else
  1673. req = vha->req;
  1674. rsp = req->rsp;
  1675. lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1676. lg->entry_count = 1;
  1677. lg->handle = MAKE_HANDLE(req->id, lg->handle);
  1678. lg->nport_handle = cpu_to_le16(loop_id);
  1679. lg->control_flags =
  1680. __constant_cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
  1681. LCF_FREE_NPORT);
  1682. lg->port_id[0] = al_pa;
  1683. lg->port_id[1] = area;
  1684. lg->port_id[2] = domain;
  1685. lg->vp_index = vha->vp_idx;
  1686. rval = qla2x00_issue_iocb(vha, lg, lg_dma, 0);
  1687. if (rval != QLA_SUCCESS) {
  1688. DEBUG2_3_11(printk("%s(%ld): failed to issue Logout IOCB "
  1689. "(%x).\n", __func__, vha->host_no, rval));
  1690. } else if (lg->entry_status != 0) {
  1691. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1692. "-- error status (%x).\n", __func__, vha->host_no,
  1693. lg->entry_status));
  1694. rval = QLA_FUNCTION_FAILED;
  1695. } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  1696. DEBUG2_3_11(printk("%s(%ld %d): failed to complete IOCB "
  1697. "-- completion status (%x) ioparam=%x/%x.\n", __func__,
  1698. vha->host_no, vha->vp_idx, le16_to_cpu(lg->comp_status),
  1699. le32_to_cpu(lg->io_parameter[0]),
  1700. le32_to_cpu(lg->io_parameter[1])));
  1701. } else {
  1702. /*EMPTY*/
  1703. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1704. }
  1705. dma_pool_free(ha->s_dma_pool, lg, lg_dma);
  1706. return rval;
  1707. }
  1708. /*
  1709. * qla2x00_fabric_logout
  1710. * Issue logout fabric port mailbox command.
  1711. *
  1712. * Input:
  1713. * ha = adapter block pointer.
  1714. * loop_id = device loop ID.
  1715. * TARGET_QUEUE_LOCK must be released.
  1716. * ADAPTER_STATE_LOCK must be released.
  1717. *
  1718. * Returns:
  1719. * qla2x00 local function return status code.
  1720. *
  1721. * Context:
  1722. * Kernel context.
  1723. */
  1724. int
  1725. qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1726. uint8_t area, uint8_t al_pa)
  1727. {
  1728. int rval;
  1729. mbx_cmd_t mc;
  1730. mbx_cmd_t *mcp = &mc;
  1731. DEBUG11(printk("qla2x00_fabric_logout(%ld): entered.\n",
  1732. vha->host_no));
  1733. mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
  1734. mcp->out_mb = MBX_1|MBX_0;
  1735. if (HAS_EXTENDED_IDS(vha->hw)) {
  1736. mcp->mb[1] = loop_id;
  1737. mcp->mb[10] = 0;
  1738. mcp->out_mb |= MBX_10;
  1739. } else {
  1740. mcp->mb[1] = loop_id << 8;
  1741. }
  1742. mcp->in_mb = MBX_1|MBX_0;
  1743. mcp->tov = MBX_TOV_SECONDS;
  1744. mcp->flags = 0;
  1745. rval = qla2x00_mailbox_command(vha, mcp);
  1746. if (rval != QLA_SUCCESS) {
  1747. /*EMPTY*/
  1748. DEBUG2_3_11(printk("qla2x00_fabric_logout(%ld): failed=%x "
  1749. "mbx1=%x.\n", vha->host_no, rval, mcp->mb[1]));
  1750. } else {
  1751. /*EMPTY*/
  1752. DEBUG11(printk("qla2x00_fabric_logout(%ld): done.\n",
  1753. vha->host_no));
  1754. }
  1755. return rval;
  1756. }
  1757. /*
  1758. * qla2x00_full_login_lip
  1759. * Issue full login LIP mailbox command.
  1760. *
  1761. * Input:
  1762. * ha = adapter block pointer.
  1763. * TARGET_QUEUE_LOCK must be released.
  1764. * ADAPTER_STATE_LOCK must be released.
  1765. *
  1766. * Returns:
  1767. * qla2x00 local function return status code.
  1768. *
  1769. * Context:
  1770. * Kernel context.
  1771. */
  1772. int
  1773. qla2x00_full_login_lip(scsi_qla_host_t *vha)
  1774. {
  1775. int rval;
  1776. mbx_cmd_t mc;
  1777. mbx_cmd_t *mcp = &mc;
  1778. DEBUG11(printk("qla2x00_full_login_lip(%ld): entered.\n",
  1779. vha->host_no));
  1780. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1781. mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
  1782. mcp->mb[2] = 0;
  1783. mcp->mb[3] = 0;
  1784. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1785. mcp->in_mb = MBX_0;
  1786. mcp->tov = MBX_TOV_SECONDS;
  1787. mcp->flags = 0;
  1788. rval = qla2x00_mailbox_command(vha, mcp);
  1789. if (rval != QLA_SUCCESS) {
  1790. /*EMPTY*/
  1791. DEBUG2_3_11(printk("qla2x00_full_login_lip(%ld): failed=%x.\n",
  1792. vha->host_no, rval));
  1793. } else {
  1794. /*EMPTY*/
  1795. DEBUG11(printk("qla2x00_full_login_lip(%ld): done.\n",
  1796. vha->host_no));
  1797. }
  1798. return rval;
  1799. }
  1800. /*
  1801. * qla2x00_get_id_list
  1802. *
  1803. * Input:
  1804. * ha = adapter block pointer.
  1805. *
  1806. * Returns:
  1807. * qla2x00 local function return status code.
  1808. *
  1809. * Context:
  1810. * Kernel context.
  1811. */
  1812. int
  1813. qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
  1814. uint16_t *entries)
  1815. {
  1816. int rval;
  1817. mbx_cmd_t mc;
  1818. mbx_cmd_t *mcp = &mc;
  1819. DEBUG11(printk("qla2x00_get_id_list(%ld): entered.\n",
  1820. vha->host_no));
  1821. if (id_list == NULL)
  1822. return QLA_FUNCTION_FAILED;
  1823. mcp->mb[0] = MBC_GET_ID_LIST;
  1824. mcp->out_mb = MBX_0;
  1825. if (IS_FWI2_CAPABLE(vha->hw)) {
  1826. mcp->mb[2] = MSW(id_list_dma);
  1827. mcp->mb[3] = LSW(id_list_dma);
  1828. mcp->mb[6] = MSW(MSD(id_list_dma));
  1829. mcp->mb[7] = LSW(MSD(id_list_dma));
  1830. mcp->mb[8] = 0;
  1831. mcp->mb[9] = vha->vp_idx;
  1832. mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
  1833. } else {
  1834. mcp->mb[1] = MSW(id_list_dma);
  1835. mcp->mb[2] = LSW(id_list_dma);
  1836. mcp->mb[3] = MSW(MSD(id_list_dma));
  1837. mcp->mb[6] = LSW(MSD(id_list_dma));
  1838. mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
  1839. }
  1840. mcp->in_mb = MBX_1|MBX_0;
  1841. mcp->tov = MBX_TOV_SECONDS;
  1842. mcp->flags = 0;
  1843. rval = qla2x00_mailbox_command(vha, mcp);
  1844. if (rval != QLA_SUCCESS) {
  1845. /*EMPTY*/
  1846. DEBUG2_3_11(printk("qla2x00_get_id_list(%ld): failed=%x.\n",
  1847. vha->host_no, rval));
  1848. } else {
  1849. *entries = mcp->mb[1];
  1850. DEBUG11(printk("qla2x00_get_id_list(%ld): done.\n",
  1851. vha->host_no));
  1852. }
  1853. return rval;
  1854. }
  1855. /*
  1856. * qla2x00_get_resource_cnts
  1857. * Get current firmware resource counts.
  1858. *
  1859. * Input:
  1860. * ha = adapter block pointer.
  1861. *
  1862. * Returns:
  1863. * qla2x00 local function return status code.
  1864. *
  1865. * Context:
  1866. * Kernel context.
  1867. */
  1868. int
  1869. qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
  1870. uint16_t *orig_xchg_cnt, uint16_t *cur_iocb_cnt,
  1871. uint16_t *orig_iocb_cnt, uint16_t *max_npiv_vports, uint16_t *max_fcfs)
  1872. {
  1873. int rval;
  1874. mbx_cmd_t mc;
  1875. mbx_cmd_t *mcp = &mc;
  1876. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1877. mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
  1878. mcp->out_mb = MBX_0;
  1879. mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1880. if (IS_QLA81XX(vha->hw))
  1881. mcp->in_mb |= MBX_12;
  1882. mcp->tov = MBX_TOV_SECONDS;
  1883. mcp->flags = 0;
  1884. rval = qla2x00_mailbox_command(vha, mcp);
  1885. if (rval != QLA_SUCCESS) {
  1886. /*EMPTY*/
  1887. DEBUG2_3_11(printk("%s(%ld): failed = %x.\n", __func__,
  1888. vha->host_no, mcp->mb[0]));
  1889. } else {
  1890. DEBUG11(printk("%s(%ld): done. mb1=%x mb2=%x mb3=%x mb6=%x "
  1891. "mb7=%x mb10=%x mb11=%x mb12=%x.\n", __func__,
  1892. vha->host_no, mcp->mb[1], mcp->mb[2], mcp->mb[3],
  1893. mcp->mb[6], mcp->mb[7], mcp->mb[10], mcp->mb[11],
  1894. mcp->mb[12]));
  1895. if (cur_xchg_cnt)
  1896. *cur_xchg_cnt = mcp->mb[3];
  1897. if (orig_xchg_cnt)
  1898. *orig_xchg_cnt = mcp->mb[6];
  1899. if (cur_iocb_cnt)
  1900. *cur_iocb_cnt = mcp->mb[7];
  1901. if (orig_iocb_cnt)
  1902. *orig_iocb_cnt = mcp->mb[10];
  1903. if (vha->hw->flags.npiv_supported && max_npiv_vports)
  1904. *max_npiv_vports = mcp->mb[11];
  1905. if (IS_QLA81XX(vha->hw) && max_fcfs)
  1906. *max_fcfs = mcp->mb[12];
  1907. }
  1908. return (rval);
  1909. }
  1910. #if defined(QL_DEBUG_LEVEL_3)
  1911. /*
  1912. * qla2x00_get_fcal_position_map
  1913. * Get FCAL (LILP) position map using mailbox command
  1914. *
  1915. * Input:
  1916. * ha = adapter state pointer.
  1917. * pos_map = buffer pointer (can be NULL).
  1918. *
  1919. * Returns:
  1920. * qla2x00 local function return status code.
  1921. *
  1922. * Context:
  1923. * Kernel context.
  1924. */
  1925. int
  1926. qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
  1927. {
  1928. int rval;
  1929. mbx_cmd_t mc;
  1930. mbx_cmd_t *mcp = &mc;
  1931. char *pmap;
  1932. dma_addr_t pmap_dma;
  1933. struct qla_hw_data *ha = vha->hw;
  1934. pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
  1935. if (pmap == NULL) {
  1936. DEBUG2_3_11(printk("%s(%ld): **** Mem Alloc Failed ****",
  1937. __func__, vha->host_no));
  1938. return QLA_MEMORY_ALLOC_FAILED;
  1939. }
  1940. memset(pmap, 0, FCAL_MAP_SIZE);
  1941. mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
  1942. mcp->mb[2] = MSW(pmap_dma);
  1943. mcp->mb[3] = LSW(pmap_dma);
  1944. mcp->mb[6] = MSW(MSD(pmap_dma));
  1945. mcp->mb[7] = LSW(MSD(pmap_dma));
  1946. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1947. mcp->in_mb = MBX_1|MBX_0;
  1948. mcp->buf_size = FCAL_MAP_SIZE;
  1949. mcp->flags = MBX_DMA_IN;
  1950. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1951. rval = qla2x00_mailbox_command(vha, mcp);
  1952. if (rval == QLA_SUCCESS) {
  1953. DEBUG11(printk("%s(%ld): (mb0=%x/mb1=%x) FC/AL Position Map "
  1954. "size (%x)\n", __func__, vha->host_no, mcp->mb[0],
  1955. mcp->mb[1], (unsigned)pmap[0]));
  1956. DEBUG11(qla2x00_dump_buffer(pmap, pmap[0] + 1));
  1957. if (pos_map)
  1958. memcpy(pos_map, pmap, FCAL_MAP_SIZE);
  1959. }
  1960. dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
  1961. if (rval != QLA_SUCCESS) {
  1962. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  1963. vha->host_no, rval));
  1964. } else {
  1965. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1966. }
  1967. return rval;
  1968. }
  1969. #endif
  1970. /*
  1971. * qla2x00_get_link_status
  1972. *
  1973. * Input:
  1974. * ha = adapter block pointer.
  1975. * loop_id = device loop ID.
  1976. * ret_buf = pointer to link status return buffer.
  1977. *
  1978. * Returns:
  1979. * 0 = success.
  1980. * BIT_0 = mem alloc error.
  1981. * BIT_1 = mailbox error.
  1982. */
  1983. int
  1984. qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
  1985. struct link_statistics *stats, dma_addr_t stats_dma)
  1986. {
  1987. int rval;
  1988. mbx_cmd_t mc;
  1989. mbx_cmd_t *mcp = &mc;
  1990. uint32_t *siter, *diter, dwords;
  1991. struct qla_hw_data *ha = vha->hw;
  1992. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1993. mcp->mb[0] = MBC_GET_LINK_STATUS;
  1994. mcp->mb[2] = MSW(stats_dma);
  1995. mcp->mb[3] = LSW(stats_dma);
  1996. mcp->mb[6] = MSW(MSD(stats_dma));
  1997. mcp->mb[7] = LSW(MSD(stats_dma));
  1998. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1999. mcp->in_mb = MBX_0;
  2000. if (IS_FWI2_CAPABLE(ha)) {
  2001. mcp->mb[1] = loop_id;
  2002. mcp->mb[4] = 0;
  2003. mcp->mb[10] = 0;
  2004. mcp->out_mb |= MBX_10|MBX_4|MBX_1;
  2005. mcp->in_mb |= MBX_1;
  2006. } else if (HAS_EXTENDED_IDS(ha)) {
  2007. mcp->mb[1] = loop_id;
  2008. mcp->mb[10] = 0;
  2009. mcp->out_mb |= MBX_10|MBX_1;
  2010. } else {
  2011. mcp->mb[1] = loop_id << 8;
  2012. mcp->out_mb |= MBX_1;
  2013. }
  2014. mcp->tov = MBX_TOV_SECONDS;
  2015. mcp->flags = IOCTL_CMD;
  2016. rval = qla2x00_mailbox_command(vha, mcp);
  2017. if (rval == QLA_SUCCESS) {
  2018. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  2019. DEBUG2_3_11(printk("%s(%ld): cmd failed. mbx0=%x.\n",
  2020. __func__, vha->host_no, mcp->mb[0]));
  2021. rval = QLA_FUNCTION_FAILED;
  2022. } else {
  2023. /* Copy over data -- firmware data is LE. */
  2024. dwords = offsetof(struct link_statistics, unused1) / 4;
  2025. siter = diter = &stats->link_fail_cnt;
  2026. while (dwords--)
  2027. *diter++ = le32_to_cpu(*siter++);
  2028. }
  2029. } else {
  2030. /* Failed. */
  2031. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2032. vha->host_no, rval));
  2033. }
  2034. return rval;
  2035. }
  2036. int
  2037. qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
  2038. dma_addr_t stats_dma)
  2039. {
  2040. int rval;
  2041. mbx_cmd_t mc;
  2042. mbx_cmd_t *mcp = &mc;
  2043. uint32_t *siter, *diter, dwords;
  2044. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2045. mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
  2046. mcp->mb[2] = MSW(stats_dma);
  2047. mcp->mb[3] = LSW(stats_dma);
  2048. mcp->mb[6] = MSW(MSD(stats_dma));
  2049. mcp->mb[7] = LSW(MSD(stats_dma));
  2050. mcp->mb[8] = sizeof(struct link_statistics) / 4;
  2051. mcp->mb[9] = vha->vp_idx;
  2052. mcp->mb[10] = 0;
  2053. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  2054. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  2055. mcp->tov = MBX_TOV_SECONDS;
  2056. mcp->flags = IOCTL_CMD;
  2057. rval = qla2x00_mailbox_command(vha, mcp);
  2058. if (rval == QLA_SUCCESS) {
  2059. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  2060. DEBUG2_3_11(printk("%s(%ld): cmd failed. mbx0=%x.\n",
  2061. __func__, vha->host_no, mcp->mb[0]));
  2062. rval = QLA_FUNCTION_FAILED;
  2063. } else {
  2064. /* Copy over data -- firmware data is LE. */
  2065. dwords = sizeof(struct link_statistics) / 4;
  2066. siter = diter = &stats->link_fail_cnt;
  2067. while (dwords--)
  2068. *diter++ = le32_to_cpu(*siter++);
  2069. }
  2070. } else {
  2071. /* Failed. */
  2072. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2073. vha->host_no, rval));
  2074. }
  2075. return rval;
  2076. }
  2077. int
  2078. qla24xx_abort_command(srb_t *sp)
  2079. {
  2080. int rval;
  2081. unsigned long flags = 0;
  2082. struct abort_entry_24xx *abt;
  2083. dma_addr_t abt_dma;
  2084. uint32_t handle;
  2085. fc_port_t *fcport = sp->fcport;
  2086. struct scsi_qla_host *vha = fcport->vha;
  2087. struct qla_hw_data *ha = vha->hw;
  2088. struct req_que *req = vha->req;
  2089. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2090. spin_lock_irqsave(&ha->hardware_lock, flags);
  2091. for (handle = 1; handle < MAX_OUTSTANDING_COMMANDS; handle++) {
  2092. if (req->outstanding_cmds[handle] == sp)
  2093. break;
  2094. }
  2095. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2096. if (handle == MAX_OUTSTANDING_COMMANDS) {
  2097. /* Command not found. */
  2098. return QLA_FUNCTION_FAILED;
  2099. }
  2100. abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
  2101. if (abt == NULL) {
  2102. DEBUG2_3(printk("%s(%ld): failed to allocate Abort IOCB.\n",
  2103. __func__, vha->host_no));
  2104. return QLA_MEMORY_ALLOC_FAILED;
  2105. }
  2106. memset(abt, 0, sizeof(struct abort_entry_24xx));
  2107. abt->entry_type = ABORT_IOCB_TYPE;
  2108. abt->entry_count = 1;
  2109. abt->handle = MAKE_HANDLE(req->id, abt->handle);
  2110. abt->nport_handle = cpu_to_le16(fcport->loop_id);
  2111. abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
  2112. abt->port_id[0] = fcport->d_id.b.al_pa;
  2113. abt->port_id[1] = fcport->d_id.b.area;
  2114. abt->port_id[2] = fcport->d_id.b.domain;
  2115. abt->vp_index = fcport->vp_idx;
  2116. abt->req_que_no = cpu_to_le16(req->id);
  2117. rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
  2118. if (rval != QLA_SUCCESS) {
  2119. DEBUG2_3_11(printk("%s(%ld): failed to issue IOCB (%x).\n",
  2120. __func__, vha->host_no, rval));
  2121. } else if (abt->entry_status != 0) {
  2122. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2123. "-- error status (%x).\n", __func__, vha->host_no,
  2124. abt->entry_status));
  2125. rval = QLA_FUNCTION_FAILED;
  2126. } else if (abt->nport_handle != __constant_cpu_to_le16(0)) {
  2127. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2128. "-- completion status (%x).\n", __func__, vha->host_no,
  2129. le16_to_cpu(abt->nport_handle)));
  2130. rval = QLA_FUNCTION_FAILED;
  2131. } else {
  2132. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2133. }
  2134. dma_pool_free(ha->s_dma_pool, abt, abt_dma);
  2135. return rval;
  2136. }
  2137. struct tsk_mgmt_cmd {
  2138. union {
  2139. struct tsk_mgmt_entry tsk;
  2140. struct sts_entry_24xx sts;
  2141. } p;
  2142. };
  2143. static int
  2144. __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
  2145. unsigned int l, int tag)
  2146. {
  2147. int rval, rval2;
  2148. struct tsk_mgmt_cmd *tsk;
  2149. struct sts_entry_24xx *sts;
  2150. dma_addr_t tsk_dma;
  2151. scsi_qla_host_t *vha;
  2152. struct qla_hw_data *ha;
  2153. struct req_que *req;
  2154. struct rsp_que *rsp;
  2155. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  2156. vha = fcport->vha;
  2157. ha = vha->hw;
  2158. req = vha->req;
  2159. if (ha->flags.cpu_affinity_enabled)
  2160. rsp = ha->rsp_q_map[tag + 1];
  2161. else
  2162. rsp = req->rsp;
  2163. tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
  2164. if (tsk == NULL) {
  2165. DEBUG2_3(printk("%s(%ld): failed to allocate Task Management "
  2166. "IOCB.\n", __func__, vha->host_no));
  2167. return QLA_MEMORY_ALLOC_FAILED;
  2168. }
  2169. memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
  2170. tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
  2171. tsk->p.tsk.entry_count = 1;
  2172. tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
  2173. tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
  2174. tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
  2175. tsk->p.tsk.control_flags = cpu_to_le32(type);
  2176. tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
  2177. tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
  2178. tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
  2179. tsk->p.tsk.vp_index = fcport->vp_idx;
  2180. if (type == TCF_LUN_RESET) {
  2181. int_to_scsilun(l, &tsk->p.tsk.lun);
  2182. host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
  2183. sizeof(tsk->p.tsk.lun));
  2184. }
  2185. sts = &tsk->p.sts;
  2186. rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
  2187. if (rval != QLA_SUCCESS) {
  2188. DEBUG2_3_11(printk("%s(%ld): failed to issue %s Reset IOCB "
  2189. "(%x).\n", __func__, vha->host_no, name, rval));
  2190. } else if (sts->entry_status != 0) {
  2191. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2192. "-- error status (%x).\n", __func__, vha->host_no,
  2193. sts->entry_status));
  2194. rval = QLA_FUNCTION_FAILED;
  2195. } else if (sts->comp_status !=
  2196. __constant_cpu_to_le16(CS_COMPLETE)) {
  2197. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2198. "-- completion status (%x).\n", __func__,
  2199. vha->host_no, le16_to_cpu(sts->comp_status)));
  2200. rval = QLA_FUNCTION_FAILED;
  2201. } else if (le16_to_cpu(sts->scsi_status) &
  2202. SS_RESPONSE_INFO_LEN_VALID) {
  2203. if (le32_to_cpu(sts->rsp_data_len) < 4) {
  2204. DEBUG2_3_11(printk("%s(%ld): ignoring inconsistent "
  2205. "data length -- not enough response info (%d).\n",
  2206. __func__, vha->host_no,
  2207. le32_to_cpu(sts->rsp_data_len)));
  2208. } else if (sts->data[3]) {
  2209. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2210. "-- response (%x).\n", __func__,
  2211. vha->host_no, sts->data[3]));
  2212. rval = QLA_FUNCTION_FAILED;
  2213. }
  2214. }
  2215. /* Issue marker IOCB. */
  2216. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
  2217. type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
  2218. if (rval2 != QLA_SUCCESS) {
  2219. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  2220. "(%x).\n", __func__, vha->host_no, rval2));
  2221. } else {
  2222. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2223. }
  2224. dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
  2225. return rval;
  2226. }
  2227. int
  2228. qla24xx_abort_target(struct fc_port *fcport, unsigned int l, int tag)
  2229. {
  2230. struct qla_hw_data *ha = fcport->vha->hw;
  2231. if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
  2232. return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
  2233. return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
  2234. }
  2235. int
  2236. qla24xx_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
  2237. {
  2238. struct qla_hw_data *ha = fcport->vha->hw;
  2239. if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
  2240. return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
  2241. return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
  2242. }
  2243. int
  2244. qla2x00_system_error(scsi_qla_host_t *vha)
  2245. {
  2246. int rval;
  2247. mbx_cmd_t mc;
  2248. mbx_cmd_t *mcp = &mc;
  2249. struct qla_hw_data *ha = vha->hw;
  2250. if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
  2251. return QLA_FUNCTION_FAILED;
  2252. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2253. mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
  2254. mcp->out_mb = MBX_0;
  2255. mcp->in_mb = MBX_0;
  2256. mcp->tov = 5;
  2257. mcp->flags = 0;
  2258. rval = qla2x00_mailbox_command(vha, mcp);
  2259. if (rval != QLA_SUCCESS) {
  2260. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2261. vha->host_no, rval));
  2262. } else {
  2263. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2264. }
  2265. return rval;
  2266. }
  2267. /**
  2268. * qla2x00_set_serdes_params() -
  2269. * @ha: HA context
  2270. *
  2271. * Returns
  2272. */
  2273. int
  2274. qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
  2275. uint16_t sw_em_2g, uint16_t sw_em_4g)
  2276. {
  2277. int rval;
  2278. mbx_cmd_t mc;
  2279. mbx_cmd_t *mcp = &mc;
  2280. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2281. mcp->mb[0] = MBC_SERDES_PARAMS;
  2282. mcp->mb[1] = BIT_0;
  2283. mcp->mb[2] = sw_em_1g | BIT_15;
  2284. mcp->mb[3] = sw_em_2g | BIT_15;
  2285. mcp->mb[4] = sw_em_4g | BIT_15;
  2286. mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2287. mcp->in_mb = MBX_0;
  2288. mcp->tov = MBX_TOV_SECONDS;
  2289. mcp->flags = 0;
  2290. rval = qla2x00_mailbox_command(vha, mcp);
  2291. if (rval != QLA_SUCCESS) {
  2292. /*EMPTY*/
  2293. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  2294. vha->host_no, rval, mcp->mb[0]));
  2295. } else {
  2296. /*EMPTY*/
  2297. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2298. }
  2299. return rval;
  2300. }
  2301. int
  2302. qla2x00_stop_firmware(scsi_qla_host_t *vha)
  2303. {
  2304. int rval;
  2305. mbx_cmd_t mc;
  2306. mbx_cmd_t *mcp = &mc;
  2307. if (!IS_FWI2_CAPABLE(vha->hw))
  2308. return QLA_FUNCTION_FAILED;
  2309. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2310. mcp->mb[0] = MBC_STOP_FIRMWARE;
  2311. mcp->out_mb = MBX_0;
  2312. mcp->in_mb = MBX_0;
  2313. mcp->tov = 5;
  2314. mcp->flags = 0;
  2315. rval = qla2x00_mailbox_command(vha, mcp);
  2316. if (rval != QLA_SUCCESS) {
  2317. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2318. vha->host_no, rval));
  2319. if (mcp->mb[0] == MBS_INVALID_COMMAND)
  2320. rval = QLA_INVALID_COMMAND;
  2321. } else {
  2322. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2323. }
  2324. return rval;
  2325. }
  2326. int
  2327. qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
  2328. uint16_t buffers)
  2329. {
  2330. int rval;
  2331. mbx_cmd_t mc;
  2332. mbx_cmd_t *mcp = &mc;
  2333. if (!IS_FWI2_CAPABLE(vha->hw))
  2334. return QLA_FUNCTION_FAILED;
  2335. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2336. return QLA_FUNCTION_FAILED;
  2337. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2338. mcp->mb[0] = MBC_TRACE_CONTROL;
  2339. mcp->mb[1] = TC_EFT_ENABLE;
  2340. mcp->mb[2] = LSW(eft_dma);
  2341. mcp->mb[3] = MSW(eft_dma);
  2342. mcp->mb[4] = LSW(MSD(eft_dma));
  2343. mcp->mb[5] = MSW(MSD(eft_dma));
  2344. mcp->mb[6] = buffers;
  2345. mcp->mb[7] = TC_AEN_DISABLE;
  2346. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2347. mcp->in_mb = MBX_1|MBX_0;
  2348. mcp->tov = MBX_TOV_SECONDS;
  2349. mcp->flags = 0;
  2350. rval = qla2x00_mailbox_command(vha, mcp);
  2351. if (rval != QLA_SUCCESS) {
  2352. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2353. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2354. } else {
  2355. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2356. }
  2357. return rval;
  2358. }
  2359. int
  2360. qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
  2361. {
  2362. int rval;
  2363. mbx_cmd_t mc;
  2364. mbx_cmd_t *mcp = &mc;
  2365. if (!IS_FWI2_CAPABLE(vha->hw))
  2366. return QLA_FUNCTION_FAILED;
  2367. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2368. return QLA_FUNCTION_FAILED;
  2369. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2370. mcp->mb[0] = MBC_TRACE_CONTROL;
  2371. mcp->mb[1] = TC_EFT_DISABLE;
  2372. mcp->out_mb = MBX_1|MBX_0;
  2373. mcp->in_mb = MBX_1|MBX_0;
  2374. mcp->tov = MBX_TOV_SECONDS;
  2375. mcp->flags = 0;
  2376. rval = qla2x00_mailbox_command(vha, mcp);
  2377. if (rval != QLA_SUCCESS) {
  2378. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2379. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2380. } else {
  2381. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2382. }
  2383. return rval;
  2384. }
  2385. int
  2386. qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
  2387. uint16_t buffers, uint16_t *mb, uint32_t *dwords)
  2388. {
  2389. int rval;
  2390. mbx_cmd_t mc;
  2391. mbx_cmd_t *mcp = &mc;
  2392. if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw))
  2393. return QLA_FUNCTION_FAILED;
  2394. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2395. return QLA_FUNCTION_FAILED;
  2396. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2397. mcp->mb[0] = MBC_TRACE_CONTROL;
  2398. mcp->mb[1] = TC_FCE_ENABLE;
  2399. mcp->mb[2] = LSW(fce_dma);
  2400. mcp->mb[3] = MSW(fce_dma);
  2401. mcp->mb[4] = LSW(MSD(fce_dma));
  2402. mcp->mb[5] = MSW(MSD(fce_dma));
  2403. mcp->mb[6] = buffers;
  2404. mcp->mb[7] = TC_AEN_DISABLE;
  2405. mcp->mb[8] = 0;
  2406. mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
  2407. mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
  2408. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
  2409. MBX_1|MBX_0;
  2410. mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2411. mcp->tov = MBX_TOV_SECONDS;
  2412. mcp->flags = 0;
  2413. rval = qla2x00_mailbox_command(vha, mcp);
  2414. if (rval != QLA_SUCCESS) {
  2415. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2416. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2417. } else {
  2418. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2419. if (mb)
  2420. memcpy(mb, mcp->mb, 8 * sizeof(*mb));
  2421. if (dwords)
  2422. *dwords = buffers;
  2423. }
  2424. return rval;
  2425. }
  2426. int
  2427. qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
  2428. {
  2429. int rval;
  2430. mbx_cmd_t mc;
  2431. mbx_cmd_t *mcp = &mc;
  2432. if (!IS_FWI2_CAPABLE(vha->hw))
  2433. return QLA_FUNCTION_FAILED;
  2434. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2435. return QLA_FUNCTION_FAILED;
  2436. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2437. mcp->mb[0] = MBC_TRACE_CONTROL;
  2438. mcp->mb[1] = TC_FCE_DISABLE;
  2439. mcp->mb[2] = TC_FCE_DISABLE_TRACE;
  2440. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  2441. mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
  2442. MBX_1|MBX_0;
  2443. mcp->tov = MBX_TOV_SECONDS;
  2444. mcp->flags = 0;
  2445. rval = qla2x00_mailbox_command(vha, mcp);
  2446. if (rval != QLA_SUCCESS) {
  2447. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2448. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2449. } else {
  2450. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2451. if (wr)
  2452. *wr = (uint64_t) mcp->mb[5] << 48 |
  2453. (uint64_t) mcp->mb[4] << 32 |
  2454. (uint64_t) mcp->mb[3] << 16 |
  2455. (uint64_t) mcp->mb[2];
  2456. if (rd)
  2457. *rd = (uint64_t) mcp->mb[9] << 48 |
  2458. (uint64_t) mcp->mb[8] << 32 |
  2459. (uint64_t) mcp->mb[7] << 16 |
  2460. (uint64_t) mcp->mb[6];
  2461. }
  2462. return rval;
  2463. }
  2464. int
  2465. qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
  2466. uint16_t *port_speed, uint16_t *mb)
  2467. {
  2468. int rval;
  2469. mbx_cmd_t mc;
  2470. mbx_cmd_t *mcp = &mc;
  2471. if (!IS_IIDMA_CAPABLE(vha->hw))
  2472. return QLA_FUNCTION_FAILED;
  2473. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2474. mcp->mb[0] = MBC_PORT_PARAMS;
  2475. mcp->mb[1] = loop_id;
  2476. mcp->mb[2] = mcp->mb[3] = 0;
  2477. mcp->mb[9] = vha->vp_idx;
  2478. mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
  2479. mcp->in_mb = MBX_3|MBX_1|MBX_0;
  2480. mcp->tov = MBX_TOV_SECONDS;
  2481. mcp->flags = 0;
  2482. rval = qla2x00_mailbox_command(vha, mcp);
  2483. /* Return mailbox statuses. */
  2484. if (mb != NULL) {
  2485. mb[0] = mcp->mb[0];
  2486. mb[1] = mcp->mb[1];
  2487. mb[3] = mcp->mb[3];
  2488. }
  2489. if (rval != QLA_SUCCESS) {
  2490. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2491. vha->host_no, rval));
  2492. } else {
  2493. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2494. if (port_speed)
  2495. *port_speed = mcp->mb[3];
  2496. }
  2497. return rval;
  2498. }
  2499. int
  2500. qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
  2501. uint16_t port_speed, uint16_t *mb)
  2502. {
  2503. int rval;
  2504. mbx_cmd_t mc;
  2505. mbx_cmd_t *mcp = &mc;
  2506. if (!IS_IIDMA_CAPABLE(vha->hw))
  2507. return QLA_FUNCTION_FAILED;
  2508. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2509. mcp->mb[0] = MBC_PORT_PARAMS;
  2510. mcp->mb[1] = loop_id;
  2511. mcp->mb[2] = BIT_0;
  2512. if (IS_QLA8XXX_TYPE(vha->hw))
  2513. mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
  2514. else
  2515. mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
  2516. mcp->mb[9] = vha->vp_idx;
  2517. mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
  2518. mcp->in_mb = MBX_3|MBX_1|MBX_0;
  2519. mcp->tov = MBX_TOV_SECONDS;
  2520. mcp->flags = 0;
  2521. rval = qla2x00_mailbox_command(vha, mcp);
  2522. /* Return mailbox statuses. */
  2523. if (mb != NULL) {
  2524. mb[0] = mcp->mb[0];
  2525. mb[1] = mcp->mb[1];
  2526. mb[3] = mcp->mb[3];
  2527. }
  2528. if (rval != QLA_SUCCESS) {
  2529. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2530. vha->host_no, rval));
  2531. } else {
  2532. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2533. }
  2534. return rval;
  2535. }
  2536. void
  2537. qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
  2538. struct vp_rpt_id_entry_24xx *rptid_entry)
  2539. {
  2540. uint8_t vp_idx;
  2541. uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
  2542. struct qla_hw_data *ha = vha->hw;
  2543. scsi_qla_host_t *vp;
  2544. unsigned long flags;
  2545. if (rptid_entry->entry_status != 0)
  2546. return;
  2547. if (rptid_entry->format == 0) {
  2548. DEBUG15(printk("%s:format 0 : scsi(%ld) number of VPs setup %d,"
  2549. " number of VPs acquired %d\n", __func__, vha->host_no,
  2550. MSB(le16_to_cpu(rptid_entry->vp_count)),
  2551. LSB(le16_to_cpu(rptid_entry->vp_count))));
  2552. DEBUG15(printk("%s primary port id %02x%02x%02x\n", __func__,
  2553. rptid_entry->port_id[2], rptid_entry->port_id[1],
  2554. rptid_entry->port_id[0]));
  2555. } else if (rptid_entry->format == 1) {
  2556. vp_idx = LSB(stat);
  2557. DEBUG15(printk("%s:format 1: scsi(%ld): VP[%d] enabled "
  2558. "- status %d - "
  2559. "with port id %02x%02x%02x\n", __func__, vha->host_no,
  2560. vp_idx, MSB(stat),
  2561. rptid_entry->port_id[2], rptid_entry->port_id[1],
  2562. rptid_entry->port_id[0]));
  2563. vp = vha;
  2564. if (vp_idx == 0 && (MSB(stat) != 1))
  2565. goto reg_needed;
  2566. if (MSB(stat) == 1) {
  2567. DEBUG2(printk("scsi(%ld): Could not acquire ID for "
  2568. "VP[%d].\n", vha->host_no, vp_idx));
  2569. return;
  2570. }
  2571. spin_lock_irqsave(&ha->vport_slock, flags);
  2572. list_for_each_entry(vp, &ha->vp_list, list)
  2573. if (vp_idx == vp->vp_idx)
  2574. break;
  2575. spin_unlock_irqrestore(&ha->vport_slock, flags);
  2576. if (!vp)
  2577. return;
  2578. vp->d_id.b.domain = rptid_entry->port_id[2];
  2579. vp->d_id.b.area = rptid_entry->port_id[1];
  2580. vp->d_id.b.al_pa = rptid_entry->port_id[0];
  2581. /*
  2582. * Cannot configure here as we are still sitting on the
  2583. * response queue. Handle it in dpc context.
  2584. */
  2585. set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
  2586. reg_needed:
  2587. set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
  2588. set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
  2589. set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
  2590. qla2xxx_wake_dpc(vha);
  2591. }
  2592. }
  2593. /*
  2594. * qla24xx_modify_vp_config
  2595. * Change VP configuration for vha
  2596. *
  2597. * Input:
  2598. * vha = adapter block pointer.
  2599. *
  2600. * Returns:
  2601. * qla2xxx local function return status code.
  2602. *
  2603. * Context:
  2604. * Kernel context.
  2605. */
  2606. int
  2607. qla24xx_modify_vp_config(scsi_qla_host_t *vha)
  2608. {
  2609. int rval;
  2610. struct vp_config_entry_24xx *vpmod;
  2611. dma_addr_t vpmod_dma;
  2612. struct qla_hw_data *ha = vha->hw;
  2613. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2614. /* This can be called by the parent */
  2615. vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
  2616. if (!vpmod) {
  2617. DEBUG2_3(printk("%s(%ld): failed to allocate Modify VP "
  2618. "IOCB.\n", __func__, vha->host_no));
  2619. return QLA_MEMORY_ALLOC_FAILED;
  2620. }
  2621. memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
  2622. vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
  2623. vpmod->entry_count = 1;
  2624. vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
  2625. vpmod->vp_count = 1;
  2626. vpmod->vp_index1 = vha->vp_idx;
  2627. vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
  2628. memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
  2629. memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
  2630. vpmod->entry_count = 1;
  2631. rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
  2632. if (rval != QLA_SUCCESS) {
  2633. DEBUG2_3_11(printk("%s(%ld): failed to issue VP config IOCB"
  2634. "(%x).\n", __func__, base_vha->host_no, rval));
  2635. } else if (vpmod->comp_status != 0) {
  2636. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2637. "-- error status (%x).\n", __func__, base_vha->host_no,
  2638. vpmod->comp_status));
  2639. rval = QLA_FUNCTION_FAILED;
  2640. } else if (vpmod->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  2641. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2642. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2643. le16_to_cpu(vpmod->comp_status)));
  2644. rval = QLA_FUNCTION_FAILED;
  2645. } else {
  2646. /* EMPTY */
  2647. DEBUG11(printk("%s(%ld): done.\n", __func__,
  2648. base_vha->host_no));
  2649. fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
  2650. }
  2651. dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
  2652. return rval;
  2653. }
  2654. /*
  2655. * qla24xx_control_vp
  2656. * Enable a virtual port for given host
  2657. *
  2658. * Input:
  2659. * ha = adapter block pointer.
  2660. * vhba = virtual adapter (unused)
  2661. * index = index number for enabled VP
  2662. *
  2663. * Returns:
  2664. * qla2xxx local function return status code.
  2665. *
  2666. * Context:
  2667. * Kernel context.
  2668. */
  2669. int
  2670. qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
  2671. {
  2672. int rval;
  2673. int map, pos;
  2674. struct vp_ctrl_entry_24xx *vce;
  2675. dma_addr_t vce_dma;
  2676. struct qla_hw_data *ha = vha->hw;
  2677. int vp_index = vha->vp_idx;
  2678. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2679. DEBUG11(printk("%s(%ld): entered. Enabling index %d\n", __func__,
  2680. vha->host_no, vp_index));
  2681. if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
  2682. return QLA_PARAMETER_ERROR;
  2683. vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
  2684. if (!vce) {
  2685. DEBUG2_3(printk("%s(%ld): "
  2686. "failed to allocate VP Control IOCB.\n", __func__,
  2687. base_vha->host_no));
  2688. return QLA_MEMORY_ALLOC_FAILED;
  2689. }
  2690. memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
  2691. vce->entry_type = VP_CTRL_IOCB_TYPE;
  2692. vce->entry_count = 1;
  2693. vce->command = cpu_to_le16(cmd);
  2694. vce->vp_count = __constant_cpu_to_le16(1);
  2695. /* index map in firmware starts with 1; decrement index
  2696. * this is ok as we never use index 0
  2697. */
  2698. map = (vp_index - 1) / 8;
  2699. pos = (vp_index - 1) & 7;
  2700. mutex_lock(&ha->vport_lock);
  2701. vce->vp_idx_map[map] |= 1 << pos;
  2702. mutex_unlock(&ha->vport_lock);
  2703. rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
  2704. if (rval != QLA_SUCCESS) {
  2705. DEBUG2_3_11(printk("%s(%ld): failed to issue VP control IOCB"
  2706. "(%x).\n", __func__, base_vha->host_no, rval));
  2707. printk("%s(%ld): failed to issue VP control IOCB"
  2708. "(%x).\n", __func__, base_vha->host_no, rval);
  2709. } else if (vce->entry_status != 0) {
  2710. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2711. "-- error status (%x).\n", __func__, base_vha->host_no,
  2712. vce->entry_status));
  2713. printk("%s(%ld): failed to complete IOCB "
  2714. "-- error status (%x).\n", __func__, base_vha->host_no,
  2715. vce->entry_status);
  2716. rval = QLA_FUNCTION_FAILED;
  2717. } else if (vce->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  2718. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2719. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2720. le16_to_cpu(vce->comp_status)));
  2721. printk("%s(%ld): failed to complete IOCB "
  2722. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2723. le16_to_cpu(vce->comp_status));
  2724. rval = QLA_FUNCTION_FAILED;
  2725. } else {
  2726. DEBUG2(printk("%s(%ld): done.\n", __func__, base_vha->host_no));
  2727. }
  2728. dma_pool_free(ha->s_dma_pool, vce, vce_dma);
  2729. return rval;
  2730. }
  2731. /*
  2732. * qla2x00_send_change_request
  2733. * Receive or disable RSCN request from fabric controller
  2734. *
  2735. * Input:
  2736. * ha = adapter block pointer
  2737. * format = registration format:
  2738. * 0 - Reserved
  2739. * 1 - Fabric detected registration
  2740. * 2 - N_port detected registration
  2741. * 3 - Full registration
  2742. * FF - clear registration
  2743. * vp_idx = Virtual port index
  2744. *
  2745. * Returns:
  2746. * qla2x00 local function return status code.
  2747. *
  2748. * Context:
  2749. * Kernel Context
  2750. */
  2751. int
  2752. qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
  2753. uint16_t vp_idx)
  2754. {
  2755. int rval;
  2756. mbx_cmd_t mc;
  2757. mbx_cmd_t *mcp = &mc;
  2758. /*
  2759. * This command is implicitly executed by firmware during login for the
  2760. * physical hosts
  2761. */
  2762. if (vp_idx == 0)
  2763. return QLA_FUNCTION_FAILED;
  2764. mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
  2765. mcp->mb[1] = format;
  2766. mcp->mb[9] = vp_idx;
  2767. mcp->out_mb = MBX_9|MBX_1|MBX_0;
  2768. mcp->in_mb = MBX_0|MBX_1;
  2769. mcp->tov = MBX_TOV_SECONDS;
  2770. mcp->flags = 0;
  2771. rval = qla2x00_mailbox_command(vha, mcp);
  2772. if (rval == QLA_SUCCESS) {
  2773. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  2774. rval = BIT_1;
  2775. }
  2776. } else
  2777. rval = BIT_1;
  2778. return rval;
  2779. }
  2780. int
  2781. qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
  2782. uint32_t size)
  2783. {
  2784. int rval;
  2785. mbx_cmd_t mc;
  2786. mbx_cmd_t *mcp = &mc;
  2787. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2788. if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
  2789. mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
  2790. mcp->mb[8] = MSW(addr);
  2791. mcp->out_mb = MBX_8|MBX_0;
  2792. } else {
  2793. mcp->mb[0] = MBC_DUMP_RISC_RAM;
  2794. mcp->out_mb = MBX_0;
  2795. }
  2796. mcp->mb[1] = LSW(addr);
  2797. mcp->mb[2] = MSW(req_dma);
  2798. mcp->mb[3] = LSW(req_dma);
  2799. mcp->mb[6] = MSW(MSD(req_dma));
  2800. mcp->mb[7] = LSW(MSD(req_dma));
  2801. mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
  2802. if (IS_FWI2_CAPABLE(vha->hw)) {
  2803. mcp->mb[4] = MSW(size);
  2804. mcp->mb[5] = LSW(size);
  2805. mcp->out_mb |= MBX_5|MBX_4;
  2806. } else {
  2807. mcp->mb[4] = LSW(size);
  2808. mcp->out_mb |= MBX_4;
  2809. }
  2810. mcp->in_mb = MBX_0;
  2811. mcp->tov = MBX_TOV_SECONDS;
  2812. mcp->flags = 0;
  2813. rval = qla2x00_mailbox_command(vha, mcp);
  2814. if (rval != QLA_SUCCESS) {
  2815. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  2816. vha->host_no, rval, mcp->mb[0]));
  2817. } else {
  2818. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2819. }
  2820. return rval;
  2821. }
  2822. /* 84XX Support **************************************************************/
  2823. struct cs84xx_mgmt_cmd {
  2824. union {
  2825. struct verify_chip_entry_84xx req;
  2826. struct verify_chip_rsp_84xx rsp;
  2827. } p;
  2828. };
  2829. int
  2830. qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
  2831. {
  2832. int rval, retry;
  2833. struct cs84xx_mgmt_cmd *mn;
  2834. dma_addr_t mn_dma;
  2835. uint16_t options;
  2836. unsigned long flags;
  2837. struct qla_hw_data *ha = vha->hw;
  2838. DEBUG16(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2839. mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
  2840. if (mn == NULL) {
  2841. DEBUG2_3(printk("%s(%ld): failed to allocate Verify ISP84XX "
  2842. "IOCB.\n", __func__, vha->host_no));
  2843. return QLA_MEMORY_ALLOC_FAILED;
  2844. }
  2845. /* Force Update? */
  2846. options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
  2847. /* Diagnostic firmware? */
  2848. /* options |= MENLO_DIAG_FW; */
  2849. /* We update the firmware with only one data sequence. */
  2850. options |= VCO_END_OF_DATA;
  2851. do {
  2852. retry = 0;
  2853. memset(mn, 0, sizeof(*mn));
  2854. mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
  2855. mn->p.req.entry_count = 1;
  2856. mn->p.req.options = cpu_to_le16(options);
  2857. DEBUG16(printk("%s(%ld): Dump of Verify Request.\n", __func__,
  2858. vha->host_no));
  2859. DEBUG16(qla2x00_dump_buffer((uint8_t *)mn,
  2860. sizeof(*mn)));
  2861. rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
  2862. if (rval != QLA_SUCCESS) {
  2863. DEBUG2_16(printk("%s(%ld): failed to issue Verify "
  2864. "IOCB (%x).\n", __func__, vha->host_no, rval));
  2865. goto verify_done;
  2866. }
  2867. DEBUG16(printk("%s(%ld): Dump of Verify Response.\n", __func__,
  2868. vha->host_no));
  2869. DEBUG16(qla2x00_dump_buffer((uint8_t *)mn,
  2870. sizeof(*mn)));
  2871. status[0] = le16_to_cpu(mn->p.rsp.comp_status);
  2872. status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
  2873. le16_to_cpu(mn->p.rsp.failure_code) : 0;
  2874. DEBUG2_16(printk("%s(%ld): cs=%x fc=%x\n", __func__,
  2875. vha->host_no, status[0], status[1]));
  2876. if (status[0] != CS_COMPLETE) {
  2877. rval = QLA_FUNCTION_FAILED;
  2878. if (!(options & VCO_DONT_UPDATE_FW)) {
  2879. DEBUG2_16(printk("%s(%ld): Firmware update "
  2880. "failed. Retrying without update "
  2881. "firmware.\n", __func__, vha->host_no));
  2882. options |= VCO_DONT_UPDATE_FW;
  2883. options &= ~VCO_FORCE_UPDATE;
  2884. retry = 1;
  2885. }
  2886. } else {
  2887. DEBUG2_16(printk("%s(%ld): firmware updated to %x.\n",
  2888. __func__, vha->host_no,
  2889. le32_to_cpu(mn->p.rsp.fw_ver)));
  2890. /* NOTE: we only update OP firmware. */
  2891. spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
  2892. ha->cs84xx->op_fw_version =
  2893. le32_to_cpu(mn->p.rsp.fw_ver);
  2894. spin_unlock_irqrestore(&ha->cs84xx->access_lock,
  2895. flags);
  2896. }
  2897. } while (retry);
  2898. verify_done:
  2899. dma_pool_free(ha->s_dma_pool, mn, mn_dma);
  2900. if (rval != QLA_SUCCESS) {
  2901. DEBUG2_16(printk("%s(%ld): failed=%x.\n", __func__,
  2902. vha->host_no, rval));
  2903. } else {
  2904. DEBUG16(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2905. }
  2906. return rval;
  2907. }
  2908. int
  2909. qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
  2910. {
  2911. int rval;
  2912. unsigned long flags;
  2913. mbx_cmd_t mc;
  2914. mbx_cmd_t *mcp = &mc;
  2915. struct device_reg_25xxmq __iomem *reg;
  2916. struct qla_hw_data *ha = vha->hw;
  2917. mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
  2918. mcp->mb[1] = req->options;
  2919. mcp->mb[2] = MSW(LSD(req->dma));
  2920. mcp->mb[3] = LSW(LSD(req->dma));
  2921. mcp->mb[6] = MSW(MSD(req->dma));
  2922. mcp->mb[7] = LSW(MSD(req->dma));
  2923. mcp->mb[5] = req->length;
  2924. if (req->rsp)
  2925. mcp->mb[10] = req->rsp->id;
  2926. mcp->mb[12] = req->qos;
  2927. mcp->mb[11] = req->vp_idx;
  2928. mcp->mb[13] = req->rid;
  2929. reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) +
  2930. QLA_QUE_PAGE * req->id);
  2931. mcp->mb[4] = req->id;
  2932. /* que in ptr index */
  2933. mcp->mb[8] = 0;
  2934. /* que out ptr index */
  2935. mcp->mb[9] = 0;
  2936. mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
  2937. MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2938. mcp->in_mb = MBX_0;
  2939. mcp->flags = MBX_DMA_OUT;
  2940. mcp->tov = 60;
  2941. spin_lock_irqsave(&ha->hardware_lock, flags);
  2942. if (!(req->options & BIT_0)) {
  2943. WRT_REG_DWORD(&reg->req_q_in, 0);
  2944. WRT_REG_DWORD(&reg->req_q_out, 0);
  2945. }
  2946. req->req_q_in = &reg->req_q_in;
  2947. req->req_q_out = &reg->req_q_out;
  2948. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2949. rval = qla2x00_mailbox_command(vha, mcp);
  2950. if (rval != QLA_SUCCESS)
  2951. DEBUG2_3_11(printk(KERN_WARNING "%s(%ld): failed=%x mb0=%x.\n",
  2952. __func__, vha->host_no, rval, mcp->mb[0]));
  2953. return rval;
  2954. }
  2955. int
  2956. qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
  2957. {
  2958. int rval;
  2959. unsigned long flags;
  2960. mbx_cmd_t mc;
  2961. mbx_cmd_t *mcp = &mc;
  2962. struct device_reg_25xxmq __iomem *reg;
  2963. struct qla_hw_data *ha = vha->hw;
  2964. mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
  2965. mcp->mb[1] = rsp->options;
  2966. mcp->mb[2] = MSW(LSD(rsp->dma));
  2967. mcp->mb[3] = LSW(LSD(rsp->dma));
  2968. mcp->mb[6] = MSW(MSD(rsp->dma));
  2969. mcp->mb[7] = LSW(MSD(rsp->dma));
  2970. mcp->mb[5] = rsp->length;
  2971. mcp->mb[14] = rsp->msix->entry;
  2972. mcp->mb[13] = rsp->rid;
  2973. reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) +
  2974. QLA_QUE_PAGE * rsp->id);
  2975. mcp->mb[4] = rsp->id;
  2976. /* que in ptr index */
  2977. mcp->mb[8] = 0;
  2978. /* que out ptr index */
  2979. mcp->mb[9] = 0;
  2980. mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
  2981. |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2982. mcp->in_mb = MBX_0;
  2983. mcp->flags = MBX_DMA_OUT;
  2984. mcp->tov = 60;
  2985. spin_lock_irqsave(&ha->hardware_lock, flags);
  2986. if (!(rsp->options & BIT_0)) {
  2987. WRT_REG_DWORD(&reg->rsp_q_out, 0);
  2988. WRT_REG_DWORD(&reg->rsp_q_in, 0);
  2989. }
  2990. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2991. rval = qla2x00_mailbox_command(vha, mcp);
  2992. if (rval != QLA_SUCCESS)
  2993. DEBUG2_3_11(printk(KERN_WARNING "%s(%ld): failed=%x "
  2994. "mb0=%x.\n", __func__,
  2995. vha->host_no, rval, mcp->mb[0]));
  2996. return rval;
  2997. }
  2998. int
  2999. qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
  3000. {
  3001. int rval;
  3002. mbx_cmd_t mc;
  3003. mbx_cmd_t *mcp = &mc;
  3004. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3005. mcp->mb[0] = MBC_IDC_ACK;
  3006. memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
  3007. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  3008. mcp->in_mb = MBX_0;
  3009. mcp->tov = MBX_TOV_SECONDS;
  3010. mcp->flags = 0;
  3011. rval = qla2x00_mailbox_command(vha, mcp);
  3012. if (rval != QLA_SUCCESS) {
  3013. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  3014. vha->host_no, rval, mcp->mb[0]));
  3015. } else {
  3016. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3017. }
  3018. return rval;
  3019. }
  3020. int
  3021. qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
  3022. {
  3023. int rval;
  3024. mbx_cmd_t mc;
  3025. mbx_cmd_t *mcp = &mc;
  3026. if (!IS_QLA81XX(vha->hw))
  3027. return QLA_FUNCTION_FAILED;
  3028. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3029. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  3030. mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
  3031. mcp->out_mb = MBX_1|MBX_0;
  3032. mcp->in_mb = MBX_1|MBX_0;
  3033. mcp->tov = MBX_TOV_SECONDS;
  3034. mcp->flags = 0;
  3035. rval = qla2x00_mailbox_command(vha, mcp);
  3036. if (rval != QLA_SUCCESS) {
  3037. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  3038. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  3039. } else {
  3040. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3041. *sector_size = mcp->mb[1];
  3042. }
  3043. return rval;
  3044. }
  3045. int
  3046. qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
  3047. {
  3048. int rval;
  3049. mbx_cmd_t mc;
  3050. mbx_cmd_t *mcp = &mc;
  3051. if (!IS_QLA81XX(vha->hw))
  3052. return QLA_FUNCTION_FAILED;
  3053. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3054. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  3055. mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
  3056. FAC_OPT_CMD_WRITE_PROTECT;
  3057. mcp->out_mb = MBX_1|MBX_0;
  3058. mcp->in_mb = MBX_1|MBX_0;
  3059. mcp->tov = MBX_TOV_SECONDS;
  3060. mcp->flags = 0;
  3061. rval = qla2x00_mailbox_command(vha, mcp);
  3062. if (rval != QLA_SUCCESS) {
  3063. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  3064. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  3065. } else {
  3066. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3067. }
  3068. return rval;
  3069. }
  3070. int
  3071. qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
  3072. {
  3073. int rval;
  3074. mbx_cmd_t mc;
  3075. mbx_cmd_t *mcp = &mc;
  3076. if (!IS_QLA81XX(vha->hw))
  3077. return QLA_FUNCTION_FAILED;
  3078. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3079. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  3080. mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
  3081. mcp->mb[2] = LSW(start);
  3082. mcp->mb[3] = MSW(start);
  3083. mcp->mb[4] = LSW(finish);
  3084. mcp->mb[5] = MSW(finish);
  3085. mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  3086. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3087. mcp->tov = MBX_TOV_SECONDS;
  3088. mcp->flags = 0;
  3089. rval = qla2x00_mailbox_command(vha, mcp);
  3090. if (rval != QLA_SUCCESS) {
  3091. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  3092. "mb[2]=%x.\n", __func__, vha->host_no, rval, mcp->mb[0],
  3093. mcp->mb[1], mcp->mb[2]));
  3094. } else {
  3095. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3096. }
  3097. return rval;
  3098. }
  3099. int
  3100. qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
  3101. {
  3102. int rval = 0;
  3103. mbx_cmd_t mc;
  3104. mbx_cmd_t *mcp = &mc;
  3105. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3106. mcp->mb[0] = MBC_RESTART_MPI_FW;
  3107. mcp->out_mb = MBX_0;
  3108. mcp->in_mb = MBX_0|MBX_1;
  3109. mcp->tov = MBX_TOV_SECONDS;
  3110. mcp->flags = 0;
  3111. rval = qla2x00_mailbox_command(vha, mcp);
  3112. if (rval != QLA_SUCCESS) {
  3113. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x mb[1]=0x%x.\n",
  3114. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  3115. } else {
  3116. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3117. }
  3118. return rval;
  3119. }
  3120. int
  3121. qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
  3122. uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
  3123. {
  3124. int rval;
  3125. mbx_cmd_t mc;
  3126. mbx_cmd_t *mcp = &mc;
  3127. struct qla_hw_data *ha = vha->hw;
  3128. if (!IS_FWI2_CAPABLE(ha))
  3129. return QLA_FUNCTION_FAILED;
  3130. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3131. if (len == 1)
  3132. opt |= BIT_0;
  3133. mcp->mb[0] = MBC_READ_SFP;
  3134. mcp->mb[1] = dev;
  3135. mcp->mb[2] = MSW(sfp_dma);
  3136. mcp->mb[3] = LSW(sfp_dma);
  3137. mcp->mb[6] = MSW(MSD(sfp_dma));
  3138. mcp->mb[7] = LSW(MSD(sfp_dma));
  3139. mcp->mb[8] = len;
  3140. mcp->mb[9] = off;
  3141. mcp->mb[10] = opt;
  3142. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3143. mcp->in_mb = MBX_1|MBX_0;
  3144. mcp->tov = MBX_TOV_SECONDS;
  3145. mcp->flags = 0;
  3146. rval = qla2x00_mailbox_command(vha, mcp);
  3147. if (opt & BIT_0)
  3148. *sfp = mcp->mb[1];
  3149. if (rval != QLA_SUCCESS) {
  3150. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  3151. vha->host_no, rval, mcp->mb[0]));
  3152. } else {
  3153. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3154. }
  3155. return rval;
  3156. }
  3157. int
  3158. qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
  3159. uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
  3160. {
  3161. int rval;
  3162. mbx_cmd_t mc;
  3163. mbx_cmd_t *mcp = &mc;
  3164. struct qla_hw_data *ha = vha->hw;
  3165. if (!IS_FWI2_CAPABLE(ha))
  3166. return QLA_FUNCTION_FAILED;
  3167. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3168. if (len == 1)
  3169. opt |= BIT_0;
  3170. if (opt & BIT_0)
  3171. len = *sfp;
  3172. mcp->mb[0] = MBC_WRITE_SFP;
  3173. mcp->mb[1] = dev;
  3174. mcp->mb[2] = MSW(sfp_dma);
  3175. mcp->mb[3] = LSW(sfp_dma);
  3176. mcp->mb[6] = MSW(MSD(sfp_dma));
  3177. mcp->mb[7] = LSW(MSD(sfp_dma));
  3178. mcp->mb[8] = len;
  3179. mcp->mb[9] = off;
  3180. mcp->mb[10] = opt;
  3181. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3182. mcp->in_mb = MBX_1|MBX_0;
  3183. mcp->tov = MBX_TOV_SECONDS;
  3184. mcp->flags = 0;
  3185. rval = qla2x00_mailbox_command(vha, mcp);
  3186. if (rval != QLA_SUCCESS) {
  3187. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  3188. vha->host_no, rval, mcp->mb[0]));
  3189. } else {
  3190. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3191. }
  3192. return rval;
  3193. }
  3194. int
  3195. qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
  3196. uint16_t size_in_bytes, uint16_t *actual_size)
  3197. {
  3198. int rval;
  3199. mbx_cmd_t mc;
  3200. mbx_cmd_t *mcp = &mc;
  3201. if (!IS_QLA8XXX_TYPE(vha->hw))
  3202. return QLA_FUNCTION_FAILED;
  3203. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3204. mcp->mb[0] = MBC_GET_XGMAC_STATS;
  3205. mcp->mb[2] = MSW(stats_dma);
  3206. mcp->mb[3] = LSW(stats_dma);
  3207. mcp->mb[6] = MSW(MSD(stats_dma));
  3208. mcp->mb[7] = LSW(MSD(stats_dma));
  3209. mcp->mb[8] = size_in_bytes >> 2;
  3210. mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  3211. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3212. mcp->tov = MBX_TOV_SECONDS;
  3213. mcp->flags = 0;
  3214. rval = qla2x00_mailbox_command(vha, mcp);
  3215. if (rval != QLA_SUCCESS) {
  3216. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x "
  3217. "mb[1]=0x%x mb[2]=0x%x.\n", __func__, vha->host_no, rval,
  3218. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  3219. } else {
  3220. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3221. *actual_size = mcp->mb[2] << 2;
  3222. }
  3223. return rval;
  3224. }
  3225. int
  3226. qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
  3227. uint16_t size)
  3228. {
  3229. int rval;
  3230. mbx_cmd_t mc;
  3231. mbx_cmd_t *mcp = &mc;
  3232. if (!IS_QLA8XXX_TYPE(vha->hw))
  3233. return QLA_FUNCTION_FAILED;
  3234. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3235. mcp->mb[0] = MBC_GET_DCBX_PARAMS;
  3236. mcp->mb[1] = 0;
  3237. mcp->mb[2] = MSW(tlv_dma);
  3238. mcp->mb[3] = LSW(tlv_dma);
  3239. mcp->mb[6] = MSW(MSD(tlv_dma));
  3240. mcp->mb[7] = LSW(MSD(tlv_dma));
  3241. mcp->mb[8] = size;
  3242. mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3243. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3244. mcp->tov = MBX_TOV_SECONDS;
  3245. mcp->flags = 0;
  3246. rval = qla2x00_mailbox_command(vha, mcp);
  3247. if (rval != QLA_SUCCESS) {
  3248. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x "
  3249. "mb[1]=0x%x mb[2]=0x%x.\n", __func__, vha->host_no, rval,
  3250. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  3251. } else {
  3252. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3253. }
  3254. return rval;
  3255. }
  3256. int
  3257. qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
  3258. {
  3259. int rval;
  3260. mbx_cmd_t mc;
  3261. mbx_cmd_t *mcp = &mc;
  3262. if (!IS_FWI2_CAPABLE(vha->hw))
  3263. return QLA_FUNCTION_FAILED;
  3264. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3265. mcp->mb[0] = MBC_READ_RAM_EXTENDED;
  3266. mcp->mb[1] = LSW(risc_addr);
  3267. mcp->mb[8] = MSW(risc_addr);
  3268. mcp->out_mb = MBX_8|MBX_1|MBX_0;
  3269. mcp->in_mb = MBX_3|MBX_2|MBX_0;
  3270. mcp->tov = 30;
  3271. mcp->flags = 0;
  3272. rval = qla2x00_mailbox_command(vha, mcp);
  3273. if (rval != QLA_SUCCESS) {
  3274. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  3275. vha->host_no, rval, mcp->mb[0]));
  3276. } else {
  3277. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3278. *data = mcp->mb[3] << 16 | mcp->mb[2];
  3279. }
  3280. return rval;
  3281. }
  3282. int
  3283. qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
  3284. uint16_t *mresp)
  3285. {
  3286. int rval;
  3287. mbx_cmd_t mc;
  3288. mbx_cmd_t *mcp = &mc;
  3289. uint32_t iter_cnt = 0x1;
  3290. DEBUG11(printk("scsi(%ld): entered.\n", vha->host_no));
  3291. memset(mcp->mb, 0 , sizeof(mcp->mb));
  3292. mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
  3293. mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
  3294. /* transfer count */
  3295. mcp->mb[10] = LSW(mreq->transfer_size);
  3296. mcp->mb[11] = MSW(mreq->transfer_size);
  3297. /* send data address */
  3298. mcp->mb[14] = LSW(mreq->send_dma);
  3299. mcp->mb[15] = MSW(mreq->send_dma);
  3300. mcp->mb[20] = LSW(MSD(mreq->send_dma));
  3301. mcp->mb[21] = MSW(MSD(mreq->send_dma));
  3302. /* receive data address */
  3303. mcp->mb[16] = LSW(mreq->rcv_dma);
  3304. mcp->mb[17] = MSW(mreq->rcv_dma);
  3305. mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
  3306. mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
  3307. /* Iteration count */
  3308. mcp->mb[18] = LSW(iter_cnt);
  3309. mcp->mb[19] = MSW(iter_cnt);
  3310. mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
  3311. MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
  3312. if (IS_QLA8XXX_TYPE(vha->hw))
  3313. mcp->out_mb |= MBX_2;
  3314. mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
  3315. mcp->buf_size = mreq->transfer_size;
  3316. mcp->tov = MBX_TOV_SECONDS;
  3317. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
  3318. rval = qla2x00_mailbox_command(vha, mcp);
  3319. if (rval != QLA_SUCCESS) {
  3320. DEBUG2(printk(KERN_WARNING
  3321. "(%ld): failed=%x mb[0]=0x%x "
  3322. "mb[1]=0x%x mb[2]=0x%x mb[3]=0x%x mb[18]=0x%x "
  3323. "mb[19]=0x%x.\n",
  3324. vha->host_no, rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
  3325. mcp->mb[3], mcp->mb[18], mcp->mb[19]));
  3326. } else {
  3327. DEBUG2(printk(KERN_WARNING
  3328. "scsi(%ld): done.\n", vha->host_no));
  3329. }
  3330. /* Copy mailbox information */
  3331. memcpy( mresp, mcp->mb, 64);
  3332. return rval;
  3333. }
  3334. int
  3335. qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
  3336. uint16_t *mresp)
  3337. {
  3338. int rval;
  3339. mbx_cmd_t mc;
  3340. mbx_cmd_t *mcp = &mc;
  3341. struct qla_hw_data *ha = vha->hw;
  3342. DEBUG11(printk("scsi(%ld): entered.\n", vha->host_no));
  3343. memset(mcp->mb, 0 , sizeof(mcp->mb));
  3344. mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
  3345. mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */
  3346. if (IS_QLA8XXX_TYPE(ha)) {
  3347. mcp->mb[1] |= BIT_15;
  3348. mcp->mb[2] = vha->fcoe_fcf_idx;
  3349. }
  3350. mcp->mb[16] = LSW(mreq->rcv_dma);
  3351. mcp->mb[17] = MSW(mreq->rcv_dma);
  3352. mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
  3353. mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
  3354. mcp->mb[10] = LSW(mreq->transfer_size);
  3355. mcp->mb[14] = LSW(mreq->send_dma);
  3356. mcp->mb[15] = MSW(mreq->send_dma);
  3357. mcp->mb[20] = LSW(MSD(mreq->send_dma));
  3358. mcp->mb[21] = MSW(MSD(mreq->send_dma));
  3359. mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
  3360. MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
  3361. if (IS_QLA8XXX_TYPE(ha))
  3362. mcp->out_mb |= MBX_2;
  3363. mcp->in_mb = MBX_0;
  3364. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) || IS_QLA8XXX_TYPE(ha))
  3365. mcp->in_mb |= MBX_1;
  3366. if (IS_QLA8XXX_TYPE(ha))
  3367. mcp->in_mb |= MBX_3;
  3368. mcp->tov = MBX_TOV_SECONDS;
  3369. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
  3370. mcp->buf_size = mreq->transfer_size;
  3371. rval = qla2x00_mailbox_command(vha, mcp);
  3372. if (rval != QLA_SUCCESS) {
  3373. DEBUG2(printk(KERN_WARNING
  3374. "(%ld): failed=%x mb[0]=0x%x mb[1]=0x%x.\n",
  3375. vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  3376. } else {
  3377. DEBUG2(printk(KERN_WARNING
  3378. "scsi(%ld): done.\n", vha->host_no));
  3379. }
  3380. /* Copy mailbox information */
  3381. memcpy(mresp, mcp->mb, 64);
  3382. return rval;
  3383. }
  3384. int
  3385. qla84xx_reset_chip(scsi_qla_host_t *ha, uint16_t enable_diagnostic)
  3386. {
  3387. int rval;
  3388. mbx_cmd_t mc;
  3389. mbx_cmd_t *mcp = &mc;
  3390. DEBUG16(printk("%s(%ld): enable_diag=%d entered.\n", __func__,
  3391. ha->host_no, enable_diagnostic));
  3392. mcp->mb[0] = MBC_ISP84XX_RESET;
  3393. mcp->mb[1] = enable_diagnostic;
  3394. mcp->out_mb = MBX_1|MBX_0;
  3395. mcp->in_mb = MBX_1|MBX_0;
  3396. mcp->tov = MBX_TOV_SECONDS;
  3397. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
  3398. rval = qla2x00_mailbox_command(ha, mcp);
  3399. if (rval != QLA_SUCCESS)
  3400. DEBUG16(printk("%s(%ld): failed=%x.\n", __func__, ha->host_no,
  3401. rval));
  3402. else
  3403. DEBUG16(printk("%s(%ld): done.\n", __func__, ha->host_no));
  3404. return rval;
  3405. }
  3406. int
  3407. qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
  3408. {
  3409. int rval;
  3410. mbx_cmd_t mc;
  3411. mbx_cmd_t *mcp = &mc;
  3412. if (!IS_FWI2_CAPABLE(vha->hw))
  3413. return QLA_FUNCTION_FAILED;
  3414. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3415. mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
  3416. mcp->mb[1] = LSW(risc_addr);
  3417. mcp->mb[2] = LSW(data);
  3418. mcp->mb[3] = MSW(data);
  3419. mcp->mb[8] = MSW(risc_addr);
  3420. mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
  3421. mcp->in_mb = MBX_0;
  3422. mcp->tov = 30;
  3423. mcp->flags = 0;
  3424. rval = qla2x00_mailbox_command(vha, mcp);
  3425. if (rval != QLA_SUCCESS) {
  3426. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  3427. vha->host_no, rval, mcp->mb[0]));
  3428. } else {
  3429. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3430. }
  3431. return rval;
  3432. }
  3433. int
  3434. qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
  3435. {
  3436. int rval;
  3437. uint32_t stat, timer;
  3438. uint16_t mb0 = 0;
  3439. struct qla_hw_data *ha = vha->hw;
  3440. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3441. rval = QLA_SUCCESS;
  3442. DEBUG11(qla_printk(KERN_INFO, ha,
  3443. "%s(%ld): entered.\n", __func__, vha->host_no));
  3444. clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  3445. /* Write the MBC data to the registers */
  3446. WRT_REG_WORD(&reg->mailbox0, MBC_WRITE_MPI_REGISTER);
  3447. WRT_REG_WORD(&reg->mailbox1, mb[0]);
  3448. WRT_REG_WORD(&reg->mailbox2, mb[1]);
  3449. WRT_REG_WORD(&reg->mailbox3, mb[2]);
  3450. WRT_REG_WORD(&reg->mailbox4, mb[3]);
  3451. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_HOST_INT);
  3452. /* Poll for MBC interrupt */
  3453. for (timer = 6000000; timer; timer--) {
  3454. /* Check for pending interrupts. */
  3455. stat = RD_REG_DWORD(&reg->host_status);
  3456. if (stat & HSRX_RISC_INT) {
  3457. stat &= 0xff;
  3458. if (stat == 0x1 || stat == 0x2 ||
  3459. stat == 0x10 || stat == 0x11) {
  3460. set_bit(MBX_INTERRUPT,
  3461. &ha->mbx_cmd_flags);
  3462. mb0 = RD_REG_WORD(&reg->mailbox0);
  3463. WRT_REG_DWORD(&reg->hccr,
  3464. HCCRX_CLR_RISC_INT);
  3465. RD_REG_DWORD(&reg->hccr);
  3466. break;
  3467. }
  3468. }
  3469. udelay(5);
  3470. }
  3471. if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
  3472. rval = mb0 & MBS_MASK;
  3473. else
  3474. rval = QLA_FUNCTION_FAILED;
  3475. if (rval != QLA_SUCCESS) {
  3476. DEBUG2_3_11(printk(KERN_INFO "%s(%ld): failed=%x mb[0]=%x.\n",
  3477. __func__, vha->host_no, rval, mb[0]));
  3478. } else {
  3479. DEBUG11(printk(KERN_INFO
  3480. "%s(%ld): done.\n", __func__, vha->host_no));
  3481. }
  3482. return rval;
  3483. }
  3484. int
  3485. qla2x00_get_data_rate(scsi_qla_host_t *vha)
  3486. {
  3487. int rval;
  3488. mbx_cmd_t mc;
  3489. mbx_cmd_t *mcp = &mc;
  3490. struct qla_hw_data *ha = vha->hw;
  3491. if (!IS_FWI2_CAPABLE(ha))
  3492. return QLA_FUNCTION_FAILED;
  3493. DEBUG11(qla_printk(KERN_INFO, ha,
  3494. "%s(%ld): entered.\n", __func__, vha->host_no));
  3495. mcp->mb[0] = MBC_DATA_RATE;
  3496. mcp->mb[1] = 0;
  3497. mcp->out_mb = MBX_1|MBX_0;
  3498. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3499. mcp->tov = MBX_TOV_SECONDS;
  3500. mcp->flags = 0;
  3501. rval = qla2x00_mailbox_command(vha, mcp);
  3502. if (rval != QLA_SUCCESS) {
  3503. DEBUG2_3_11(printk(KERN_INFO "%s(%ld): failed=%x mb[0]=%x.\n",
  3504. __func__, vha->host_no, rval, mcp->mb[0]));
  3505. } else {
  3506. DEBUG11(printk(KERN_INFO
  3507. "%s(%ld): done.\n", __func__, vha->host_no));
  3508. if (mcp->mb[1] != 0x7)
  3509. ha->link_data_rate = mcp->mb[1];
  3510. }
  3511. return rval;
  3512. }
  3513. int
  3514. qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
  3515. {
  3516. int rval;
  3517. mbx_cmd_t mc;
  3518. mbx_cmd_t *mcp = &mc;
  3519. struct qla_hw_data *ha = vha->hw;
  3520. DEBUG11(printk(KERN_INFO
  3521. "%s(%ld): entered.\n", __func__, vha->host_no));
  3522. if (!IS_QLA81XX(ha))
  3523. return QLA_FUNCTION_FAILED;
  3524. mcp->mb[0] = MBC_GET_PORT_CONFIG;
  3525. mcp->out_mb = MBX_0;
  3526. mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  3527. mcp->tov = MBX_TOV_SECONDS;
  3528. mcp->flags = 0;
  3529. rval = qla2x00_mailbox_command(vha, mcp);
  3530. if (rval != QLA_SUCCESS) {
  3531. DEBUG2_3_11(printk(KERN_WARNING
  3532. "%s(%ld): failed=%x (%x).\n", __func__,
  3533. vha->host_no, rval, mcp->mb[0]));
  3534. } else {
  3535. /* Copy all bits to preserve original value */
  3536. memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
  3537. DEBUG11(printk(KERN_INFO
  3538. "%s(%ld): done.\n", __func__, vha->host_no));
  3539. }
  3540. return rval;
  3541. }
  3542. int
  3543. qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
  3544. {
  3545. int rval;
  3546. mbx_cmd_t mc;
  3547. mbx_cmd_t *mcp = &mc;
  3548. DEBUG11(printk(KERN_INFO
  3549. "%s(%ld): entered.\n", __func__, vha->host_no));
  3550. mcp->mb[0] = MBC_SET_PORT_CONFIG;
  3551. /* Copy all bits to preserve original setting */
  3552. memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
  3553. mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  3554. mcp->in_mb = MBX_0;
  3555. mcp->tov = MBX_TOV_SECONDS;
  3556. mcp->flags = 0;
  3557. rval = qla2x00_mailbox_command(vha, mcp);
  3558. if (rval != QLA_SUCCESS) {
  3559. DEBUG2_3_11(printk(KERN_WARNING
  3560. "%s(%ld): failed=%x (%x).\n", __func__,
  3561. vha->host_no, rval, mcp->mb[0]));
  3562. } else
  3563. DEBUG11(printk(KERN_INFO
  3564. "%s(%ld): done.\n", __func__, vha->host_no));
  3565. return rval;
  3566. }
  3567. int
  3568. qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
  3569. uint16_t *mb)
  3570. {
  3571. int rval;
  3572. mbx_cmd_t mc;
  3573. mbx_cmd_t *mcp = &mc;
  3574. struct qla_hw_data *ha = vha->hw;
  3575. if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
  3576. return QLA_FUNCTION_FAILED;
  3577. DEBUG11(printk(KERN_INFO
  3578. "%s(%ld): entered.\n", __func__, vha->host_no));
  3579. mcp->mb[0] = MBC_PORT_PARAMS;
  3580. mcp->mb[1] = loop_id;
  3581. if (ha->flags.fcp_prio_enabled)
  3582. mcp->mb[2] = BIT_1;
  3583. else
  3584. mcp->mb[2] = BIT_2;
  3585. mcp->mb[4] = priority & 0xf;
  3586. mcp->mb[9] = vha->vp_idx;
  3587. mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  3588. mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
  3589. mcp->tov = 30;
  3590. mcp->flags = 0;
  3591. rval = qla2x00_mailbox_command(vha, mcp);
  3592. if (mb != NULL) {
  3593. mb[0] = mcp->mb[0];
  3594. mb[1] = mcp->mb[1];
  3595. mb[3] = mcp->mb[3];
  3596. mb[4] = mcp->mb[4];
  3597. }
  3598. if (rval != QLA_SUCCESS) {
  3599. DEBUG2_3_11(printk(KERN_WARNING
  3600. "%s(%ld): failed=%x.\n", __func__,
  3601. vha->host_no, rval));
  3602. } else {
  3603. DEBUG11(printk(KERN_INFO
  3604. "%s(%ld): done.\n", __func__, vha->host_no));
  3605. }
  3606. return rval;
  3607. }
  3608. int
  3609. qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp, uint16_t *frac)
  3610. {
  3611. int rval;
  3612. uint8_t byte;
  3613. struct qla_hw_data *ha = vha->hw;
  3614. DEBUG11(printk(KERN_INFO "%s(%ld): entered.\n", __func__, vha->host_no));
  3615. /* Integer part */
  3616. rval = qla2x00_read_sfp(vha, 0, &byte, 0x98, 0x01, 1, BIT_13|BIT_0);
  3617. if (rval != QLA_SUCCESS) {
  3618. DEBUG2_3_11(printk(KERN_WARNING
  3619. "%s(%ld): failed=%x.\n", __func__, vha->host_no, rval));
  3620. ha->flags.thermal_supported = 0;
  3621. goto fail;
  3622. }
  3623. *temp = byte;
  3624. /* Fraction part */
  3625. rval = qla2x00_read_sfp(vha, 0, &byte, 0x98, 0x10, 1, BIT_13|BIT_0);
  3626. if (rval != QLA_SUCCESS) {
  3627. DEBUG2_3_11(printk(KERN_WARNING
  3628. "%s(%ld): failed=%x.\n", __func__, vha->host_no, rval));
  3629. ha->flags.thermal_supported = 0;
  3630. goto fail;
  3631. }
  3632. *frac = (byte >> 6) * 25;
  3633. DEBUG11(printk(KERN_INFO "%s(%ld): done.\n", __func__, vha->host_no));
  3634. fail:
  3635. return rval;
  3636. }
  3637. int
  3638. qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
  3639. {
  3640. int rval;
  3641. struct qla_hw_data *ha = vha->hw;
  3642. mbx_cmd_t mc;
  3643. mbx_cmd_t *mcp = &mc;
  3644. if (!IS_FWI2_CAPABLE(ha))
  3645. return QLA_FUNCTION_FAILED;
  3646. DEBUG11(qla_printk(KERN_INFO, ha,
  3647. "%s(%ld): entered.\n", __func__, vha->host_no));
  3648. memset(mcp, 0, sizeof(mbx_cmd_t));
  3649. mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
  3650. mcp->mb[1] = 1;
  3651. mcp->out_mb = MBX_1|MBX_0;
  3652. mcp->in_mb = MBX_0;
  3653. mcp->tov = 30;
  3654. mcp->flags = 0;
  3655. rval = qla2x00_mailbox_command(vha, mcp);
  3656. if (rval != QLA_SUCCESS) {
  3657. DEBUG2_3_11(qla_printk(KERN_WARNING, ha,
  3658. "%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  3659. vha->host_no, rval, mcp->mb[0]));
  3660. } else {
  3661. DEBUG11(qla_printk(KERN_INFO, ha,
  3662. "%s(%ld): done.\n", __func__, vha->host_no));
  3663. }
  3664. return rval;
  3665. }
  3666. int
  3667. qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
  3668. {
  3669. int rval;
  3670. struct qla_hw_data *ha = vha->hw;
  3671. mbx_cmd_t mc;
  3672. mbx_cmd_t *mcp = &mc;
  3673. if (!IS_QLA82XX(ha))
  3674. return QLA_FUNCTION_FAILED;
  3675. DEBUG11(qla_printk(KERN_INFO, ha,
  3676. "%s(%ld): entered.\n", __func__, vha->host_no));
  3677. memset(mcp, 0, sizeof(mbx_cmd_t));
  3678. mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
  3679. mcp->mb[1] = 0;
  3680. mcp->out_mb = MBX_1|MBX_0;
  3681. mcp->in_mb = MBX_0;
  3682. mcp->tov = 30;
  3683. mcp->flags = 0;
  3684. rval = qla2x00_mailbox_command(vha, mcp);
  3685. if (rval != QLA_SUCCESS) {
  3686. DEBUG2_3_11(qla_printk(KERN_WARNING, ha,
  3687. "%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  3688. vha->host_no, rval, mcp->mb[0]));
  3689. } else {
  3690. DEBUG11(qla_printk(KERN_INFO, ha,
  3691. "%s(%ld): done.\n", __func__, vha->host_no));
  3692. }
  3693. return rval;
  3694. }