sysfs.c 16 KB

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  1. #include <linux/device.h>
  2. #include <linux/cpu.h>
  3. #include <linux/smp.h>
  4. #include <linux/percpu.h>
  5. #include <linux/init.h>
  6. #include <linux/sched.h>
  7. #include <linux/export.h>
  8. #include <linux/nodemask.h>
  9. #include <linux/cpumask.h>
  10. #include <linux/notifier.h>
  11. #include <asm/current.h>
  12. #include <asm/processor.h>
  13. #include <asm/cputable.h>
  14. #include <asm/firmware.h>
  15. #include <asm/hvcall.h>
  16. #include <asm/prom.h>
  17. #include <asm/machdep.h>
  18. #include <asm/smp.h>
  19. #include <asm/pmc.h>
  20. #include <asm/system.h>
  21. #include "cacheinfo.h"
  22. #ifdef CONFIG_PPC64
  23. #include <asm/paca.h>
  24. #include <asm/lppaca.h>
  25. #endif
  26. static DEFINE_PER_CPU(struct cpu, cpu_devices);
  27. /*
  28. * SMT snooze delay stuff, 64-bit only for now
  29. */
  30. #ifdef CONFIG_PPC64
  31. /* Time in microseconds we delay before sleeping in the idle loop */
  32. DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 };
  33. static ssize_t store_smt_snooze_delay(struct device *dev,
  34. struct device_attribute *attr,
  35. const char *buf,
  36. size_t count)
  37. {
  38. struct cpu *cpu = container_of(dev, struct cpu, dev);
  39. ssize_t ret;
  40. long snooze;
  41. ret = sscanf(buf, "%ld", &snooze);
  42. if (ret != 1)
  43. return -EINVAL;
  44. per_cpu(smt_snooze_delay, cpu->dev.id) = snooze;
  45. update_smt_snooze_delay(snooze);
  46. return count;
  47. }
  48. static ssize_t show_smt_snooze_delay(struct device *dev,
  49. struct device_attribute *attr,
  50. char *buf)
  51. {
  52. struct cpu *cpu = container_of(dev, struct cpu, dev);
  53. return sprintf(buf, "%ld\n", per_cpu(smt_snooze_delay, cpu->dev.id));
  54. }
  55. static DEVICE_ATTR(smt_snooze_delay, 0644, show_smt_snooze_delay,
  56. store_smt_snooze_delay);
  57. static int __init setup_smt_snooze_delay(char *str)
  58. {
  59. unsigned int cpu;
  60. long snooze;
  61. if (!cpu_has_feature(CPU_FTR_SMT))
  62. return 1;
  63. snooze = simple_strtol(str, NULL, 10);
  64. for_each_possible_cpu(cpu)
  65. per_cpu(smt_snooze_delay, cpu) = snooze;
  66. return 1;
  67. }
  68. __setup("smt-snooze-delay=", setup_smt_snooze_delay);
  69. #endif /* CONFIG_PPC64 */
  70. /*
  71. * Enabling PMCs will slow partition context switch times so we only do
  72. * it the first time we write to the PMCs.
  73. */
  74. static DEFINE_PER_CPU(char, pmcs_enabled);
  75. void ppc_enable_pmcs(void)
  76. {
  77. ppc_set_pmu_inuse(1);
  78. /* Only need to enable them once */
  79. if (__get_cpu_var(pmcs_enabled))
  80. return;
  81. __get_cpu_var(pmcs_enabled) = 1;
  82. if (ppc_md.enable_pmcs)
  83. ppc_md.enable_pmcs();
  84. }
  85. EXPORT_SYMBOL(ppc_enable_pmcs);
  86. #define SYSFS_PMCSETUP(NAME, ADDRESS) \
  87. static void read_##NAME(void *val) \
  88. { \
  89. *(unsigned long *)val = mfspr(ADDRESS); \
  90. } \
  91. static void write_##NAME(void *val) \
  92. { \
  93. ppc_enable_pmcs(); \
  94. mtspr(ADDRESS, *(unsigned long *)val); \
  95. } \
  96. static ssize_t show_##NAME(struct device *dev, \
  97. struct device_attribute *attr, \
  98. char *buf) \
  99. { \
  100. struct cpu *cpu = container_of(dev, struct cpu, dev); \
  101. unsigned long val; \
  102. smp_call_function_single(cpu->dev.id, read_##NAME, &val, 1); \
  103. return sprintf(buf, "%lx\n", val); \
  104. } \
  105. static ssize_t __used \
  106. store_##NAME(struct device *dev, struct device_attribute *attr, \
  107. const char *buf, size_t count) \
  108. { \
  109. struct cpu *cpu = container_of(dev, struct cpu, dev); \
  110. unsigned long val; \
  111. int ret = sscanf(buf, "%lx", &val); \
  112. if (ret != 1) \
  113. return -EINVAL; \
  114. smp_call_function_single(cpu->dev.id, write_##NAME, &val, 1); \
  115. return count; \
  116. }
  117. /* Let's define all possible registers, we'll only hook up the ones
  118. * that are implemented on the current processor
  119. */
  120. #if defined(CONFIG_PPC64)
  121. #define HAS_PPC_PMC_CLASSIC 1
  122. #define HAS_PPC_PMC_IBM 1
  123. #define HAS_PPC_PMC_PA6T 1
  124. #elif defined(CONFIG_6xx)
  125. #define HAS_PPC_PMC_CLASSIC 1
  126. #define HAS_PPC_PMC_IBM 1
  127. #define HAS_PPC_PMC_G4 1
  128. #endif
  129. #ifdef HAS_PPC_PMC_CLASSIC
  130. SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
  131. SYSFS_PMCSETUP(mmcr1, SPRN_MMCR1);
  132. SYSFS_PMCSETUP(pmc1, SPRN_PMC1);
  133. SYSFS_PMCSETUP(pmc2, SPRN_PMC2);
  134. SYSFS_PMCSETUP(pmc3, SPRN_PMC3);
  135. SYSFS_PMCSETUP(pmc4, SPRN_PMC4);
  136. SYSFS_PMCSETUP(pmc5, SPRN_PMC5);
  137. SYSFS_PMCSETUP(pmc6, SPRN_PMC6);
  138. #ifdef HAS_PPC_PMC_G4
  139. SYSFS_PMCSETUP(mmcr2, SPRN_MMCR2);
  140. #endif
  141. #ifdef CONFIG_PPC64
  142. SYSFS_PMCSETUP(pmc7, SPRN_PMC7);
  143. SYSFS_PMCSETUP(pmc8, SPRN_PMC8);
  144. SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
  145. SYSFS_PMCSETUP(purr, SPRN_PURR);
  146. SYSFS_PMCSETUP(spurr, SPRN_SPURR);
  147. SYSFS_PMCSETUP(dscr, SPRN_DSCR);
  148. SYSFS_PMCSETUP(pir, SPRN_PIR);
  149. static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
  150. static DEVICE_ATTR(spurr, 0600, show_spurr, NULL);
  151. static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
  152. static DEVICE_ATTR(purr, 0600, show_purr, store_purr);
  153. static DEVICE_ATTR(pir, 0400, show_pir, NULL);
  154. unsigned long dscr_default = 0;
  155. EXPORT_SYMBOL(dscr_default);
  156. static ssize_t show_dscr_default(struct device *dev,
  157. struct device_attribute *attr, char *buf)
  158. {
  159. return sprintf(buf, "%lx\n", dscr_default);
  160. }
  161. static ssize_t __used store_dscr_default(struct device *dev,
  162. struct device_attribute *attr, const char *buf,
  163. size_t count)
  164. {
  165. unsigned long val;
  166. int ret = 0;
  167. ret = sscanf(buf, "%lx", &val);
  168. if (ret != 1)
  169. return -EINVAL;
  170. dscr_default = val;
  171. return count;
  172. }
  173. static DEVICE_ATTR(dscr_default, 0600,
  174. show_dscr_default, store_dscr_default);
  175. static void sysfs_create_dscr_default(void)
  176. {
  177. int err = 0;
  178. if (cpu_has_feature(CPU_FTR_DSCR))
  179. err = device_create_file(cpu_subsys.dev_root, &dev_attr_dscr_default);
  180. }
  181. #endif /* CONFIG_PPC64 */
  182. #ifdef HAS_PPC_PMC_PA6T
  183. SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0);
  184. SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1);
  185. SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2);
  186. SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
  187. SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
  188. SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
  189. #ifdef CONFIG_DEBUG_KERNEL
  190. SYSFS_PMCSETUP(hid0, SPRN_HID0);
  191. SYSFS_PMCSETUP(hid1, SPRN_HID1);
  192. SYSFS_PMCSETUP(hid4, SPRN_HID4);
  193. SYSFS_PMCSETUP(hid5, SPRN_HID5);
  194. SYSFS_PMCSETUP(ima0, SPRN_PA6T_IMA0);
  195. SYSFS_PMCSETUP(ima1, SPRN_PA6T_IMA1);
  196. SYSFS_PMCSETUP(ima2, SPRN_PA6T_IMA2);
  197. SYSFS_PMCSETUP(ima3, SPRN_PA6T_IMA3);
  198. SYSFS_PMCSETUP(ima4, SPRN_PA6T_IMA4);
  199. SYSFS_PMCSETUP(ima5, SPRN_PA6T_IMA5);
  200. SYSFS_PMCSETUP(ima6, SPRN_PA6T_IMA6);
  201. SYSFS_PMCSETUP(ima7, SPRN_PA6T_IMA7);
  202. SYSFS_PMCSETUP(ima8, SPRN_PA6T_IMA8);
  203. SYSFS_PMCSETUP(ima9, SPRN_PA6T_IMA9);
  204. SYSFS_PMCSETUP(imaat, SPRN_PA6T_IMAAT);
  205. SYSFS_PMCSETUP(btcr, SPRN_PA6T_BTCR);
  206. SYSFS_PMCSETUP(pccr, SPRN_PA6T_PCCR);
  207. SYSFS_PMCSETUP(rpccr, SPRN_PA6T_RPCCR);
  208. SYSFS_PMCSETUP(der, SPRN_PA6T_DER);
  209. SYSFS_PMCSETUP(mer, SPRN_PA6T_MER);
  210. SYSFS_PMCSETUP(ber, SPRN_PA6T_BER);
  211. SYSFS_PMCSETUP(ier, SPRN_PA6T_IER);
  212. SYSFS_PMCSETUP(sier, SPRN_PA6T_SIER);
  213. SYSFS_PMCSETUP(siar, SPRN_PA6T_SIAR);
  214. SYSFS_PMCSETUP(tsr0, SPRN_PA6T_TSR0);
  215. SYSFS_PMCSETUP(tsr1, SPRN_PA6T_TSR1);
  216. SYSFS_PMCSETUP(tsr2, SPRN_PA6T_TSR2);
  217. SYSFS_PMCSETUP(tsr3, SPRN_PA6T_TSR3);
  218. #endif /* CONFIG_DEBUG_KERNEL */
  219. #endif /* HAS_PPC_PMC_PA6T */
  220. #ifdef HAS_PPC_PMC_IBM
  221. static struct device_attribute ibm_common_attrs[] = {
  222. __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
  223. __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
  224. };
  225. #endif /* HAS_PPC_PMC_G4 */
  226. #ifdef HAS_PPC_PMC_G4
  227. static struct device_attribute g4_common_attrs[] = {
  228. __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
  229. __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
  230. __ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
  231. };
  232. #endif /* HAS_PPC_PMC_G4 */
  233. static struct device_attribute classic_pmc_attrs[] = {
  234. __ATTR(pmc1, 0600, show_pmc1, store_pmc1),
  235. __ATTR(pmc2, 0600, show_pmc2, store_pmc2),
  236. __ATTR(pmc3, 0600, show_pmc3, store_pmc3),
  237. __ATTR(pmc4, 0600, show_pmc4, store_pmc4),
  238. __ATTR(pmc5, 0600, show_pmc5, store_pmc5),
  239. __ATTR(pmc6, 0600, show_pmc6, store_pmc6),
  240. #ifdef CONFIG_PPC64
  241. __ATTR(pmc7, 0600, show_pmc7, store_pmc7),
  242. __ATTR(pmc8, 0600, show_pmc8, store_pmc8),
  243. #endif
  244. };
  245. #ifdef HAS_PPC_PMC_PA6T
  246. static struct device_attribute pa6t_attrs[] = {
  247. __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
  248. __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
  249. __ATTR(pmc0, 0600, show_pa6t_pmc0, store_pa6t_pmc0),
  250. __ATTR(pmc1, 0600, show_pa6t_pmc1, store_pa6t_pmc1),
  251. __ATTR(pmc2, 0600, show_pa6t_pmc2, store_pa6t_pmc2),
  252. __ATTR(pmc3, 0600, show_pa6t_pmc3, store_pa6t_pmc3),
  253. __ATTR(pmc4, 0600, show_pa6t_pmc4, store_pa6t_pmc4),
  254. __ATTR(pmc5, 0600, show_pa6t_pmc5, store_pa6t_pmc5),
  255. #ifdef CONFIG_DEBUG_KERNEL
  256. __ATTR(hid0, 0600, show_hid0, store_hid0),
  257. __ATTR(hid1, 0600, show_hid1, store_hid1),
  258. __ATTR(hid4, 0600, show_hid4, store_hid4),
  259. __ATTR(hid5, 0600, show_hid5, store_hid5),
  260. __ATTR(ima0, 0600, show_ima0, store_ima0),
  261. __ATTR(ima1, 0600, show_ima1, store_ima1),
  262. __ATTR(ima2, 0600, show_ima2, store_ima2),
  263. __ATTR(ima3, 0600, show_ima3, store_ima3),
  264. __ATTR(ima4, 0600, show_ima4, store_ima4),
  265. __ATTR(ima5, 0600, show_ima5, store_ima5),
  266. __ATTR(ima6, 0600, show_ima6, store_ima6),
  267. __ATTR(ima7, 0600, show_ima7, store_ima7),
  268. __ATTR(ima8, 0600, show_ima8, store_ima8),
  269. __ATTR(ima9, 0600, show_ima9, store_ima9),
  270. __ATTR(imaat, 0600, show_imaat, store_imaat),
  271. __ATTR(btcr, 0600, show_btcr, store_btcr),
  272. __ATTR(pccr, 0600, show_pccr, store_pccr),
  273. __ATTR(rpccr, 0600, show_rpccr, store_rpccr),
  274. __ATTR(der, 0600, show_der, store_der),
  275. __ATTR(mer, 0600, show_mer, store_mer),
  276. __ATTR(ber, 0600, show_ber, store_ber),
  277. __ATTR(ier, 0600, show_ier, store_ier),
  278. __ATTR(sier, 0600, show_sier, store_sier),
  279. __ATTR(siar, 0600, show_siar, store_siar),
  280. __ATTR(tsr0, 0600, show_tsr0, store_tsr0),
  281. __ATTR(tsr1, 0600, show_tsr1, store_tsr1),
  282. __ATTR(tsr2, 0600, show_tsr2, store_tsr2),
  283. __ATTR(tsr3, 0600, show_tsr3, store_tsr3),
  284. #endif /* CONFIG_DEBUG_KERNEL */
  285. };
  286. #endif /* HAS_PPC_PMC_PA6T */
  287. #endif /* HAS_PPC_PMC_CLASSIC */
  288. static void __cpuinit register_cpu_online(unsigned int cpu)
  289. {
  290. struct cpu *c = &per_cpu(cpu_devices, cpu);
  291. struct device *s = &c->dev;
  292. struct device_attribute *attrs, *pmc_attrs;
  293. int i, nattrs;
  294. #ifdef CONFIG_PPC64
  295. if (!firmware_has_feature(FW_FEATURE_ISERIES) &&
  296. cpu_has_feature(CPU_FTR_SMT))
  297. device_create_file(s, &dev_attr_smt_snooze_delay);
  298. #endif
  299. /* PMC stuff */
  300. switch (cur_cpu_spec->pmc_type) {
  301. #ifdef HAS_PPC_PMC_IBM
  302. case PPC_PMC_IBM:
  303. attrs = ibm_common_attrs;
  304. nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
  305. pmc_attrs = classic_pmc_attrs;
  306. break;
  307. #endif /* HAS_PPC_PMC_IBM */
  308. #ifdef HAS_PPC_PMC_G4
  309. case PPC_PMC_G4:
  310. attrs = g4_common_attrs;
  311. nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
  312. pmc_attrs = classic_pmc_attrs;
  313. break;
  314. #endif /* HAS_PPC_PMC_G4 */
  315. #ifdef HAS_PPC_PMC_PA6T
  316. case PPC_PMC_PA6T:
  317. /* PA Semi starts counting at PMC0 */
  318. attrs = pa6t_attrs;
  319. nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
  320. pmc_attrs = NULL;
  321. break;
  322. #endif /* HAS_PPC_PMC_PA6T */
  323. default:
  324. attrs = NULL;
  325. nattrs = 0;
  326. pmc_attrs = NULL;
  327. }
  328. for (i = 0; i < nattrs; i++)
  329. device_create_file(s, &attrs[i]);
  330. if (pmc_attrs)
  331. for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
  332. device_create_file(s, &pmc_attrs[i]);
  333. #ifdef CONFIG_PPC64
  334. if (cpu_has_feature(CPU_FTR_MMCRA))
  335. device_create_file(s, &dev_attr_mmcra);
  336. if (cpu_has_feature(CPU_FTR_PURR))
  337. device_create_file(s, &dev_attr_purr);
  338. if (cpu_has_feature(CPU_FTR_SPURR))
  339. device_create_file(s, &dev_attr_spurr);
  340. if (cpu_has_feature(CPU_FTR_DSCR))
  341. device_create_file(s, &dev_attr_dscr);
  342. if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
  343. device_create_file(s, &dev_attr_pir);
  344. #endif /* CONFIG_PPC64 */
  345. cacheinfo_cpu_online(cpu);
  346. }
  347. #ifdef CONFIG_HOTPLUG_CPU
  348. static void unregister_cpu_online(unsigned int cpu)
  349. {
  350. struct cpu *c = &per_cpu(cpu_devices, cpu);
  351. struct device *s = &c->dev;
  352. struct device_attribute *attrs, *pmc_attrs;
  353. int i, nattrs;
  354. BUG_ON(!c->hotpluggable);
  355. #ifdef CONFIG_PPC64
  356. if (!firmware_has_feature(FW_FEATURE_ISERIES) &&
  357. cpu_has_feature(CPU_FTR_SMT))
  358. device_remove_file(s, &dev_attr_smt_snooze_delay);
  359. #endif
  360. /* PMC stuff */
  361. switch (cur_cpu_spec->pmc_type) {
  362. #ifdef HAS_PPC_PMC_IBM
  363. case PPC_PMC_IBM:
  364. attrs = ibm_common_attrs;
  365. nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
  366. pmc_attrs = classic_pmc_attrs;
  367. break;
  368. #endif /* HAS_PPC_PMC_IBM */
  369. #ifdef HAS_PPC_PMC_G4
  370. case PPC_PMC_G4:
  371. attrs = g4_common_attrs;
  372. nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
  373. pmc_attrs = classic_pmc_attrs;
  374. break;
  375. #endif /* HAS_PPC_PMC_G4 */
  376. #ifdef HAS_PPC_PMC_PA6T
  377. case PPC_PMC_PA6T:
  378. /* PA Semi starts counting at PMC0 */
  379. attrs = pa6t_attrs;
  380. nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
  381. pmc_attrs = NULL;
  382. break;
  383. #endif /* HAS_PPC_PMC_PA6T */
  384. default:
  385. attrs = NULL;
  386. nattrs = 0;
  387. pmc_attrs = NULL;
  388. }
  389. for (i = 0; i < nattrs; i++)
  390. device_remove_file(s, &attrs[i]);
  391. if (pmc_attrs)
  392. for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
  393. device_remove_file(s, &pmc_attrs[i]);
  394. #ifdef CONFIG_PPC64
  395. if (cpu_has_feature(CPU_FTR_MMCRA))
  396. device_remove_file(s, &dev_attr_mmcra);
  397. if (cpu_has_feature(CPU_FTR_PURR))
  398. device_remove_file(s, &dev_attr_purr);
  399. if (cpu_has_feature(CPU_FTR_SPURR))
  400. device_remove_file(s, &dev_attr_spurr);
  401. if (cpu_has_feature(CPU_FTR_DSCR))
  402. device_remove_file(s, &dev_attr_dscr);
  403. if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
  404. device_remove_file(s, &dev_attr_pir);
  405. #endif /* CONFIG_PPC64 */
  406. cacheinfo_cpu_offline(cpu);
  407. }
  408. #ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
  409. ssize_t arch_cpu_probe(const char *buf, size_t count)
  410. {
  411. if (ppc_md.cpu_probe)
  412. return ppc_md.cpu_probe(buf, count);
  413. return -EINVAL;
  414. }
  415. ssize_t arch_cpu_release(const char *buf, size_t count)
  416. {
  417. if (ppc_md.cpu_release)
  418. return ppc_md.cpu_release(buf, count);
  419. return -EINVAL;
  420. }
  421. #endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
  422. #endif /* CONFIG_HOTPLUG_CPU */
  423. static int __cpuinit sysfs_cpu_notify(struct notifier_block *self,
  424. unsigned long action, void *hcpu)
  425. {
  426. unsigned int cpu = (unsigned int)(long)hcpu;
  427. switch (action) {
  428. case CPU_ONLINE:
  429. case CPU_ONLINE_FROZEN:
  430. register_cpu_online(cpu);
  431. break;
  432. #ifdef CONFIG_HOTPLUG_CPU
  433. case CPU_DEAD:
  434. case CPU_DEAD_FROZEN:
  435. unregister_cpu_online(cpu);
  436. break;
  437. #endif
  438. }
  439. return NOTIFY_OK;
  440. }
  441. static struct notifier_block __cpuinitdata sysfs_cpu_nb = {
  442. .notifier_call = sysfs_cpu_notify,
  443. };
  444. static DEFINE_MUTEX(cpu_mutex);
  445. int cpu_add_dev_attr(struct device_attribute *attr)
  446. {
  447. int cpu;
  448. mutex_lock(&cpu_mutex);
  449. for_each_possible_cpu(cpu) {
  450. device_create_file(get_cpu_device(cpu), attr);
  451. }
  452. mutex_unlock(&cpu_mutex);
  453. return 0;
  454. }
  455. EXPORT_SYMBOL_GPL(cpu_add_dev_attr);
  456. int cpu_add_dev_attr_group(struct attribute_group *attrs)
  457. {
  458. int cpu;
  459. struct device *dev;
  460. int ret;
  461. mutex_lock(&cpu_mutex);
  462. for_each_possible_cpu(cpu) {
  463. dev = get_cpu_device(cpu);
  464. ret = sysfs_create_group(&dev->kobj, attrs);
  465. WARN_ON(ret != 0);
  466. }
  467. mutex_unlock(&cpu_mutex);
  468. return 0;
  469. }
  470. EXPORT_SYMBOL_GPL(cpu_add_dev_attr_group);
  471. void cpu_remove_dev_attr(struct device_attribute *attr)
  472. {
  473. int cpu;
  474. mutex_lock(&cpu_mutex);
  475. for_each_possible_cpu(cpu) {
  476. device_remove_file(get_cpu_device(cpu), attr);
  477. }
  478. mutex_unlock(&cpu_mutex);
  479. }
  480. EXPORT_SYMBOL_GPL(cpu_remove_dev_attr);
  481. void cpu_remove_dev_attr_group(struct attribute_group *attrs)
  482. {
  483. int cpu;
  484. struct device *dev;
  485. mutex_lock(&cpu_mutex);
  486. for_each_possible_cpu(cpu) {
  487. dev = get_cpu_device(cpu);
  488. sysfs_remove_group(&dev->kobj, attrs);
  489. }
  490. mutex_unlock(&cpu_mutex);
  491. }
  492. EXPORT_SYMBOL_GPL(cpu_remove_dev_attr_group);
  493. /* NUMA stuff */
  494. #ifdef CONFIG_NUMA
  495. static void register_nodes(void)
  496. {
  497. int i;
  498. for (i = 0; i < MAX_NUMNODES; i++)
  499. register_one_node(i);
  500. }
  501. int sysfs_add_device_to_node(struct device *dev, int nid)
  502. {
  503. struct node *node = &node_devices[nid];
  504. return sysfs_create_link(&node->dev.kobj, &dev->kobj,
  505. kobject_name(&dev->kobj));
  506. }
  507. EXPORT_SYMBOL_GPL(sysfs_add_device_to_node);
  508. void sysfs_remove_device_from_node(struct device *dev, int nid)
  509. {
  510. struct node *node = &node_devices[nid];
  511. sysfs_remove_link(&node->dev.kobj, kobject_name(&dev->kobj));
  512. }
  513. EXPORT_SYMBOL_GPL(sysfs_remove_device_from_node);
  514. #else
  515. static void register_nodes(void)
  516. {
  517. return;
  518. }
  519. #endif
  520. /* Only valid if CPU is present. */
  521. static ssize_t show_physical_id(struct device *dev,
  522. struct device_attribute *attr, char *buf)
  523. {
  524. struct cpu *cpu = container_of(dev, struct cpu, dev);
  525. return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->dev.id));
  526. }
  527. static DEVICE_ATTR(physical_id, 0444, show_physical_id, NULL);
  528. static int __init topology_init(void)
  529. {
  530. int cpu;
  531. register_nodes();
  532. register_cpu_notifier(&sysfs_cpu_nb);
  533. for_each_possible_cpu(cpu) {
  534. struct cpu *c = &per_cpu(cpu_devices, cpu);
  535. /*
  536. * For now, we just see if the system supports making
  537. * the RTAS calls for CPU hotplug. But, there may be a
  538. * more comprehensive way to do this for an individual
  539. * CPU. For instance, the boot cpu might never be valid
  540. * for hotplugging.
  541. */
  542. if (ppc_md.cpu_die)
  543. c->hotpluggable = 1;
  544. if (cpu_online(cpu) || c->hotpluggable) {
  545. register_cpu(c, cpu);
  546. device_create_file(&c->dev, &dev_attr_physical_id);
  547. }
  548. if (cpu_online(cpu))
  549. register_cpu_online(cpu);
  550. }
  551. #ifdef CONFIG_PPC64
  552. sysfs_create_dscr_default();
  553. #endif /* CONFIG_PPC64 */
  554. return 0;
  555. }
  556. subsys_initcall(topology_init);