bcm43xx_main.h 7.6 KB

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  1. /*
  2. Broadcom BCM43xx wireless driver
  3. Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
  4. Stefano Brivio <st3@riseup.net>
  5. Michael Buesch <mbuesch@freenet.de>
  6. Danny van Dyk <kugelfang@gentoo.org>
  7. Andreas Jaggi <andreas.jaggi@waterwave.ch>
  8. Some parts of the code in this file are derived from the ipw2200
  9. driver Copyright(c) 2003 - 2004 Intel Corporation.
  10. This program is free software; you can redistribute it and/or modify
  11. it under the terms of the GNU General Public License as published by
  12. the Free Software Foundation; either version 2 of the License, or
  13. (at your option) any later version.
  14. This program is distributed in the hope that it will be useful,
  15. but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. GNU General Public License for more details.
  18. You should have received a copy of the GNU General Public License
  19. along with this program; see the file COPYING. If not, write to
  20. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  21. Boston, MA 02110-1301, USA.
  22. */
  23. #ifndef BCM43xx_MAIN_H_
  24. #define BCM43xx_MAIN_H_
  25. #include "bcm43xx.h"
  26. #ifdef CONFIG_BCM947XX
  27. #define atoi(str) simple_strtoul(((str != NULL) ? str : ""), NULL, 0)
  28. static inline void e_aton(char *str, char *dest)
  29. {
  30. int i = 0;
  31. u16 *d = (u16 *) dest;
  32. for (;;) {
  33. dest[i++] = (char) simple_strtoul(str, NULL, 16);
  34. str += 2;
  35. if (!*str++ || i == 6)
  36. break;
  37. }
  38. for (i = 0; i < 3; i++)
  39. d[i] = cpu_to_be16(d[i]);
  40. }
  41. #endif
  42. #define _bcm43xx_declare_plcp_hdr(size) \
  43. struct bcm43xx_plcp_hdr##size { \
  44. union { \
  45. __le32 data; \
  46. __u8 raw[size]; \
  47. } __attribute__((__packed__)); \
  48. } __attribute__((__packed__))
  49. /* struct bcm43xx_plcp_hdr4 */
  50. _bcm43xx_declare_plcp_hdr(4);
  51. /* struct bcm430c_plcp_hdr6 */
  52. _bcm43xx_declare_plcp_hdr(6);
  53. #undef _bcm43xx_declare_plcp_hdr
  54. #define P4D_BYT3S(magic, nr_bytes) u8 __p4dding##magic[nr_bytes]
  55. #define P4D_BYTES(line, nr_bytes) P4D_BYT3S(line, nr_bytes)
  56. /* Magic helper macro to pad structures. Ignore those above. It's magic. */
  57. #define PAD_BYTES(nr_bytes) P4D_BYTES( __LINE__ , (nr_bytes))
  58. /* Device specific TX header. To be prepended to TX frames. */
  59. struct bcm43xx_txhdr {
  60. union {
  61. struct {
  62. u16 flags;
  63. u16 wsec_rate;
  64. u16 frame_control;
  65. u16 unknown_zeroed_0;
  66. u16 control;
  67. unsigned char wep_iv[10];
  68. unsigned char unknown_wsec_tkip_data[3]; //FIXME
  69. PAD_BYTES(3);
  70. unsigned char mac1[6];
  71. u16 unknown_zeroed_1;
  72. struct bcm43xx_plcp_hdr4 rts_cts_fallback_plcp;
  73. u16 rts_cts_dur_fallback;
  74. struct bcm43xx_plcp_hdr4 fallback_plcp;
  75. u16 fallback_dur_id;
  76. PAD_BYTES(2);
  77. u16 cookie;
  78. u16 unknown_scb_stuff; //FIXME
  79. struct bcm43xx_plcp_hdr6 rts_cts_plcp;
  80. u16 rts_cts_frame_type;
  81. u16 rts_cts_dur;
  82. unsigned char rts_cts_mac1[6];
  83. unsigned char rts_cts_mac2[6];
  84. PAD_BYTES(2);
  85. struct bcm43xx_plcp_hdr6 plcp;
  86. } __attribute__((__packed__));
  87. unsigned char raw[82];
  88. } __attribute__((__packed__));
  89. } __attribute__((__packed__));
  90. struct sk_buff;
  91. void bcm43xx_generate_txhdr(struct bcm43xx_private *bcm,
  92. struct bcm43xx_txhdr *txhdr,
  93. const unsigned char *fragment_data,
  94. const unsigned int fragment_len,
  95. const int is_first_fragment,
  96. const u16 cookie);
  97. /* RX header as received from the hardware. */
  98. struct bcm43xx_rxhdr {
  99. /* Frame Length. Must be generated explicitely in PIO mode. */
  100. __le16 frame_length;
  101. PAD_BYTES(2);
  102. /* Flags field 1 */
  103. __le16 flags1;
  104. u8 rssi;
  105. u8 signal_quality;
  106. PAD_BYTES(2);
  107. /* Flags field 3 */
  108. __le16 flags3;
  109. /* Flags field 2 */
  110. __le16 flags2;
  111. /* Lower 16bits of the TSF at the time the frame started. */
  112. __le16 mactime;
  113. PAD_BYTES(14);
  114. } __attribute__((__packed__));
  115. #define BCM43xx_RXHDR_FLAGS1_OFDM (1 << 0)
  116. /*#define BCM43xx_RXHDR_FLAGS1_SIGNAL??? (1 << 3) FIXME */
  117. #define BCM43xx_RXHDR_FLAGS1_SHORTPREAMBLE (1 << 7)
  118. #define BCM43xx_RXHDR_FLAGS1_2053RSSIADJ (1 << 14)
  119. #define BCM43xx_RXHDR_FLAGS2_INVALIDFRAME (1 << 0)
  120. #define BCM43xx_RXHDR_FLAGS2_TYPE2FRAME (1 << 2)
  121. /*FIXME: WEP related flags */
  122. #define BCM43xx_RXHDR_FLAGS3_2050RSSIADJ (1 << 10)
  123. /* Transmit Status as received from the hardware. */
  124. struct bcm43xx_hwxmitstatus {
  125. PAD_BYTES(4);
  126. __le16 cookie;
  127. u8 flags;
  128. u8 cnt1:4,
  129. cnt2:4;
  130. PAD_BYTES(2);
  131. __le16 seq;
  132. __le16 unknown; //FIXME
  133. } __attribute__((__packed__));
  134. /* Transmit Status in CPU byteorder. */
  135. struct bcm43xx_xmitstatus {
  136. u16 cookie;
  137. u8 flags;
  138. u8 cnt1:4,
  139. cnt2:4;
  140. u16 seq;
  141. u16 unknown; //FIXME
  142. };
  143. #define BCM43xx_TXSTAT_FLAG_ACK 0x01
  144. //TODO #define BCM43xx_TXSTAT_FLAG_??? 0x02
  145. //TODO #define BCM43xx_TXSTAT_FLAG_??? 0x04
  146. //TODO #define BCM43xx_TXSTAT_FLAG_??? 0x08
  147. //TODO #define BCM43xx_TXSTAT_FLAG_??? 0x10
  148. #define BCM43xx_TXSTAT_FLAG_IGNORE 0x20
  149. //TODO #define BCM43xx_TXSTAT_FLAG_??? 0x40
  150. //TODO #define BCM43xx_TXSTAT_FLAG_??? 0x80
  151. struct bcm43xx_xmitstatus_queue {
  152. struct list_head list;
  153. struct bcm43xx_hwxmitstatus status;
  154. };
  155. /* Lightweight function to convert a frequency (in Mhz) to a channel number. */
  156. static inline
  157. u8 bcm43xx_freq_to_channel(struct bcm43xx_private *bcm,
  158. int freq)
  159. {
  160. u8 channel;
  161. if (bcm->current_core->phy->type == BCM43xx_PHYTYPE_A) {
  162. channel = (freq - 5000) / 5;
  163. } else {
  164. if (freq == 2484)
  165. channel = 14;
  166. else
  167. channel = (freq - 2407) / 5;
  168. }
  169. return channel;
  170. }
  171. /* Lightweight function to convert a channel number to a frequency (in Mhz). */
  172. static inline
  173. int bcm43xx_channel_to_freq(struct bcm43xx_private *bcm,
  174. u8 channel)
  175. {
  176. int freq;
  177. if (bcm->current_core->phy->type == BCM43xx_PHYTYPE_A) {
  178. freq = 5000 + (5 * channel);
  179. } else {
  180. if (channel == 14)
  181. freq = 2484;
  182. else
  183. freq = 2407 + (5 * channel);
  184. }
  185. return freq;
  186. }
  187. /* Lightweight function to check if a channel number is valid.
  188. * Note that this does _NOT_ check for geographical restrictions!
  189. */
  190. static inline
  191. int bcm43xx_is_valid_channel(struct bcm43xx_private *bcm,
  192. u8 channel)
  193. {
  194. if (bcm->current_core->phy->type == BCM43xx_PHYTYPE_A) {
  195. if (channel <= 200)
  196. return 1;
  197. } else {
  198. if (channel >= 1 && channel <= 14)
  199. return 1;
  200. }
  201. return 0;
  202. }
  203. void bcm43xx_tsf_read(struct bcm43xx_private *bcm, u64 *tsf);
  204. void bcm43xx_tsf_write(struct bcm43xx_private *bcm, u64 tsf);
  205. int bcm43xx_rx(struct bcm43xx_private *bcm,
  206. struct sk_buff *skb,
  207. struct bcm43xx_rxhdr *rxhdr);
  208. void bcm43xx_set_iwmode(struct bcm43xx_private *bcm,
  209. int iw_mode);
  210. u32 bcm43xx_shm_read32(struct bcm43xx_private *bcm,
  211. u16 routing, u16 offset);
  212. u16 bcm43xx_shm_read16(struct bcm43xx_private *bcm,
  213. u16 routing, u16 offset);
  214. void bcm43xx_shm_write32(struct bcm43xx_private *bcm,
  215. u16 routing, u16 offset,
  216. u32 value);
  217. void bcm43xx_shm_write16(struct bcm43xx_private *bcm,
  218. u16 routing, u16 offset,
  219. u16 value);
  220. void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm);
  221. int bcm43xx_switch_core(struct bcm43xx_private *bcm, struct bcm43xx_coreinfo *new_core);
  222. void bcm43xx_wireless_core_reset(struct bcm43xx_private *bcm, int connect_phy);
  223. int bcm43xx_pci_read_config_16(struct pci_dev *pdev, u16 offset, u16 *val);
  224. int bcm43xx_pci_read_config_32(struct pci_dev *pdev, u16 offset, u32 *val);
  225. int bcm43xx_pci_write_config_16(struct pci_dev *pdev, int offset, u16 val);
  226. int bcm43xx_pci_write_config_32(struct pci_dev *pdev, int offset, u32 val);
  227. void bcm43xx_mac_suspend(struct bcm43xx_private *bcm);
  228. void bcm43xx_mac_enable(struct bcm43xx_private *bcm);
  229. void bcm43xx_controller_restart(struct bcm43xx_private *bcm, const char *reason);
  230. int bcm43xx_sprom_read(struct bcm43xx_private *bcm, u16 *sprom);
  231. int bcm43xx_sprom_write(struct bcm43xx_private *bcm, const u16 *sprom);
  232. #endif /* BCM43xx_MAIN_H_ */