rtc-s3c.c 13 KB

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  1. /* drivers/rtc/rtc-s3c.c
  2. *
  3. * Copyright (c) 2004,2006 Simtec Electronics
  4. * Ben Dooks, <ben@simtec.co.uk>
  5. * http://armlinux.simtec.co.uk/
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * S3C2410/S3C2440/S3C24XX Internal RTC Driver
  12. */
  13. #include <linux/module.h>
  14. #include <linux/fs.h>
  15. #include <linux/string.h>
  16. #include <linux/init.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/clk.h>
  22. #include <linux/log2.h>
  23. #include <asm/hardware.h>
  24. #include <asm/uaccess.h>
  25. #include <asm/io.h>
  26. #include <asm/irq.h>
  27. #include <asm/rtc.h>
  28. #include <asm/mach/time.h>
  29. #include <asm/plat-s3c/regs-rtc.h>
  30. /* I have yet to find an S3C implementation with more than one
  31. * of these rtc blocks in */
  32. static struct resource *s3c_rtc_mem;
  33. static void __iomem *s3c_rtc_base;
  34. static int s3c_rtc_alarmno = NO_IRQ;
  35. static int s3c_rtc_tickno = NO_IRQ;
  36. static int s3c_rtc_freq = 1;
  37. static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
  38. static unsigned int tick_count;
  39. /* IRQ Handlers */
  40. static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
  41. {
  42. struct rtc_device *rdev = id;
  43. rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
  44. return IRQ_HANDLED;
  45. }
  46. static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
  47. {
  48. struct rtc_device *rdev = id;
  49. rtc_update_irq(rdev, tick_count++, RTC_PF | RTC_IRQF);
  50. return IRQ_HANDLED;
  51. }
  52. /* Update control registers */
  53. static void s3c_rtc_setaie(int to)
  54. {
  55. unsigned int tmp;
  56. pr_debug("%s: aie=%d\n", __FUNCTION__, to);
  57. tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
  58. if (to)
  59. tmp |= S3C2410_RTCALM_ALMEN;
  60. writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
  61. }
  62. static void s3c_rtc_setpie(int to)
  63. {
  64. unsigned int tmp;
  65. pr_debug("%s: pie=%d\n", __FUNCTION__, to);
  66. spin_lock_irq(&s3c_rtc_pie_lock);
  67. tmp = readb(s3c_rtc_base + S3C2410_TICNT) & ~S3C2410_TICNT_ENABLE;
  68. if (to)
  69. tmp |= S3C2410_TICNT_ENABLE;
  70. writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
  71. spin_unlock_irq(&s3c_rtc_pie_lock);
  72. }
  73. static void s3c_rtc_setfreq(int freq)
  74. {
  75. unsigned int tmp;
  76. spin_lock_irq(&s3c_rtc_pie_lock);
  77. tmp = readb(s3c_rtc_base + S3C2410_TICNT) & S3C2410_TICNT_ENABLE;
  78. s3c_rtc_freq = freq;
  79. tmp |= (128 / freq)-1;
  80. writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
  81. spin_unlock_irq(&s3c_rtc_pie_lock);
  82. }
  83. /* Time read/write */
  84. static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  85. {
  86. unsigned int have_retried = 0;
  87. void __iomem *base = s3c_rtc_base;
  88. retry_get_time:
  89. rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
  90. rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
  91. rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
  92. rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
  93. rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
  94. rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
  95. /* the only way to work out wether the system was mid-update
  96. * when we read it is to check the second counter, and if it
  97. * is zero, then we re-try the entire read
  98. */
  99. if (rtc_tm->tm_sec == 0 && !have_retried) {
  100. have_retried = 1;
  101. goto retry_get_time;
  102. }
  103. pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n",
  104. rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
  105. rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
  106. BCD_TO_BIN(rtc_tm->tm_sec);
  107. BCD_TO_BIN(rtc_tm->tm_min);
  108. BCD_TO_BIN(rtc_tm->tm_hour);
  109. BCD_TO_BIN(rtc_tm->tm_mday);
  110. BCD_TO_BIN(rtc_tm->tm_mon);
  111. BCD_TO_BIN(rtc_tm->tm_year);
  112. rtc_tm->tm_year += 100;
  113. rtc_tm->tm_mon -= 1;
  114. return 0;
  115. }
  116. static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
  117. {
  118. void __iomem *base = s3c_rtc_base;
  119. int year = tm->tm_year - 100;
  120. pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n",
  121. tm->tm_year, tm->tm_mon, tm->tm_mday,
  122. tm->tm_hour, tm->tm_min, tm->tm_sec);
  123. /* we get around y2k by simply not supporting it */
  124. if (year < 0 || year >= 100) {
  125. dev_err(dev, "rtc only supports 100 years\n");
  126. return -EINVAL;
  127. }
  128. writeb(BIN2BCD(tm->tm_sec), base + S3C2410_RTCSEC);
  129. writeb(BIN2BCD(tm->tm_min), base + S3C2410_RTCMIN);
  130. writeb(BIN2BCD(tm->tm_hour), base + S3C2410_RTCHOUR);
  131. writeb(BIN2BCD(tm->tm_mday), base + S3C2410_RTCDATE);
  132. writeb(BIN2BCD(tm->tm_mon + 1), base + S3C2410_RTCMON);
  133. writeb(BIN2BCD(year), base + S3C2410_RTCYEAR);
  134. return 0;
  135. }
  136. static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
  137. {
  138. struct rtc_time *alm_tm = &alrm->time;
  139. void __iomem *base = s3c_rtc_base;
  140. unsigned int alm_en;
  141. alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
  142. alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
  143. alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
  144. alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
  145. alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
  146. alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
  147. alm_en = readb(base + S3C2410_RTCALM);
  148. alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
  149. pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n",
  150. alm_en,
  151. alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
  152. alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
  153. /* decode the alarm enable field */
  154. if (alm_en & S3C2410_RTCALM_SECEN)
  155. BCD_TO_BIN(alm_tm->tm_sec);
  156. else
  157. alm_tm->tm_sec = 0xff;
  158. if (alm_en & S3C2410_RTCALM_MINEN)
  159. BCD_TO_BIN(alm_tm->tm_min);
  160. else
  161. alm_tm->tm_min = 0xff;
  162. if (alm_en & S3C2410_RTCALM_HOUREN)
  163. BCD_TO_BIN(alm_tm->tm_hour);
  164. else
  165. alm_tm->tm_hour = 0xff;
  166. if (alm_en & S3C2410_RTCALM_DAYEN)
  167. BCD_TO_BIN(alm_tm->tm_mday);
  168. else
  169. alm_tm->tm_mday = 0xff;
  170. if (alm_en & S3C2410_RTCALM_MONEN) {
  171. BCD_TO_BIN(alm_tm->tm_mon);
  172. alm_tm->tm_mon -= 1;
  173. } else {
  174. alm_tm->tm_mon = 0xff;
  175. }
  176. if (alm_en & S3C2410_RTCALM_YEAREN)
  177. BCD_TO_BIN(alm_tm->tm_year);
  178. else
  179. alm_tm->tm_year = 0xffff;
  180. return 0;
  181. }
  182. static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  183. {
  184. struct rtc_time *tm = &alrm->time;
  185. void __iomem *base = s3c_rtc_base;
  186. unsigned int alrm_en;
  187. pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n",
  188. alrm->enabled,
  189. tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff,
  190. tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec);
  191. alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
  192. writeb(0x00, base + S3C2410_RTCALM);
  193. if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
  194. alrm_en |= S3C2410_RTCALM_SECEN;
  195. writeb(BIN2BCD(tm->tm_sec), base + S3C2410_ALMSEC);
  196. }
  197. if (tm->tm_min < 60 && tm->tm_min >= 0) {
  198. alrm_en |= S3C2410_RTCALM_MINEN;
  199. writeb(BIN2BCD(tm->tm_min), base + S3C2410_ALMMIN);
  200. }
  201. if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
  202. alrm_en |= S3C2410_RTCALM_HOUREN;
  203. writeb(BIN2BCD(tm->tm_hour), base + S3C2410_ALMHOUR);
  204. }
  205. pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
  206. writeb(alrm_en, base + S3C2410_RTCALM);
  207. if (0) {
  208. alrm_en = readb(base + S3C2410_RTCALM);
  209. alrm_en &= ~S3C2410_RTCALM_ALMEN;
  210. writeb(alrm_en, base + S3C2410_RTCALM);
  211. disable_irq_wake(s3c_rtc_alarmno);
  212. }
  213. if (alrm->enabled)
  214. enable_irq_wake(s3c_rtc_alarmno);
  215. else
  216. disable_irq_wake(s3c_rtc_alarmno);
  217. return 0;
  218. }
  219. static int s3c_rtc_ioctl(struct device *dev,
  220. unsigned int cmd, unsigned long arg)
  221. {
  222. unsigned int ret = -ENOIOCTLCMD;
  223. switch (cmd) {
  224. case RTC_AIE_OFF:
  225. case RTC_AIE_ON:
  226. s3c_rtc_setaie((cmd == RTC_AIE_ON) ? 1 : 0);
  227. ret = 0;
  228. break;
  229. case RTC_PIE_OFF:
  230. case RTC_PIE_ON:
  231. tick_count = 0;
  232. s3c_rtc_setpie((cmd == RTC_PIE_ON) ? 1 : 0);
  233. ret = 0;
  234. break;
  235. case RTC_IRQP_READ:
  236. ret = put_user(s3c_rtc_freq, (unsigned long __user *)arg);
  237. break;
  238. case RTC_IRQP_SET:
  239. if (!is_power_of_2(arg)) {
  240. ret = -EINVAL;
  241. goto exit;
  242. }
  243. pr_debug("s3c2410_rtc: setting frequency %ld\n", arg);
  244. s3c_rtc_setfreq(arg);
  245. ret = 0;
  246. break;
  247. case RTC_UIE_ON:
  248. case RTC_UIE_OFF:
  249. ret = -EINVAL;
  250. }
  251. exit:
  252. return ret;
  253. }
  254. static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
  255. {
  256. unsigned int ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
  257. seq_printf(seq, "periodic_IRQ\t: %s\n",
  258. (ticnt & S3C2410_TICNT_ENABLE) ? "yes" : "no" );
  259. seq_printf(seq, "periodic_freq\t: %d\n", s3c_rtc_freq);
  260. return 0;
  261. }
  262. static int s3c_rtc_open(struct device *dev)
  263. {
  264. struct platform_device *pdev = to_platform_device(dev);
  265. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  266. int ret;
  267. ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
  268. IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev);
  269. if (ret) {
  270. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
  271. return ret;
  272. }
  273. ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
  274. IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev);
  275. if (ret) {
  276. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
  277. goto tick_err;
  278. }
  279. return ret;
  280. tick_err:
  281. free_irq(s3c_rtc_alarmno, rtc_dev);
  282. return ret;
  283. }
  284. static void s3c_rtc_release(struct device *dev)
  285. {
  286. struct platform_device *pdev = to_platform_device(dev);
  287. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  288. /* do not clear AIE here, it may be needed for wake */
  289. s3c_rtc_setpie(0);
  290. free_irq(s3c_rtc_alarmno, rtc_dev);
  291. free_irq(s3c_rtc_tickno, rtc_dev);
  292. }
  293. static const struct rtc_class_ops s3c_rtcops = {
  294. .open = s3c_rtc_open,
  295. .release = s3c_rtc_release,
  296. .ioctl = s3c_rtc_ioctl,
  297. .read_time = s3c_rtc_gettime,
  298. .set_time = s3c_rtc_settime,
  299. .read_alarm = s3c_rtc_getalarm,
  300. .set_alarm = s3c_rtc_setalarm,
  301. .proc = s3c_rtc_proc,
  302. };
  303. static void s3c_rtc_enable(struct platform_device *pdev, int en)
  304. {
  305. void __iomem *base = s3c_rtc_base;
  306. unsigned int tmp;
  307. if (s3c_rtc_base == NULL)
  308. return;
  309. if (!en) {
  310. tmp = readb(base + S3C2410_RTCCON);
  311. writeb(tmp & ~S3C2410_RTCCON_RTCEN, base + S3C2410_RTCCON);
  312. tmp = readb(base + S3C2410_TICNT);
  313. writeb(tmp & ~S3C2410_TICNT_ENABLE, base + S3C2410_TICNT);
  314. } else {
  315. /* re-enable the device, and check it is ok */
  316. if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){
  317. dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
  318. tmp = readb(base + S3C2410_RTCCON);
  319. writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON);
  320. }
  321. if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){
  322. dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
  323. tmp = readb(base + S3C2410_RTCCON);
  324. writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON);
  325. }
  326. if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){
  327. dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
  328. tmp = readb(base + S3C2410_RTCCON);
  329. writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON);
  330. }
  331. }
  332. }
  333. static int s3c_rtc_remove(struct platform_device *dev)
  334. {
  335. struct rtc_device *rtc = platform_get_drvdata(dev);
  336. platform_set_drvdata(dev, NULL);
  337. rtc_device_unregister(rtc);
  338. s3c_rtc_setpie(0);
  339. s3c_rtc_setaie(0);
  340. iounmap(s3c_rtc_base);
  341. release_resource(s3c_rtc_mem);
  342. kfree(s3c_rtc_mem);
  343. return 0;
  344. }
  345. static int s3c_rtc_probe(struct platform_device *pdev)
  346. {
  347. struct rtc_device *rtc;
  348. struct resource *res;
  349. int ret;
  350. pr_debug("%s: probe=%p\n", __FUNCTION__, pdev);
  351. /* find the IRQs */
  352. s3c_rtc_tickno = platform_get_irq(pdev, 1);
  353. if (s3c_rtc_tickno < 0) {
  354. dev_err(&pdev->dev, "no irq for rtc tick\n");
  355. return -ENOENT;
  356. }
  357. s3c_rtc_alarmno = platform_get_irq(pdev, 0);
  358. if (s3c_rtc_alarmno < 0) {
  359. dev_err(&pdev->dev, "no irq for alarm\n");
  360. return -ENOENT;
  361. }
  362. pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
  363. s3c_rtc_tickno, s3c_rtc_alarmno);
  364. /* get the memory region */
  365. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  366. if (res == NULL) {
  367. dev_err(&pdev->dev, "failed to get memory region resource\n");
  368. return -ENOENT;
  369. }
  370. s3c_rtc_mem = request_mem_region(res->start,
  371. res->end-res->start+1,
  372. pdev->name);
  373. if (s3c_rtc_mem == NULL) {
  374. dev_err(&pdev->dev, "failed to reserve memory region\n");
  375. ret = -ENOENT;
  376. goto err_nores;
  377. }
  378. s3c_rtc_base = ioremap(res->start, res->end - res->start + 1);
  379. if (s3c_rtc_base == NULL) {
  380. dev_err(&pdev->dev, "failed ioremap()\n");
  381. ret = -EINVAL;
  382. goto err_nomap;
  383. }
  384. /* check to see if everything is setup correctly */
  385. s3c_rtc_enable(pdev, 1);
  386. pr_debug("s3c2410_rtc: RTCCON=%02x\n",
  387. readb(s3c_rtc_base + S3C2410_RTCCON));
  388. s3c_rtc_setfreq(s3c_rtc_freq);
  389. /* register RTC and exit */
  390. rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
  391. THIS_MODULE);
  392. if (IS_ERR(rtc)) {
  393. dev_err(&pdev->dev, "cannot attach rtc\n");
  394. ret = PTR_ERR(rtc);
  395. goto err_nortc;
  396. }
  397. rtc->max_user_freq = 128;
  398. platform_set_drvdata(pdev, rtc);
  399. return 0;
  400. err_nortc:
  401. s3c_rtc_enable(pdev, 0);
  402. iounmap(s3c_rtc_base);
  403. err_nomap:
  404. release_resource(s3c_rtc_mem);
  405. err_nores:
  406. return ret;
  407. }
  408. #ifdef CONFIG_PM
  409. /* RTC Power management control */
  410. static int ticnt_save;
  411. static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  412. {
  413. /* save TICNT for anyone using periodic interrupts */
  414. ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
  415. s3c_rtc_enable(pdev, 0);
  416. return 0;
  417. }
  418. static int s3c_rtc_resume(struct platform_device *pdev)
  419. {
  420. s3c_rtc_enable(pdev, 1);
  421. writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
  422. return 0;
  423. }
  424. #else
  425. #define s3c_rtc_suspend NULL
  426. #define s3c_rtc_resume NULL
  427. #endif
  428. static struct platform_driver s3c2410_rtcdrv = {
  429. .probe = s3c_rtc_probe,
  430. .remove = s3c_rtc_remove,
  431. .suspend = s3c_rtc_suspend,
  432. .resume = s3c_rtc_resume,
  433. .driver = {
  434. .name = "s3c2410-rtc",
  435. .owner = THIS_MODULE,
  436. },
  437. };
  438. static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
  439. static int __init s3c_rtc_init(void)
  440. {
  441. printk(banner);
  442. return platform_driver_register(&s3c2410_rtcdrv);
  443. }
  444. static void __exit s3c_rtc_exit(void)
  445. {
  446. platform_driver_unregister(&s3c2410_rtcdrv);
  447. }
  448. module_init(s3c_rtc_init);
  449. module_exit(s3c_rtc_exit);
  450. MODULE_DESCRIPTION("Samsung S3C RTC Driver");
  451. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
  452. MODULE_LICENSE("GPL");
  453. MODULE_ALIAS("platform:s3c2410-rtc");