rtc-ds1511.c 15 KB

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  1. /*
  2. * An rtc driver for the Dallas DS1511
  3. *
  4. * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
  5. * Copyright (C) 2007 Andrew Sharp <andy.sharp@onstor.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Real time clock driver for the Dallas 1511 chip, which also
  12. * contains a watchdog timer. There is a tiny amount of code that
  13. * platform code could use to mess with the watchdog device a little
  14. * bit, but not a full watchdog driver.
  15. */
  16. #include <linux/bcd.h>
  17. #include <linux/init.h>
  18. #include <linux/kernel.h>
  19. #include <linux/delay.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/rtc.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/io.h>
  24. #define DRV_VERSION "0.6"
  25. enum ds1511reg {
  26. DS1511_SEC = 0x0,
  27. DS1511_MIN = 0x1,
  28. DS1511_HOUR = 0x2,
  29. DS1511_DOW = 0x3,
  30. DS1511_DOM = 0x4,
  31. DS1511_MONTH = 0x5,
  32. DS1511_YEAR = 0x6,
  33. DS1511_CENTURY = 0x7,
  34. DS1511_AM1_SEC = 0x8,
  35. DS1511_AM2_MIN = 0x9,
  36. DS1511_AM3_HOUR = 0xa,
  37. DS1511_AM4_DATE = 0xb,
  38. DS1511_WD_MSEC = 0xc,
  39. DS1511_WD_SEC = 0xd,
  40. DS1511_CONTROL_A = 0xe,
  41. DS1511_CONTROL_B = 0xf,
  42. DS1511_RAMADDR_LSB = 0x10,
  43. DS1511_RAMDATA = 0x13
  44. };
  45. #define DS1511_BLF1 0x80
  46. #define DS1511_BLF2 0x40
  47. #define DS1511_PRS 0x20
  48. #define DS1511_PAB 0x10
  49. #define DS1511_TDF 0x08
  50. #define DS1511_KSF 0x04
  51. #define DS1511_WDF 0x02
  52. #define DS1511_IRQF 0x01
  53. #define DS1511_TE 0x80
  54. #define DS1511_CS 0x40
  55. #define DS1511_BME 0x20
  56. #define DS1511_TPE 0x10
  57. #define DS1511_TIE 0x08
  58. #define DS1511_KIE 0x04
  59. #define DS1511_WDE 0x02
  60. #define DS1511_WDS 0x01
  61. #define DS1511_RAM_MAX 0xff
  62. #define RTC_CMD DS1511_CONTROL_B
  63. #define RTC_CMD1 DS1511_CONTROL_A
  64. #define RTC_ALARM_SEC DS1511_AM1_SEC
  65. #define RTC_ALARM_MIN DS1511_AM2_MIN
  66. #define RTC_ALARM_HOUR DS1511_AM3_HOUR
  67. #define RTC_ALARM_DATE DS1511_AM4_DATE
  68. #define RTC_SEC DS1511_SEC
  69. #define RTC_MIN DS1511_MIN
  70. #define RTC_HOUR DS1511_HOUR
  71. #define RTC_DOW DS1511_DOW
  72. #define RTC_DOM DS1511_DOM
  73. #define RTC_MON DS1511_MONTH
  74. #define RTC_YEAR DS1511_YEAR
  75. #define RTC_CENTURY DS1511_CENTURY
  76. #define RTC_TIE DS1511_TIE
  77. #define RTC_TE DS1511_TE
  78. struct rtc_plat_data {
  79. struct rtc_device *rtc;
  80. void __iomem *ioaddr; /* virtual base address */
  81. unsigned long baseaddr; /* physical base address */
  82. int size; /* amount of memory mapped */
  83. int irq;
  84. unsigned int irqen;
  85. int alrm_sec;
  86. int alrm_min;
  87. int alrm_hour;
  88. int alrm_mday;
  89. };
  90. static DEFINE_SPINLOCK(ds1511_lock);
  91. static __iomem char *ds1511_base;
  92. static u32 reg_spacing = 1;
  93. static noinline void
  94. rtc_write(uint8_t val, uint32_t reg)
  95. {
  96. writeb(val, ds1511_base + (reg * reg_spacing));
  97. }
  98. static inline void
  99. rtc_write_alarm(uint8_t val, enum ds1511reg reg)
  100. {
  101. rtc_write((val | 0x80), reg);
  102. }
  103. static noinline uint8_t
  104. rtc_read(enum ds1511reg reg)
  105. {
  106. return readb(ds1511_base + (reg * reg_spacing));
  107. }
  108. static inline void
  109. rtc_disable_update(void)
  110. {
  111. rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
  112. }
  113. static void
  114. rtc_enable_update(void)
  115. {
  116. rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
  117. }
  118. /*
  119. * #define DS1511_WDOG_RESET_SUPPORT
  120. *
  121. * Uncomment this if you want to use these routines in
  122. * some platform code.
  123. */
  124. #ifdef DS1511_WDOG_RESET_SUPPORT
  125. /*
  126. * just enough code to set the watchdog timer so that it
  127. * will reboot the system
  128. */
  129. void
  130. ds1511_wdog_set(unsigned long deciseconds)
  131. {
  132. /*
  133. * the wdog timer can take 99.99 seconds
  134. */
  135. deciseconds %= 10000;
  136. /*
  137. * set the wdog values in the wdog registers
  138. */
  139. rtc_write(BIN2BCD(deciseconds % 100), DS1511_WD_MSEC);
  140. rtc_write(BIN2BCD(deciseconds / 100), DS1511_WD_SEC);
  141. /*
  142. * set wdog enable and wdog 'steering' bit to issue a reset
  143. */
  144. rtc_write(DS1511_WDE | DS1511_WDS, RTC_CMD);
  145. }
  146. void
  147. ds1511_wdog_disable(void)
  148. {
  149. /*
  150. * clear wdog enable and wdog 'steering' bits
  151. */
  152. rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
  153. /*
  154. * clear the wdog counter
  155. */
  156. rtc_write(0, DS1511_WD_MSEC);
  157. rtc_write(0, DS1511_WD_SEC);
  158. }
  159. #endif
  160. /*
  161. * set the rtc chip's idea of the time.
  162. * stupidly, some callers call with year unmolested;
  163. * and some call with year = year - 1900. thanks.
  164. */
  165. int
  166. ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
  167. {
  168. u8 mon, day, dow, hrs, min, sec, yrs, cen;
  169. unsigned int flags;
  170. /*
  171. * won't have to change this for a while
  172. */
  173. if (rtc_tm->tm_year < 1900) {
  174. rtc_tm->tm_year += 1900;
  175. }
  176. if (rtc_tm->tm_year < 1970) {
  177. return -EINVAL;
  178. }
  179. yrs = rtc_tm->tm_year % 100;
  180. cen = rtc_tm->tm_year / 100;
  181. mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
  182. day = rtc_tm->tm_mday;
  183. dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
  184. hrs = rtc_tm->tm_hour;
  185. min = rtc_tm->tm_min;
  186. sec = rtc_tm->tm_sec;
  187. if ((mon > 12) || (day == 0)) {
  188. return -EINVAL;
  189. }
  190. if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year)) {
  191. return -EINVAL;
  192. }
  193. if ((hrs >= 24) || (min >= 60) || (sec >= 60)) {
  194. return -EINVAL;
  195. }
  196. /*
  197. * each register is a different number of valid bits
  198. */
  199. sec = BIN2BCD(sec) & 0x7f;
  200. min = BIN2BCD(min) & 0x7f;
  201. hrs = BIN2BCD(hrs) & 0x3f;
  202. day = BIN2BCD(day) & 0x3f;
  203. mon = BIN2BCD(mon) & 0x1f;
  204. yrs = BIN2BCD(yrs) & 0xff;
  205. cen = BIN2BCD(cen) & 0xff;
  206. spin_lock_irqsave(&ds1511_lock, flags);
  207. rtc_disable_update();
  208. rtc_write(cen, RTC_CENTURY);
  209. rtc_write(yrs, RTC_YEAR);
  210. rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
  211. rtc_write(day, RTC_DOM);
  212. rtc_write(hrs, RTC_HOUR);
  213. rtc_write(min, RTC_MIN);
  214. rtc_write(sec, RTC_SEC);
  215. rtc_write(dow, RTC_DOW);
  216. rtc_enable_update();
  217. spin_unlock_irqrestore(&ds1511_lock, flags);
  218. return 0;
  219. }
  220. int
  221. ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
  222. {
  223. unsigned int century;
  224. unsigned int flags;
  225. spin_lock_irqsave(&ds1511_lock, flags);
  226. rtc_disable_update();
  227. rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
  228. rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
  229. rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
  230. rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
  231. rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
  232. rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
  233. rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
  234. century = rtc_read(RTC_CENTURY);
  235. rtc_enable_update();
  236. spin_unlock_irqrestore(&ds1511_lock, flags);
  237. rtc_tm->tm_sec = BCD2BIN(rtc_tm->tm_sec);
  238. rtc_tm->tm_min = BCD2BIN(rtc_tm->tm_min);
  239. rtc_tm->tm_hour = BCD2BIN(rtc_tm->tm_hour);
  240. rtc_tm->tm_mday = BCD2BIN(rtc_tm->tm_mday);
  241. rtc_tm->tm_wday = BCD2BIN(rtc_tm->tm_wday);
  242. rtc_tm->tm_mon = BCD2BIN(rtc_tm->tm_mon);
  243. rtc_tm->tm_year = BCD2BIN(rtc_tm->tm_year);
  244. century = BCD2BIN(century) * 100;
  245. /*
  246. * Account for differences between how the RTC uses the values
  247. * and how they are defined in a struct rtc_time;
  248. */
  249. century += rtc_tm->tm_year;
  250. rtc_tm->tm_year = century - 1900;
  251. rtc_tm->tm_mon--;
  252. if (rtc_valid_tm(rtc_tm) < 0) {
  253. dev_err(dev, "retrieved date/time is not valid.\n");
  254. rtc_time_to_tm(0, rtc_tm);
  255. }
  256. return 0;
  257. }
  258. /*
  259. * write the alarm register settings
  260. *
  261. * we only have the use to interrupt every second, otherwise
  262. * known as the update interrupt, or the interrupt if the whole
  263. * date/hours/mins/secs matches. the ds1511 has many more
  264. * permutations, but the kernel doesn't.
  265. */
  266. static void
  267. ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
  268. {
  269. unsigned long flags;
  270. spin_lock_irqsave(&pdata->rtc->irq_lock, flags);
  271. rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
  272. 0x80 : BIN2BCD(pdata->alrm_mday) & 0x3f,
  273. RTC_ALARM_DATE);
  274. rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
  275. 0x80 : BIN2BCD(pdata->alrm_hour) & 0x3f,
  276. RTC_ALARM_HOUR);
  277. rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
  278. 0x80 : BIN2BCD(pdata->alrm_min) & 0x7f,
  279. RTC_ALARM_MIN);
  280. rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
  281. 0x80 : BIN2BCD(pdata->alrm_sec) & 0x7f,
  282. RTC_ALARM_SEC);
  283. rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
  284. rtc_read(RTC_CMD1); /* clear interrupts */
  285. spin_unlock_irqrestore(&pdata->rtc->irq_lock, flags);
  286. }
  287. static int
  288. ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  289. {
  290. struct platform_device *pdev = to_platform_device(dev);
  291. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  292. if (pdata->irq < 0) {
  293. return -EINVAL;
  294. }
  295. pdata->alrm_mday = alrm->time.tm_mday;
  296. pdata->alrm_hour = alrm->time.tm_hour;
  297. pdata->alrm_min = alrm->time.tm_min;
  298. pdata->alrm_sec = alrm->time.tm_sec;
  299. if (alrm->enabled) {
  300. pdata->irqen |= RTC_AF;
  301. }
  302. ds1511_rtc_update_alarm(pdata);
  303. return 0;
  304. }
  305. static int
  306. ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  307. {
  308. struct platform_device *pdev = to_platform_device(dev);
  309. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  310. if (pdata->irq < 0) {
  311. return -EINVAL;
  312. }
  313. alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
  314. alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
  315. alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
  316. alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
  317. alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
  318. return 0;
  319. }
  320. static irqreturn_t
  321. ds1511_interrupt(int irq, void *dev_id)
  322. {
  323. struct platform_device *pdev = dev_id;
  324. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  325. unsigned long events = RTC_IRQF;
  326. /*
  327. * read and clear interrupt
  328. */
  329. if (!(rtc_read(RTC_CMD1) & DS1511_IRQF)) {
  330. return IRQ_NONE;
  331. }
  332. if (rtc_read(RTC_ALARM_SEC) & 0x80) {
  333. events |= RTC_UF;
  334. } else {
  335. events |= RTC_AF;
  336. }
  337. rtc_update_irq(pdata->rtc, 1, events);
  338. return IRQ_HANDLED;
  339. }
  340. static void
  341. ds1511_rtc_release(struct device *dev)
  342. {
  343. struct platform_device *pdev = to_platform_device(dev);
  344. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  345. if (pdata->irq >= 0) {
  346. pdata->irqen = 0;
  347. ds1511_rtc_update_alarm(pdata);
  348. }
  349. }
  350. static int
  351. ds1511_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  352. {
  353. struct platform_device *pdev = to_platform_device(dev);
  354. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  355. if (pdata->irq < 0) {
  356. return -ENOIOCTLCMD; /* fall back into rtc-dev's emulation */
  357. }
  358. switch (cmd) {
  359. case RTC_AIE_OFF:
  360. pdata->irqen &= ~RTC_AF;
  361. ds1511_rtc_update_alarm(pdata);
  362. break;
  363. case RTC_AIE_ON:
  364. pdata->irqen |= RTC_AF;
  365. ds1511_rtc_update_alarm(pdata);
  366. break;
  367. case RTC_UIE_OFF:
  368. pdata->irqen &= ~RTC_UF;
  369. ds1511_rtc_update_alarm(pdata);
  370. break;
  371. case RTC_UIE_ON:
  372. pdata->irqen |= RTC_UF;
  373. ds1511_rtc_update_alarm(pdata);
  374. break;
  375. default:
  376. return -ENOIOCTLCMD;
  377. }
  378. return 0;
  379. }
  380. static const struct rtc_class_ops ds1511_rtc_ops = {
  381. .read_time = ds1511_rtc_read_time,
  382. .set_time = ds1511_rtc_set_time,
  383. .read_alarm = ds1511_rtc_read_alarm,
  384. .set_alarm = ds1511_rtc_set_alarm,
  385. .release = ds1511_rtc_release,
  386. .ioctl = ds1511_rtc_ioctl,
  387. };
  388. static ssize_t
  389. ds1511_nvram_read(struct kobject *kobj, struct bin_attribute *ba,
  390. char *buf, loff_t pos, size_t size)
  391. {
  392. ssize_t count;
  393. /*
  394. * if count is more than one, turn on "burst" mode
  395. * turn it off when you're done
  396. */
  397. if (size > 1) {
  398. rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD);
  399. }
  400. if (pos > DS1511_RAM_MAX) {
  401. pos = DS1511_RAM_MAX;
  402. }
  403. if (size + pos > DS1511_RAM_MAX + 1) {
  404. size = DS1511_RAM_MAX - pos + 1;
  405. }
  406. rtc_write(pos, DS1511_RAMADDR_LSB);
  407. for (count = 0; size > 0; count++, size--) {
  408. *buf++ = rtc_read(DS1511_RAMDATA);
  409. }
  410. if (count > 1) {
  411. rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
  412. }
  413. return count;
  414. }
  415. static ssize_t
  416. ds1511_nvram_write(struct kobject *kobj, struct bin_attribute *bin_attr,
  417. char *buf, loff_t pos, size_t size)
  418. {
  419. ssize_t count;
  420. /*
  421. * if count is more than one, turn on "burst" mode
  422. * turn it off when you're done
  423. */
  424. if (size > 1) {
  425. rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD);
  426. }
  427. if (pos > DS1511_RAM_MAX) {
  428. pos = DS1511_RAM_MAX;
  429. }
  430. if (size + pos > DS1511_RAM_MAX + 1) {
  431. size = DS1511_RAM_MAX - pos + 1;
  432. }
  433. rtc_write(pos, DS1511_RAMADDR_LSB);
  434. for (count = 0; size > 0; count++, size--) {
  435. rtc_write(*buf++, DS1511_RAMDATA);
  436. }
  437. if (count > 1) {
  438. rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
  439. }
  440. return count;
  441. }
  442. static struct bin_attribute ds1511_nvram_attr = {
  443. .attr = {
  444. .name = "nvram",
  445. .mode = S_IRUGO | S_IWUGO,
  446. .owner = THIS_MODULE,
  447. },
  448. .size = DS1511_RAM_MAX,
  449. .read = ds1511_nvram_read,
  450. .write = ds1511_nvram_write,
  451. };
  452. static int __devinit
  453. ds1511_rtc_probe(struct platform_device *pdev)
  454. {
  455. struct rtc_device *rtc;
  456. struct resource *res;
  457. struct rtc_plat_data *pdata = NULL;
  458. int ret = 0;
  459. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  460. if (!res) {
  461. return -ENODEV;
  462. }
  463. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  464. if (!pdata) {
  465. return -ENOMEM;
  466. }
  467. pdata->irq = -1;
  468. pdata->size = res->end - res->start + 1;
  469. if (!request_mem_region(res->start, pdata->size, pdev->name)) {
  470. ret = -EBUSY;
  471. goto out;
  472. }
  473. pdata->baseaddr = res->start;
  474. pdata->size = pdata->size;
  475. ds1511_base = ioremap(pdata->baseaddr, pdata->size);
  476. if (!ds1511_base) {
  477. ret = -ENOMEM;
  478. goto out;
  479. }
  480. pdata->ioaddr = ds1511_base;
  481. pdata->irq = platform_get_irq(pdev, 0);
  482. /*
  483. * turn on the clock and the crystal, etc.
  484. */
  485. rtc_write(0, RTC_CMD);
  486. rtc_write(0, RTC_CMD1);
  487. /*
  488. * clear the wdog counter
  489. */
  490. rtc_write(0, DS1511_WD_MSEC);
  491. rtc_write(0, DS1511_WD_SEC);
  492. /*
  493. * start the clock
  494. */
  495. rtc_enable_update();
  496. /*
  497. * check for a dying bat-tree
  498. */
  499. if (rtc_read(RTC_CMD1) & DS1511_BLF1) {
  500. dev_warn(&pdev->dev, "voltage-low detected.\n");
  501. }
  502. /*
  503. * if the platform has an interrupt in mind for this device,
  504. * then by all means, set it
  505. */
  506. if (pdata->irq >= 0) {
  507. rtc_read(RTC_CMD1);
  508. if (request_irq(pdata->irq, ds1511_interrupt,
  509. IRQF_DISABLED | IRQF_SHARED, pdev->name, pdev) < 0) {
  510. dev_warn(&pdev->dev, "interrupt not available.\n");
  511. pdata->irq = -1;
  512. }
  513. }
  514. rtc = rtc_device_register(pdev->name, &pdev->dev, &ds1511_rtc_ops,
  515. THIS_MODULE);
  516. if (IS_ERR(rtc)) {
  517. ret = PTR_ERR(rtc);
  518. goto out;
  519. }
  520. pdata->rtc = rtc;
  521. platform_set_drvdata(pdev, pdata);
  522. ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
  523. if (ret) {
  524. goto out;
  525. }
  526. return 0;
  527. out:
  528. if (pdata->rtc) {
  529. rtc_device_unregister(pdata->rtc);
  530. }
  531. if (pdata->irq >= 0) {
  532. free_irq(pdata->irq, pdev);
  533. }
  534. if (ds1511_base) {
  535. iounmap(ds1511_base);
  536. ds1511_base = NULL;
  537. }
  538. if (pdata->baseaddr) {
  539. release_mem_region(pdata->baseaddr, pdata->size);
  540. }
  541. kfree(pdata);
  542. return ret;
  543. }
  544. static int __devexit
  545. ds1511_rtc_remove(struct platform_device *pdev)
  546. {
  547. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  548. sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
  549. rtc_device_unregister(pdata->rtc);
  550. pdata->rtc = NULL;
  551. if (pdata->irq >= 0) {
  552. /*
  553. * disable the alarm interrupt
  554. */
  555. rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD);
  556. rtc_read(RTC_CMD1);
  557. free_irq(pdata->irq, pdev);
  558. }
  559. iounmap(pdata->ioaddr);
  560. ds1511_base = NULL;
  561. release_mem_region(pdata->baseaddr, pdata->size);
  562. kfree(pdata);
  563. return 0;
  564. }
  565. /* work with hotplug and coldplug */
  566. MODULE_ALIAS("platform:ds1511");
  567. static struct platform_driver ds1511_rtc_driver = {
  568. .probe = ds1511_rtc_probe,
  569. .remove = __devexit_p(ds1511_rtc_remove),
  570. .driver = {
  571. .name = "ds1511",
  572. .owner = THIS_MODULE,
  573. },
  574. };
  575. static int __init
  576. ds1511_rtc_init(void)
  577. {
  578. return platform_driver_register(&ds1511_rtc_driver);
  579. }
  580. static void __exit
  581. ds1511_rtc_exit(void)
  582. {
  583. return platform_driver_unregister(&ds1511_rtc_driver);
  584. }
  585. module_init(ds1511_rtc_init);
  586. module_exit(ds1511_rtc_exit);
  587. MODULE_AUTHOR("Andrew Sharp <andy.sharp@onstor.com>");
  588. MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
  589. MODULE_LICENSE("GPL");
  590. MODULE_VERSION(DRV_VERSION);