board-3430sdp.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738
  1. /*
  2. * linux/arch/arm/mach-omap2/board-3430sdp.c
  3. *
  4. * Copyright (C) 2007 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-generic.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/input.h>
  19. #include <linux/input/matrix_keypad.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/i2c/twl.h>
  22. #include <linux/regulator/machine.h>
  23. #include <linux/io.h>
  24. #include <linux/gpio.h>
  25. #include <linux/mmc/host.h>
  26. #include <mach/hardware.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/map.h>
  30. #include <plat/mcspi.h>
  31. #include <plat/board.h>
  32. #include <plat/usb.h>
  33. #include <plat/common.h>
  34. #include <plat/dma.h>
  35. #include <plat/gpmc.h>
  36. #include <video/omapdss.h>
  37. #include <video/omap-panel-dvi.h>
  38. #include <plat/gpmc-smc91x.h>
  39. #include "board-flash.h"
  40. #include "mux.h"
  41. #include "sdram-qimonda-hyb18m512160af-6.h"
  42. #include "hsmmc.h"
  43. #include "pm.h"
  44. #include "control.h"
  45. #include "common-board-devices.h"
  46. #define CONFIG_DISABLE_HFCLK 1
  47. #define SDP3430_TS_GPIO_IRQ_SDPV1 3
  48. #define SDP3430_TS_GPIO_IRQ_SDPV2 2
  49. #define ENABLE_VAUX3_DEDICATED 0x03
  50. #define ENABLE_VAUX3_DEV_GRP 0x20
  51. #define TWL4030_MSECURE_GPIO 22
  52. static uint32_t board_keymap[] = {
  53. KEY(0, 0, KEY_LEFT),
  54. KEY(0, 1, KEY_RIGHT),
  55. KEY(0, 2, KEY_A),
  56. KEY(0, 3, KEY_B),
  57. KEY(0, 4, KEY_C),
  58. KEY(1, 0, KEY_DOWN),
  59. KEY(1, 1, KEY_UP),
  60. KEY(1, 2, KEY_E),
  61. KEY(1, 3, KEY_F),
  62. KEY(1, 4, KEY_G),
  63. KEY(2, 0, KEY_ENTER),
  64. KEY(2, 1, KEY_I),
  65. KEY(2, 2, KEY_J),
  66. KEY(2, 3, KEY_K),
  67. KEY(2, 4, KEY_3),
  68. KEY(3, 0, KEY_M),
  69. KEY(3, 1, KEY_N),
  70. KEY(3, 2, KEY_O),
  71. KEY(3, 3, KEY_P),
  72. KEY(3, 4, KEY_Q),
  73. KEY(4, 0, KEY_R),
  74. KEY(4, 1, KEY_4),
  75. KEY(4, 2, KEY_T),
  76. KEY(4, 3, KEY_U),
  77. KEY(4, 4, KEY_D),
  78. KEY(5, 0, KEY_V),
  79. KEY(5, 1, KEY_W),
  80. KEY(5, 2, KEY_L),
  81. KEY(5, 3, KEY_S),
  82. KEY(5, 4, KEY_H),
  83. 0
  84. };
  85. static struct matrix_keymap_data board_map_data = {
  86. .keymap = board_keymap,
  87. .keymap_size = ARRAY_SIZE(board_keymap),
  88. };
  89. static struct twl4030_keypad_data sdp3430_kp_data = {
  90. .keymap_data = &board_map_data,
  91. .rows = 5,
  92. .cols = 6,
  93. .rep = 1,
  94. };
  95. #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
  96. #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
  97. static struct gpio sdp3430_dss_gpios[] __initdata = {
  98. {SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" },
  99. {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
  100. };
  101. static int lcd_enabled;
  102. static int dvi_enabled;
  103. static void __init sdp3430_display_init(void)
  104. {
  105. int r;
  106. r = gpio_request_array(sdp3430_dss_gpios,
  107. ARRAY_SIZE(sdp3430_dss_gpios));
  108. if (r)
  109. printk(KERN_ERR "failed to get LCD control GPIOs\n");
  110. }
  111. static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
  112. {
  113. if (dvi_enabled) {
  114. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  115. return -EINVAL;
  116. }
  117. gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
  118. gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
  119. lcd_enabled = 1;
  120. return 0;
  121. }
  122. static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
  123. {
  124. lcd_enabled = 0;
  125. gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
  126. gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
  127. }
  128. static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
  129. {
  130. if (lcd_enabled) {
  131. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  132. return -EINVAL;
  133. }
  134. dvi_enabled = 1;
  135. return 0;
  136. }
  137. static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
  138. {
  139. dvi_enabled = 0;
  140. }
  141. static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
  142. {
  143. return 0;
  144. }
  145. static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
  146. {
  147. }
  148. static struct omap_dss_device sdp3430_lcd_device = {
  149. .name = "lcd",
  150. .driver_name = "sharp_ls_panel",
  151. .type = OMAP_DISPLAY_TYPE_DPI,
  152. .phy.dpi.data_lines = 16,
  153. .platform_enable = sdp3430_panel_enable_lcd,
  154. .platform_disable = sdp3430_panel_disable_lcd,
  155. };
  156. static struct panel_dvi_platform_data dvi_panel = {
  157. .platform_enable = sdp3430_panel_enable_dvi,
  158. .platform_disable = sdp3430_panel_disable_dvi,
  159. };
  160. static struct omap_dss_device sdp3430_dvi_device = {
  161. .name = "dvi",
  162. .type = OMAP_DISPLAY_TYPE_DPI,
  163. .driver_name = "dvi",
  164. .data = &dvi_panel,
  165. .phy.dpi.data_lines = 24,
  166. };
  167. static struct omap_dss_device sdp3430_tv_device = {
  168. .name = "tv",
  169. .driver_name = "venc",
  170. .type = OMAP_DISPLAY_TYPE_VENC,
  171. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  172. .platform_enable = sdp3430_panel_enable_tv,
  173. .platform_disable = sdp3430_panel_disable_tv,
  174. };
  175. static struct omap_dss_device *sdp3430_dss_devices[] = {
  176. &sdp3430_lcd_device,
  177. &sdp3430_dvi_device,
  178. &sdp3430_tv_device,
  179. };
  180. static struct omap_dss_board_info sdp3430_dss_data = {
  181. .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
  182. .devices = sdp3430_dss_devices,
  183. .default_device = &sdp3430_lcd_device,
  184. };
  185. static struct omap_board_config_kernel sdp3430_config[] __initdata = {
  186. };
  187. static void __init omap_3430sdp_init_early(void)
  188. {
  189. omap2_init_common_infrastructure();
  190. omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
  191. }
  192. static struct omap2_hsmmc_info mmc[] = {
  193. {
  194. .mmc = 1,
  195. /* 8 bits (default) requires S6.3 == ON,
  196. * so the SIM card isn't used; else 4 bits.
  197. */
  198. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  199. .gpio_wp = 4,
  200. },
  201. {
  202. .mmc = 2,
  203. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  204. .gpio_wp = 7,
  205. },
  206. {} /* Terminator */
  207. };
  208. static int sdp3430_twl_gpio_setup(struct device *dev,
  209. unsigned gpio, unsigned ngpio)
  210. {
  211. /* gpio + 0 is "mmc0_cd" (input/IRQ),
  212. * gpio + 1 is "mmc1_cd" (input/IRQ)
  213. */
  214. mmc[0].gpio_cd = gpio + 0;
  215. mmc[1].gpio_cd = gpio + 1;
  216. omap2_hsmmc_init(mmc);
  217. /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
  218. gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
  219. /* gpio + 15 is "sub_lcd_nRST" (output) */
  220. gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
  221. return 0;
  222. }
  223. static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
  224. .gpio_base = OMAP_MAX_GPIO_LINES,
  225. .irq_base = TWL4030_GPIO_IRQ_BASE,
  226. .irq_end = TWL4030_GPIO_IRQ_END,
  227. .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
  228. | BIT(16) | BIT(17),
  229. .setup = sdp3430_twl_gpio_setup,
  230. };
  231. /* regulator consumer mappings */
  232. /* ads7846 on SPI */
  233. static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
  234. REGULATOR_SUPPLY("vcc", "spi1.0"),
  235. };
  236. static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
  237. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  238. };
  239. static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
  240. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  241. };
  242. static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
  243. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
  244. };
  245. /*
  246. * Apply all the fixed voltages since most versions of U-Boot
  247. * don't bother with that initialization.
  248. */
  249. /* VAUX1 for mainboard (irda and sub-lcd) */
  250. static struct regulator_init_data sdp3430_vaux1 = {
  251. .constraints = {
  252. .min_uV = 2800000,
  253. .max_uV = 2800000,
  254. .apply_uV = true,
  255. .valid_modes_mask = REGULATOR_MODE_NORMAL
  256. | REGULATOR_MODE_STANDBY,
  257. .valid_ops_mask = REGULATOR_CHANGE_MODE
  258. | REGULATOR_CHANGE_STATUS,
  259. },
  260. };
  261. /* VAUX2 for camera module */
  262. static struct regulator_init_data sdp3430_vaux2 = {
  263. .constraints = {
  264. .min_uV = 2800000,
  265. .max_uV = 2800000,
  266. .apply_uV = true,
  267. .valid_modes_mask = REGULATOR_MODE_NORMAL
  268. | REGULATOR_MODE_STANDBY,
  269. .valid_ops_mask = REGULATOR_CHANGE_MODE
  270. | REGULATOR_CHANGE_STATUS,
  271. },
  272. };
  273. /* VAUX3 for LCD board */
  274. static struct regulator_init_data sdp3430_vaux3 = {
  275. .constraints = {
  276. .min_uV = 2800000,
  277. .max_uV = 2800000,
  278. .apply_uV = true,
  279. .valid_modes_mask = REGULATOR_MODE_NORMAL
  280. | REGULATOR_MODE_STANDBY,
  281. .valid_ops_mask = REGULATOR_CHANGE_MODE
  282. | REGULATOR_CHANGE_STATUS,
  283. },
  284. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
  285. .consumer_supplies = sdp3430_vaux3_supplies,
  286. };
  287. /* VAUX4 for OMAP VDD_CSI2 (camera) */
  288. static struct regulator_init_data sdp3430_vaux4 = {
  289. .constraints = {
  290. .min_uV = 1800000,
  291. .max_uV = 1800000,
  292. .apply_uV = true,
  293. .valid_modes_mask = REGULATOR_MODE_NORMAL
  294. | REGULATOR_MODE_STANDBY,
  295. .valid_ops_mask = REGULATOR_CHANGE_MODE
  296. | REGULATOR_CHANGE_STATUS,
  297. },
  298. };
  299. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  300. static struct regulator_init_data sdp3430_vmmc1 = {
  301. .constraints = {
  302. .min_uV = 1850000,
  303. .max_uV = 3150000,
  304. .valid_modes_mask = REGULATOR_MODE_NORMAL
  305. | REGULATOR_MODE_STANDBY,
  306. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  307. | REGULATOR_CHANGE_MODE
  308. | REGULATOR_CHANGE_STATUS,
  309. },
  310. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
  311. .consumer_supplies = sdp3430_vmmc1_supplies,
  312. };
  313. /* VMMC2 for MMC2 card */
  314. static struct regulator_init_data sdp3430_vmmc2 = {
  315. .constraints = {
  316. .min_uV = 1850000,
  317. .max_uV = 1850000,
  318. .apply_uV = true,
  319. .valid_modes_mask = REGULATOR_MODE_NORMAL
  320. | REGULATOR_MODE_STANDBY,
  321. .valid_ops_mask = REGULATOR_CHANGE_MODE
  322. | REGULATOR_CHANGE_STATUS,
  323. },
  324. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
  325. .consumer_supplies = sdp3430_vmmc2_supplies,
  326. };
  327. /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
  328. static struct regulator_init_data sdp3430_vsim = {
  329. .constraints = {
  330. .min_uV = 1800000,
  331. .max_uV = 3000000,
  332. .valid_modes_mask = REGULATOR_MODE_NORMAL
  333. | REGULATOR_MODE_STANDBY,
  334. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  335. | REGULATOR_CHANGE_MODE
  336. | REGULATOR_CHANGE_STATUS,
  337. },
  338. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
  339. .consumer_supplies = sdp3430_vsim_supplies,
  340. };
  341. static struct twl4030_platform_data sdp3430_twldata = {
  342. /* platform_data for children goes here */
  343. .gpio = &sdp3430_gpio_data,
  344. .keypad = &sdp3430_kp_data,
  345. .vaux1 = &sdp3430_vaux1,
  346. .vaux2 = &sdp3430_vaux2,
  347. .vaux3 = &sdp3430_vaux3,
  348. .vaux4 = &sdp3430_vaux4,
  349. .vmmc1 = &sdp3430_vmmc1,
  350. .vmmc2 = &sdp3430_vmmc2,
  351. .vsim = &sdp3430_vsim,
  352. };
  353. static int __init omap3430_i2c_init(void)
  354. {
  355. /* i2c1 for PMIC only */
  356. omap3_pmic_get_config(&sdp3430_twldata,
  357. TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
  358. TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
  359. TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
  360. sdp3430_twldata.vdac->constraints.apply_uV = true;
  361. sdp3430_twldata.vpll2->constraints.apply_uV = true;
  362. sdp3430_twldata.vpll2->constraints.name = "VDVI";
  363. omap3_pmic_init("twl4030", &sdp3430_twldata);
  364. /* i2c2 on camera connector (for sensor control) and optional isp1301 */
  365. omap_register_i2c_bus(2, 400, NULL, 0);
  366. /* i2c3 on display connector (for DVI, tfp410) */
  367. omap_register_i2c_bus(3, 400, NULL, 0);
  368. return 0;
  369. }
  370. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  371. static struct omap_smc91x_platform_data board_smc91x_data = {
  372. .cs = 3,
  373. .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
  374. IORESOURCE_IRQ_LOWLEVEL,
  375. };
  376. static void __init board_smc91x_init(void)
  377. {
  378. if (omap_rev() > OMAP3430_REV_ES1_0)
  379. board_smc91x_data.gpio_irq = 6;
  380. else
  381. board_smc91x_data.gpio_irq = 29;
  382. gpmc_smc91x_init(&board_smc91x_data);
  383. }
  384. #else
  385. static inline void board_smc91x_init(void)
  386. {
  387. }
  388. #endif
  389. static void enable_board_wakeup_source(void)
  390. {
  391. /* T2 interrupt line (keypad) */
  392. omap_mux_init_signal("sys_nirq",
  393. OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  394. }
  395. static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
  396. .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
  397. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  398. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
  399. .phy_reset = true,
  400. .reset_gpio_port[0] = 57,
  401. .reset_gpio_port[1] = 61,
  402. .reset_gpio_port[2] = -EINVAL
  403. };
  404. #ifdef CONFIG_OMAP_MUX
  405. static struct omap_board_mux board_mux[] __initdata = {
  406. { .reg_offset = OMAP_MUX_TERMINATOR },
  407. };
  408. static struct omap_device_pad serial1_pads[] __initdata = {
  409. /*
  410. * Note that off output enable is an active low
  411. * signal. So setting this means pin is a
  412. * input enabled in off mode
  413. */
  414. OMAP_MUX_STATIC("uart1_cts.uart1_cts",
  415. OMAP_PIN_INPUT |
  416. OMAP_PIN_OFF_INPUT_PULLDOWN |
  417. OMAP_OFFOUT_EN |
  418. OMAP_MUX_MODE0),
  419. OMAP_MUX_STATIC("uart1_rts.uart1_rts",
  420. OMAP_PIN_OUTPUT |
  421. OMAP_OFF_EN |
  422. OMAP_MUX_MODE0),
  423. OMAP_MUX_STATIC("uart1_rx.uart1_rx",
  424. OMAP_PIN_INPUT |
  425. OMAP_PIN_OFF_INPUT_PULLDOWN |
  426. OMAP_OFFOUT_EN |
  427. OMAP_MUX_MODE0),
  428. OMAP_MUX_STATIC("uart1_tx.uart1_tx",
  429. OMAP_PIN_OUTPUT |
  430. OMAP_OFF_EN |
  431. OMAP_MUX_MODE0),
  432. };
  433. static struct omap_device_pad serial2_pads[] __initdata = {
  434. OMAP_MUX_STATIC("uart2_cts.uart2_cts",
  435. OMAP_PIN_INPUT_PULLUP |
  436. OMAP_PIN_OFF_INPUT_PULLDOWN |
  437. OMAP_OFFOUT_EN |
  438. OMAP_MUX_MODE0),
  439. OMAP_MUX_STATIC("uart2_rts.uart2_rts",
  440. OMAP_PIN_OUTPUT |
  441. OMAP_OFF_EN |
  442. OMAP_MUX_MODE0),
  443. OMAP_MUX_STATIC("uart2_rx.uart2_rx",
  444. OMAP_PIN_INPUT |
  445. OMAP_PIN_OFF_INPUT_PULLDOWN |
  446. OMAP_OFFOUT_EN |
  447. OMAP_MUX_MODE0),
  448. OMAP_MUX_STATIC("uart2_tx.uart2_tx",
  449. OMAP_PIN_OUTPUT |
  450. OMAP_OFF_EN |
  451. OMAP_MUX_MODE0),
  452. };
  453. static struct omap_device_pad serial3_pads[] __initdata = {
  454. OMAP_MUX_STATIC("uart3_cts_rctx.uart3_cts_rctx",
  455. OMAP_PIN_INPUT_PULLDOWN |
  456. OMAP_PIN_OFF_INPUT_PULLDOWN |
  457. OMAP_OFFOUT_EN |
  458. OMAP_MUX_MODE0),
  459. OMAP_MUX_STATIC("uart3_rts_sd.uart3_rts_sd",
  460. OMAP_PIN_OUTPUT |
  461. OMAP_OFF_EN |
  462. OMAP_MUX_MODE0),
  463. OMAP_MUX_STATIC("uart3_rx_irrx.uart3_rx_irrx",
  464. OMAP_PIN_INPUT |
  465. OMAP_PIN_OFF_INPUT_PULLDOWN |
  466. OMAP_OFFOUT_EN |
  467. OMAP_MUX_MODE0),
  468. OMAP_MUX_STATIC("uart3_tx_irtx.uart3_tx_irtx",
  469. OMAP_PIN_OUTPUT |
  470. OMAP_OFF_EN |
  471. OMAP_MUX_MODE0),
  472. };
  473. static struct omap_board_data serial1_data __initdata = {
  474. .id = 0,
  475. .pads = serial1_pads,
  476. .pads_cnt = ARRAY_SIZE(serial1_pads),
  477. };
  478. static struct omap_board_data serial2_data __initdata = {
  479. .id = 1,
  480. .pads = serial2_pads,
  481. .pads_cnt = ARRAY_SIZE(serial2_pads),
  482. };
  483. static struct omap_board_data serial3_data __initdata = {
  484. .id = 2,
  485. .pads = serial3_pads,
  486. .pads_cnt = ARRAY_SIZE(serial3_pads),
  487. };
  488. static inline void board_serial_init(void)
  489. {
  490. omap_serial_init_port(&serial1_data);
  491. omap_serial_init_port(&serial2_data);
  492. omap_serial_init_port(&serial3_data);
  493. }
  494. #else
  495. #define board_mux NULL
  496. static inline void board_serial_init(void)
  497. {
  498. omap_serial_init();
  499. }
  500. #endif
  501. /*
  502. * SDP3430 V2 Board CS organization
  503. * Different from SDP3430 V1. Now 4 switches used to specify CS
  504. *
  505. * See also the Switch S8 settings in the comments.
  506. */
  507. static char chip_sel_3430[][GPMC_CS_NUM] = {
  508. {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
  509. {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
  510. {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
  511. };
  512. static struct mtd_partition sdp_nor_partitions[] = {
  513. /* bootloader (U-Boot, etc) in first sector */
  514. {
  515. .name = "Bootloader-NOR",
  516. .offset = 0,
  517. .size = SZ_256K,
  518. .mask_flags = MTD_WRITEABLE, /* force read-only */
  519. },
  520. /* bootloader params in the next sector */
  521. {
  522. .name = "Params-NOR",
  523. .offset = MTDPART_OFS_APPEND,
  524. .size = SZ_256K,
  525. .mask_flags = 0,
  526. },
  527. /* kernel */
  528. {
  529. .name = "Kernel-NOR",
  530. .offset = MTDPART_OFS_APPEND,
  531. .size = SZ_2M,
  532. .mask_flags = 0
  533. },
  534. /* file system */
  535. {
  536. .name = "Filesystem-NOR",
  537. .offset = MTDPART_OFS_APPEND,
  538. .size = MTDPART_SIZ_FULL,
  539. .mask_flags = 0
  540. }
  541. };
  542. static struct mtd_partition sdp_onenand_partitions[] = {
  543. {
  544. .name = "X-Loader-OneNAND",
  545. .offset = 0,
  546. .size = 4 * (64 * 2048),
  547. .mask_flags = MTD_WRITEABLE /* force read-only */
  548. },
  549. {
  550. .name = "U-Boot-OneNAND",
  551. .offset = MTDPART_OFS_APPEND,
  552. .size = 2 * (64 * 2048),
  553. .mask_flags = MTD_WRITEABLE /* force read-only */
  554. },
  555. {
  556. .name = "U-Boot Environment-OneNAND",
  557. .offset = MTDPART_OFS_APPEND,
  558. .size = 1 * (64 * 2048),
  559. },
  560. {
  561. .name = "Kernel-OneNAND",
  562. .offset = MTDPART_OFS_APPEND,
  563. .size = 16 * (64 * 2048),
  564. },
  565. {
  566. .name = "File System-OneNAND",
  567. .offset = MTDPART_OFS_APPEND,
  568. .size = MTDPART_SIZ_FULL,
  569. },
  570. };
  571. static struct mtd_partition sdp_nand_partitions[] = {
  572. /* All the partition sizes are listed in terms of NAND block size */
  573. {
  574. .name = "X-Loader-NAND",
  575. .offset = 0,
  576. .size = 4 * (64 * 2048),
  577. .mask_flags = MTD_WRITEABLE, /* force read-only */
  578. },
  579. {
  580. .name = "U-Boot-NAND",
  581. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  582. .size = 10 * (64 * 2048),
  583. .mask_flags = MTD_WRITEABLE, /* force read-only */
  584. },
  585. {
  586. .name = "Boot Env-NAND",
  587. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  588. .size = 6 * (64 * 2048),
  589. },
  590. {
  591. .name = "Kernel-NAND",
  592. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  593. .size = 40 * (64 * 2048),
  594. },
  595. {
  596. .name = "File System - NAND",
  597. .size = MTDPART_SIZ_FULL,
  598. .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
  599. },
  600. };
  601. static struct flash_partitions sdp_flash_partitions[] = {
  602. {
  603. .parts = sdp_nor_partitions,
  604. .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
  605. },
  606. {
  607. .parts = sdp_onenand_partitions,
  608. .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
  609. },
  610. {
  611. .parts = sdp_nand_partitions,
  612. .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
  613. },
  614. };
  615. static void __init omap_3430sdp_init(void)
  616. {
  617. int gpio_pendown;
  618. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  619. omap_board_config = sdp3430_config;
  620. omap_board_config_size = ARRAY_SIZE(sdp3430_config);
  621. omap3430_i2c_init();
  622. omap_display_init(&sdp3430_dss_data);
  623. if (omap_rev() > OMAP3430_REV_ES1_0)
  624. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
  625. else
  626. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
  627. omap_ads7846_init(1, gpio_pendown, 310, NULL);
  628. board_serial_init();
  629. usb_musb_init(NULL);
  630. board_smc91x_init();
  631. board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
  632. sdp3430_display_init();
  633. enable_board_wakeup_source();
  634. usbhs_init(&usbhs_bdata);
  635. }
  636. MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
  637. /* Maintainer: Syed Khasim - Texas Instruments Inc */
  638. .atag_offset = 0x100,
  639. .reserve = omap_reserve,
  640. .map_io = omap3_map_io,
  641. .init_early = omap_3430sdp_init_early,
  642. .init_irq = omap3_init_irq,
  643. .init_machine = omap_3430sdp_init,
  644. .timer = &omap3_timer,
  645. MACHINE_END