mpc5200_psc_i2s.c 25 KB

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  1. /*
  2. * Freescale MPC5200 PSC in I2S mode
  3. * ALSA SoC Digital Audio Interface (DAI) driver
  4. *
  5. * Copyright (C) 2008 Secret Lab Technologies Ltd.
  6. */
  7. #include <linux/init.h>
  8. #include <linux/module.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/device.h>
  11. #include <linux/delay.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_platform.h>
  14. #include <linux/dma-mapping.h>
  15. #include <sound/core.h>
  16. #include <sound/pcm.h>
  17. #include <sound/pcm_params.h>
  18. #include <sound/initval.h>
  19. #include <sound/soc.h>
  20. #include <sound/soc-of-simple.h>
  21. #include <sysdev/bestcomm/bestcomm.h>
  22. #include <sysdev/bestcomm/gen_bd.h>
  23. #include <asm/mpc52xx_psc.h>
  24. MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
  25. MODULE_DESCRIPTION("Freescale MPC5200 PSC in I2S mode ASoC Driver");
  26. MODULE_LICENSE("GPL");
  27. /**
  28. * PSC_I2S_RATES: sample rates supported by the I2S
  29. *
  30. * This driver currently only supports the PSC running in I2S slave mode,
  31. * which means the codec determines the sample rate. Therefore, we tell
  32. * ALSA that we support all rates and let the codec driver decide what rates
  33. * are really supported.
  34. */
  35. #define PSC_I2S_RATES (SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_192000 | \
  36. SNDRV_PCM_RATE_CONTINUOUS)
  37. /**
  38. * PSC_I2S_FORMATS: audio formats supported by the PSC I2S mode
  39. */
  40. #define PSC_I2S_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | \
  41. SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S24_BE | \
  42. SNDRV_PCM_FMTBIT_S32_BE)
  43. /**
  44. * psc_i2s_stream - Data specific to a single stream (playback or capture)
  45. * @active: flag indicating if the stream is active
  46. * @psc_i2s: pointer back to parent psc_i2s data structure
  47. * @bcom_task: bestcomm task structure
  48. * @irq: irq number for bestcomm task
  49. * @period_start: physical address of start of DMA region
  50. * @period_end: physical address of end of DMA region
  51. * @period_next_pt: physical address of next DMA buffer to enqueue
  52. * @period_bytes: size of DMA period in bytes
  53. */
  54. struct psc_i2s_stream {
  55. int active;
  56. struct psc_i2s *psc_i2s;
  57. struct bcom_task *bcom_task;
  58. int irq;
  59. struct snd_pcm_substream *stream;
  60. dma_addr_t period_start;
  61. dma_addr_t period_end;
  62. dma_addr_t period_next_pt;
  63. dma_addr_t period_current_pt;
  64. int period_bytes;
  65. };
  66. /**
  67. * psc_i2s - Private driver data
  68. * @name: short name for this device ("PSC0", "PSC1", etc)
  69. * @psc_regs: pointer to the PSC's registers
  70. * @fifo_regs: pointer to the PSC's FIFO registers
  71. * @irq: IRQ of this PSC
  72. * @dev: struct device pointer
  73. * @dai: the CPU DAI for this device
  74. * @sicr: Base value used in serial interface control register; mode is ORed
  75. * with this value.
  76. * @playback: Playback stream context data
  77. * @capture: Capture stream context data
  78. */
  79. struct psc_i2s {
  80. char name[32];
  81. struct mpc52xx_psc __iomem *psc_regs;
  82. struct mpc52xx_psc_fifo __iomem *fifo_regs;
  83. unsigned int irq;
  84. struct device *dev;
  85. struct snd_soc_dai dai;
  86. spinlock_t lock;
  87. u32 sicr;
  88. /* per-stream data */
  89. struct psc_i2s_stream playback;
  90. struct psc_i2s_stream capture;
  91. /* Statistics */
  92. struct {
  93. int overrun_count;
  94. int underrun_count;
  95. } stats;
  96. };
  97. /*
  98. * Interrupt handlers
  99. */
  100. static irqreturn_t psc_i2s_status_irq(int irq, void *_psc_i2s)
  101. {
  102. struct psc_i2s *psc_i2s = _psc_i2s;
  103. struct mpc52xx_psc __iomem *regs = psc_i2s->psc_regs;
  104. u16 isr;
  105. isr = in_be16(&regs->mpc52xx_psc_isr);
  106. /* Playback underrun error */
  107. if (psc_i2s->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP))
  108. psc_i2s->stats.underrun_count++;
  109. /* Capture overrun error */
  110. if (psc_i2s->capture.active && (isr & MPC52xx_PSC_IMR_ORERR))
  111. psc_i2s->stats.overrun_count++;
  112. out_8(&regs->command, 4 << 4); /* reset the error status */
  113. return IRQ_HANDLED;
  114. }
  115. /**
  116. * psc_i2s_bcom_enqueue_next_buffer - Enqueue another audio buffer
  117. * @s: pointer to stream private data structure
  118. *
  119. * Enqueues another audio period buffer into the bestcomm queue.
  120. *
  121. * Note: The routine must only be called when there is space available in
  122. * the queue. Otherwise the enqueue will fail and the audio ring buffer
  123. * will get out of sync
  124. */
  125. static void psc_i2s_bcom_enqueue_next_buffer(struct psc_i2s_stream *s)
  126. {
  127. struct bcom_bd *bd;
  128. /* Prepare and enqueue the next buffer descriptor */
  129. bd = bcom_prepare_next_buffer(s->bcom_task);
  130. bd->status = s->period_bytes;
  131. bd->data[0] = s->period_next_pt;
  132. bcom_submit_next_buffer(s->bcom_task, NULL);
  133. /* Update for next period */
  134. s->period_next_pt += s->period_bytes;
  135. if (s->period_next_pt >= s->period_end)
  136. s->period_next_pt = s->period_start;
  137. }
  138. /* Bestcomm DMA irq handler */
  139. static irqreturn_t psc_i2s_bcom_irq(int irq, void *_psc_i2s_stream)
  140. {
  141. struct psc_i2s_stream *s = _psc_i2s_stream;
  142. /* For each finished period, dequeue the completed period buffer
  143. * and enqueue a new one in it's place. */
  144. while (bcom_buffer_done(s->bcom_task)) {
  145. bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
  146. s->period_current_pt += s->period_bytes;
  147. if (s->period_current_pt >= s->period_end)
  148. s->period_current_pt = s->period_start;
  149. psc_i2s_bcom_enqueue_next_buffer(s);
  150. bcom_enable(s->bcom_task);
  151. }
  152. /* If the stream is active, then also inform the PCM middle layer
  153. * of the period finished event. */
  154. if (s->active)
  155. snd_pcm_period_elapsed(s->stream);
  156. return IRQ_HANDLED;
  157. }
  158. /**
  159. * psc_i2s_startup: create a new substream
  160. *
  161. * This is the first function called when a stream is opened.
  162. *
  163. * If this is the first stream open, then grab the IRQ and program most of
  164. * the PSC registers.
  165. */
  166. static int psc_i2s_startup(struct snd_pcm_substream *substream)
  167. {
  168. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  169. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  170. int rc;
  171. dev_dbg(psc_i2s->dev, "psc_i2s_startup(substream=%p)\n", substream);
  172. if (!psc_i2s->playback.active &&
  173. !psc_i2s->capture.active) {
  174. /* Setup the IRQs */
  175. rc = request_irq(psc_i2s->irq, &psc_i2s_status_irq, IRQF_SHARED,
  176. "psc-i2s-status", psc_i2s);
  177. rc |= request_irq(psc_i2s->capture.irq,
  178. &psc_i2s_bcom_irq, IRQF_SHARED,
  179. "psc-i2s-capture", &psc_i2s->capture);
  180. rc |= request_irq(psc_i2s->playback.irq,
  181. &psc_i2s_bcom_irq, IRQF_SHARED,
  182. "psc-i2s-playback", &psc_i2s->playback);
  183. if (rc) {
  184. free_irq(psc_i2s->irq, psc_i2s);
  185. free_irq(psc_i2s->capture.irq,
  186. &psc_i2s->capture);
  187. free_irq(psc_i2s->playback.irq,
  188. &psc_i2s->playback);
  189. return -ENODEV;
  190. }
  191. }
  192. return 0;
  193. }
  194. static int psc_i2s_hw_params(struct snd_pcm_substream *substream,
  195. struct snd_pcm_hw_params *params)
  196. {
  197. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  198. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  199. u32 mode;
  200. dev_dbg(psc_i2s->dev, "%s(substream=%p) p_size=%i p_bytes=%i"
  201. " periods=%i buffer_size=%i buffer_bytes=%i\n",
  202. __func__, substream, params_period_size(params),
  203. params_period_bytes(params), params_periods(params),
  204. params_buffer_size(params), params_buffer_bytes(params));
  205. switch (params_format(params)) {
  206. case SNDRV_PCM_FORMAT_S8:
  207. mode = MPC52xx_PSC_SICR_SIM_CODEC_8;
  208. break;
  209. case SNDRV_PCM_FORMAT_S16_BE:
  210. mode = MPC52xx_PSC_SICR_SIM_CODEC_16;
  211. break;
  212. case SNDRV_PCM_FORMAT_S24_BE:
  213. mode = MPC52xx_PSC_SICR_SIM_CODEC_24;
  214. break;
  215. case SNDRV_PCM_FORMAT_S32_BE:
  216. mode = MPC52xx_PSC_SICR_SIM_CODEC_32;
  217. break;
  218. default:
  219. dev_dbg(psc_i2s->dev, "invalid format\n");
  220. return -EINVAL;
  221. }
  222. out_be32(&psc_i2s->psc_regs->sicr, psc_i2s->sicr | mode);
  223. snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
  224. return 0;
  225. }
  226. static int psc_i2s_hw_free(struct snd_pcm_substream *substream)
  227. {
  228. snd_pcm_set_runtime_buffer(substream, NULL);
  229. return 0;
  230. }
  231. /**
  232. * psc_i2s_trigger: start and stop the DMA transfer.
  233. *
  234. * This function is called by ALSA to start, stop, pause, and resume the DMA
  235. * transfer of data.
  236. */
  237. static int psc_i2s_trigger(struct snd_pcm_substream *substream, int cmd)
  238. {
  239. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  240. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  241. struct snd_pcm_runtime *runtime = substream->runtime;
  242. struct psc_i2s_stream *s;
  243. struct mpc52xx_psc __iomem *regs = psc_i2s->psc_regs;
  244. u16 imr;
  245. u8 psc_cmd;
  246. unsigned long flags;
  247. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  248. s = &psc_i2s->capture;
  249. else
  250. s = &psc_i2s->playback;
  251. dev_dbg(psc_i2s->dev, "psc_i2s_trigger(substream=%p, cmd=%i)"
  252. " stream_id=%i\n",
  253. substream, cmd, substream->pstr->stream);
  254. switch (cmd) {
  255. case SNDRV_PCM_TRIGGER_START:
  256. s->period_bytes = frames_to_bytes(runtime,
  257. runtime->period_size);
  258. s->period_start = virt_to_phys(runtime->dma_area);
  259. s->period_end = s->period_start +
  260. (s->period_bytes * runtime->periods);
  261. s->period_next_pt = s->period_start;
  262. s->period_current_pt = s->period_start;
  263. s->active = 1;
  264. /* First; reset everything */
  265. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) {
  266. out_8(&regs->command, MPC52xx_PSC_RST_RX);
  267. out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
  268. } else {
  269. out_8(&regs->command, MPC52xx_PSC_RST_TX);
  270. out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
  271. }
  272. /* Next, fill up the bestcomm bd queue and enable DMA.
  273. * This will begin filling the PSC's fifo. */
  274. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  275. bcom_gen_bd_rx_reset(s->bcom_task);
  276. else
  277. bcom_gen_bd_tx_reset(s->bcom_task);
  278. while (!bcom_queue_full(s->bcom_task))
  279. psc_i2s_bcom_enqueue_next_buffer(s);
  280. bcom_enable(s->bcom_task);
  281. /* Due to errata in the i2s mode; need to line up enabling
  282. * the transmitter with a transition on the frame sync
  283. * line */
  284. spin_lock_irqsave(&psc_i2s->lock, flags);
  285. /* first make sure it is low */
  286. while ((in_8(&regs->ipcr_acr.ipcr) & 0x80) != 0)
  287. ;
  288. /* then wait for the transition to high */
  289. while ((in_8(&regs->ipcr_acr.ipcr) & 0x80) == 0)
  290. ;
  291. /* Finally, enable the PSC.
  292. * Receiver must always be enabled; even when we only want
  293. * transmit. (see 15.3.2.3 of MPC5200B User's Guide) */
  294. psc_cmd = MPC52xx_PSC_RX_ENABLE;
  295. if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK)
  296. psc_cmd |= MPC52xx_PSC_TX_ENABLE;
  297. out_8(&regs->command, psc_cmd);
  298. spin_unlock_irqrestore(&psc_i2s->lock, flags);
  299. break;
  300. case SNDRV_PCM_TRIGGER_STOP:
  301. /* Turn off the PSC */
  302. s->active = 0;
  303. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) {
  304. if (!psc_i2s->playback.active) {
  305. out_8(&regs->command, 2 << 4); /* reset rx */
  306. out_8(&regs->command, 3 << 4); /* reset tx */
  307. out_8(&regs->command, 4 << 4); /* reset err */
  308. }
  309. } else {
  310. out_8(&regs->command, 3 << 4); /* reset tx */
  311. out_8(&regs->command, 4 << 4); /* reset err */
  312. if (!psc_i2s->capture.active)
  313. out_8(&regs->command, 2 << 4); /* reset rx */
  314. }
  315. bcom_disable(s->bcom_task);
  316. while (!bcom_queue_empty(s->bcom_task))
  317. bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
  318. break;
  319. default:
  320. dev_dbg(psc_i2s->dev, "invalid command\n");
  321. return -EINVAL;
  322. }
  323. /* Update interrupt enable settings */
  324. imr = 0;
  325. if (psc_i2s->playback.active)
  326. imr |= MPC52xx_PSC_IMR_TXEMP;
  327. if (psc_i2s->capture.active)
  328. imr |= MPC52xx_PSC_IMR_ORERR;
  329. out_be16(&regs->isr_imr.imr, imr);
  330. return 0;
  331. }
  332. /**
  333. * psc_i2s_shutdown: shutdown the data transfer on a stream
  334. *
  335. * Shutdown the PSC if there are no other substreams open.
  336. */
  337. static void psc_i2s_shutdown(struct snd_pcm_substream *substream)
  338. {
  339. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  340. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  341. dev_dbg(psc_i2s->dev, "psc_i2s_shutdown(substream=%p)\n", substream);
  342. /*
  343. * If this is the last active substream, disable the PSC and release
  344. * the IRQ.
  345. */
  346. if (!psc_i2s->playback.active &&
  347. !psc_i2s->capture.active) {
  348. /* Disable all interrupts and reset the PSC */
  349. out_be16(&psc_i2s->psc_regs->isr_imr.imr, 0);
  350. out_8(&psc_i2s->psc_regs->command, 3 << 4); /* reset tx */
  351. out_8(&psc_i2s->psc_regs->command, 2 << 4); /* reset rx */
  352. out_8(&psc_i2s->psc_regs->command, 1 << 4); /* reset mode */
  353. out_8(&psc_i2s->psc_regs->command, 4 << 4); /* reset error */
  354. /* Release irqs */
  355. free_irq(psc_i2s->irq, psc_i2s);
  356. free_irq(psc_i2s->capture.irq, &psc_i2s->capture);
  357. free_irq(psc_i2s->playback.irq, &psc_i2s->playback);
  358. }
  359. }
  360. /**
  361. * psc_i2s_set_sysclk: set the clock frequency and direction
  362. *
  363. * This function is called by the machine driver to tell us what the clock
  364. * frequency and direction are.
  365. *
  366. * Currently, we only support operating as a clock slave (SND_SOC_CLOCK_IN),
  367. * and we don't care about the frequency. Return an error if the direction
  368. * is not SND_SOC_CLOCK_IN.
  369. *
  370. * @clk_id: reserved, should be zero
  371. * @freq: the frequency of the given clock ID, currently ignored
  372. * @dir: SND_SOC_CLOCK_IN (clock slave) or SND_SOC_CLOCK_OUT (clock master)
  373. */
  374. static int psc_i2s_set_sysclk(struct snd_soc_dai *cpu_dai,
  375. int clk_id, unsigned int freq, int dir)
  376. {
  377. struct psc_i2s *psc_i2s = cpu_dai->private_data;
  378. dev_dbg(psc_i2s->dev, "psc_i2s_set_sysclk(cpu_dai=%p, dir=%i)\n",
  379. cpu_dai, dir);
  380. return (dir == SND_SOC_CLOCK_IN) ? 0 : -EINVAL;
  381. }
  382. /**
  383. * psc_i2s_set_fmt: set the serial format.
  384. *
  385. * This function is called by the machine driver to tell us what serial
  386. * format to use.
  387. *
  388. * This driver only supports I2S mode. Return an error if the format is
  389. * not SND_SOC_DAIFMT_I2S.
  390. *
  391. * @format: one of SND_SOC_DAIFMT_xxx
  392. */
  393. static int psc_i2s_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int format)
  394. {
  395. struct psc_i2s *psc_i2s = cpu_dai->private_data;
  396. dev_dbg(psc_i2s->dev, "psc_i2s_set_fmt(cpu_dai=%p, format=%i)\n",
  397. cpu_dai, format);
  398. return (format == SND_SOC_DAIFMT_I2S) ? 0 : -EINVAL;
  399. }
  400. /* ---------------------------------------------------------------------
  401. * ALSA SoC Bindings
  402. *
  403. * - Digital Audio Interface (DAI) template
  404. * - create/destroy dai hooks
  405. */
  406. /**
  407. * psc_i2s_dai_template: template CPU Digital Audio Interface
  408. */
  409. static struct snd_soc_dai psc_i2s_dai_template = {
  410. .type = SND_SOC_DAI_I2S,
  411. .playback = {
  412. .channels_min = 2,
  413. .channels_max = 2,
  414. .rates = PSC_I2S_RATES,
  415. .formats = PSC_I2S_FORMATS,
  416. },
  417. .capture = {
  418. .channels_min = 2,
  419. .channels_max = 2,
  420. .rates = PSC_I2S_RATES,
  421. .formats = PSC_I2S_FORMATS,
  422. },
  423. .ops = {
  424. .startup = psc_i2s_startup,
  425. .hw_params = psc_i2s_hw_params,
  426. .hw_free = psc_i2s_hw_free,
  427. .shutdown = psc_i2s_shutdown,
  428. .trigger = psc_i2s_trigger,
  429. },
  430. .dai_ops = {
  431. .set_sysclk = psc_i2s_set_sysclk,
  432. .set_fmt = psc_i2s_set_fmt,
  433. },
  434. };
  435. /* ---------------------------------------------------------------------
  436. * The PSC I2S 'ASoC platform' driver
  437. *
  438. * Can be referenced by an 'ASoC machine' driver
  439. * This driver only deals with the audio bus; it doesn't have any
  440. * interaction with the attached codec
  441. */
  442. static const struct snd_pcm_hardware psc_i2s_pcm_hardware = {
  443. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  444. SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER,
  445. .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |
  446. SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE,
  447. .rate_min = 8000,
  448. .rate_max = 48000,
  449. .channels_min = 2,
  450. .channels_max = 2,
  451. .period_bytes_max = 1024 * 1024,
  452. .period_bytes_min = 32,
  453. .periods_min = 2,
  454. .periods_max = 256,
  455. .buffer_bytes_max = 2 * 1024 * 1024,
  456. .fifo_size = 0,
  457. };
  458. static int psc_i2s_pcm_open(struct snd_pcm_substream *substream)
  459. {
  460. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  461. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  462. struct psc_i2s_stream *s;
  463. dev_dbg(psc_i2s->dev, "psc_i2s_pcm_open(substream=%p)\n", substream);
  464. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  465. s = &psc_i2s->capture;
  466. else
  467. s = &psc_i2s->playback;
  468. snd_soc_set_runtime_hwparams(substream, &psc_i2s_pcm_hardware);
  469. s->stream = substream;
  470. return 0;
  471. }
  472. static int psc_i2s_pcm_close(struct snd_pcm_substream *substream)
  473. {
  474. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  475. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  476. struct psc_i2s_stream *s;
  477. dev_dbg(psc_i2s->dev, "psc_i2s_pcm_close(substream=%p)\n", substream);
  478. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  479. s = &psc_i2s->capture;
  480. else
  481. s = &psc_i2s->playback;
  482. s->stream = NULL;
  483. return 0;
  484. }
  485. static snd_pcm_uframes_t
  486. psc_i2s_pcm_pointer(struct snd_pcm_substream *substream)
  487. {
  488. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  489. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  490. struct psc_i2s_stream *s;
  491. dma_addr_t count;
  492. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  493. s = &psc_i2s->capture;
  494. else
  495. s = &psc_i2s->playback;
  496. count = s->period_current_pt - s->period_start;
  497. return bytes_to_frames(substream->runtime, count);
  498. }
  499. static struct snd_pcm_ops psc_i2s_pcm_ops = {
  500. .open = psc_i2s_pcm_open,
  501. .close = psc_i2s_pcm_close,
  502. .ioctl = snd_pcm_lib_ioctl,
  503. .pointer = psc_i2s_pcm_pointer,
  504. };
  505. static u64 psc_i2s_pcm_dmamask = 0xffffffff;
  506. static int psc_i2s_pcm_new(struct snd_card *card, struct snd_soc_dai *dai,
  507. struct snd_pcm *pcm)
  508. {
  509. struct snd_soc_pcm_runtime *rtd = pcm->private_data;
  510. size_t size = psc_i2s_pcm_hardware.buffer_bytes_max;
  511. int rc = 0;
  512. dev_dbg(rtd->socdev->dev, "psc_i2s_pcm_new(card=%p, dai=%p, pcm=%p)\n",
  513. card, dai, pcm);
  514. if (!card->dev->dma_mask)
  515. card->dev->dma_mask = &psc_i2s_pcm_dmamask;
  516. if (!card->dev->coherent_dma_mask)
  517. card->dev->coherent_dma_mask = 0xffffffff;
  518. if (pcm->streams[0].substream) {
  519. rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->dev, size,
  520. &pcm->streams[0].substream->dma_buffer);
  521. if (rc)
  522. goto playback_alloc_err;
  523. }
  524. if (pcm->streams[1].substream) {
  525. rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->dev, size,
  526. &pcm->streams[1].substream->dma_buffer);
  527. if (rc)
  528. goto capture_alloc_err;
  529. }
  530. return 0;
  531. capture_alloc_err:
  532. if (pcm->streams[0].substream)
  533. snd_dma_free_pages(&pcm->streams[0].substream->dma_buffer);
  534. playback_alloc_err:
  535. dev_err(card->dev, "Cannot allocate buffer(s)\n");
  536. return -ENOMEM;
  537. }
  538. static void psc_i2s_pcm_free(struct snd_pcm *pcm)
  539. {
  540. struct snd_soc_pcm_runtime *rtd = pcm->private_data;
  541. struct snd_pcm_substream *substream;
  542. int stream;
  543. dev_dbg(rtd->socdev->dev, "psc_i2s_pcm_free(pcm=%p)\n", pcm);
  544. for (stream = 0; stream < 2; stream++) {
  545. substream = pcm->streams[stream].substream;
  546. if (substream) {
  547. snd_dma_free_pages(&substream->dma_buffer);
  548. substream->dma_buffer.area = NULL;
  549. substream->dma_buffer.addr = 0;
  550. }
  551. }
  552. }
  553. struct snd_soc_platform psc_i2s_pcm_soc_platform = {
  554. .name = "mpc5200-psc-audio",
  555. .pcm_ops = &psc_i2s_pcm_ops,
  556. .pcm_new = &psc_i2s_pcm_new,
  557. .pcm_free = &psc_i2s_pcm_free,
  558. };
  559. /* ---------------------------------------------------------------------
  560. * Sysfs attributes for debugging
  561. */
  562. static ssize_t psc_i2s_status_show(struct device *dev,
  563. struct device_attribute *attr, char *buf)
  564. {
  565. struct psc_i2s *psc_i2s = dev_get_drvdata(dev);
  566. return sprintf(buf, "status=%.4x sicr=%.8x rfnum=%i rfstat=0x%.4x "
  567. "tfnum=%i tfstat=0x%.4x\n",
  568. in_be16(&psc_i2s->psc_regs->sr_csr.status),
  569. in_be32(&psc_i2s->psc_regs->sicr),
  570. in_be16(&psc_i2s->fifo_regs->rfnum) & 0x1ff,
  571. in_be16(&psc_i2s->fifo_regs->rfstat),
  572. in_be16(&psc_i2s->fifo_regs->tfnum) & 0x1ff,
  573. in_be16(&psc_i2s->fifo_regs->tfstat));
  574. }
  575. static int *psc_i2s_get_stat_attr(struct psc_i2s *psc_i2s, const char *name)
  576. {
  577. if (strcmp(name, "playback_underrun") == 0)
  578. return &psc_i2s->stats.underrun_count;
  579. if (strcmp(name, "capture_overrun") == 0)
  580. return &psc_i2s->stats.overrun_count;
  581. return NULL;
  582. }
  583. static ssize_t psc_i2s_stat_show(struct device *dev,
  584. struct device_attribute *attr, char *buf)
  585. {
  586. struct psc_i2s *psc_i2s = dev_get_drvdata(dev);
  587. int *attrib;
  588. attrib = psc_i2s_get_stat_attr(psc_i2s, attr->attr.name);
  589. if (!attrib)
  590. return 0;
  591. return sprintf(buf, "%i\n", *attrib);
  592. }
  593. static ssize_t psc_i2s_stat_store(struct device *dev,
  594. struct device_attribute *attr,
  595. const char *buf,
  596. size_t count)
  597. {
  598. struct psc_i2s *psc_i2s = dev_get_drvdata(dev);
  599. int *attrib;
  600. attrib = psc_i2s_get_stat_attr(psc_i2s, attr->attr.name);
  601. if (!attrib)
  602. return 0;
  603. *attrib = simple_strtoul(buf, NULL, 0);
  604. return count;
  605. }
  606. static DEVICE_ATTR(status, 0644, psc_i2s_status_show, NULL);
  607. static DEVICE_ATTR(playback_underrun, 0644, psc_i2s_stat_show,
  608. psc_i2s_stat_store);
  609. static DEVICE_ATTR(capture_overrun, 0644, psc_i2s_stat_show,
  610. psc_i2s_stat_store);
  611. /* ---------------------------------------------------------------------
  612. * OF platform bus binding code:
  613. * - Probe/remove operations
  614. * - OF device match table
  615. */
  616. static int __devinit psc_i2s_of_probe(struct of_device *op,
  617. const struct of_device_id *match)
  618. {
  619. phys_addr_t fifo;
  620. struct psc_i2s *psc_i2s;
  621. struct resource res;
  622. int size, psc_id, irq, rc;
  623. const __be32 *prop;
  624. void __iomem *regs;
  625. dev_dbg(&op->dev, "probing psc i2s device\n");
  626. /* Get the PSC ID */
  627. prop = of_get_property(op->node, "cell-index", &size);
  628. if (!prop || size < sizeof *prop)
  629. return -ENODEV;
  630. psc_id = be32_to_cpu(*prop);
  631. /* Fetch the registers and IRQ of the PSC */
  632. irq = irq_of_parse_and_map(op->node, 0);
  633. if (of_address_to_resource(op->node, 0, &res)) {
  634. dev_err(&op->dev, "Missing reg property\n");
  635. return -ENODEV;
  636. }
  637. regs = ioremap(res.start, 1 + res.end - res.start);
  638. if (!regs) {
  639. dev_err(&op->dev, "Could not map registers\n");
  640. return -ENODEV;
  641. }
  642. /* Allocate and initialize the driver private data */
  643. psc_i2s = kzalloc(sizeof *psc_i2s, GFP_KERNEL);
  644. if (!psc_i2s) {
  645. iounmap(regs);
  646. return -ENOMEM;
  647. }
  648. spin_lock_init(&psc_i2s->lock);
  649. psc_i2s->irq = irq;
  650. psc_i2s->psc_regs = regs;
  651. psc_i2s->fifo_regs = regs + sizeof *psc_i2s->psc_regs;
  652. psc_i2s->dev = &op->dev;
  653. psc_i2s->playback.psc_i2s = psc_i2s;
  654. psc_i2s->capture.psc_i2s = psc_i2s;
  655. snprintf(psc_i2s->name, sizeof psc_i2s->name, "PSC%u", psc_id+1);
  656. /* Fill out the CPU DAI structure */
  657. memcpy(&psc_i2s->dai, &psc_i2s_dai_template, sizeof psc_i2s->dai);
  658. psc_i2s->dai.private_data = psc_i2s;
  659. psc_i2s->dai.name = psc_i2s->name;
  660. psc_i2s->dai.id = psc_id;
  661. /* Find the address of the fifo data registers and setup the
  662. * DMA tasks */
  663. fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32);
  664. psc_i2s->capture.bcom_task =
  665. bcom_psc_gen_bd_rx_init(psc_id, 10, fifo, 512);
  666. psc_i2s->playback.bcom_task =
  667. bcom_psc_gen_bd_tx_init(psc_id, 10, fifo);
  668. if (!psc_i2s->capture.bcom_task ||
  669. !psc_i2s->playback.bcom_task) {
  670. dev_err(&op->dev, "Could not allocate bestcomm tasks\n");
  671. iounmap(regs);
  672. kfree(psc_i2s);
  673. return -ENODEV;
  674. }
  675. /* Disable all interrupts and reset the PSC */
  676. out_be16(&psc_i2s->psc_regs->isr_imr.imr, 0);
  677. out_8(&psc_i2s->psc_regs->command, 3 << 4); /* reset transmitter */
  678. out_8(&psc_i2s->psc_regs->command, 2 << 4); /* reset receiver */
  679. out_8(&psc_i2s->psc_regs->command, 1 << 4); /* reset mode */
  680. out_8(&psc_i2s->psc_regs->command, 4 << 4); /* reset error */
  681. /* Configure the serial interface mode; defaulting to CODEC8 mode */
  682. psc_i2s->sicr = MPC52xx_PSC_SICR_DTS1 | MPC52xx_PSC_SICR_I2S |
  683. MPC52xx_PSC_SICR_CLKPOL;
  684. if (of_get_property(op->node, "fsl,cellslave", NULL))
  685. psc_i2s->sicr |= MPC52xx_PSC_SICR_CELLSLAVE |
  686. MPC52xx_PSC_SICR_GENCLK;
  687. out_be32(&psc_i2s->psc_regs->sicr,
  688. psc_i2s->sicr | MPC52xx_PSC_SICR_SIM_CODEC_8);
  689. /* Check for the codec handle. If it is not present then we
  690. * are done */
  691. if (!of_get_property(op->node, "codec-handle", NULL))
  692. return 0;
  693. /* Set up mode register;
  694. * First write: RxRdy (FIFO Alarm) generates rx FIFO irq
  695. * Second write: register Normal mode for non loopback
  696. */
  697. out_8(&psc_i2s->psc_regs->mode, 0);
  698. out_8(&psc_i2s->psc_regs->mode, 0);
  699. /* Set the TX and RX fifo alarm thresholds */
  700. out_be16(&psc_i2s->fifo_regs->rfalarm, 0x100);
  701. out_8(&psc_i2s->fifo_regs->rfcntl, 0x4);
  702. out_be16(&psc_i2s->fifo_regs->tfalarm, 0x100);
  703. out_8(&psc_i2s->fifo_regs->tfcntl, 0x7);
  704. /* Lookup the IRQ numbers */
  705. psc_i2s->playback.irq =
  706. bcom_get_task_irq(psc_i2s->playback.bcom_task);
  707. psc_i2s->capture.irq =
  708. bcom_get_task_irq(psc_i2s->capture.bcom_task);
  709. /* Save what we've done so it can be found again later */
  710. dev_set_drvdata(&op->dev, psc_i2s);
  711. /* Register the SYSFS files */
  712. rc = device_create_file(psc_i2s->dev, &dev_attr_status);
  713. rc |= device_create_file(psc_i2s->dev, &dev_attr_capture_overrun);
  714. rc |= device_create_file(psc_i2s->dev, &dev_attr_playback_underrun);
  715. if (rc)
  716. dev_info(psc_i2s->dev, "error creating sysfs files\n");
  717. /* Tell the ASoC OF helpers about it */
  718. of_snd_soc_register_platform(&psc_i2s_pcm_soc_platform, op->node,
  719. &psc_i2s->dai);
  720. return 0;
  721. }
  722. static int __devexit psc_i2s_of_remove(struct of_device *op)
  723. {
  724. struct psc_i2s *psc_i2s = dev_get_drvdata(&op->dev);
  725. dev_dbg(&op->dev, "psc_i2s_remove()\n");
  726. bcom_gen_bd_rx_release(psc_i2s->capture.bcom_task);
  727. bcom_gen_bd_tx_release(psc_i2s->playback.bcom_task);
  728. iounmap(psc_i2s->psc_regs);
  729. iounmap(psc_i2s->fifo_regs);
  730. kfree(psc_i2s);
  731. dev_set_drvdata(&op->dev, NULL);
  732. return 0;
  733. }
  734. /* Match table for of_platform binding */
  735. static struct of_device_id psc_i2s_match[] __devinitdata = {
  736. { .compatible = "fsl,mpc5200-psc-i2s", },
  737. {}
  738. };
  739. MODULE_DEVICE_TABLE(of, psc_i2s_match);
  740. static struct of_platform_driver psc_i2s_driver = {
  741. .match_table = psc_i2s_match,
  742. .probe = psc_i2s_of_probe,
  743. .remove = __devexit_p(psc_i2s_of_remove),
  744. .driver = {
  745. .name = "mpc5200-psc-i2s",
  746. .owner = THIS_MODULE,
  747. },
  748. };
  749. /* ---------------------------------------------------------------------
  750. * Module setup and teardown; simply register the of_platform driver
  751. * for the PSC in I2S mode.
  752. */
  753. static int __init psc_i2s_init(void)
  754. {
  755. return of_register_platform_driver(&psc_i2s_driver);
  756. }
  757. module_init(psc_i2s_init);
  758. static void __exit psc_i2s_exit(void)
  759. {
  760. of_unregister_platform_driver(&psc_i2s_driver);
  761. }
  762. module_exit(psc_i2s_exit);