uda1380.c 24 KB

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  1. /*
  2. * uda1380.c - Philips UDA1380 ALSA SoC audio driver
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
  9. * Improved support for DAPM and audio routing/mixing capabilities,
  10. * added TLV support.
  11. *
  12. * Modified by Richard Purdie <richard@openedhand.com> to fit into SoC
  13. * codec model.
  14. *
  15. * Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
  16. * Copyright 2005 Openedhand Ltd.
  17. */
  18. #include <linux/module.h>
  19. #include <linux/init.h>
  20. #include <linux/types.h>
  21. #include <linux/string.h>
  22. #include <linux/slab.h>
  23. #include <linux/errno.h>
  24. #include <linux/ioctl.h>
  25. #include <linux/delay.h>
  26. #include <linux/i2c.h>
  27. #include <sound/core.h>
  28. #include <sound/control.h>
  29. #include <sound/initval.h>
  30. #include <sound/info.h>
  31. #include <sound/soc.h>
  32. #include <sound/soc-dapm.h>
  33. #include <sound/tlv.h>
  34. #include "uda1380.h"
  35. #define UDA1380_VERSION "0.6"
  36. /*
  37. * uda1380 register cache
  38. */
  39. static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = {
  40. 0x0502, 0x0000, 0x0000, 0x3f3f,
  41. 0x0202, 0x0000, 0x0000, 0x0000,
  42. 0x0000, 0x0000, 0x0000, 0x0000,
  43. 0x0000, 0x0000, 0x0000, 0x0000,
  44. 0x0000, 0xff00, 0x0000, 0x4800,
  45. 0x0000, 0x0000, 0x0000, 0x0000,
  46. 0x0000, 0x0000, 0x0000, 0x0000,
  47. 0x0000, 0x0000, 0x0000, 0x0000,
  48. 0x0000, 0x8000, 0x0002, 0x0000,
  49. };
  50. /*
  51. * read uda1380 register cache
  52. */
  53. static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec,
  54. unsigned int reg)
  55. {
  56. u16 *cache = codec->reg_cache;
  57. if (reg == UDA1380_RESET)
  58. return 0;
  59. if (reg >= UDA1380_CACHEREGNUM)
  60. return -1;
  61. return cache[reg];
  62. }
  63. /*
  64. * write uda1380 register cache
  65. */
  66. static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec,
  67. u16 reg, unsigned int value)
  68. {
  69. u16 *cache = codec->reg_cache;
  70. if (reg >= UDA1380_CACHEREGNUM)
  71. return;
  72. cache[reg] = value;
  73. }
  74. /*
  75. * write to the UDA1380 register space
  76. */
  77. static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg,
  78. unsigned int value)
  79. {
  80. u8 data[3];
  81. /* data is
  82. * data[0] is register offset
  83. * data[1] is MS byte
  84. * data[2] is LS byte
  85. */
  86. data[0] = reg;
  87. data[1] = (value & 0xff00) >> 8;
  88. data[2] = value & 0x00ff;
  89. uda1380_write_reg_cache(codec, reg, value);
  90. /* the interpolator & decimator regs must only be written when the
  91. * codec DAI is active.
  92. */
  93. if (!codec->active && (reg >= UDA1380_MVOL))
  94. return 0;
  95. pr_debug("uda1380: hw write %x val %x\n", reg, value);
  96. if (codec->hw_write(codec->control_data, data, 3) == 3) {
  97. unsigned int val;
  98. i2c_master_send(codec->control_data, data, 1);
  99. i2c_master_recv(codec->control_data, data, 2);
  100. val = (data[0]<<8) | data[1];
  101. if (val != value) {
  102. pr_debug("uda1380: READ BACK VAL %x\n",
  103. (data[0]<<8) | data[1]);
  104. return -EIO;
  105. }
  106. return 0;
  107. } else
  108. return -EIO;
  109. }
  110. #define uda1380_reset(c) uda1380_write(c, UDA1380_RESET, 0)
  111. /* declarations of ALSA reg_elem_REAL controls */
  112. static const char *uda1380_deemp[] = {
  113. "None",
  114. "32kHz",
  115. "44.1kHz",
  116. "48kHz",
  117. "96kHz",
  118. };
  119. static const char *uda1380_input_sel[] = {
  120. "Line",
  121. "Mic + Line R",
  122. "Line L",
  123. "Mic",
  124. };
  125. static const char *uda1380_output_sel[] = {
  126. "DAC",
  127. "Analog Mixer",
  128. };
  129. static const char *uda1380_spf_mode[] = {
  130. "Flat",
  131. "Minimum1",
  132. "Minimum2",
  133. "Maximum"
  134. };
  135. static const char *uda1380_capture_sel[] = {
  136. "ADC",
  137. "Digital Mixer"
  138. };
  139. static const char *uda1380_sel_ns[] = {
  140. "3rd-order",
  141. "5th-order"
  142. };
  143. static const char *uda1380_mix_control[] = {
  144. "off",
  145. "PCM only",
  146. "before sound processing",
  147. "after sound processing"
  148. };
  149. static const char *uda1380_sdet_setting[] = {
  150. "3200",
  151. "4800",
  152. "9600",
  153. "19200"
  154. };
  155. static const char *uda1380_os_setting[] = {
  156. "single-speed",
  157. "double-speed (no mixing)",
  158. "quad-speed (no mixing)"
  159. };
  160. static const struct soc_enum uda1380_deemp_enum[] = {
  161. SOC_ENUM_SINGLE(UDA1380_DEEMP, 8, 5, uda1380_deemp),
  162. SOC_ENUM_SINGLE(UDA1380_DEEMP, 0, 5, uda1380_deemp),
  163. };
  164. static const struct soc_enum uda1380_input_sel_enum =
  165. SOC_ENUM_SINGLE(UDA1380_ADC, 2, 4, uda1380_input_sel); /* SEL_MIC, SEL_LNA */
  166. static const struct soc_enum uda1380_output_sel_enum =
  167. SOC_ENUM_SINGLE(UDA1380_PM, 7, 2, uda1380_output_sel); /* R02_EN_AVC */
  168. static const struct soc_enum uda1380_spf_enum =
  169. SOC_ENUM_SINGLE(UDA1380_MODE, 14, 4, uda1380_spf_mode); /* M */
  170. static const struct soc_enum uda1380_capture_sel_enum =
  171. SOC_ENUM_SINGLE(UDA1380_IFACE, 6, 2, uda1380_capture_sel); /* SEL_SOURCE */
  172. static const struct soc_enum uda1380_sel_ns_enum =
  173. SOC_ENUM_SINGLE(UDA1380_MIXER, 14, 2, uda1380_sel_ns); /* SEL_NS */
  174. static const struct soc_enum uda1380_mix_enum =
  175. SOC_ENUM_SINGLE(UDA1380_MIXER, 12, 4, uda1380_mix_control); /* MIX, MIX_POS */
  176. static const struct soc_enum uda1380_sdet_enum =
  177. SOC_ENUM_SINGLE(UDA1380_MIXER, 4, 4, uda1380_sdet_setting); /* SD_VALUE */
  178. static const struct soc_enum uda1380_os_enum =
  179. SOC_ENUM_SINGLE(UDA1380_MIXER, 0, 3, uda1380_os_setting); /* OS */
  180. /*
  181. * from -48 dB in 1.5 dB steps (mute instead of -49.5 dB)
  182. */
  183. static DECLARE_TLV_DB_SCALE(amix_tlv, -4950, 150, 1);
  184. /*
  185. * from -78 dB in 1 dB steps (3 dB steps, really. LSB are ignored),
  186. * from -66 dB in 0.5 dB steps (2 dB steps, really) and
  187. * from -52 dB in 0.25 dB steps
  188. */
  189. static const unsigned int mvol_tlv[] = {
  190. TLV_DB_RANGE_HEAD(3),
  191. 0, 15, TLV_DB_SCALE_ITEM(-8200, 100, 1),
  192. 16, 43, TLV_DB_SCALE_ITEM(-6600, 50, 0),
  193. 44, 252, TLV_DB_SCALE_ITEM(-5200, 25, 0),
  194. };
  195. /*
  196. * from -72 dB in 1.5 dB steps (6 dB steps really),
  197. * from -66 dB in 0.75 dB steps (3 dB steps really),
  198. * from -60 dB in 0.5 dB steps (2 dB steps really) and
  199. * from -46 dB in 0.25 dB steps
  200. */
  201. static const unsigned int vc_tlv[] = {
  202. TLV_DB_RANGE_HEAD(4),
  203. 0, 7, TLV_DB_SCALE_ITEM(-7800, 150, 1),
  204. 8, 15, TLV_DB_SCALE_ITEM(-6600, 75, 0),
  205. 16, 43, TLV_DB_SCALE_ITEM(-6000, 50, 0),
  206. 44, 228, TLV_DB_SCALE_ITEM(-4600, 25, 0),
  207. };
  208. /* from 0 to 6 dB in 2 dB steps if SPF mode != flat */
  209. static DECLARE_TLV_DB_SCALE(tr_tlv, 0, 200, 0);
  210. /* from 0 to 24 dB in 2 dB steps, if SPF mode == maximum, otherwise cuts
  211. * off at 18 dB max) */
  212. static DECLARE_TLV_DB_SCALE(bb_tlv, 0, 200, 0);
  213. /* from -63 to 24 dB in 0.5 dB steps (-128...48) */
  214. static DECLARE_TLV_DB_SCALE(dec_tlv, -6400, 50, 1);
  215. /* from 0 to 24 dB in 3 dB steps */
  216. static DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
  217. /* from 0 to 30 dB in 2 dB steps */
  218. static DECLARE_TLV_DB_SCALE(vga_tlv, 0, 200, 0);
  219. static const struct snd_kcontrol_new uda1380_snd_controls[] = {
  220. SOC_DOUBLE_TLV("Analog Mixer Volume", UDA1380_AMIX, 0, 8, 44, 1, amix_tlv), /* AVCR, AVCL */
  221. SOC_DOUBLE_TLV("Master Playback Volume", UDA1380_MVOL, 0, 8, 252, 1, mvol_tlv), /* MVCL, MVCR */
  222. SOC_SINGLE_TLV("ADC Playback Volume", UDA1380_MIXVOL, 8, 228, 1, vc_tlv), /* VC2 */
  223. SOC_SINGLE_TLV("PCM Playback Volume", UDA1380_MIXVOL, 0, 228, 1, vc_tlv), /* VC1 */
  224. SOC_ENUM("Sound Processing Filter", uda1380_spf_enum), /* M */
  225. SOC_DOUBLE_TLV("Tone Control - Treble", UDA1380_MODE, 4, 12, 3, 0, tr_tlv), /* TRL, TRR */
  226. SOC_DOUBLE_TLV("Tone Control - Bass", UDA1380_MODE, 0, 8, 15, 0, bb_tlv), /* BBL, BBR */
  227. /**/ SOC_SINGLE("Master Playback Switch", UDA1380_DEEMP, 14, 1, 1), /* MTM */
  228. SOC_SINGLE("ADC Playback Switch", UDA1380_DEEMP, 11, 1, 1), /* MT2 from decimation filter */
  229. SOC_ENUM("ADC Playback De-emphasis", uda1380_deemp_enum[0]), /* DE2 */
  230. SOC_SINGLE("PCM Playback Switch", UDA1380_DEEMP, 3, 1, 1), /* MT1, from digital data input */
  231. SOC_ENUM("PCM Playback De-emphasis", uda1380_deemp_enum[1]), /* DE1 */
  232. SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0), /* DA_POL_INV */
  233. SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum), /* SEL_NS */
  234. SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum), /* MIX_POS, MIX */
  235. SOC_SINGLE("Silence Switch", UDA1380_MIXER, 7, 1, 0), /* SILENCE, force DAC output to silence */
  236. SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0), /* SDET_ON */
  237. SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum), /* SD_VALUE */
  238. SOC_ENUM("Oversampling Input", uda1380_os_enum), /* OS */
  239. SOC_DOUBLE_S8_TLV("ADC Capture Volume", UDA1380_DEC, -128, 48, dec_tlv), /* ML_DEC, MR_DEC */
  240. /**/ SOC_SINGLE("ADC Capture Switch", UDA1380_PGA, 15, 1, 1), /* MT_ADC */
  241. SOC_DOUBLE_TLV("Line Capture Volume", UDA1380_PGA, 0, 8, 8, 0, pga_tlv), /* PGA_GAINCTRLL, PGA_GAINCTRLR */
  242. SOC_SINGLE("ADC Polarity inverting Switch", UDA1380_ADC, 12, 1, 0), /* ADCPOL_INV */
  243. SOC_SINGLE_TLV("Mic Capture Volume", UDA1380_ADC, 8, 15, 0, vga_tlv), /* VGA_CTRL */
  244. SOC_SINGLE("DC Filter Bypass Switch", UDA1380_ADC, 1, 1, 0), /* SKIP_DCFIL (before decimator) */
  245. SOC_SINGLE("DC Filter Enable Switch", UDA1380_ADC, 0, 1, 0), /* EN_DCFIL (at output of decimator) */
  246. SOC_SINGLE("AGC Timing", UDA1380_AGC, 8, 7, 0), /* TODO: enum, see table 62 */
  247. SOC_SINGLE("AGC Target level", UDA1380_AGC, 2, 3, 1), /* AGC_LEVEL */
  248. /* -5.5, -8, -11.5, -14 dBFS */
  249. SOC_SINGLE("AGC Switch", UDA1380_AGC, 0, 1, 0),
  250. };
  251. /* add non dapm controls */
  252. static int uda1380_add_controls(struct snd_soc_codec *codec)
  253. {
  254. int err, i;
  255. for (i = 0; i < ARRAY_SIZE(uda1380_snd_controls); i++) {
  256. err = snd_ctl_add(codec->card,
  257. snd_soc_cnew(&uda1380_snd_controls[i], codec, NULL));
  258. if (err < 0)
  259. return err;
  260. }
  261. return 0;
  262. }
  263. /* Input mux */
  264. static const struct snd_kcontrol_new uda1380_input_mux_control =
  265. SOC_DAPM_ENUM("Route", uda1380_input_sel_enum);
  266. /* Output mux */
  267. static const struct snd_kcontrol_new uda1380_output_mux_control =
  268. SOC_DAPM_ENUM("Route", uda1380_output_sel_enum);
  269. /* Capture mux */
  270. static const struct snd_kcontrol_new uda1380_capture_mux_control =
  271. SOC_DAPM_ENUM("Route", uda1380_capture_sel_enum);
  272. static const struct snd_soc_dapm_widget uda1380_dapm_widgets[] = {
  273. SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
  274. &uda1380_input_mux_control),
  275. SND_SOC_DAPM_MUX("Output Mux", SND_SOC_NOPM, 0, 0,
  276. &uda1380_output_mux_control),
  277. SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
  278. &uda1380_capture_mux_control),
  279. SND_SOC_DAPM_PGA("Left PGA", UDA1380_PM, 3, 0, NULL, 0),
  280. SND_SOC_DAPM_PGA("Right PGA", UDA1380_PM, 1, 0, NULL, 0),
  281. SND_SOC_DAPM_PGA("Mic LNA", UDA1380_PM, 4, 0, NULL, 0),
  282. SND_SOC_DAPM_ADC("Left ADC", "Left Capture", UDA1380_PM, 2, 0),
  283. SND_SOC_DAPM_ADC("Right ADC", "Right Capture", UDA1380_PM, 0, 0),
  284. SND_SOC_DAPM_INPUT("VINM"),
  285. SND_SOC_DAPM_INPUT("VINL"),
  286. SND_SOC_DAPM_INPUT("VINR"),
  287. SND_SOC_DAPM_MIXER("Analog Mixer", UDA1380_PM, 6, 0, NULL, 0),
  288. SND_SOC_DAPM_OUTPUT("VOUTLHP"),
  289. SND_SOC_DAPM_OUTPUT("VOUTRHP"),
  290. SND_SOC_DAPM_OUTPUT("VOUTL"),
  291. SND_SOC_DAPM_OUTPUT("VOUTR"),
  292. SND_SOC_DAPM_DAC("DAC", "Playback", UDA1380_PM, 10, 0),
  293. SND_SOC_DAPM_PGA("HeadPhone Driver", UDA1380_PM, 13, 0, NULL, 0),
  294. };
  295. static const struct snd_soc_dapm_route audio_map[] = {
  296. /* output mux */
  297. {"HeadPhone Driver", NULL, "Output Mux"},
  298. {"VOUTR", NULL, "Output Mux"},
  299. {"VOUTL", NULL, "Output Mux"},
  300. {"Analog Mixer", NULL, "VINR"},
  301. {"Analog Mixer", NULL, "VINL"},
  302. {"Analog Mixer", NULL, "DAC"},
  303. {"Output Mux", "DAC", "DAC"},
  304. {"Output Mux", "Analog Mixer", "Analog Mixer"},
  305. /* {"DAC", "Digital Mixer", "I2S" } */
  306. /* headphone driver */
  307. {"VOUTLHP", NULL, "HeadPhone Driver"},
  308. {"VOUTRHP", NULL, "HeadPhone Driver"},
  309. /* input mux */
  310. {"Left ADC", NULL, "Input Mux"},
  311. {"Input Mux", "Mic", "Mic LNA"},
  312. {"Input Mux", "Mic + Line R", "Mic LNA"},
  313. {"Input Mux", "Line L", "Left PGA"},
  314. {"Input Mux", "Line", "Left PGA"},
  315. /* right input */
  316. {"Right ADC", "Mic + Line R", "Right PGA"},
  317. {"Right ADC", "Line", "Right PGA"},
  318. /* inputs */
  319. {"Mic LNA", NULL, "VINM"},
  320. {"Left PGA", NULL, "VINL"},
  321. {"Right PGA", NULL, "VINR"},
  322. };
  323. static int uda1380_add_widgets(struct snd_soc_codec *codec)
  324. {
  325. snd_soc_dapm_new_controls(codec, uda1380_dapm_widgets,
  326. ARRAY_SIZE(uda1380_dapm_widgets));
  327. snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
  328. snd_soc_dapm_new_widgets(codec);
  329. return 0;
  330. }
  331. static int uda1380_set_dai_fmt(struct snd_soc_dai *codec_dai,
  332. unsigned int fmt)
  333. {
  334. struct snd_soc_codec *codec = codec_dai->codec;
  335. int iface;
  336. /* set up DAI based upon fmt */
  337. iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
  338. iface &= ~(R01_SFORI_MASK | R01_SIM | R01_SFORO_MASK);
  339. /* FIXME: how to select I2S for DATAO and MSB for DATAI correctly? */
  340. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  341. case SND_SOC_DAIFMT_I2S:
  342. iface |= R01_SFORI_I2S | R01_SFORO_I2S;
  343. break;
  344. case SND_SOC_DAIFMT_LSB:
  345. iface |= R01_SFORI_LSB16 | R01_SFORO_I2S;
  346. break;
  347. case SND_SOC_DAIFMT_MSB:
  348. iface |= R01_SFORI_MSB | R01_SFORO_I2S;
  349. }
  350. if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
  351. iface |= R01_SIM;
  352. uda1380_write(codec, UDA1380_IFACE, iface);
  353. return 0;
  354. }
  355. /*
  356. * Flush reg cache
  357. * We can only write the interpolator and decimator registers
  358. * when the DAI is being clocked by the CPU DAI. It's up to the
  359. * machine and cpu DAI driver to do this before we are called.
  360. */
  361. static int uda1380_pcm_prepare(struct snd_pcm_substream *substream)
  362. {
  363. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  364. struct snd_soc_device *socdev = rtd->socdev;
  365. struct snd_soc_codec *codec = socdev->codec;
  366. int reg, reg_start, reg_end, clk;
  367. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  368. reg_start = UDA1380_MVOL;
  369. reg_end = UDA1380_MIXER;
  370. } else {
  371. reg_start = UDA1380_DEC;
  372. reg_end = UDA1380_AGC;
  373. }
  374. /* FIXME disable DAC_CLK */
  375. clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
  376. uda1380_write(codec, UDA1380_CLK, clk & ~R00_DAC_CLK);
  377. for (reg = reg_start; reg <= reg_end; reg++) {
  378. pr_debug("uda1380: flush reg %x val %x:", reg,
  379. uda1380_read_reg_cache(codec, reg));
  380. uda1380_write(codec, reg, uda1380_read_reg_cache(codec, reg));
  381. }
  382. /* FIXME enable DAC_CLK */
  383. uda1380_write(codec, UDA1380_CLK, clk | R00_DAC_CLK);
  384. return 0;
  385. }
  386. static int uda1380_pcm_hw_params(struct snd_pcm_substream *substream,
  387. struct snd_pcm_hw_params *params)
  388. {
  389. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  390. struct snd_soc_device *socdev = rtd->socdev;
  391. struct snd_soc_codec *codec = socdev->codec;
  392. u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
  393. /* set WSPLL power and divider if running from this clock */
  394. if (clk & R00_DAC_CLK) {
  395. int rate = params_rate(params);
  396. u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
  397. clk &= ~0x3; /* clear SEL_LOOP_DIV */
  398. switch (rate) {
  399. case 6250 ... 12500:
  400. clk |= 0x0;
  401. break;
  402. case 12501 ... 25000:
  403. clk |= 0x1;
  404. break;
  405. case 25001 ... 50000:
  406. clk |= 0x2;
  407. break;
  408. case 50001 ... 100000:
  409. clk |= 0x3;
  410. break;
  411. }
  412. uda1380_write(codec, UDA1380_PM, R02_PON_PLL | pm);
  413. }
  414. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  415. clk |= R00_EN_DAC | R00_EN_INT;
  416. else
  417. clk |= R00_EN_ADC | R00_EN_DEC;
  418. uda1380_write(codec, UDA1380_CLK, clk);
  419. return 0;
  420. }
  421. static void uda1380_pcm_shutdown(struct snd_pcm_substream *substream)
  422. {
  423. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  424. struct snd_soc_device *socdev = rtd->socdev;
  425. struct snd_soc_codec *codec = socdev->codec;
  426. u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
  427. /* shut down WSPLL power if running from this clock */
  428. if (clk & R00_DAC_CLK) {
  429. u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
  430. uda1380_write(codec, UDA1380_PM, ~R02_PON_PLL & pm);
  431. }
  432. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  433. clk &= ~(R00_EN_DAC | R00_EN_INT);
  434. else
  435. clk &= ~(R00_EN_ADC | R00_EN_DEC);
  436. uda1380_write(codec, UDA1380_CLK, clk);
  437. }
  438. static int uda1380_mute(struct snd_soc_dai *codec_dai, int mute)
  439. {
  440. struct snd_soc_codec *codec = codec_dai->codec;
  441. u16 mute_reg = uda1380_read_reg_cache(codec, UDA1380_DEEMP) & ~R13_MTM;
  442. /* FIXME: mute(codec,0) is called when the magician clock is already
  443. * set to WSPLL, but for some unknown reason writing to interpolator
  444. * registers works only when clocked by SYSCLK */
  445. u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
  446. uda1380_write(codec, UDA1380_CLK, ~R00_DAC_CLK & clk);
  447. if (mute)
  448. uda1380_write(codec, UDA1380_DEEMP, mute_reg | R13_MTM);
  449. else
  450. uda1380_write(codec, UDA1380_DEEMP, mute_reg);
  451. uda1380_write(codec, UDA1380_CLK, clk);
  452. return 0;
  453. }
  454. static int uda1380_set_bias_level(struct snd_soc_codec *codec,
  455. enum snd_soc_bias_level level)
  456. {
  457. int pm = uda1380_read_reg_cache(codec, UDA1380_PM);
  458. switch (level) {
  459. case SND_SOC_BIAS_ON:
  460. case SND_SOC_BIAS_PREPARE:
  461. uda1380_write(codec, UDA1380_PM, R02_PON_BIAS | pm);
  462. break;
  463. case SND_SOC_BIAS_STANDBY:
  464. uda1380_write(codec, UDA1380_PM, R02_PON_BIAS);
  465. break;
  466. case SND_SOC_BIAS_OFF:
  467. uda1380_write(codec, UDA1380_PM, 0x0);
  468. break;
  469. }
  470. codec->bias_level = level;
  471. return 0;
  472. }
  473. #define UDA1380_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
  474. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
  475. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
  476. struct snd_soc_dai uda1380_dai[] = {
  477. {
  478. .name = "UDA1380",
  479. .playback = {
  480. .stream_name = "Playback",
  481. .channels_min = 1,
  482. .channels_max = 2,
  483. .rates = UDA1380_RATES,
  484. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  485. .capture = {
  486. .stream_name = "Capture",
  487. .channels_min = 1,
  488. .channels_max = 2,
  489. .rates = UDA1380_RATES,
  490. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  491. .ops = {
  492. .hw_params = uda1380_pcm_hw_params,
  493. .shutdown = uda1380_pcm_shutdown,
  494. .prepare = uda1380_pcm_prepare,
  495. },
  496. .dai_ops = {
  497. .digital_mute = uda1380_mute,
  498. .set_fmt = uda1380_set_dai_fmt,
  499. },
  500. },
  501. { /* playback only - dual interface */
  502. .name = "UDA1380",
  503. .playback = {
  504. .stream_name = "Playback",
  505. .channels_min = 1,
  506. .channels_max = 2,
  507. .rates = UDA1380_RATES,
  508. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  509. },
  510. .ops = {
  511. .hw_params = uda1380_pcm_hw_params,
  512. .shutdown = uda1380_pcm_shutdown,
  513. .prepare = uda1380_pcm_prepare,
  514. },
  515. .dai_ops = {
  516. .digital_mute = uda1380_mute,
  517. .set_fmt = uda1380_set_dai_fmt,
  518. },
  519. },
  520. { /* capture only - dual interface*/
  521. .name = "UDA1380",
  522. .capture = {
  523. .stream_name = "Capture",
  524. .channels_min = 1,
  525. .channels_max = 2,
  526. .rates = UDA1380_RATES,
  527. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  528. },
  529. .ops = {
  530. .hw_params = uda1380_pcm_hw_params,
  531. .shutdown = uda1380_pcm_shutdown,
  532. .prepare = uda1380_pcm_prepare,
  533. },
  534. .dai_ops = {
  535. .set_fmt = uda1380_set_dai_fmt,
  536. },
  537. },
  538. };
  539. EXPORT_SYMBOL_GPL(uda1380_dai);
  540. static int uda1380_suspend(struct platform_device *pdev, pm_message_t state)
  541. {
  542. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  543. struct snd_soc_codec *codec = socdev->codec;
  544. uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
  545. return 0;
  546. }
  547. static int uda1380_resume(struct platform_device *pdev)
  548. {
  549. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  550. struct snd_soc_codec *codec = socdev->codec;
  551. int i;
  552. u8 data[2];
  553. u16 *cache = codec->reg_cache;
  554. /* Sync reg_cache with the hardware */
  555. for (i = 0; i < ARRAY_SIZE(uda1380_reg); i++) {
  556. data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
  557. data[1] = cache[i] & 0x00ff;
  558. codec->hw_write(codec->control_data, data, 2);
  559. }
  560. uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  561. uda1380_set_bias_level(codec, codec->suspend_bias_level);
  562. return 0;
  563. }
  564. /*
  565. * initialise the UDA1380 driver
  566. * register mixer and dsp interfaces with the kernel
  567. */
  568. static int uda1380_init(struct snd_soc_device *socdev, int dac_clk)
  569. {
  570. struct snd_soc_codec *codec = socdev->codec;
  571. int ret = 0;
  572. codec->name = "UDA1380";
  573. codec->owner = THIS_MODULE;
  574. codec->read = uda1380_read_reg_cache;
  575. codec->write = uda1380_write;
  576. codec->set_bias_level = uda1380_set_bias_level;
  577. codec->dai = uda1380_dai;
  578. codec->num_dai = ARRAY_SIZE(uda1380_dai);
  579. codec->reg_cache = kmemdup(uda1380_reg, sizeof(uda1380_reg),
  580. GFP_KERNEL);
  581. if (codec->reg_cache == NULL)
  582. return -ENOMEM;
  583. codec->reg_cache_size = ARRAY_SIZE(uda1380_reg);
  584. codec->reg_cache_step = 1;
  585. uda1380_reset(codec);
  586. /* register pcms */
  587. ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
  588. if (ret < 0) {
  589. pr_err("uda1380: failed to create pcms\n");
  590. goto pcm_err;
  591. }
  592. /* power on device */
  593. uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  594. /* set clock input */
  595. switch (dac_clk) {
  596. case UDA1380_DAC_CLK_SYSCLK:
  597. uda1380_write(codec, UDA1380_CLK, 0);
  598. break;
  599. case UDA1380_DAC_CLK_WSPLL:
  600. uda1380_write(codec, UDA1380_CLK, R00_DAC_CLK);
  601. break;
  602. }
  603. /* uda1380 init */
  604. uda1380_add_controls(codec);
  605. uda1380_add_widgets(codec);
  606. ret = snd_soc_register_card(socdev);
  607. if (ret < 0) {
  608. pr_err("uda1380: failed to register card\n");
  609. goto card_err;
  610. }
  611. return ret;
  612. card_err:
  613. snd_soc_free_pcms(socdev);
  614. snd_soc_dapm_free(socdev);
  615. pcm_err:
  616. kfree(codec->reg_cache);
  617. return ret;
  618. }
  619. static struct snd_soc_device *uda1380_socdev;
  620. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  621. static int uda1380_i2c_probe(struct i2c_client *i2c,
  622. const struct i2c_device_id *id)
  623. {
  624. struct snd_soc_device *socdev = uda1380_socdev;
  625. struct uda1380_setup_data *setup = socdev->codec_data;
  626. struct snd_soc_codec *codec = socdev->codec;
  627. int ret;
  628. i2c_set_clientdata(i2c, codec);
  629. codec->control_data = i2c;
  630. ret = uda1380_init(socdev, setup->dac_clk);
  631. if (ret < 0)
  632. pr_err("uda1380: failed to initialise UDA1380\n");
  633. return ret;
  634. }
  635. static int uda1380_i2c_remove(struct i2c_client *client)
  636. {
  637. struct snd_soc_codec *codec = i2c_get_clientdata(client);
  638. kfree(codec->reg_cache);
  639. return 0;
  640. }
  641. static const struct i2c_device_id uda1380_i2c_id[] = {
  642. { "uda1380", 0 },
  643. { }
  644. };
  645. MODULE_DEVICE_TABLE(i2c, uda1380_i2c_id);
  646. static struct i2c_driver uda1380_i2c_driver = {
  647. .driver = {
  648. .name = "UDA1380 I2C Codec",
  649. .owner = THIS_MODULE,
  650. },
  651. .probe = uda1380_i2c_probe,
  652. .remove = uda1380_i2c_remove,
  653. .id_table = uda1380_i2c_id,
  654. };
  655. static int uda1380_add_i2c_device(struct platform_device *pdev,
  656. const struct uda1380_setup_data *setup)
  657. {
  658. struct i2c_board_info info;
  659. struct i2c_adapter *adapter;
  660. struct i2c_client *client;
  661. int ret;
  662. ret = i2c_add_driver(&uda1380_i2c_driver);
  663. if (ret != 0) {
  664. dev_err(&pdev->dev, "can't add i2c driver\n");
  665. return ret;
  666. }
  667. memset(&info, 0, sizeof(struct i2c_board_info));
  668. info.addr = setup->i2c_address;
  669. strlcpy(info.type, "uda1380", I2C_NAME_SIZE);
  670. adapter = i2c_get_adapter(setup->i2c_bus);
  671. if (!adapter) {
  672. dev_err(&pdev->dev, "can't get i2c adapter %d\n",
  673. setup->i2c_bus);
  674. goto err_driver;
  675. }
  676. client = i2c_new_device(adapter, &info);
  677. i2c_put_adapter(adapter);
  678. if (!client) {
  679. dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
  680. (unsigned int)info.addr);
  681. goto err_driver;
  682. }
  683. return 0;
  684. err_driver:
  685. i2c_del_driver(&uda1380_i2c_driver);
  686. return -ENODEV;
  687. }
  688. #endif
  689. static int uda1380_probe(struct platform_device *pdev)
  690. {
  691. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  692. struct uda1380_setup_data *setup;
  693. struct snd_soc_codec *codec;
  694. int ret;
  695. pr_info("UDA1380 Audio Codec %s", UDA1380_VERSION);
  696. setup = socdev->codec_data;
  697. codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
  698. if (codec == NULL)
  699. return -ENOMEM;
  700. socdev->codec = codec;
  701. mutex_init(&codec->mutex);
  702. INIT_LIST_HEAD(&codec->dapm_widgets);
  703. INIT_LIST_HEAD(&codec->dapm_paths);
  704. uda1380_socdev = socdev;
  705. ret = -ENODEV;
  706. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  707. if (setup->i2c_address) {
  708. codec->hw_write = (hw_write_t)i2c_master_send;
  709. ret = uda1380_add_i2c_device(pdev, setup);
  710. }
  711. #endif
  712. if (ret != 0)
  713. kfree(codec);
  714. return ret;
  715. }
  716. /* power down chip */
  717. static int uda1380_remove(struct platform_device *pdev)
  718. {
  719. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  720. struct snd_soc_codec *codec = socdev->codec;
  721. if (codec->control_data)
  722. uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
  723. snd_soc_free_pcms(socdev);
  724. snd_soc_dapm_free(socdev);
  725. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  726. i2c_unregister_device(codec->control_data);
  727. i2c_del_driver(&uda1380_i2c_driver);
  728. #endif
  729. kfree(codec);
  730. return 0;
  731. }
  732. struct snd_soc_codec_device soc_codec_dev_uda1380 = {
  733. .probe = uda1380_probe,
  734. .remove = uda1380_remove,
  735. .suspend = uda1380_suspend,
  736. .resume = uda1380_resume,
  737. };
  738. EXPORT_SYMBOL_GPL(soc_codec_dev_uda1380);
  739. MODULE_AUTHOR("Giorgio Padrin");
  740. MODULE_DESCRIPTION("Audio support for codec Philips UDA1380");
  741. MODULE_LICENSE("GPL");