ice1724.c 72 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <linux/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/pci.h>
  29. #include <linux/slab.h>
  30. #include <linux/moduleparam.h>
  31. #include <linux/mutex.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/rawmidi.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "prodigy_hifi.h"
  47. #include "juli.h"
  48. #include "phase.h"
  49. #include "wtm.h"
  50. #include "se.h"
  51. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  52. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  53. MODULE_LICENSE("GPL");
  54. MODULE_SUPPORTED_DEVICE("{"
  55. REVO_DEVICE_DESC
  56. AMP_AUDIO2000_DEVICE_DESC
  57. AUREON_DEVICE_DESC
  58. VT1720_MOBO_DEVICE_DESC
  59. PONTIS_DEVICE_DESC
  60. PRODIGY192_DEVICE_DESC
  61. PRODIGY_HIFI_DEVICE_DESC
  62. JULI_DEVICE_DESC
  63. PHASE_DEVICE_DESC
  64. WTM_DEVICE_DESC
  65. SE_DEVICE_DESC
  66. "{VIA,VT1720},"
  67. "{VIA,VT1724},"
  68. "{ICEnsemble,Generic ICE1724},"
  69. "{ICEnsemble,Generic Envy24HT}"
  70. "{ICEnsemble,Generic Envy24PT}}");
  71. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  72. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  73. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  74. static char *model[SNDRV_CARDS];
  75. module_param_array(index, int, NULL, 0444);
  76. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  77. module_param_array(id, charp, NULL, 0444);
  78. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  79. module_param_array(enable, bool, NULL, 0444);
  80. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  81. module_param_array(model, charp, NULL, 0444);
  82. MODULE_PARM_DESC(model, "Use the given board model.");
  83. /* Both VT1720 and VT1724 have the same PCI IDs */
  84. static const struct pci_device_id snd_vt1724_ids[] = {
  85. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  86. { 0, }
  87. };
  88. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  89. static int PRO_RATE_LOCKED;
  90. static int PRO_RATE_RESET = 1;
  91. static unsigned int PRO_RATE_DEFAULT = 44100;
  92. /*
  93. * Basic I/O
  94. */
  95. /*
  96. * default rates, default clock routines
  97. */
  98. /* check whether the clock mode is spdif-in */
  99. static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
  100. {
  101. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  102. }
  103. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  104. {
  105. return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
  106. }
  107. /*
  108. * ac97 section
  109. */
  110. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  111. {
  112. unsigned char old_cmd;
  113. int tm;
  114. for (tm = 0; tm < 0x10000; tm++) {
  115. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  116. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  117. continue;
  118. if (!(old_cmd & VT1724_AC97_READY))
  119. continue;
  120. return old_cmd;
  121. }
  122. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  123. return old_cmd;
  124. }
  125. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  126. {
  127. int tm;
  128. for (tm = 0; tm < 0x10000; tm++)
  129. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  130. return 0;
  131. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  132. return -EIO;
  133. }
  134. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  135. unsigned short reg,
  136. unsigned short val)
  137. {
  138. struct snd_ice1712 *ice = ac97->private_data;
  139. unsigned char old_cmd;
  140. old_cmd = snd_vt1724_ac97_ready(ice);
  141. old_cmd &= ~VT1724_AC97_ID_MASK;
  142. old_cmd |= ac97->num;
  143. outb(reg, ICEMT1724(ice, AC97_INDEX));
  144. outw(val, ICEMT1724(ice, AC97_DATA));
  145. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  146. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  147. }
  148. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  149. {
  150. struct snd_ice1712 *ice = ac97->private_data;
  151. unsigned char old_cmd;
  152. old_cmd = snd_vt1724_ac97_ready(ice);
  153. old_cmd &= ~VT1724_AC97_ID_MASK;
  154. old_cmd |= ac97->num;
  155. outb(reg, ICEMT1724(ice, AC97_INDEX));
  156. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  157. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  158. return ~0;
  159. return inw(ICEMT1724(ice, AC97_DATA));
  160. }
  161. /*
  162. * GPIO operations
  163. */
  164. /* set gpio direction 0 = read, 1 = write */
  165. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  166. {
  167. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  168. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  169. }
  170. /* set the gpio mask (0 = writable) */
  171. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  172. {
  173. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  174. if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  175. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  176. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  177. }
  178. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  179. {
  180. outw(data, ICEREG1724(ice, GPIO_DATA));
  181. if (!ice->vt1720)
  182. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  183. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  184. }
  185. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  186. {
  187. unsigned int data;
  188. if (!ice->vt1720)
  189. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  190. else
  191. data = 0;
  192. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  193. return data;
  194. }
  195. /*
  196. * MIDI
  197. */
  198. static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
  199. {
  200. unsigned int count;
  201. for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
  202. inb(ICEREG1724(ice, MPU_DATA));
  203. }
  204. static inline struct snd_rawmidi_substream *
  205. get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
  206. {
  207. return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
  208. struct snd_rawmidi_substream, list);
  209. }
  210. static void vt1724_midi_write(struct snd_ice1712 *ice)
  211. {
  212. struct snd_rawmidi_substream *s;
  213. int count, i;
  214. u8 buffer[32];
  215. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
  216. count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
  217. if (count > 0) {
  218. count = snd_rawmidi_transmit(s, buffer, count);
  219. for (i = 0; i < count; ++i)
  220. outb(buffer[i], ICEREG1724(ice, MPU_DATA));
  221. }
  222. }
  223. static void vt1724_midi_read(struct snd_ice1712 *ice)
  224. {
  225. struct snd_rawmidi_substream *s;
  226. int count, i;
  227. u8 buffer[32];
  228. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
  229. count = inb(ICEREG1724(ice, MPU_RXFIFO));
  230. if (count > 0) {
  231. count = min(count, 32);
  232. for (i = 0; i < count; ++i)
  233. buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
  234. snd_rawmidi_receive(s, buffer, count);
  235. }
  236. }
  237. static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
  238. u8 flag, int enable)
  239. {
  240. struct snd_ice1712 *ice = substream->rmidi->private_data;
  241. u8 mask;
  242. spin_lock_irq(&ice->reg_lock);
  243. mask = inb(ICEREG1724(ice, IRQMASK));
  244. if (enable)
  245. mask &= ~flag;
  246. else
  247. mask |= flag;
  248. outb(mask, ICEREG1724(ice, IRQMASK));
  249. spin_unlock_irq(&ice->reg_lock);
  250. }
  251. static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
  252. {
  253. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 1);
  254. return 0;
  255. }
  256. static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
  257. {
  258. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
  259. return 0;
  260. }
  261. static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
  262. {
  263. struct snd_ice1712 *ice = s->rmidi->private_data;
  264. unsigned long flags;
  265. spin_lock_irqsave(&ice->reg_lock, flags);
  266. if (up) {
  267. ice->midi_output = 1;
  268. vt1724_midi_write(ice);
  269. } else {
  270. ice->midi_output = 0;
  271. }
  272. spin_unlock_irqrestore(&ice->reg_lock, flags);
  273. }
  274. static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
  275. {
  276. struct snd_ice1712 *ice = s->rmidi->private_data;
  277. unsigned long timeout;
  278. /* 32 bytes should be transmitted in less than about 12 ms */
  279. timeout = jiffies + msecs_to_jiffies(15);
  280. do {
  281. if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
  282. break;
  283. schedule_timeout_uninterruptible(1);
  284. } while (time_after(timeout, jiffies));
  285. }
  286. static struct snd_rawmidi_ops vt1724_midi_output_ops = {
  287. .open = vt1724_midi_output_open,
  288. .close = vt1724_midi_output_close,
  289. .trigger = vt1724_midi_output_trigger,
  290. .drain = vt1724_midi_output_drain,
  291. };
  292. static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
  293. {
  294. vt1724_midi_clear_rx(s->rmidi->private_data);
  295. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
  296. return 0;
  297. }
  298. static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
  299. {
  300. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
  301. return 0;
  302. }
  303. static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
  304. {
  305. struct snd_ice1712 *ice = s->rmidi->private_data;
  306. unsigned long flags;
  307. spin_lock_irqsave(&ice->reg_lock, flags);
  308. if (up) {
  309. ice->midi_input = 1;
  310. vt1724_midi_read(ice);
  311. } else {
  312. ice->midi_input = 0;
  313. }
  314. spin_unlock_irqrestore(&ice->reg_lock, flags);
  315. }
  316. static struct snd_rawmidi_ops vt1724_midi_input_ops = {
  317. .open = vt1724_midi_input_open,
  318. .close = vt1724_midi_input_close,
  319. .trigger = vt1724_midi_input_trigger,
  320. };
  321. /*
  322. * Interrupt handler
  323. */
  324. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
  325. {
  326. struct snd_ice1712 *ice = dev_id;
  327. unsigned char status;
  328. unsigned char status_mask =
  329. VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
  330. int handled = 0;
  331. #ifdef CONFIG_SND_DEBUG
  332. int timeout = 0;
  333. #endif
  334. while (1) {
  335. status = inb(ICEREG1724(ice, IRQSTAT));
  336. status &= status_mask;
  337. if (status == 0)
  338. break;
  339. #ifdef CONFIG_SND_DEBUG
  340. if (++timeout > 10) {
  341. printk(KERN_ERR
  342. "ice1724: Too long irq loop, status = 0x%x\n",
  343. status);
  344. break;
  345. }
  346. #endif
  347. handled = 1;
  348. if (status & VT1724_IRQ_MPU_TX) {
  349. spin_lock(&ice->reg_lock);
  350. if (ice->midi_output)
  351. vt1724_midi_write(ice);
  352. spin_unlock(&ice->reg_lock);
  353. /* Due to mysterical reasons, MPU_TX is always
  354. * generated (and can't be cleared) when a PCM
  355. * playback is going. So let's ignore at the
  356. * next loop.
  357. */
  358. status_mask &= ~VT1724_IRQ_MPU_TX;
  359. }
  360. if (status & VT1724_IRQ_MPU_RX) {
  361. spin_lock(&ice->reg_lock);
  362. if (ice->midi_input)
  363. vt1724_midi_read(ice);
  364. else
  365. vt1724_midi_clear_rx(ice);
  366. spin_unlock(&ice->reg_lock);
  367. }
  368. /* ack MPU irq */
  369. outb(status, ICEREG1724(ice, IRQSTAT));
  370. if (status & VT1724_IRQ_MTPCM) {
  371. /*
  372. * Multi-track PCM
  373. * PCM assignment are:
  374. * Playback DMA0 (M/C) = playback_pro_substream
  375. * Playback DMA1 = playback_con_substream_ds[0]
  376. * Playback DMA2 = playback_con_substream_ds[1]
  377. * Playback DMA3 = playback_con_substream_ds[2]
  378. * Playback DMA4 (SPDIF) = playback_con_substream
  379. * Record DMA0 = capture_pro_substream
  380. * Record DMA1 = capture_con_substream
  381. */
  382. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  383. if (mtstat & VT1724_MULTI_PDMA0) {
  384. if (ice->playback_pro_substream)
  385. snd_pcm_period_elapsed(ice->playback_pro_substream);
  386. }
  387. if (mtstat & VT1724_MULTI_RDMA0) {
  388. if (ice->capture_pro_substream)
  389. snd_pcm_period_elapsed(ice->capture_pro_substream);
  390. }
  391. if (mtstat & VT1724_MULTI_PDMA1) {
  392. if (ice->playback_con_substream_ds[0])
  393. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  394. }
  395. if (mtstat & VT1724_MULTI_PDMA2) {
  396. if (ice->playback_con_substream_ds[1])
  397. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  398. }
  399. if (mtstat & VT1724_MULTI_PDMA3) {
  400. if (ice->playback_con_substream_ds[2])
  401. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  402. }
  403. if (mtstat & VT1724_MULTI_PDMA4) {
  404. if (ice->playback_con_substream)
  405. snd_pcm_period_elapsed(ice->playback_con_substream);
  406. }
  407. if (mtstat & VT1724_MULTI_RDMA1) {
  408. if (ice->capture_con_substream)
  409. snd_pcm_period_elapsed(ice->capture_con_substream);
  410. }
  411. /* ack anyway to avoid freeze */
  412. outb(mtstat, ICEMT1724(ice, IRQ));
  413. /* ought to really handle this properly */
  414. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  415. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  416. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  417. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  418. /* If I don't do this, I get machine lockup due to continual interrupts */
  419. }
  420. }
  421. }
  422. return IRQ_RETVAL(handled);
  423. }
  424. /*
  425. * PCM code - professional part (multitrack)
  426. */
  427. static unsigned int rates[] = {
  428. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  429. 32000, 44100, 48000, 64000, 88200, 96000,
  430. 176400, 192000,
  431. };
  432. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  433. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  434. .list = rates,
  435. .mask = 0,
  436. };
  437. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  438. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  439. .list = rates,
  440. .mask = 0,
  441. };
  442. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  443. .count = ARRAY_SIZE(rates),
  444. .list = rates,
  445. .mask = 0,
  446. };
  447. struct vt1724_pcm_reg {
  448. unsigned int addr; /* ADDR register offset */
  449. unsigned int size; /* SIZE register offset */
  450. unsigned int count; /* COUNT register offset */
  451. unsigned int start; /* start & pause bit */
  452. };
  453. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  454. {
  455. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  456. unsigned char what;
  457. unsigned char old;
  458. struct snd_pcm_substream *s;
  459. what = 0;
  460. snd_pcm_group_for_each_entry(s, substream) {
  461. if (snd_pcm_substream_chip(s) == ice) {
  462. const struct vt1724_pcm_reg *reg;
  463. reg = s->runtime->private_data;
  464. what |= reg->start;
  465. snd_pcm_trigger_done(s, substream);
  466. }
  467. }
  468. switch (cmd) {
  469. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  470. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  471. spin_lock(&ice->reg_lock);
  472. old = inb(ICEMT1724(ice, DMA_PAUSE));
  473. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  474. old |= what;
  475. else
  476. old &= ~what;
  477. outb(old, ICEMT1724(ice, DMA_PAUSE));
  478. spin_unlock(&ice->reg_lock);
  479. break;
  480. case SNDRV_PCM_TRIGGER_START:
  481. case SNDRV_PCM_TRIGGER_STOP:
  482. spin_lock(&ice->reg_lock);
  483. old = inb(ICEMT1724(ice, DMA_CONTROL));
  484. if (cmd == SNDRV_PCM_TRIGGER_START)
  485. old |= what;
  486. else
  487. old &= ~what;
  488. outb(old, ICEMT1724(ice, DMA_CONTROL));
  489. spin_unlock(&ice->reg_lock);
  490. break;
  491. default:
  492. return -EINVAL;
  493. }
  494. return 0;
  495. }
  496. /*
  497. */
  498. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  499. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  500. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  501. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  502. static const unsigned int stdclock_rate_list[16] = {
  503. 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
  504. 22050, 11025, 88200, 176400, 0, 192000, 64000
  505. };
  506. static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
  507. {
  508. unsigned int rate;
  509. rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
  510. return rate;
  511. }
  512. static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
  513. {
  514. int i;
  515. for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
  516. if (stdclock_rate_list[i] == rate) {
  517. outb(i, ICEMT1724(ice, RATE));
  518. return;
  519. }
  520. }
  521. }
  522. static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
  523. unsigned int rate)
  524. {
  525. unsigned char val, old;
  526. /* check MT02 */
  527. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  528. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  529. if (rate > 96000)
  530. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  531. else
  532. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  533. if (val != old) {
  534. outb(val, ICEMT1724(ice, I2S_FORMAT));
  535. /* master clock changed */
  536. return 1;
  537. }
  538. }
  539. /* no change in master clock */
  540. return 0;
  541. }
  542. static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  543. int force)
  544. {
  545. unsigned long flags;
  546. unsigned char mclk_change;
  547. unsigned int i, old_rate;
  548. if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
  549. return;
  550. spin_lock_irqsave(&ice->reg_lock, flags);
  551. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  552. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  553. /* running? we cannot change the rate now... */
  554. spin_unlock_irqrestore(&ice->reg_lock, flags);
  555. return;
  556. }
  557. if (!force && is_pro_rate_locked(ice)) {
  558. spin_unlock_irqrestore(&ice->reg_lock, flags);
  559. return;
  560. }
  561. old_rate = ice->get_rate(ice);
  562. if (force || (old_rate != rate))
  563. ice->set_rate(ice, rate);
  564. else if (rate == ice->cur_rate) {
  565. spin_unlock_irqrestore(&ice->reg_lock, flags);
  566. return;
  567. }
  568. ice->cur_rate = rate;
  569. /* setting master clock */
  570. mclk_change = ice->set_mclk(ice, rate);
  571. spin_unlock_irqrestore(&ice->reg_lock, flags);
  572. if (mclk_change && ice->gpio.i2s_mclk_changed)
  573. ice->gpio.i2s_mclk_changed(ice);
  574. if (ice->gpio.set_pro_rate)
  575. ice->gpio.set_pro_rate(ice, rate);
  576. /* set up codecs */
  577. for (i = 0; i < ice->akm_codecs; i++) {
  578. if (ice->akm[i].ops.set_rate_val)
  579. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  580. }
  581. if (ice->spdif.ops.setup_rate)
  582. ice->spdif.ops.setup_rate(ice, rate);
  583. }
  584. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  585. struct snd_pcm_hw_params *hw_params)
  586. {
  587. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  588. int i, chs;
  589. chs = params_channels(hw_params);
  590. mutex_lock(&ice->open_mutex);
  591. /* mark surround channels */
  592. if (substream == ice->playback_pro_substream) {
  593. /* PDMA0 can be multi-channel up to 8 */
  594. chs = chs / 2 - 1;
  595. for (i = 0; i < chs; i++) {
  596. if (ice->pcm_reserved[i] &&
  597. ice->pcm_reserved[i] != substream) {
  598. mutex_unlock(&ice->open_mutex);
  599. return -EBUSY;
  600. }
  601. ice->pcm_reserved[i] = substream;
  602. }
  603. for (; i < 3; i++) {
  604. if (ice->pcm_reserved[i] == substream)
  605. ice->pcm_reserved[i] = NULL;
  606. }
  607. } else {
  608. for (i = 0; i < 3; i++) {
  609. /* check individual playback stream */
  610. if (ice->playback_con_substream_ds[i] == substream) {
  611. if (ice->pcm_reserved[i] &&
  612. ice->pcm_reserved[i] != substream) {
  613. mutex_unlock(&ice->open_mutex);
  614. return -EBUSY;
  615. }
  616. ice->pcm_reserved[i] = substream;
  617. break;
  618. }
  619. }
  620. }
  621. mutex_unlock(&ice->open_mutex);
  622. snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  623. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  624. }
  625. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  626. {
  627. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  628. int i;
  629. mutex_lock(&ice->open_mutex);
  630. /* unmark surround channels */
  631. for (i = 0; i < 3; i++)
  632. if (ice->pcm_reserved[i] == substream)
  633. ice->pcm_reserved[i] = NULL;
  634. mutex_unlock(&ice->open_mutex);
  635. return snd_pcm_lib_free_pages(substream);
  636. }
  637. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  638. {
  639. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  640. unsigned char val;
  641. unsigned int size;
  642. spin_lock_irq(&ice->reg_lock);
  643. val = (8 - substream->runtime->channels) >> 1;
  644. outb(val, ICEMT1724(ice, BURST));
  645. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  646. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  647. /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
  648. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  649. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  650. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  651. /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
  652. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  653. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  654. spin_unlock_irq(&ice->reg_lock);
  655. /* printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream)); */
  656. return 0;
  657. }
  658. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  659. {
  660. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  661. size_t ptr;
  662. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  663. return 0;
  664. #if 0 /* read PLAYBACK_ADDR */
  665. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  666. if (ptr < substream->runtime->dma_addr) {
  667. snd_printd("ice1724: invalid negative ptr\n");
  668. return 0;
  669. }
  670. ptr -= substream->runtime->dma_addr;
  671. ptr = bytes_to_frames(substream->runtime, ptr);
  672. if (ptr >= substream->runtime->buffer_size) {
  673. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  674. (int)ptr, (int)substream->runtime->period_size);
  675. return 0;
  676. }
  677. #else /* read PLAYBACK_SIZE */
  678. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  679. ptr = (ptr + 1) << 2;
  680. ptr = bytes_to_frames(substream->runtime, ptr);
  681. if (!ptr)
  682. ;
  683. else if (ptr <= substream->runtime->buffer_size)
  684. ptr = substream->runtime->buffer_size - ptr;
  685. else {
  686. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  687. (int)ptr, (int)substream->runtime->buffer_size);
  688. ptr = 0;
  689. }
  690. #endif
  691. return ptr;
  692. }
  693. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  694. {
  695. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  696. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  697. spin_lock_irq(&ice->reg_lock);
  698. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  699. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  700. ice->profi_port + reg->size);
  701. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  702. ice->profi_port + reg->count);
  703. spin_unlock_irq(&ice->reg_lock);
  704. return 0;
  705. }
  706. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  707. {
  708. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  709. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  710. size_t ptr;
  711. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  712. return 0;
  713. #if 0 /* use ADDR register */
  714. ptr = inl(ice->profi_port + reg->addr);
  715. ptr -= substream->runtime->dma_addr;
  716. return bytes_to_frames(substream->runtime, ptr);
  717. #else /* use SIZE register */
  718. ptr = inw(ice->profi_port + reg->size);
  719. ptr = (ptr + 1) << 2;
  720. ptr = bytes_to_frames(substream->runtime, ptr);
  721. if (!ptr)
  722. ;
  723. else if (ptr <= substream->runtime->buffer_size)
  724. ptr = substream->runtime->buffer_size - ptr;
  725. else {
  726. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  727. (int)ptr, (int)substream->runtime->buffer_size);
  728. ptr = 0;
  729. }
  730. return ptr;
  731. #endif
  732. }
  733. static const struct vt1724_pcm_reg vt1724_playback_pro_reg = {
  734. .addr = VT1724_MT_PLAYBACK_ADDR,
  735. .size = VT1724_MT_PLAYBACK_SIZE,
  736. .count = VT1724_MT_PLAYBACK_COUNT,
  737. .start = VT1724_PDMA0_START,
  738. };
  739. static const struct vt1724_pcm_reg vt1724_capture_pro_reg = {
  740. .addr = VT1724_MT_CAPTURE_ADDR,
  741. .size = VT1724_MT_CAPTURE_SIZE,
  742. .count = VT1724_MT_CAPTURE_COUNT,
  743. .start = VT1724_RDMA0_START,
  744. };
  745. static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
  746. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  747. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  748. SNDRV_PCM_INFO_MMAP_VALID |
  749. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  750. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  751. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  752. .rate_min = 8000,
  753. .rate_max = 192000,
  754. .channels_min = 2,
  755. .channels_max = 8,
  756. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  757. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  758. .period_bytes_max = (1UL << 21),
  759. .periods_min = 2,
  760. .periods_max = 1024,
  761. };
  762. static const struct snd_pcm_hardware snd_vt1724_spdif = {
  763. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  764. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  765. SNDRV_PCM_INFO_MMAP_VALID |
  766. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  767. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  768. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  769. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  770. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  771. SNDRV_PCM_RATE_192000),
  772. .rate_min = 32000,
  773. .rate_max = 192000,
  774. .channels_min = 2,
  775. .channels_max = 2,
  776. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  777. .period_bytes_min = 2 * 4 * 2,
  778. .period_bytes_max = (1UL << 18),
  779. .periods_min = 2,
  780. .periods_max = 1024,
  781. };
  782. static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
  783. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  784. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  785. SNDRV_PCM_INFO_MMAP_VALID |
  786. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  787. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  788. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  789. .rate_min = 8000,
  790. .rate_max = 192000,
  791. .channels_min = 2,
  792. .channels_max = 2,
  793. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  794. .period_bytes_min = 2 * 4 * 2,
  795. .period_bytes_max = (1UL << 18),
  796. .periods_min = 2,
  797. .periods_max = 1024,
  798. };
  799. /*
  800. * set rate constraints
  801. */
  802. static void set_std_hw_rates(struct snd_ice1712 *ice)
  803. {
  804. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  805. /* I2S */
  806. /* VT1720 doesn't support more than 96kHz */
  807. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  808. ice->hw_rates = &hw_constraints_rates_192;
  809. else
  810. ice->hw_rates = &hw_constraints_rates_96;
  811. } else {
  812. /* ACLINK */
  813. ice->hw_rates = &hw_constraints_rates_48;
  814. }
  815. }
  816. static int set_rate_constraints(struct snd_ice1712 *ice,
  817. struct snd_pcm_substream *substream)
  818. {
  819. struct snd_pcm_runtime *runtime = substream->runtime;
  820. runtime->hw.rate_min = ice->hw_rates->list[0];
  821. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  822. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  823. return snd_pcm_hw_constraint_list(runtime, 0,
  824. SNDRV_PCM_HW_PARAM_RATE,
  825. ice->hw_rates);
  826. }
  827. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  828. * actually used
  829. */
  830. #define VT1724_BUFFER_ALIGN 0x20
  831. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  832. {
  833. struct snd_pcm_runtime *runtime = substream->runtime;
  834. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  835. int chs, num_indeps;
  836. runtime->private_data = (void *)&vt1724_playback_pro_reg;
  837. ice->playback_pro_substream = substream;
  838. runtime->hw = snd_vt1724_playback_pro;
  839. snd_pcm_set_sync(substream);
  840. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  841. set_rate_constraints(ice, substream);
  842. mutex_lock(&ice->open_mutex);
  843. /* calculate the currently available channels */
  844. num_indeps = ice->num_total_dacs / 2 - 1;
  845. for (chs = 0; chs < num_indeps; chs++) {
  846. if (ice->pcm_reserved[chs])
  847. break;
  848. }
  849. chs = (chs + 1) * 2;
  850. runtime->hw.channels_max = chs;
  851. if (chs > 2) /* channels must be even */
  852. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  853. mutex_unlock(&ice->open_mutex);
  854. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  855. VT1724_BUFFER_ALIGN);
  856. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  857. VT1724_BUFFER_ALIGN);
  858. return 0;
  859. }
  860. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  861. {
  862. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  863. struct snd_pcm_runtime *runtime = substream->runtime;
  864. runtime->private_data = (void *)&vt1724_capture_pro_reg;
  865. ice->capture_pro_substream = substream;
  866. runtime->hw = snd_vt1724_2ch_stereo;
  867. snd_pcm_set_sync(substream);
  868. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  869. set_rate_constraints(ice, substream);
  870. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  871. VT1724_BUFFER_ALIGN);
  872. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  873. VT1724_BUFFER_ALIGN);
  874. return 0;
  875. }
  876. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  877. {
  878. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  879. if (PRO_RATE_RESET)
  880. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  881. ice->playback_pro_substream = NULL;
  882. return 0;
  883. }
  884. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  885. {
  886. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  887. if (PRO_RATE_RESET)
  888. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  889. ice->capture_pro_substream = NULL;
  890. return 0;
  891. }
  892. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  893. .open = snd_vt1724_playback_pro_open,
  894. .close = snd_vt1724_playback_pro_close,
  895. .ioctl = snd_pcm_lib_ioctl,
  896. .hw_params = snd_vt1724_pcm_hw_params,
  897. .hw_free = snd_vt1724_pcm_hw_free,
  898. .prepare = snd_vt1724_playback_pro_prepare,
  899. .trigger = snd_vt1724_pcm_trigger,
  900. .pointer = snd_vt1724_playback_pro_pointer,
  901. };
  902. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  903. .open = snd_vt1724_capture_pro_open,
  904. .close = snd_vt1724_capture_pro_close,
  905. .ioctl = snd_pcm_lib_ioctl,
  906. .hw_params = snd_vt1724_pcm_hw_params,
  907. .hw_free = snd_vt1724_pcm_hw_free,
  908. .prepare = snd_vt1724_pcm_prepare,
  909. .trigger = snd_vt1724_pcm_trigger,
  910. .pointer = snd_vt1724_pcm_pointer,
  911. };
  912. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
  913. {
  914. struct snd_pcm *pcm;
  915. int err;
  916. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  917. if (err < 0)
  918. return err;
  919. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  920. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  921. pcm->private_data = ice;
  922. pcm->info_flags = 0;
  923. strcpy(pcm->name, "ICE1724");
  924. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  925. snd_dma_pci_data(ice->pci),
  926. 256*1024, 256*1024);
  927. ice->pcm_pro = pcm;
  928. return 0;
  929. }
  930. /*
  931. * SPDIF PCM
  932. */
  933. static const struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
  934. .addr = VT1724_MT_PDMA4_ADDR,
  935. .size = VT1724_MT_PDMA4_SIZE,
  936. .count = VT1724_MT_PDMA4_COUNT,
  937. .start = VT1724_PDMA4_START,
  938. };
  939. static const struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
  940. .addr = VT1724_MT_RDMA1_ADDR,
  941. .size = VT1724_MT_RDMA1_SIZE,
  942. .count = VT1724_MT_RDMA1_COUNT,
  943. .start = VT1724_RDMA1_START,
  944. };
  945. /* update spdif control bits; call with reg_lock */
  946. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  947. {
  948. unsigned char cbit, disabled;
  949. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  950. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  951. if (cbit != disabled)
  952. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  953. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  954. if (cbit != disabled)
  955. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  956. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  957. }
  958. /* update SPDIF control bits according to the given rate */
  959. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  960. {
  961. unsigned int val, nval;
  962. unsigned long flags;
  963. spin_lock_irqsave(&ice->reg_lock, flags);
  964. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  965. nval &= ~(7 << 12);
  966. switch (rate) {
  967. case 44100: break;
  968. case 48000: nval |= 2 << 12; break;
  969. case 32000: nval |= 3 << 12; break;
  970. case 88200: nval |= 4 << 12; break;
  971. case 96000: nval |= 5 << 12; break;
  972. case 192000: nval |= 6 << 12; break;
  973. case 176400: nval |= 7 << 12; break;
  974. }
  975. if (val != nval)
  976. update_spdif_bits(ice, nval);
  977. spin_unlock_irqrestore(&ice->reg_lock, flags);
  978. }
  979. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  980. {
  981. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  982. if (!ice->force_pdma4)
  983. update_spdif_rate(ice, substream->runtime->rate);
  984. return snd_vt1724_pcm_prepare(substream);
  985. }
  986. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  987. {
  988. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  989. struct snd_pcm_runtime *runtime = substream->runtime;
  990. runtime->private_data = (void *)&vt1724_playback_spdif_reg;
  991. ice->playback_con_substream = substream;
  992. if (ice->force_pdma4) {
  993. runtime->hw = snd_vt1724_2ch_stereo;
  994. set_rate_constraints(ice, substream);
  995. } else
  996. runtime->hw = snd_vt1724_spdif;
  997. snd_pcm_set_sync(substream);
  998. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  999. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1000. VT1724_BUFFER_ALIGN);
  1001. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1002. VT1724_BUFFER_ALIGN);
  1003. if (ice->spdif.ops.open)
  1004. ice->spdif.ops.open(ice, substream);
  1005. return 0;
  1006. }
  1007. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  1008. {
  1009. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1010. if (PRO_RATE_RESET)
  1011. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1012. ice->playback_con_substream = NULL;
  1013. if (ice->spdif.ops.close)
  1014. ice->spdif.ops.close(ice, substream);
  1015. return 0;
  1016. }
  1017. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  1018. {
  1019. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1020. struct snd_pcm_runtime *runtime = substream->runtime;
  1021. runtime->private_data = (void *)&vt1724_capture_spdif_reg;
  1022. ice->capture_con_substream = substream;
  1023. if (ice->force_rdma1) {
  1024. runtime->hw = snd_vt1724_2ch_stereo;
  1025. set_rate_constraints(ice, substream);
  1026. } else
  1027. runtime->hw = snd_vt1724_spdif;
  1028. snd_pcm_set_sync(substream);
  1029. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1030. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1031. VT1724_BUFFER_ALIGN);
  1032. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1033. VT1724_BUFFER_ALIGN);
  1034. if (ice->spdif.ops.open)
  1035. ice->spdif.ops.open(ice, substream);
  1036. return 0;
  1037. }
  1038. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  1039. {
  1040. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1041. if (PRO_RATE_RESET)
  1042. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1043. ice->capture_con_substream = NULL;
  1044. if (ice->spdif.ops.close)
  1045. ice->spdif.ops.close(ice, substream);
  1046. return 0;
  1047. }
  1048. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  1049. .open = snd_vt1724_playback_spdif_open,
  1050. .close = snd_vt1724_playback_spdif_close,
  1051. .ioctl = snd_pcm_lib_ioctl,
  1052. .hw_params = snd_vt1724_pcm_hw_params,
  1053. .hw_free = snd_vt1724_pcm_hw_free,
  1054. .prepare = snd_vt1724_playback_spdif_prepare,
  1055. .trigger = snd_vt1724_pcm_trigger,
  1056. .pointer = snd_vt1724_pcm_pointer,
  1057. };
  1058. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  1059. .open = snd_vt1724_capture_spdif_open,
  1060. .close = snd_vt1724_capture_spdif_close,
  1061. .ioctl = snd_pcm_lib_ioctl,
  1062. .hw_params = snd_vt1724_pcm_hw_params,
  1063. .hw_free = snd_vt1724_pcm_hw_free,
  1064. .prepare = snd_vt1724_pcm_prepare,
  1065. .trigger = snd_vt1724_pcm_trigger,
  1066. .pointer = snd_vt1724_pcm_pointer,
  1067. };
  1068. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
  1069. {
  1070. char *name;
  1071. struct snd_pcm *pcm;
  1072. int play, capt;
  1073. int err;
  1074. if (ice->force_pdma4 ||
  1075. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  1076. play = 1;
  1077. ice->has_spdif = 1;
  1078. } else
  1079. play = 0;
  1080. if (ice->force_rdma1 ||
  1081. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  1082. capt = 1;
  1083. ice->has_spdif = 1;
  1084. } else
  1085. capt = 0;
  1086. if (!play && !capt)
  1087. return 0; /* no spdif device */
  1088. if (ice->force_pdma4 || ice->force_rdma1)
  1089. name = "ICE1724 Secondary";
  1090. else
  1091. name = "IEC1724 IEC958";
  1092. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  1093. if (err < 0)
  1094. return err;
  1095. if (play)
  1096. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1097. &snd_vt1724_playback_spdif_ops);
  1098. if (capt)
  1099. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  1100. &snd_vt1724_capture_spdif_ops);
  1101. pcm->private_data = ice;
  1102. pcm->info_flags = 0;
  1103. strcpy(pcm->name, name);
  1104. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1105. snd_dma_pci_data(ice->pci),
  1106. 64*1024, 64*1024);
  1107. ice->pcm = pcm;
  1108. return 0;
  1109. }
  1110. /*
  1111. * independent surround PCMs
  1112. */
  1113. static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  1114. {
  1115. .addr = VT1724_MT_PDMA1_ADDR,
  1116. .size = VT1724_MT_PDMA1_SIZE,
  1117. .count = VT1724_MT_PDMA1_COUNT,
  1118. .start = VT1724_PDMA1_START,
  1119. },
  1120. {
  1121. .addr = VT1724_MT_PDMA2_ADDR,
  1122. .size = VT1724_MT_PDMA2_SIZE,
  1123. .count = VT1724_MT_PDMA2_COUNT,
  1124. .start = VT1724_PDMA2_START,
  1125. },
  1126. {
  1127. .addr = VT1724_MT_PDMA3_ADDR,
  1128. .size = VT1724_MT_PDMA3_SIZE,
  1129. .count = VT1724_MT_PDMA3_COUNT,
  1130. .start = VT1724_PDMA3_START,
  1131. },
  1132. };
  1133. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  1134. {
  1135. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1136. unsigned char val;
  1137. spin_lock_irq(&ice->reg_lock);
  1138. val = 3 - substream->number;
  1139. if (inb(ICEMT1724(ice, BURST)) < val)
  1140. outb(val, ICEMT1724(ice, BURST));
  1141. spin_unlock_irq(&ice->reg_lock);
  1142. return snd_vt1724_pcm_prepare(substream);
  1143. }
  1144. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  1145. {
  1146. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1147. struct snd_pcm_runtime *runtime = substream->runtime;
  1148. mutex_lock(&ice->open_mutex);
  1149. /* already used by PDMA0? */
  1150. if (ice->pcm_reserved[substream->number]) {
  1151. mutex_unlock(&ice->open_mutex);
  1152. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1153. }
  1154. mutex_unlock(&ice->open_mutex);
  1155. runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
  1156. ice->playback_con_substream_ds[substream->number] = substream;
  1157. runtime->hw = snd_vt1724_2ch_stereo;
  1158. snd_pcm_set_sync(substream);
  1159. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1160. set_rate_constraints(ice, substream);
  1161. return 0;
  1162. }
  1163. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1164. {
  1165. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1166. if (PRO_RATE_RESET)
  1167. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1168. ice->playback_con_substream_ds[substream->number] = NULL;
  1169. ice->pcm_reserved[substream->number] = NULL;
  1170. return 0;
  1171. }
  1172. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1173. .open = snd_vt1724_playback_indep_open,
  1174. .close = snd_vt1724_playback_indep_close,
  1175. .ioctl = snd_pcm_lib_ioctl,
  1176. .hw_params = snd_vt1724_pcm_hw_params,
  1177. .hw_free = snd_vt1724_pcm_hw_free,
  1178. .prepare = snd_vt1724_playback_indep_prepare,
  1179. .trigger = snd_vt1724_pcm_trigger,
  1180. .pointer = snd_vt1724_pcm_pointer,
  1181. };
  1182. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
  1183. {
  1184. struct snd_pcm *pcm;
  1185. int play;
  1186. int err;
  1187. play = ice->num_total_dacs / 2 - 1;
  1188. if (play <= 0)
  1189. return 0;
  1190. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1191. if (err < 0)
  1192. return err;
  1193. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1194. &snd_vt1724_playback_indep_ops);
  1195. pcm->private_data = ice;
  1196. pcm->info_flags = 0;
  1197. strcpy(pcm->name, "ICE1724 Surround PCM");
  1198. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1199. snd_dma_pci_data(ice->pci),
  1200. 64*1024, 64*1024);
  1201. ice->pcm_ds = pcm;
  1202. return 0;
  1203. }
  1204. /*
  1205. * Mixer section
  1206. */
  1207. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
  1208. {
  1209. int err;
  1210. if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1211. struct snd_ac97_bus *pbus;
  1212. struct snd_ac97_template ac97;
  1213. static struct snd_ac97_bus_ops ops = {
  1214. .write = snd_vt1724_ac97_write,
  1215. .read = snd_vt1724_ac97_read,
  1216. };
  1217. /* cold reset */
  1218. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1219. mdelay(5); /* FIXME */
  1220. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1221. err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
  1222. if (err < 0)
  1223. return err;
  1224. memset(&ac97, 0, sizeof(ac97));
  1225. ac97.private_data = ice;
  1226. err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
  1227. if (err < 0)
  1228. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1229. else
  1230. return 0;
  1231. }
  1232. /* I2S mixer only */
  1233. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1234. return 0;
  1235. }
  1236. /*
  1237. *
  1238. */
  1239. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1240. {
  1241. return (unsigned int)ice->eeprom.data[idx] | \
  1242. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1243. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1244. }
  1245. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1246. struct snd_info_buffer *buffer)
  1247. {
  1248. struct snd_ice1712 *ice = entry->private_data;
  1249. unsigned int idx;
  1250. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1251. snd_iprintf(buffer, "EEPROM:\n");
  1252. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1253. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1254. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1255. snd_iprintf(buffer, " System Config : 0x%x\n",
  1256. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1257. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1258. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1259. snd_iprintf(buffer, " I2S : 0x%x\n",
  1260. ice->eeprom.data[ICE_EEP2_I2S]);
  1261. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1262. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1263. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1264. ice->eeprom.gpiodir);
  1265. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1266. ice->eeprom.gpiomask);
  1267. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1268. ice->eeprom.gpiostate);
  1269. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1270. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1271. idx, ice->eeprom.data[idx]);
  1272. snd_iprintf(buffer, "\nRegisters:\n");
  1273. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1274. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1275. for (idx = 0x0; idx < 0x20 ; idx++)
  1276. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1277. idx, inb(ice->port+idx));
  1278. for (idx = 0x0; idx < 0x30 ; idx++)
  1279. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1280. idx, inb(ice->profi_port+idx));
  1281. }
  1282. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice)
  1283. {
  1284. struct snd_info_entry *entry;
  1285. if (!snd_card_proc_new(ice->card, "ice1724", &entry))
  1286. snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
  1287. }
  1288. /*
  1289. *
  1290. */
  1291. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1292. struct snd_ctl_elem_info *uinfo)
  1293. {
  1294. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1295. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1296. return 0;
  1297. }
  1298. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1299. struct snd_ctl_elem_value *ucontrol)
  1300. {
  1301. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1302. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1303. return 0;
  1304. }
  1305. static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1306. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1307. .name = "ICE1724 EEPROM",
  1308. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1309. .info = snd_vt1724_eeprom_info,
  1310. .get = snd_vt1724_eeprom_get
  1311. };
  1312. /*
  1313. */
  1314. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1315. struct snd_ctl_elem_info *uinfo)
  1316. {
  1317. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1318. uinfo->count = 1;
  1319. return 0;
  1320. }
  1321. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1322. {
  1323. unsigned int val, rbits;
  1324. val = diga->status[0] & 0x03; /* professional, non-audio */
  1325. if (val & 0x01) {
  1326. /* professional */
  1327. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1328. IEC958_AES0_PRO_EMPHASIS_5015)
  1329. val |= 1U << 3;
  1330. rbits = (diga->status[4] >> 3) & 0x0f;
  1331. if (rbits) {
  1332. switch (rbits) {
  1333. case 2: val |= 5 << 12; break; /* 96k */
  1334. case 3: val |= 6 << 12; break; /* 192k */
  1335. case 10: val |= 4 << 12; break; /* 88.2k */
  1336. case 11: val |= 7 << 12; break; /* 176.4k */
  1337. }
  1338. } else {
  1339. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1340. case IEC958_AES0_PRO_FS_44100:
  1341. break;
  1342. case IEC958_AES0_PRO_FS_32000:
  1343. val |= 3U << 12;
  1344. break;
  1345. default:
  1346. val |= 2U << 12;
  1347. break;
  1348. }
  1349. }
  1350. } else {
  1351. /* consumer */
  1352. val |= diga->status[1] & 0x04; /* copyright */
  1353. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1354. IEC958_AES0_CON_EMPHASIS_5015)
  1355. val |= 1U << 3;
  1356. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1357. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1358. }
  1359. return val;
  1360. }
  1361. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1362. {
  1363. memset(diga->status, 0, sizeof(diga->status));
  1364. diga->status[0] = val & 0x03; /* professional, non-audio */
  1365. if (val & 0x01) {
  1366. /* professional */
  1367. if (val & (1U << 3))
  1368. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1369. switch ((val >> 12) & 0x7) {
  1370. case 0:
  1371. break;
  1372. case 2:
  1373. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1374. break;
  1375. default:
  1376. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1377. break;
  1378. }
  1379. } else {
  1380. /* consumer */
  1381. diga->status[0] |= val & (1U << 2); /* copyright */
  1382. if (val & (1U << 3))
  1383. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1384. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1385. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1386. }
  1387. }
  1388. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1389. struct snd_ctl_elem_value *ucontrol)
  1390. {
  1391. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1392. unsigned int val;
  1393. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1394. decode_spdif_bits(&ucontrol->value.iec958, val);
  1395. return 0;
  1396. }
  1397. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1398. struct snd_ctl_elem_value *ucontrol)
  1399. {
  1400. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1401. unsigned int val, old;
  1402. val = encode_spdif_bits(&ucontrol->value.iec958);
  1403. spin_lock_irq(&ice->reg_lock);
  1404. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1405. if (val != old)
  1406. update_spdif_bits(ice, val);
  1407. spin_unlock_irq(&ice->reg_lock);
  1408. return val != old;
  1409. }
  1410. static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1411. {
  1412. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1413. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
  1414. .info = snd_vt1724_spdif_info,
  1415. .get = snd_vt1724_spdif_default_get,
  1416. .put = snd_vt1724_spdif_default_put
  1417. };
  1418. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1419. struct snd_ctl_elem_value *ucontrol)
  1420. {
  1421. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1422. IEC958_AES0_PROFESSIONAL |
  1423. IEC958_AES0_CON_NOT_COPYRIGHT |
  1424. IEC958_AES0_CON_EMPHASIS;
  1425. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1426. IEC958_AES1_CON_CATEGORY;
  1427. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1428. return 0;
  1429. }
  1430. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1431. struct snd_ctl_elem_value *ucontrol)
  1432. {
  1433. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1434. IEC958_AES0_PROFESSIONAL |
  1435. IEC958_AES0_PRO_FS |
  1436. IEC958_AES0_PRO_EMPHASIS;
  1437. return 0;
  1438. }
  1439. static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1440. {
  1441. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1442. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1443. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
  1444. .info = snd_vt1724_spdif_info,
  1445. .get = snd_vt1724_spdif_maskc_get,
  1446. };
  1447. static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1448. {
  1449. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1450. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1451. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
  1452. .info = snd_vt1724_spdif_info,
  1453. .get = snd_vt1724_spdif_maskp_get,
  1454. };
  1455. #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
  1456. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1457. struct snd_ctl_elem_value *ucontrol)
  1458. {
  1459. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1460. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1461. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1462. return 0;
  1463. }
  1464. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1465. struct snd_ctl_elem_value *ucontrol)
  1466. {
  1467. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1468. unsigned char old, val;
  1469. spin_lock_irq(&ice->reg_lock);
  1470. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1471. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1472. if (ucontrol->value.integer.value[0])
  1473. val |= VT1724_CFG_SPDIF_OUT_EN;
  1474. if (old != val)
  1475. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1476. spin_unlock_irq(&ice->reg_lock);
  1477. return old != val;
  1478. }
  1479. static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1480. {
  1481. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1482. /* FIXME: the following conflict with IEC958 Playback Route */
  1483. /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
  1484. .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
  1485. .info = snd_vt1724_spdif_sw_info,
  1486. .get = snd_vt1724_spdif_sw_get,
  1487. .put = snd_vt1724_spdif_sw_put
  1488. };
  1489. #if 0 /* NOT USED YET */
  1490. /*
  1491. * GPIO access from extern
  1492. */
  1493. #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
  1494. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1495. struct snd_ctl_elem_value *ucontrol)
  1496. {
  1497. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1498. int shift = kcontrol->private_value & 0xff;
  1499. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1500. snd_ice1712_save_gpio_status(ice);
  1501. ucontrol->value.integer.value[0] =
  1502. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1503. snd_ice1712_restore_gpio_status(ice);
  1504. return 0;
  1505. }
  1506. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1507. struct snd_ctl_elem_value *ucontrol)
  1508. {
  1509. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1510. int shift = kcontrol->private_value & 0xff;
  1511. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1512. unsigned int val, nval;
  1513. if (kcontrol->private_value & (1 << 31))
  1514. return -EPERM;
  1515. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1516. snd_ice1712_save_gpio_status(ice);
  1517. val = snd_ice1712_gpio_read(ice);
  1518. nval |= val & ~(1 << shift);
  1519. if (val != nval)
  1520. snd_ice1712_gpio_write(ice, nval);
  1521. snd_ice1712_restore_gpio_status(ice);
  1522. return val != nval;
  1523. }
  1524. #endif /* NOT USED YET */
  1525. /*
  1526. * rate
  1527. */
  1528. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1529. struct snd_ctl_elem_info *uinfo)
  1530. {
  1531. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1532. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1533. uinfo->count = 1;
  1534. uinfo->value.enumerated.items = ice->hw_rates->count + 1;
  1535. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1536. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1537. if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
  1538. strcpy(uinfo->value.enumerated.name, "IEC958 Input");
  1539. else
  1540. sprintf(uinfo->value.enumerated.name, "%d",
  1541. ice->hw_rates->list[uinfo->value.enumerated.item]);
  1542. return 0;
  1543. }
  1544. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1545. struct snd_ctl_elem_value *ucontrol)
  1546. {
  1547. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1548. unsigned int i, rate;
  1549. spin_lock_irq(&ice->reg_lock);
  1550. if (ice->is_spdif_master(ice)) {
  1551. ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
  1552. } else {
  1553. rate = ice->get_rate(ice);
  1554. ucontrol->value.enumerated.item[0] = 0;
  1555. for (i = 0; i < ice->hw_rates->count; i++) {
  1556. if (ice->hw_rates->list[i] == rate) {
  1557. ucontrol->value.enumerated.item[0] = i;
  1558. break;
  1559. }
  1560. }
  1561. }
  1562. spin_unlock_irq(&ice->reg_lock);
  1563. return 0;
  1564. }
  1565. /* setting clock to external - SPDIF */
  1566. static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
  1567. {
  1568. unsigned char oval;
  1569. unsigned char i2s_oval;
  1570. oval = inb(ICEMT1724(ice, RATE));
  1571. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1572. /* setting 256fs */
  1573. i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
  1574. outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
  1575. }
  1576. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1577. struct snd_ctl_elem_value *ucontrol)
  1578. {
  1579. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1580. unsigned int old_rate, new_rate;
  1581. unsigned int item = ucontrol->value.enumerated.item[0];
  1582. unsigned int spdif = ice->hw_rates->count;
  1583. if (item > spdif)
  1584. return -EINVAL;
  1585. spin_lock_irq(&ice->reg_lock);
  1586. if (ice->is_spdif_master(ice))
  1587. old_rate = 0;
  1588. else
  1589. old_rate = ice->get_rate(ice);
  1590. if (item == spdif) {
  1591. /* switching to external clock via SPDIF */
  1592. ice->set_spdif_clock(ice);
  1593. new_rate = 0;
  1594. } else {
  1595. /* internal on-card clock */
  1596. new_rate = ice->hw_rates->list[item];
  1597. ice->pro_rate_default = new_rate;
  1598. spin_unlock_irq(&ice->reg_lock);
  1599. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
  1600. spin_lock_irq(&ice->reg_lock);
  1601. }
  1602. spin_unlock_irq(&ice->reg_lock);
  1603. /* the first reset to the SPDIF master mode? */
  1604. if (old_rate != new_rate && !new_rate) {
  1605. /* notify akm chips as well */
  1606. unsigned int i;
  1607. if (ice->gpio.set_pro_rate)
  1608. ice->gpio.set_pro_rate(ice, 0);
  1609. for (i = 0; i < ice->akm_codecs; i++) {
  1610. if (ice->akm[i].ops.set_rate_val)
  1611. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1612. }
  1613. }
  1614. return old_rate != new_rate;
  1615. }
  1616. static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1617. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1618. .name = "Multi Track Internal Clock",
  1619. .info = snd_vt1724_pro_internal_clock_info,
  1620. .get = snd_vt1724_pro_internal_clock_get,
  1621. .put = snd_vt1724_pro_internal_clock_put
  1622. };
  1623. #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
  1624. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1625. struct snd_ctl_elem_value *ucontrol)
  1626. {
  1627. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1628. return 0;
  1629. }
  1630. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1631. struct snd_ctl_elem_value *ucontrol)
  1632. {
  1633. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1634. int change = 0, nval;
  1635. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1636. spin_lock_irq(&ice->reg_lock);
  1637. change = PRO_RATE_LOCKED != nval;
  1638. PRO_RATE_LOCKED = nval;
  1639. spin_unlock_irq(&ice->reg_lock);
  1640. return change;
  1641. }
  1642. static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1643. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1644. .name = "Multi Track Rate Locking",
  1645. .info = snd_vt1724_pro_rate_locking_info,
  1646. .get = snd_vt1724_pro_rate_locking_get,
  1647. .put = snd_vt1724_pro_rate_locking_put
  1648. };
  1649. #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
  1650. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1651. struct snd_ctl_elem_value *ucontrol)
  1652. {
  1653. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1654. return 0;
  1655. }
  1656. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1657. struct snd_ctl_elem_value *ucontrol)
  1658. {
  1659. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1660. int change = 0, nval;
  1661. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1662. spin_lock_irq(&ice->reg_lock);
  1663. change = PRO_RATE_RESET != nval;
  1664. PRO_RATE_RESET = nval;
  1665. spin_unlock_irq(&ice->reg_lock);
  1666. return change;
  1667. }
  1668. static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1669. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1670. .name = "Multi Track Rate Reset",
  1671. .info = snd_vt1724_pro_rate_reset_info,
  1672. .get = snd_vt1724_pro_rate_reset_get,
  1673. .put = snd_vt1724_pro_rate_reset_put
  1674. };
  1675. /*
  1676. * routing
  1677. */
  1678. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1679. struct snd_ctl_elem_info *uinfo)
  1680. {
  1681. static char *texts[] = {
  1682. "PCM Out", /* 0 */
  1683. "H/W In 0", "H/W In 1", /* 1-2 */
  1684. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1685. };
  1686. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1687. uinfo->count = 1;
  1688. uinfo->value.enumerated.items = 5;
  1689. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1690. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1691. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1692. return 0;
  1693. }
  1694. static inline int analog_route_shift(int idx)
  1695. {
  1696. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1697. }
  1698. static inline int digital_route_shift(int idx)
  1699. {
  1700. return idx * 3;
  1701. }
  1702. static int get_route_val(struct snd_ice1712 *ice, int shift)
  1703. {
  1704. unsigned long val;
  1705. unsigned char eitem;
  1706. static const unsigned char xlate[8] = {
  1707. 0, 255, 1, 2, 255, 255, 3, 4,
  1708. };
  1709. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1710. val >>= shift;
  1711. val &= 7; /* we now have 3 bits per output */
  1712. eitem = xlate[val];
  1713. if (eitem == 255) {
  1714. snd_BUG();
  1715. return 0;
  1716. }
  1717. return eitem;
  1718. }
  1719. static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
  1720. {
  1721. unsigned int old_val, nval;
  1722. int change;
  1723. static const unsigned char xroute[8] = {
  1724. 0, /* PCM */
  1725. 2, /* PSDIN0 Left */
  1726. 3, /* PSDIN0 Right */
  1727. 6, /* SPDIN Left */
  1728. 7, /* SPDIN Right */
  1729. };
  1730. nval = xroute[val % 5];
  1731. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1732. val &= ~(0x07 << shift);
  1733. val |= nval << shift;
  1734. change = val != old_val;
  1735. if (change)
  1736. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1737. return change;
  1738. }
  1739. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1740. struct snd_ctl_elem_value *ucontrol)
  1741. {
  1742. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1743. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1744. ucontrol->value.enumerated.item[0] =
  1745. get_route_val(ice, analog_route_shift(idx));
  1746. return 0;
  1747. }
  1748. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1749. struct snd_ctl_elem_value *ucontrol)
  1750. {
  1751. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1752. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1753. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1754. analog_route_shift(idx));
  1755. }
  1756. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1757. struct snd_ctl_elem_value *ucontrol)
  1758. {
  1759. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1760. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1761. ucontrol->value.enumerated.item[0] =
  1762. get_route_val(ice, digital_route_shift(idx));
  1763. return 0;
  1764. }
  1765. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1766. struct snd_ctl_elem_value *ucontrol)
  1767. {
  1768. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1769. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1770. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1771. digital_route_shift(idx));
  1772. }
  1773. static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
  1774. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1775. .name = "H/W Playback Route",
  1776. .info = snd_vt1724_pro_route_info,
  1777. .get = snd_vt1724_pro_route_analog_get,
  1778. .put = snd_vt1724_pro_route_analog_put,
  1779. };
  1780. static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1781. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1782. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
  1783. .info = snd_vt1724_pro_route_info,
  1784. .get = snd_vt1724_pro_route_spdif_get,
  1785. .put = snd_vt1724_pro_route_spdif_put,
  1786. .count = 2,
  1787. };
  1788. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1789. struct snd_ctl_elem_info *uinfo)
  1790. {
  1791. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1792. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1793. uinfo->value.integer.min = 0;
  1794. uinfo->value.integer.max = 255;
  1795. return 0;
  1796. }
  1797. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1798. struct snd_ctl_elem_value *ucontrol)
  1799. {
  1800. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1801. int idx;
  1802. spin_lock_irq(&ice->reg_lock);
  1803. for (idx = 0; idx < 22; idx++) {
  1804. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1805. ucontrol->value.integer.value[idx] =
  1806. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1807. }
  1808. spin_unlock_irq(&ice->reg_lock);
  1809. return 0;
  1810. }
  1811. static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1812. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1813. .name = "Multi Track Peak",
  1814. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1815. .info = snd_vt1724_pro_peak_info,
  1816. .get = snd_vt1724_pro_peak_get
  1817. };
  1818. /*
  1819. *
  1820. */
  1821. static struct snd_ice1712_card_info no_matched __devinitdata;
  1822. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1823. snd_vt1724_revo_cards,
  1824. snd_vt1724_amp_cards,
  1825. snd_vt1724_aureon_cards,
  1826. snd_vt1720_mobo_cards,
  1827. snd_vt1720_pontis_cards,
  1828. snd_vt1724_prodigy_hifi_cards,
  1829. snd_vt1724_prodigy192_cards,
  1830. snd_vt1724_juli_cards,
  1831. snd_vt1724_phase_cards,
  1832. snd_vt1724_wtm_cards,
  1833. snd_vt1724_se_cards,
  1834. NULL,
  1835. };
  1836. /*
  1837. */
  1838. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1839. {
  1840. int t = 0x10000;
  1841. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1842. ;
  1843. if (t == -1)
  1844. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1845. }
  1846. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1847. unsigned char dev, unsigned char addr)
  1848. {
  1849. unsigned char val;
  1850. mutex_lock(&ice->i2c_mutex);
  1851. wait_i2c_busy(ice);
  1852. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1853. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1854. wait_i2c_busy(ice);
  1855. val = inb(ICEREG1724(ice, I2C_DATA));
  1856. mutex_unlock(&ice->i2c_mutex);
  1857. /* printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val); */
  1858. return val;
  1859. }
  1860. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  1861. unsigned char dev, unsigned char addr, unsigned char data)
  1862. {
  1863. mutex_lock(&ice->i2c_mutex);
  1864. wait_i2c_busy(ice);
  1865. /* printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data); */
  1866. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1867. outb(data, ICEREG1724(ice, I2C_DATA));
  1868. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1869. wait_i2c_busy(ice);
  1870. mutex_unlock(&ice->i2c_mutex);
  1871. }
  1872. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  1873. const char *modelname)
  1874. {
  1875. const int dev = 0xa0; /* EEPROM device address */
  1876. unsigned int i, size;
  1877. struct snd_ice1712_card_info * const *tbl, *c;
  1878. if (!modelname || !*modelname) {
  1879. ice->eeprom.subvendor = 0;
  1880. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1881. ice->eeprom.subvendor =
  1882. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1883. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1884. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1885. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1886. if (ice->eeprom.subvendor == 0 ||
  1887. ice->eeprom.subvendor == (unsigned int)-1) {
  1888. /* invalid subvendor from EEPROM, try the PCI
  1889. * subststem ID instead
  1890. */
  1891. u16 vendor, device;
  1892. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  1893. &vendor);
  1894. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1895. ice->eeprom.subvendor =
  1896. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1897. if (ice->eeprom.subvendor == 0 ||
  1898. ice->eeprom.subvendor == (unsigned int)-1) {
  1899. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1900. return -ENXIO;
  1901. }
  1902. }
  1903. }
  1904. for (tbl = card_tables; *tbl; tbl++) {
  1905. for (c = *tbl; c->subvendor; c++) {
  1906. if (modelname && c->model &&
  1907. !strcmp(modelname, c->model)) {
  1908. printk(KERN_INFO "ice1724: Using board model %s\n",
  1909. c->name);
  1910. ice->eeprom.subvendor = c->subvendor;
  1911. } else if (c->subvendor != ice->eeprom.subvendor)
  1912. continue;
  1913. if (!c->eeprom_size || !c->eeprom_data)
  1914. goto found;
  1915. /* if the EEPROM is given by the driver, use it */
  1916. snd_printdd("using the defined eeprom..\n");
  1917. ice->eeprom.version = 2;
  1918. ice->eeprom.size = c->eeprom_size + 6;
  1919. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1920. goto read_skipped;
  1921. }
  1922. }
  1923. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  1924. ice->eeprom.subvendor);
  1925. found:
  1926. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1927. if (ice->eeprom.size < 6)
  1928. ice->eeprom.size = 32;
  1929. else if (ice->eeprom.size > 32) {
  1930. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  1931. ice->eeprom.size);
  1932. return -EIO;
  1933. }
  1934. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1935. if (ice->eeprom.version != 2)
  1936. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  1937. ice->eeprom.version);
  1938. size = ice->eeprom.size - 6;
  1939. for (i = 0; i < size; i++)
  1940. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1941. read_skipped:
  1942. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1943. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1944. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  1945. return 0;
  1946. }
  1947. static void __devinit snd_vt1724_chip_reset(struct snd_ice1712 *ice)
  1948. {
  1949. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  1950. msleep(10);
  1951. outb(0, ICEREG1724(ice, CONTROL));
  1952. msleep(10);
  1953. }
  1954. static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
  1955. {
  1956. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  1957. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  1958. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  1959. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  1960. ice->gpio.write_mask = ice->eeprom.gpiomask;
  1961. ice->gpio.direction = ice->eeprom.gpiodir;
  1962. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  1963. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  1964. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  1965. outb(0, ICEREG1724(ice, POWERDOWN));
  1966. return 0;
  1967. }
  1968. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  1969. {
  1970. int err;
  1971. struct snd_kcontrol *kctl;
  1972. if (snd_BUG_ON(!ice->pcm))
  1973. return -EIO;
  1974. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  1975. if (err < 0)
  1976. return err;
  1977. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  1978. if (err < 0)
  1979. return err;
  1980. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  1981. if (err < 0)
  1982. return err;
  1983. kctl->id.device = ice->pcm->device;
  1984. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  1985. if (err < 0)
  1986. return err;
  1987. kctl->id.device = ice->pcm->device;
  1988. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  1989. if (err < 0)
  1990. return err;
  1991. kctl->id.device = ice->pcm->device;
  1992. #if 0 /* use default only */
  1993. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  1994. if (err < 0)
  1995. return err;
  1996. kctl->id.device = ice->pcm->device;
  1997. ice->spdif.stream_ctl = kctl;
  1998. #endif
  1999. return 0;
  2000. }
  2001. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  2002. {
  2003. int err;
  2004. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  2005. if (err < 0)
  2006. return err;
  2007. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  2008. if (err < 0)
  2009. return err;
  2010. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  2011. if (err < 0)
  2012. return err;
  2013. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  2014. if (err < 0)
  2015. return err;
  2016. if (ice->num_total_dacs > 0) {
  2017. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  2018. tmp.count = ice->num_total_dacs;
  2019. if (ice->vt1720 && tmp.count > 2)
  2020. tmp.count = 2;
  2021. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  2022. if (err < 0)
  2023. return err;
  2024. }
  2025. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  2026. if (err < 0)
  2027. return err;
  2028. return 0;
  2029. }
  2030. static int snd_vt1724_free(struct snd_ice1712 *ice)
  2031. {
  2032. if (!ice->port)
  2033. goto __hw_end;
  2034. /* mask all interrupts */
  2035. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  2036. outb(0xff, ICEREG1724(ice, IRQMASK));
  2037. /* --- */
  2038. __hw_end:
  2039. if (ice->irq >= 0)
  2040. free_irq(ice->irq, ice);
  2041. pci_release_regions(ice->pci);
  2042. snd_ice1712_akm4xxx_free(ice);
  2043. pci_disable_device(ice->pci);
  2044. kfree(ice->spec);
  2045. kfree(ice);
  2046. return 0;
  2047. }
  2048. static int snd_vt1724_dev_free(struct snd_device *device)
  2049. {
  2050. struct snd_ice1712 *ice = device->device_data;
  2051. return snd_vt1724_free(ice);
  2052. }
  2053. static int __devinit snd_vt1724_create(struct snd_card *card,
  2054. struct pci_dev *pci,
  2055. const char *modelname,
  2056. struct snd_ice1712 **r_ice1712)
  2057. {
  2058. struct snd_ice1712 *ice;
  2059. int err;
  2060. unsigned char mask;
  2061. static struct snd_device_ops ops = {
  2062. .dev_free = snd_vt1724_dev_free,
  2063. };
  2064. *r_ice1712 = NULL;
  2065. /* enable PCI device */
  2066. err = pci_enable_device(pci);
  2067. if (err < 0)
  2068. return err;
  2069. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  2070. if (ice == NULL) {
  2071. pci_disable_device(pci);
  2072. return -ENOMEM;
  2073. }
  2074. ice->vt1724 = 1;
  2075. spin_lock_init(&ice->reg_lock);
  2076. mutex_init(&ice->gpio_mutex);
  2077. mutex_init(&ice->open_mutex);
  2078. mutex_init(&ice->i2c_mutex);
  2079. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  2080. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  2081. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  2082. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  2083. ice->card = card;
  2084. ice->pci = pci;
  2085. ice->irq = -1;
  2086. pci_set_master(pci);
  2087. snd_vt1724_proc_init(ice);
  2088. synchronize_irq(pci->irq);
  2089. err = pci_request_regions(pci, "ICE1724");
  2090. if (err < 0) {
  2091. kfree(ice);
  2092. pci_disable_device(pci);
  2093. return err;
  2094. }
  2095. ice->port = pci_resource_start(pci, 0);
  2096. ice->profi_port = pci_resource_start(pci, 1);
  2097. if (request_irq(pci->irq, snd_vt1724_interrupt,
  2098. IRQF_SHARED, "ICE1724", ice)) {
  2099. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2100. snd_vt1724_free(ice);
  2101. return -EIO;
  2102. }
  2103. ice->irq = pci->irq;
  2104. snd_vt1724_chip_reset(ice);
  2105. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  2106. snd_vt1724_free(ice);
  2107. return -EIO;
  2108. }
  2109. if (snd_vt1724_chip_init(ice) < 0) {
  2110. snd_vt1724_free(ice);
  2111. return -EIO;
  2112. }
  2113. /* unmask used interrupts */
  2114. mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
  2115. outb(mask, ICEREG1724(ice, IRQMASK));
  2116. /* don't handle FIFO overrun/underruns (just yet),
  2117. * since they cause machine lockups
  2118. */
  2119. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  2120. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
  2121. if (err < 0) {
  2122. snd_vt1724_free(ice);
  2123. return err;
  2124. }
  2125. snd_card_set_dev(card, &pci->dev);
  2126. *r_ice1712 = ice;
  2127. return 0;
  2128. }
  2129. /*
  2130. *
  2131. * Registration
  2132. *
  2133. */
  2134. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  2135. const struct pci_device_id *pci_id)
  2136. {
  2137. static int dev;
  2138. struct snd_card *card;
  2139. struct snd_ice1712 *ice;
  2140. int pcm_dev = 0, err;
  2141. struct snd_ice1712_card_info * const *tbl, *c;
  2142. if (dev >= SNDRV_CARDS)
  2143. return -ENODEV;
  2144. if (!enable[dev]) {
  2145. dev++;
  2146. return -ENOENT;
  2147. }
  2148. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  2149. if (card == NULL)
  2150. return -ENOMEM;
  2151. strcpy(card->driver, "ICE1724");
  2152. strcpy(card->shortname, "ICEnsemble ICE1724");
  2153. err = snd_vt1724_create(card, pci, model[dev], &ice);
  2154. if (err < 0) {
  2155. snd_card_free(card);
  2156. return err;
  2157. }
  2158. for (tbl = card_tables; *tbl; tbl++) {
  2159. for (c = *tbl; c->subvendor; c++) {
  2160. if (c->subvendor == ice->eeprom.subvendor) {
  2161. strcpy(card->shortname, c->name);
  2162. if (c->driver) /* specific driver? */
  2163. strcpy(card->driver, c->driver);
  2164. if (c->chip_init) {
  2165. err = c->chip_init(ice);
  2166. if (err < 0) {
  2167. snd_card_free(card);
  2168. return err;
  2169. }
  2170. }
  2171. goto __found;
  2172. }
  2173. }
  2174. }
  2175. c = &no_matched;
  2176. __found:
  2177. /*
  2178. * VT1724 has separate DMAs for the analog and the SPDIF streams while
  2179. * ICE1712 has only one for both (mixed up).
  2180. *
  2181. * Confusingly the analog PCM is named "professional" here because it
  2182. * was called so in ice1712 driver, and vt1724 driver is derived from
  2183. * ice1712 driver.
  2184. */
  2185. ice->pro_rate_default = PRO_RATE_DEFAULT;
  2186. if (!ice->is_spdif_master)
  2187. ice->is_spdif_master = stdclock_is_spdif_master;
  2188. if (!ice->get_rate)
  2189. ice->get_rate = stdclock_get_rate;
  2190. if (!ice->set_rate)
  2191. ice->set_rate = stdclock_set_rate;
  2192. if (!ice->set_mclk)
  2193. ice->set_mclk = stdclock_set_mclk;
  2194. if (!ice->set_spdif_clock)
  2195. ice->set_spdif_clock = stdclock_set_spdif_clock;
  2196. if (!ice->hw_rates)
  2197. set_std_hw_rates(ice);
  2198. err = snd_vt1724_pcm_profi(ice, pcm_dev++);
  2199. if (err < 0) {
  2200. snd_card_free(card);
  2201. return err;
  2202. }
  2203. err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
  2204. if (err < 0) {
  2205. snd_card_free(card);
  2206. return err;
  2207. }
  2208. err = snd_vt1724_pcm_indep(ice, pcm_dev++);
  2209. if (err < 0) {
  2210. snd_card_free(card);
  2211. return err;
  2212. }
  2213. err = snd_vt1724_ac97_mixer(ice);
  2214. if (err < 0) {
  2215. snd_card_free(card);
  2216. return err;
  2217. }
  2218. err = snd_vt1724_build_controls(ice);
  2219. if (err < 0) {
  2220. snd_card_free(card);
  2221. return err;
  2222. }
  2223. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2224. err = snd_vt1724_spdif_build_controls(ice);
  2225. if (err < 0) {
  2226. snd_card_free(card);
  2227. return err;
  2228. }
  2229. }
  2230. if (c->build_controls) {
  2231. err = c->build_controls(ice);
  2232. if (err < 0) {
  2233. snd_card_free(card);
  2234. return err;
  2235. }
  2236. }
  2237. if (!c->no_mpu401) {
  2238. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2239. struct snd_rawmidi *rmidi;
  2240. err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
  2241. if (err < 0) {
  2242. snd_card_free(card);
  2243. return err;
  2244. }
  2245. ice->rmidi[0] = rmidi;
  2246. rmidi->private_data = ice;
  2247. strcpy(rmidi->name, "ICE1724 MIDI");
  2248. rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
  2249. SNDRV_RAWMIDI_INFO_INPUT |
  2250. SNDRV_RAWMIDI_INFO_DUPLEX;
  2251. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
  2252. &vt1724_midi_output_ops);
  2253. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
  2254. &vt1724_midi_input_ops);
  2255. /* set watermarks */
  2256. outb(VT1724_MPU_RX_FIFO | 0x1,
  2257. ICEREG1724(ice, MPU_FIFO_WM));
  2258. outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
  2259. /* set UART mode */
  2260. outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
  2261. }
  2262. }
  2263. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2264. card->shortname, ice->port, ice->irq);
  2265. err = snd_card_register(card);
  2266. if (err < 0) {
  2267. snd_card_free(card);
  2268. return err;
  2269. }
  2270. pci_set_drvdata(pci, card);
  2271. dev++;
  2272. return 0;
  2273. }
  2274. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2275. {
  2276. snd_card_free(pci_get_drvdata(pci));
  2277. pci_set_drvdata(pci, NULL);
  2278. }
  2279. static struct pci_driver driver = {
  2280. .name = "ICE1724",
  2281. .id_table = snd_vt1724_ids,
  2282. .probe = snd_vt1724_probe,
  2283. .remove = __devexit_p(snd_vt1724_remove),
  2284. };
  2285. static int __init alsa_card_ice1724_init(void)
  2286. {
  2287. return pci_register_driver(&driver);
  2288. }
  2289. static void __exit alsa_card_ice1724_exit(void)
  2290. {
  2291. pci_unregister_driver(&driver);
  2292. }
  2293. module_init(alsa_card_ice1724_init)
  2294. module_exit(alsa_card_ice1724_exit)