als4000.c 31 KB

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  1. /*
  2. * card-als4000.c - driver for Avance Logic ALS4000 based soundcards.
  3. * Copyright (C) 2000 by Bart Hartgers <bart@etpmod.phys.tue.nl>,
  4. * Jaroslav Kysela <perex@perex.cz>
  5. * Copyright (C) 2002, 2008 by Andreas Mohr <hw7oshyuv3001@sneakemail.com>
  6. *
  7. * Framework borrowed from Massimo Piccioni's card-als100.c.
  8. *
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. * NOTES
  24. *
  25. * Since Avance does not provide any meaningful documentation, and I
  26. * bought an ALS4000 based soundcard, I was forced to base this driver
  27. * on reverse engineering.
  28. *
  29. * Note: this is no longer true (thank you!):
  30. * pretty verbose chip docu (ALS4000a.PDF) can be found on the ALSA web site.
  31. * Page numbers stated anywhere below with the "SPECS_PAGE:" tag
  32. * refer to: ALS4000a.PDF specs Ver 1.0, May 28th, 1998.
  33. *
  34. * The ALS4000 seems to be the PCI-cousin of the ALS100. It contains an
  35. * ALS100-like SB DSP/mixer, an OPL3 synth, a MPU401 and a gameport
  36. * interface. These subsystems can be mapped into ISA io-port space,
  37. * using the PCI-interface. In addition, the PCI-bit provides DMA and IRQ
  38. * services to the subsystems.
  39. *
  40. * While ALS4000 is very similar to a SoundBlaster, the differences in
  41. * DMA and capturing require more changes to the SoundBlaster than
  42. * desirable, so I made this separate driver.
  43. *
  44. * The ALS4000 can do real full duplex playback/capture.
  45. *
  46. * FMDAC:
  47. * - 0x4f -> port 0x14
  48. * - port 0x15 |= 1
  49. *
  50. * Enable/disable 3D sound:
  51. * - 0x50 -> port 0x14
  52. * - change bit 6 (0x40) of port 0x15
  53. *
  54. * Set QSound:
  55. * - 0xdb -> port 0x14
  56. * - set port 0x15:
  57. * 0x3e (mode 3), 0x3c (mode 2), 0x3a (mode 1), 0x38 (mode 0)
  58. *
  59. * Set KSound:
  60. * - value -> some port 0x0c0d
  61. *
  62. * ToDo:
  63. * - by default, don't enable legacy game and use PCI game I/O
  64. * - power management? (card can do voice wakeup according to datasheet!!)
  65. */
  66. #include <asm/io.h>
  67. #include <linux/init.h>
  68. #include <linux/pci.h>
  69. #include <linux/slab.h>
  70. #include <linux/gameport.h>
  71. #include <linux/moduleparam.h>
  72. #include <linux/dma-mapping.h>
  73. #include <sound/core.h>
  74. #include <sound/pcm.h>
  75. #include <sound/rawmidi.h>
  76. #include <sound/mpu401.h>
  77. #include <sound/opl3.h>
  78. #include <sound/sb.h>
  79. #include <sound/initval.h>
  80. MODULE_AUTHOR("Bart Hartgers <bart@etpmod.phys.tue.nl>, Andreas Mohr");
  81. MODULE_DESCRIPTION("Avance Logic ALS4000");
  82. MODULE_LICENSE("GPL");
  83. MODULE_SUPPORTED_DEVICE("{{Avance Logic,ALS4000}}");
  84. #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
  85. #define SUPPORT_JOYSTICK 1
  86. #endif
  87. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  88. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  89. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  90. #ifdef SUPPORT_JOYSTICK
  91. static int joystick_port[SNDRV_CARDS];
  92. #endif
  93. module_param_array(index, int, NULL, 0444);
  94. MODULE_PARM_DESC(index, "Index value for ALS4000 soundcard.");
  95. module_param_array(id, charp, NULL, 0444);
  96. MODULE_PARM_DESC(id, "ID string for ALS4000 soundcard.");
  97. module_param_array(enable, bool, NULL, 0444);
  98. MODULE_PARM_DESC(enable, "Enable ALS4000 soundcard.");
  99. #ifdef SUPPORT_JOYSTICK
  100. module_param_array(joystick_port, int, NULL, 0444);
  101. MODULE_PARM_DESC(joystick_port, "Joystick port address for ALS4000 soundcard. (0 = disabled)");
  102. #endif
  103. struct snd_card_als4000 {
  104. /* most frequent access first */
  105. unsigned long iobase;
  106. struct pci_dev *pci;
  107. struct snd_sb *chip;
  108. #ifdef SUPPORT_JOYSTICK
  109. struct gameport *gameport;
  110. #endif
  111. };
  112. static struct pci_device_id snd_als4000_ids[] = {
  113. { 0x4005, 0x4000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ALS4000 */
  114. { 0, }
  115. };
  116. MODULE_DEVICE_TABLE(pci, snd_als4000_ids);
  117. enum als4k_iobase_t {
  118. /* IOx: B == Byte, W = Word, D = DWord; SPECS_PAGE: 37 */
  119. ALS4K_IOD_00_AC97_ACCESS = 0x00,
  120. ALS4K_IOW_04_AC97_READ = 0x04,
  121. ALS4K_IOB_06_AC97_STATUS = 0x06,
  122. ALS4K_IOB_07_IRQSTATUS = 0x07,
  123. ALS4K_IOD_08_GCR_DATA = 0x08,
  124. ALS4K_IOB_0C_GCR_INDEX = 0x0c,
  125. ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU = 0x0e,
  126. ALS4K_IOB_10_ADLIB_ADDR0 = 0x10,
  127. ALS4K_IOB_11_ADLIB_ADDR1 = 0x11,
  128. ALS4K_IOB_12_ADLIB_ADDR2 = 0x12,
  129. ALS4K_IOB_13_ADLIB_ADDR3 = 0x13,
  130. ALS4K_IOB_14_MIXER_INDEX = 0x14,
  131. ALS4K_IOB_15_MIXER_DATA = 0x15,
  132. ALS4K_IOB_16_ESP_RESET = 0x16,
  133. ALS4K_IOB_16_ACK_FOR_CR1E = 0x16, /* 2nd function */
  134. ALS4K_IOB_18_OPL_ADDR0 = 0x18,
  135. ALS4K_IOB_19_OPL_ADDR1 = 0x19,
  136. ALS4K_IOB_1A_ESP_RD_DATA = 0x1a,
  137. ALS4K_IOB_1C_ESP_CMD_DATA = 0x1c,
  138. ALS4K_IOB_1C_ESP_WR_STATUS = 0x1c, /* 2nd function */
  139. ALS4K_IOB_1E_ESP_RD_STATUS8 = 0x1e,
  140. ALS4K_IOB_1F_ESP_RD_STATUS16 = 0x1f,
  141. ALS4K_IOB_20_ESP_GAMEPORT_200 = 0x20,
  142. ALS4K_IOB_21_ESP_GAMEPORT_201 = 0x21,
  143. ALS4K_IOB_30_MIDI_DATA = 0x30,
  144. ALS4K_IOB_31_MIDI_STATUS = 0x31,
  145. ALS4K_IOB_31_MIDI_COMMAND = 0x31, /* 2nd function */
  146. };
  147. enum als4k_iobase_0e_t {
  148. ALS4K_IOB_0E_MPU_IRQ = 0x10,
  149. ALS4K_IOB_0E_CR1E_IRQ = 0x40,
  150. ALS4K_IOB_0E_SB_DMA_IRQ = 0x80,
  151. };
  152. enum als4k_gcr_t { /* all registers 32bit wide; SPECS_PAGE: 38 to 42 */
  153. ALS4K_GCR8C_MISC_CTRL = 0x8c,
  154. ALS4K_GCR90_TEST_MODE_REG = 0x90,
  155. ALS4K_GCR91_DMA0_ADDR = 0x91,
  156. ALS4K_GCR92_DMA0_MODE_COUNT = 0x92,
  157. ALS4K_GCR93_DMA1_ADDR = 0x93,
  158. ALS4K_GCR94_DMA1_MODE_COUNT = 0x94,
  159. ALS4K_GCR95_DMA3_ADDR = 0x95,
  160. ALS4K_GCR96_DMA3_MODE_COUNT = 0x96,
  161. ALS4K_GCR99_DMA_EMULATION_CTRL = 0x99,
  162. ALS4K_GCRA0_FIFO1_CURRENT_ADDR = 0xa0,
  163. ALS4K_GCRA1_FIFO1_STATUS_BYTECOUNT = 0xa1,
  164. ALS4K_GCRA2_FIFO2_PCIADDR = 0xa2,
  165. ALS4K_GCRA3_FIFO2_COUNT = 0xa3,
  166. ALS4K_GCRA4_FIFO2_CURRENT_ADDR = 0xa4,
  167. ALS4K_GCRA5_FIFO1_STATUS_BYTECOUNT = 0xa5,
  168. ALS4K_GCRA6_PM_CTRL = 0xa6,
  169. ALS4K_GCRA7_PCI_ACCESS_STORAGE = 0xa7,
  170. ALS4K_GCRA8_LEGACY_CFG1 = 0xa8,
  171. ALS4K_GCRA9_LEGACY_CFG2 = 0xa9,
  172. ALS4K_GCRFF_DUMMY_SCRATCH = 0xff,
  173. };
  174. enum als4k_gcr8c_t {
  175. ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE = 0x8000,
  176. ALS4K_GCR8C_CHIP_REV_MASK = 0xf0000
  177. };
  178. static inline void snd_als4k_iobase_writeb(unsigned long iobase,
  179. enum als4k_iobase_t reg,
  180. u8 val)
  181. {
  182. outb(val, iobase + reg);
  183. }
  184. static inline void snd_als4k_iobase_writel(unsigned long iobase,
  185. enum als4k_iobase_t reg,
  186. u32 val)
  187. {
  188. outl(val, iobase + reg);
  189. }
  190. static inline u8 snd_als4k_iobase_readb(unsigned long iobase,
  191. enum als4k_iobase_t reg)
  192. {
  193. return inb(iobase + reg);
  194. }
  195. static inline u32 snd_als4k_iobase_readl(unsigned long iobase,
  196. enum als4k_iobase_t reg)
  197. {
  198. return inl(iobase + reg);
  199. }
  200. static inline void snd_als4k_gcr_write_addr(unsigned long iobase,
  201. enum als4k_gcr_t reg,
  202. u32 val)
  203. {
  204. snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg);
  205. snd_als4k_iobase_writel(iobase, ALS4K_IOD_08_GCR_DATA, val);
  206. }
  207. static inline void snd_als4k_gcr_write(struct snd_sb *sb,
  208. enum als4k_gcr_t reg,
  209. u32 val)
  210. {
  211. snd_als4k_gcr_write_addr(sb->alt_port, reg, val);
  212. }
  213. static inline u32 snd_als4k_gcr_read_addr(unsigned long iobase,
  214. enum als4k_gcr_t reg)
  215. {
  216. /* SPECS_PAGE: 37/38 */
  217. snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg);
  218. return snd_als4k_iobase_readl(iobase, ALS4K_IOD_08_GCR_DATA);
  219. }
  220. static inline u32 snd_als4k_gcr_read(struct snd_sb *sb, enum als4k_gcr_t reg)
  221. {
  222. return snd_als4k_gcr_read_addr(sb->alt_port, reg);
  223. }
  224. enum als4k_cr_t { /* all registers 8bit wide; SPECS_PAGE: 20 to 23 */
  225. ALS4K_CR0_SB_CONFIG = 0x00,
  226. ALS4K_CR2_MISC_CONTROL = 0x02,
  227. ALS4K_CR3_CONFIGURATION = 0x03,
  228. ALS4K_CR17_FIFO_STATUS = 0x17,
  229. ALS4K_CR18_ESP_MAJOR_VERSION = 0x18,
  230. ALS4K_CR19_ESP_MINOR_VERSION = 0x19,
  231. ALS4K_CR1A_MPU401_UART_MODE_CONTROL = 0x1a,
  232. ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO = 0x1c,
  233. ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI = 0x1d,
  234. ALS4K_CR1E_FIFO2_CONTROL = 0x1e, /* secondary PCM FIFO (recording) */
  235. ALS4K_CR3A_MISC_CONTROL = 0x3a,
  236. ALS4K_CR3B_CRC32_BYTE0 = 0x3b, /* for testing, activate via CR3A */
  237. ALS4K_CR3C_CRC32_BYTE1 = 0x3c,
  238. ALS4K_CR3D_CRC32_BYTE2 = 0x3d,
  239. ALS4K_CR3E_CRC32_BYTE3 = 0x3e,
  240. };
  241. enum als4k_cr0_t {
  242. ALS4K_CR0_DMA_CONTIN_MODE_CTRL = 0x02, /* IRQ/FIFO controlled for 0/1 */
  243. ALS4K_CR0_DMA_90H_MODE_CTRL = 0x04, /* IRQ/FIFO controlled for 0/1 */
  244. ALS4K_CR0_MX80_81_REG_WRITE_ENABLE = 0x80,
  245. };
  246. static inline void snd_als4_cr_write(struct snd_sb *chip,
  247. enum als4k_cr_t reg,
  248. u8 data)
  249. {
  250. /* Control Register is reg | 0xc0 (bit 7, 6 set) on sbmixer_index
  251. * NOTE: assumes chip->mixer_lock to be locked externally already!
  252. * SPECS_PAGE: 6 */
  253. snd_sbmixer_write(chip, reg | 0xc0, data);
  254. }
  255. static inline u8 snd_als4_cr_read(struct snd_sb *chip,
  256. enum als4k_cr_t reg)
  257. {
  258. /* NOTE: assumes chip->mixer_lock to be locked externally already! */
  259. return snd_sbmixer_read(chip, reg | 0xc0);
  260. }
  261. static void snd_als4000_set_rate(struct snd_sb *chip, unsigned int rate)
  262. {
  263. if (!(chip->mode & SB_RATE_LOCK)) {
  264. snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT);
  265. snd_sbdsp_command(chip, rate>>8);
  266. snd_sbdsp_command(chip, rate);
  267. }
  268. }
  269. static inline void snd_als4000_set_capture_dma(struct snd_sb *chip,
  270. dma_addr_t addr, unsigned size)
  271. {
  272. /* SPECS_PAGE: 40 */
  273. snd_als4k_gcr_write(chip, ALS4K_GCRA2_FIFO2_PCIADDR, addr);
  274. snd_als4k_gcr_write(chip, ALS4K_GCRA3_FIFO2_COUNT, (size-1));
  275. }
  276. static inline void snd_als4000_set_playback_dma(struct snd_sb *chip,
  277. dma_addr_t addr,
  278. unsigned size)
  279. {
  280. /* SPECS_PAGE: 38 */
  281. snd_als4k_gcr_write(chip, ALS4K_GCR91_DMA0_ADDR, addr);
  282. snd_als4k_gcr_write(chip, ALS4K_GCR92_DMA0_MODE_COUNT,
  283. (size-1)|0x180000);
  284. }
  285. #define ALS4000_FORMAT_SIGNED (1<<0)
  286. #define ALS4000_FORMAT_16BIT (1<<1)
  287. #define ALS4000_FORMAT_STEREO (1<<2)
  288. static int snd_als4000_get_format(struct snd_pcm_runtime *runtime)
  289. {
  290. int result;
  291. result = 0;
  292. if (snd_pcm_format_signed(runtime->format))
  293. result |= ALS4000_FORMAT_SIGNED;
  294. if (snd_pcm_format_physical_width(runtime->format) == 16)
  295. result |= ALS4000_FORMAT_16BIT;
  296. if (runtime->channels > 1)
  297. result |= ALS4000_FORMAT_STEREO;
  298. return result;
  299. }
  300. /* structure for setting up playback */
  301. static const struct {
  302. unsigned char dsp_cmd, dma_on, dma_off, format;
  303. } playback_cmd_vals[]={
  304. /* ALS4000_FORMAT_U8_MONO */
  305. { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_MONO },
  306. /* ALS4000_FORMAT_S8_MONO */
  307. { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_MONO },
  308. /* ALS4000_FORMAT_U16L_MONO */
  309. { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_MONO },
  310. /* ALS4000_FORMAT_S16L_MONO */
  311. { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_MONO },
  312. /* ALS4000_FORMAT_U8_STEREO */
  313. { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_STEREO },
  314. /* ALS4000_FORMAT_S8_STEREO */
  315. { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_STEREO },
  316. /* ALS4000_FORMAT_U16L_STEREO */
  317. { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_STEREO },
  318. /* ALS4000_FORMAT_S16L_STEREO */
  319. { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_STEREO },
  320. };
  321. #define playback_cmd(chip) (playback_cmd_vals[(chip)->playback_format])
  322. /* structure for setting up capture */
  323. enum { CMD_WIDTH8=0x04, CMD_SIGNED=0x10, CMD_MONO=0x80, CMD_STEREO=0xA0 };
  324. static const unsigned char capture_cmd_vals[]=
  325. {
  326. CMD_WIDTH8|CMD_MONO, /* ALS4000_FORMAT_U8_MONO */
  327. CMD_WIDTH8|CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S8_MONO */
  328. CMD_MONO, /* ALS4000_FORMAT_U16L_MONO */
  329. CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S16L_MONO */
  330. CMD_WIDTH8|CMD_STEREO, /* ALS4000_FORMAT_U8_STEREO */
  331. CMD_WIDTH8|CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S8_STEREO */
  332. CMD_STEREO, /* ALS4000_FORMAT_U16L_STEREO */
  333. CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S16L_STEREO */
  334. };
  335. #define capture_cmd(chip) (capture_cmd_vals[(chip)->capture_format])
  336. static int snd_als4000_hw_params(struct snd_pcm_substream *substream,
  337. struct snd_pcm_hw_params *hw_params)
  338. {
  339. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  340. }
  341. static int snd_als4000_hw_free(struct snd_pcm_substream *substream)
  342. {
  343. snd_pcm_lib_free_pages(substream);
  344. return 0;
  345. }
  346. static int snd_als4000_capture_prepare(struct snd_pcm_substream *substream)
  347. {
  348. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  349. struct snd_pcm_runtime *runtime = substream->runtime;
  350. unsigned long size;
  351. unsigned count;
  352. chip->capture_format = snd_als4000_get_format(runtime);
  353. size = snd_pcm_lib_buffer_bytes(substream);
  354. count = snd_pcm_lib_period_bytes(substream);
  355. if (chip->capture_format & ALS4000_FORMAT_16BIT)
  356. count >>= 1;
  357. count--;
  358. spin_lock_irq(&chip->reg_lock);
  359. snd_als4000_set_rate(chip, runtime->rate);
  360. snd_als4000_set_capture_dma(chip, runtime->dma_addr, size);
  361. spin_unlock_irq(&chip->reg_lock);
  362. spin_lock_irq(&chip->mixer_lock);
  363. snd_als4_cr_write(chip, ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO, count & 0xff);
  364. snd_als4_cr_write(chip, ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI, count >> 8);
  365. spin_unlock_irq(&chip->mixer_lock);
  366. return 0;
  367. }
  368. static int snd_als4000_playback_prepare(struct snd_pcm_substream *substream)
  369. {
  370. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  371. struct snd_pcm_runtime *runtime = substream->runtime;
  372. unsigned long size;
  373. unsigned count;
  374. chip->playback_format = snd_als4000_get_format(runtime);
  375. size = snd_pcm_lib_buffer_bytes(substream);
  376. count = snd_pcm_lib_period_bytes(substream);
  377. if (chip->playback_format & ALS4000_FORMAT_16BIT)
  378. count >>= 1;
  379. count--;
  380. /* FIXME: from second playback on, there's a lot more clicks and pops
  381. * involved here than on first playback. Fiddling with
  382. * tons of different settings didn't help (DMA, speaker on/off,
  383. * reordering, ...). Something seems to get enabled on playback
  384. * that I haven't found out how to disable again, which then causes
  385. * the switching pops to reach the speakers the next time here. */
  386. spin_lock_irq(&chip->reg_lock);
  387. snd_als4000_set_rate(chip, runtime->rate);
  388. snd_als4000_set_playback_dma(chip, runtime->dma_addr, size);
  389. /* SPEAKER_ON not needed, since dma_on seems to also enable speaker */
  390. /* snd_sbdsp_command(chip, SB_DSP_SPEAKER_ON); */
  391. snd_sbdsp_command(chip, playback_cmd(chip).dsp_cmd);
  392. snd_sbdsp_command(chip, playback_cmd(chip).format);
  393. snd_sbdsp_command(chip, count & 0xff);
  394. snd_sbdsp_command(chip, count >> 8);
  395. snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
  396. spin_unlock_irq(&chip->reg_lock);
  397. return 0;
  398. }
  399. static int snd_als4000_capture_trigger(struct snd_pcm_substream *substream, int cmd)
  400. {
  401. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  402. int result = 0;
  403. /* FIXME race condition in here!!!
  404. chip->mode non-atomic update gets consistently protected
  405. by reg_lock always, _except_ for this place!!
  406. Probably need to take reg_lock as outer (or inner??) lock, too.
  407. (or serialize both lock operations? probably not, though... - racy?)
  408. */
  409. spin_lock(&chip->mixer_lock);
  410. switch (cmd) {
  411. case SNDRV_PCM_TRIGGER_START:
  412. case SNDRV_PCM_TRIGGER_RESUME:
  413. chip->mode |= SB_RATE_LOCK_CAPTURE;
  414. snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL,
  415. capture_cmd(chip));
  416. break;
  417. case SNDRV_PCM_TRIGGER_STOP:
  418. case SNDRV_PCM_TRIGGER_SUSPEND:
  419. chip->mode &= ~SB_RATE_LOCK_CAPTURE;
  420. snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL,
  421. capture_cmd(chip));
  422. break;
  423. default:
  424. result = -EINVAL;
  425. break;
  426. }
  427. spin_unlock(&chip->mixer_lock);
  428. return result;
  429. }
  430. static int snd_als4000_playback_trigger(struct snd_pcm_substream *substream, int cmd)
  431. {
  432. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  433. int result = 0;
  434. spin_lock(&chip->reg_lock);
  435. switch (cmd) {
  436. case SNDRV_PCM_TRIGGER_START:
  437. case SNDRV_PCM_TRIGGER_RESUME:
  438. chip->mode |= SB_RATE_LOCK_PLAYBACK;
  439. snd_sbdsp_command(chip, playback_cmd(chip).dma_on);
  440. break;
  441. case SNDRV_PCM_TRIGGER_STOP:
  442. case SNDRV_PCM_TRIGGER_SUSPEND:
  443. snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
  444. chip->mode &= ~SB_RATE_LOCK_PLAYBACK;
  445. break;
  446. default:
  447. result = -EINVAL;
  448. break;
  449. }
  450. spin_unlock(&chip->reg_lock);
  451. return result;
  452. }
  453. static snd_pcm_uframes_t snd_als4000_capture_pointer(struct snd_pcm_substream *substream)
  454. {
  455. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  456. unsigned int result;
  457. spin_lock(&chip->reg_lock);
  458. result = snd_als4k_gcr_read(chip, ALS4K_GCRA4_FIFO2_CURRENT_ADDR);
  459. spin_unlock(&chip->reg_lock);
  460. result &= 0xffff;
  461. return bytes_to_frames( substream->runtime, result );
  462. }
  463. static snd_pcm_uframes_t snd_als4000_playback_pointer(struct snd_pcm_substream *substream)
  464. {
  465. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  466. unsigned result;
  467. spin_lock(&chip->reg_lock);
  468. result = snd_als4k_gcr_read(chip, ALS4K_GCRA0_FIFO1_CURRENT_ADDR);
  469. spin_unlock(&chip->reg_lock);
  470. result &= 0xffff;
  471. return bytes_to_frames( substream->runtime, result );
  472. }
  473. /* FIXME: this IRQ routine doesn't really support IRQ sharing (we always
  474. * return IRQ_HANDLED no matter whether we actually had an IRQ flag or not).
  475. * ALS4000a.PDF writes that while ACKing IRQ in PCI block will *not* ACK
  476. * the IRQ in the SB core, ACKing IRQ in SB block *will* ACK the PCI IRQ
  477. * register (alt_port + ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU). Probably something
  478. * could be optimized here to query/write one register only...
  479. * And even if both registers need to be queried, then there's still the
  480. * question of whether it's actually correct to ACK PCI IRQ before reading
  481. * SB IRQ like we do now, since ALS4000a.PDF mentions that PCI IRQ will *clear*
  482. * SB IRQ status.
  483. * (hmm, SPECS_PAGE: 38 mentions it the other way around!)
  484. * And do we *really* need the lock here for *reading* SB_DSP4_IRQSTATUS??
  485. * */
  486. static irqreturn_t snd_als4000_interrupt(int irq, void *dev_id)
  487. {
  488. struct snd_sb *chip = dev_id;
  489. unsigned pci_irqstatus;
  490. unsigned sb_irqstatus;
  491. /* find out which bit of the ALS4000 PCI block produced the interrupt,
  492. SPECS_PAGE: 38, 5 */
  493. pci_irqstatus = snd_als4k_iobase_readb(chip->alt_port,
  494. ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU);
  495. if ((pci_irqstatus & ALS4K_IOB_0E_SB_DMA_IRQ)
  496. && (chip->playback_substream)) /* playback */
  497. snd_pcm_period_elapsed(chip->playback_substream);
  498. if ((pci_irqstatus & ALS4K_IOB_0E_CR1E_IRQ)
  499. && (chip->capture_substream)) /* capturing */
  500. snd_pcm_period_elapsed(chip->capture_substream);
  501. if ((pci_irqstatus & ALS4K_IOB_0E_MPU_IRQ)
  502. && (chip->rmidi)) /* MPU401 interrupt */
  503. snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
  504. /* ACK the PCI block IRQ */
  505. snd_als4k_iobase_writeb(chip->alt_port,
  506. ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU, pci_irqstatus);
  507. spin_lock(&chip->mixer_lock);
  508. /* SPECS_PAGE: 20 */
  509. sb_irqstatus = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS);
  510. spin_unlock(&chip->mixer_lock);
  511. if (sb_irqstatus & SB_IRQTYPE_8BIT)
  512. snd_sb_ack_8bit(chip);
  513. if (sb_irqstatus & SB_IRQTYPE_16BIT)
  514. snd_sb_ack_16bit(chip);
  515. if (sb_irqstatus & SB_IRQTYPE_MPUIN)
  516. inb(chip->mpu_port);
  517. if (sb_irqstatus & ALS4K_IRQTYPE_CR1E_DMA)
  518. snd_als4k_iobase_readb(chip->alt_port,
  519. ALS4K_IOB_16_ACK_FOR_CR1E);
  520. /* printk(KERN_INFO "als4000: irq 0x%04x 0x%04x\n",
  521. pci_irqstatus, sb_irqstatus); */
  522. /* only ack the things we actually handled above */
  523. return IRQ_RETVAL(
  524. (pci_irqstatus & (ALS4K_IOB_0E_SB_DMA_IRQ|ALS4K_IOB_0E_CR1E_IRQ|
  525. ALS4K_IOB_0E_MPU_IRQ))
  526. || (sb_irqstatus & (SB_IRQTYPE_8BIT|SB_IRQTYPE_16BIT|
  527. SB_IRQTYPE_MPUIN|ALS4K_IRQTYPE_CR1E_DMA))
  528. );
  529. }
  530. /*****************************************************************/
  531. static struct snd_pcm_hardware snd_als4000_playback =
  532. {
  533. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  534. SNDRV_PCM_INFO_MMAP_VALID),
  535. .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
  536. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */
  537. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  538. .rate_min = 4000,
  539. .rate_max = 48000,
  540. .channels_min = 1,
  541. .channels_max = 2,
  542. .buffer_bytes_max = 65536,
  543. .period_bytes_min = 64,
  544. .period_bytes_max = 65536,
  545. .periods_min = 1,
  546. .periods_max = 1024,
  547. .fifo_size = 0
  548. };
  549. static struct snd_pcm_hardware snd_als4000_capture =
  550. {
  551. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  552. SNDRV_PCM_INFO_MMAP_VALID),
  553. .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
  554. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */
  555. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  556. .rate_min = 4000,
  557. .rate_max = 48000,
  558. .channels_min = 1,
  559. .channels_max = 2,
  560. .buffer_bytes_max = 65536,
  561. .period_bytes_min = 64,
  562. .period_bytes_max = 65536,
  563. .periods_min = 1,
  564. .periods_max = 1024,
  565. .fifo_size = 0
  566. };
  567. /*****************************************************************/
  568. static int snd_als4000_playback_open(struct snd_pcm_substream *substream)
  569. {
  570. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  571. struct snd_pcm_runtime *runtime = substream->runtime;
  572. chip->playback_substream = substream;
  573. runtime->hw = snd_als4000_playback;
  574. return 0;
  575. }
  576. static int snd_als4000_playback_close(struct snd_pcm_substream *substream)
  577. {
  578. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  579. chip->playback_substream = NULL;
  580. snd_pcm_lib_free_pages(substream);
  581. return 0;
  582. }
  583. static int snd_als4000_capture_open(struct snd_pcm_substream *substream)
  584. {
  585. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  586. struct snd_pcm_runtime *runtime = substream->runtime;
  587. chip->capture_substream = substream;
  588. runtime->hw = snd_als4000_capture;
  589. return 0;
  590. }
  591. static int snd_als4000_capture_close(struct snd_pcm_substream *substream)
  592. {
  593. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  594. chip->capture_substream = NULL;
  595. snd_pcm_lib_free_pages(substream);
  596. return 0;
  597. }
  598. /******************************************************************/
  599. static struct snd_pcm_ops snd_als4000_playback_ops = {
  600. .open = snd_als4000_playback_open,
  601. .close = snd_als4000_playback_close,
  602. .ioctl = snd_pcm_lib_ioctl,
  603. .hw_params = snd_als4000_hw_params,
  604. .hw_free = snd_als4000_hw_free,
  605. .prepare = snd_als4000_playback_prepare,
  606. .trigger = snd_als4000_playback_trigger,
  607. .pointer = snd_als4000_playback_pointer
  608. };
  609. static struct snd_pcm_ops snd_als4000_capture_ops = {
  610. .open = snd_als4000_capture_open,
  611. .close = snd_als4000_capture_close,
  612. .ioctl = snd_pcm_lib_ioctl,
  613. .hw_params = snd_als4000_hw_params,
  614. .hw_free = snd_als4000_hw_free,
  615. .prepare = snd_als4000_capture_prepare,
  616. .trigger = snd_als4000_capture_trigger,
  617. .pointer = snd_als4000_capture_pointer
  618. };
  619. static int __devinit snd_als4000_pcm(struct snd_sb *chip, int device)
  620. {
  621. struct snd_pcm *pcm;
  622. int err;
  623. err = snd_pcm_new(chip->card, "ALS4000 DSP", device, 1, 1, &pcm);
  624. if (err < 0)
  625. return err;
  626. pcm->private_data = chip;
  627. pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
  628. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_als4000_playback_ops);
  629. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_als4000_capture_ops);
  630. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  631. 64*1024, 64*1024);
  632. chip->pcm = pcm;
  633. return 0;
  634. }
  635. /******************************************************************/
  636. static void snd_als4000_set_addr(unsigned long iobase,
  637. unsigned int sb_io,
  638. unsigned int mpu_io,
  639. unsigned int opl_io,
  640. unsigned int game_io)
  641. {
  642. u32 cfg1 = 0;
  643. u32 cfg2 = 0;
  644. if (mpu_io > 0)
  645. cfg2 |= (mpu_io | 1) << 16;
  646. if (sb_io > 0)
  647. cfg2 |= (sb_io | 1);
  648. if (game_io > 0)
  649. cfg1 |= (game_io | 1) << 16;
  650. if (opl_io > 0)
  651. cfg1 |= (opl_io | 1);
  652. snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA8_LEGACY_CFG1, cfg1);
  653. snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA9_LEGACY_CFG2, cfg2);
  654. }
  655. static void snd_als4000_configure(struct snd_sb *chip)
  656. {
  657. u8 tmp;
  658. int i;
  659. /* do some more configuration */
  660. spin_lock_irq(&chip->mixer_lock);
  661. tmp = snd_als4_cr_read(chip, ALS4K_CR0_SB_CONFIG);
  662. snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG,
  663. tmp|ALS4K_CR0_MX80_81_REG_WRITE_ENABLE);
  664. /* always select DMA channel 0, since we do not actually use DMA
  665. * SPECS_PAGE: 19/20 */
  666. snd_sbmixer_write(chip, SB_DSP4_DMASETUP, SB_DMASETUP_DMA0);
  667. snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG,
  668. tmp & ~ALS4K_CR0_MX80_81_REG_WRITE_ENABLE);
  669. spin_unlock_irq(&chip->mixer_lock);
  670. spin_lock_irq(&chip->reg_lock);
  671. /* enable interrupts */
  672. snd_als4k_gcr_write(chip, ALS4K_GCR8C_MISC_CTRL,
  673. ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE);
  674. /* SPECS_PAGE: 39 */
  675. for (i = ALS4K_GCR91_DMA0_ADDR; i <= ALS4K_GCR96_DMA3_MODE_COUNT; ++i)
  676. snd_als4k_gcr_write(chip, i, 0);
  677. snd_als4k_gcr_write(chip, ALS4K_GCR99_DMA_EMULATION_CTRL,
  678. snd_als4k_gcr_read(chip, ALS4K_GCR99_DMA_EMULATION_CTRL));
  679. spin_unlock_irq(&chip->reg_lock);
  680. }
  681. #ifdef SUPPORT_JOYSTICK
  682. static int __devinit snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev)
  683. {
  684. struct gameport *gp;
  685. struct resource *r;
  686. int io_port;
  687. if (joystick_port[dev] == 0)
  688. return -ENODEV;
  689. if (joystick_port[dev] == 1) { /* auto-detect */
  690. for (io_port = 0x200; io_port <= 0x218; io_port += 8) {
  691. r = request_region(io_port, 8, "ALS4000 gameport");
  692. if (r)
  693. break;
  694. }
  695. } else {
  696. io_port = joystick_port[dev];
  697. r = request_region(io_port, 8, "ALS4000 gameport");
  698. }
  699. if (!r) {
  700. printk(KERN_WARNING "als4000: cannot reserve joystick ports\n");
  701. return -EBUSY;
  702. }
  703. acard->gameport = gp = gameport_allocate_port();
  704. if (!gp) {
  705. printk(KERN_ERR "als4000: cannot allocate memory for gameport\n");
  706. release_and_free_resource(r);
  707. return -ENOMEM;
  708. }
  709. gameport_set_name(gp, "ALS4000 Gameport");
  710. gameport_set_phys(gp, "pci%s/gameport0", pci_name(acard->pci));
  711. gameport_set_dev_parent(gp, &acard->pci->dev);
  712. gp->io = io_port;
  713. gameport_set_port_data(gp, r);
  714. /* Enable legacy joystick port */
  715. snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1);
  716. gameport_register_port(acard->gameport);
  717. return 0;
  718. }
  719. static void snd_als4000_free_gameport(struct snd_card_als4000 *acard)
  720. {
  721. if (acard->gameport) {
  722. struct resource *r = gameport_get_port_data(acard->gameport);
  723. gameport_unregister_port(acard->gameport);
  724. acard->gameport = NULL;
  725. /* disable joystick */
  726. snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0);
  727. release_and_free_resource(r);
  728. }
  729. }
  730. #else
  731. static inline int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) { return -ENOSYS; }
  732. static inline void snd_als4000_free_gameport(struct snd_card_als4000 *acard) { }
  733. #endif
  734. static void snd_card_als4000_free( struct snd_card *card )
  735. {
  736. struct snd_card_als4000 *acard = card->private_data;
  737. /* make sure that interrupts are disabled */
  738. snd_als4k_gcr_write_addr(acard->iobase, ALS4K_GCR8C_MISC_CTRL, 0);
  739. /* free resources */
  740. snd_als4000_free_gameport(acard);
  741. pci_release_regions(acard->pci);
  742. pci_disable_device(acard->pci);
  743. }
  744. static int __devinit snd_card_als4000_probe(struct pci_dev *pci,
  745. const struct pci_device_id *pci_id)
  746. {
  747. static int dev;
  748. struct snd_card *card;
  749. struct snd_card_als4000 *acard;
  750. unsigned long iobase;
  751. struct snd_sb *chip;
  752. struct snd_opl3 *opl3;
  753. unsigned short word;
  754. int err;
  755. if (dev >= SNDRV_CARDS)
  756. return -ENODEV;
  757. if (!enable[dev]) {
  758. dev++;
  759. return -ENOENT;
  760. }
  761. /* enable PCI device */
  762. if ((err = pci_enable_device(pci)) < 0) {
  763. return err;
  764. }
  765. /* check, if we can restrict PCI DMA transfers to 24 bits */
  766. if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 ||
  767. pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) {
  768. snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n");
  769. pci_disable_device(pci);
  770. return -ENXIO;
  771. }
  772. if ((err = pci_request_regions(pci, "ALS4000")) < 0) {
  773. pci_disable_device(pci);
  774. return err;
  775. }
  776. iobase = pci_resource_start(pci, 0);
  777. pci_read_config_word(pci, PCI_COMMAND, &word);
  778. pci_write_config_word(pci, PCI_COMMAND, word | PCI_COMMAND_IO);
  779. pci_set_master(pci);
  780. card = snd_card_new(index[dev], id[dev], THIS_MODULE,
  781. sizeof(*acard) /* private_data: acard */);
  782. if (card == NULL) {
  783. pci_release_regions(pci);
  784. pci_disable_device(pci);
  785. return -ENOMEM;
  786. }
  787. acard = card->private_data;
  788. acard->pci = pci;
  789. acard->iobase = iobase;
  790. card->private_free = snd_card_als4000_free;
  791. /* disable all legacy ISA stuff */
  792. snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0);
  793. if ((err = snd_sbdsp_create(card,
  794. iobase + ALS4K_IOB_10_ADLIB_ADDR0,
  795. pci->irq,
  796. /* internally registered as IRQF_SHARED in case of ALS4000 SB */
  797. snd_als4000_interrupt,
  798. -1,
  799. -1,
  800. SB_HW_ALS4000,
  801. &chip)) < 0) {
  802. goto out_err;
  803. }
  804. acard->chip = chip;
  805. chip->pci = pci;
  806. chip->alt_port = iobase;
  807. snd_card_set_dev(card, &pci->dev);
  808. snd_als4000_configure(chip);
  809. strcpy(card->driver, "ALS4000");
  810. strcpy(card->shortname, "Avance Logic ALS4000");
  811. sprintf(card->longname, "%s at 0x%lx, irq %i",
  812. card->shortname, chip->alt_port, chip->irq);
  813. if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_ALS4000,
  814. iobase + ALS4K_IOB_30_MIDI_DATA,
  815. MPU401_INFO_INTEGRATED,
  816. pci->irq, 0, &chip->rmidi)) < 0) {
  817. printk(KERN_ERR "als4000: no MPU-401 device at 0x%lx?\n",
  818. iobase + ALS4K_IOB_30_MIDI_DATA);
  819. goto out_err;
  820. }
  821. /* FIXME: ALS4000 has interesting MPU401 configuration features
  822. * at ALS4K_CR1A_MPU401_UART_MODE_CONTROL
  823. * (pass-thru / UART switching, fast MIDI clock, etc.),
  824. * however there doesn't seem to be an ALSA API for this...
  825. * SPECS_PAGE: 21 */
  826. if ((err = snd_als4000_pcm(chip, 0)) < 0) {
  827. goto out_err;
  828. }
  829. if ((err = snd_sbmixer_new(chip)) < 0) {
  830. goto out_err;
  831. }
  832. if (snd_opl3_create(card,
  833. iobase + ALS4K_IOB_10_ADLIB_ADDR0,
  834. iobase + ALS4K_IOB_12_ADLIB_ADDR2,
  835. OPL3_HW_AUTO, 1, &opl3) < 0) {
  836. printk(KERN_ERR "als4000: no OPL device at 0x%lx-0x%lx?\n",
  837. iobase + ALS4K_IOB_10_ADLIB_ADDR0,
  838. iobase + ALS4K_IOB_12_ADLIB_ADDR2);
  839. } else {
  840. if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
  841. goto out_err;
  842. }
  843. }
  844. snd_als4000_create_gameport(acard, dev);
  845. if ((err = snd_card_register(card)) < 0) {
  846. goto out_err;
  847. }
  848. pci_set_drvdata(pci, card);
  849. dev++;
  850. err = 0;
  851. goto out;
  852. out_err:
  853. snd_card_free(card);
  854. out:
  855. return err;
  856. }
  857. static void __devexit snd_card_als4000_remove(struct pci_dev *pci)
  858. {
  859. snd_card_free(pci_get_drvdata(pci));
  860. pci_set_drvdata(pci, NULL);
  861. }
  862. #ifdef CONFIG_PM
  863. static int snd_als4000_suspend(struct pci_dev *pci, pm_message_t state)
  864. {
  865. struct snd_card *card = pci_get_drvdata(pci);
  866. struct snd_card_als4000 *acard = card->private_data;
  867. struct snd_sb *chip = acard->chip;
  868. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  869. snd_pcm_suspend_all(chip->pcm);
  870. snd_sbmixer_suspend(chip);
  871. pci_disable_device(pci);
  872. pci_save_state(pci);
  873. pci_set_power_state(pci, pci_choose_state(pci, state));
  874. return 0;
  875. }
  876. static int snd_als4000_resume(struct pci_dev *pci)
  877. {
  878. struct snd_card *card = pci_get_drvdata(pci);
  879. struct snd_card_als4000 *acard = card->private_data;
  880. struct snd_sb *chip = acard->chip;
  881. pci_set_power_state(pci, PCI_D0);
  882. pci_restore_state(pci);
  883. if (pci_enable_device(pci) < 0) {
  884. printk(KERN_ERR "als4000: pci_enable_device failed, "
  885. "disabling device\n");
  886. snd_card_disconnect(card);
  887. return -EIO;
  888. }
  889. pci_set_master(pci);
  890. snd_als4000_configure(chip);
  891. snd_sbdsp_reset(chip);
  892. snd_sbmixer_resume(chip);
  893. #ifdef SUPPORT_JOYSTICK
  894. if (acard->gameport)
  895. snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1);
  896. #endif
  897. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  898. return 0;
  899. }
  900. #endif /* CONFIG_PM */
  901. static struct pci_driver driver = {
  902. .name = "ALS4000",
  903. .id_table = snd_als4000_ids,
  904. .probe = snd_card_als4000_probe,
  905. .remove = __devexit_p(snd_card_als4000_remove),
  906. #ifdef CONFIG_PM
  907. .suspend = snd_als4000_suspend,
  908. .resume = snd_als4000_resume,
  909. #endif
  910. };
  911. static int __init alsa_card_als4000_init(void)
  912. {
  913. return pci_register_driver(&driver);
  914. }
  915. static void __exit alsa_card_als4000_exit(void)
  916. {
  917. pci_unregister_driver(&driver);
  918. }
  919. module_init(alsa_card_als4000_init)
  920. module_exit(alsa_card_als4000_exit)