via_drm.h 8.2 KB

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  1. /*
  2. * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
  3. * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sub license,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the
  13. * next paragraph) shall be included in all copies or substantial portions
  14. * of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19. * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. */
  24. #ifndef _VIA_DRM_H_
  25. #define _VIA_DRM_H_
  26. /* WARNING: These defines must be the same as what the Xserver uses.
  27. * if you change them, you must change the defines in the Xserver.
  28. */
  29. #ifndef _VIA_DEFINES_
  30. #define _VIA_DEFINES_
  31. #ifndef __KERNEL__
  32. #include "via_drmclient.h"
  33. #endif
  34. #define VIA_NR_SAREA_CLIPRECTS 8
  35. #define VIA_NR_XVMC_PORTS 10
  36. #define VIA_NR_XVMC_LOCKS 5
  37. #define VIA_MAX_CACHELINE_SIZE 64
  38. #define XVMCLOCKPTR(saPriv,lockNo) \
  39. ((volatile struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
  40. (VIA_MAX_CACHELINE_SIZE - 1)) & \
  41. ~(VIA_MAX_CACHELINE_SIZE - 1)) + \
  42. VIA_MAX_CACHELINE_SIZE*(lockNo)))
  43. /* Each region is a minimum of 64k, and there are at most 64 of them.
  44. */
  45. #define VIA_NR_TEX_REGIONS 64
  46. #define VIA_LOG_MIN_TEX_REGION_SIZE 16
  47. #endif
  48. #define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
  49. #define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
  50. #define VIA_UPLOAD_CTX 0x4
  51. #define VIA_UPLOAD_BUFFERS 0x8
  52. #define VIA_UPLOAD_TEX0 0x10
  53. #define VIA_UPLOAD_TEX1 0x20
  54. #define VIA_UPLOAD_CLIPRECTS 0x40
  55. #define VIA_UPLOAD_ALL 0xff
  56. /* VIA specific ioctls */
  57. #define DRM_VIA_ALLOCMEM 0x00
  58. #define DRM_VIA_FREEMEM 0x01
  59. #define DRM_VIA_AGP_INIT 0x02
  60. #define DRM_VIA_FB_INIT 0x03
  61. #define DRM_VIA_MAP_INIT 0x04
  62. #define DRM_VIA_DEC_FUTEX 0x05
  63. #define NOT_USED
  64. #define DRM_VIA_DMA_INIT 0x07
  65. #define DRM_VIA_CMDBUFFER 0x08
  66. #define DRM_VIA_FLUSH 0x09
  67. #define DRM_VIA_PCICMD 0x0a
  68. #define DRM_VIA_CMDBUF_SIZE 0x0b
  69. #define NOT_USED
  70. #define DRM_VIA_WAIT_IRQ 0x0d
  71. #define DRM_VIA_DMA_BLIT 0x0e
  72. #define DRM_VIA_BLIT_SYNC 0x0f
  73. #define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
  74. #define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
  75. #define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t)
  76. #define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
  77. #define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
  78. #define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
  79. #define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
  80. #define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
  81. #define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH)
  82. #define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t)
  83. #define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \
  84. drm_via_cmdbuf_size_t)
  85. #define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t)
  86. #define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t)
  87. #define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
  88. /* Indices into buf.Setup where various bits of state are mirrored per
  89. * context and per buffer. These can be fired at the card as a unit,
  90. * or in a piecewise fashion as required.
  91. */
  92. #define VIA_TEX_SETUP_SIZE 8
  93. /* Flags for clear ioctl
  94. */
  95. #define VIA_FRONT 0x1
  96. #define VIA_BACK 0x2
  97. #define VIA_DEPTH 0x4
  98. #define VIA_STENCIL 0x8
  99. #define VIA_MEM_VIDEO 0 /* matches drm constant */
  100. #define VIA_MEM_AGP 1 /* matches drm constant */
  101. #define VIA_MEM_SYSTEM 2
  102. #define VIA_MEM_MIXED 3
  103. #define VIA_MEM_UNKNOWN 4
  104. typedef struct {
  105. uint32_t offset;
  106. uint32_t size;
  107. } drm_via_agp_t;
  108. typedef struct {
  109. uint32_t offset;
  110. uint32_t size;
  111. } drm_via_fb_t;
  112. typedef struct {
  113. uint32_t context;
  114. uint32_t type;
  115. uint32_t size;
  116. unsigned long index;
  117. unsigned long offset;
  118. } drm_via_mem_t;
  119. typedef struct _drm_via_init {
  120. enum {
  121. VIA_INIT_MAP = 0x01,
  122. VIA_CLEANUP_MAP = 0x02
  123. } func;
  124. unsigned long sarea_priv_offset;
  125. unsigned long fb_offset;
  126. unsigned long mmio_offset;
  127. unsigned long agpAddr;
  128. } drm_via_init_t;
  129. typedef struct _drm_via_futex {
  130. enum {
  131. VIA_FUTEX_WAIT = 0x00,
  132. VIA_FUTEX_WAKE = 0X01
  133. } func;
  134. uint32_t ms;
  135. uint32_t lock;
  136. uint32_t val;
  137. } drm_via_futex_t;
  138. typedef struct _drm_via_dma_init {
  139. enum {
  140. VIA_INIT_DMA = 0x01,
  141. VIA_CLEANUP_DMA = 0x02,
  142. VIA_DMA_INITIALIZED = 0x03
  143. } func;
  144. unsigned long offset;
  145. unsigned long size;
  146. unsigned long reg_pause_addr;
  147. } drm_via_dma_init_t;
  148. typedef struct _drm_via_cmdbuffer {
  149. char __user *buf;
  150. unsigned long size;
  151. } drm_via_cmdbuffer_t;
  152. /* Warning: If you change the SAREA structure you must change the Xserver
  153. * structure as well */
  154. typedef struct _drm_via_tex_region {
  155. unsigned char next, prev; /* indices to form a circular LRU */
  156. unsigned char inUse; /* owned by a client, or free? */
  157. int age; /* tracked by clients to update local LRU's */
  158. } drm_via_tex_region_t;
  159. typedef struct _drm_via_sarea {
  160. unsigned int dirty;
  161. unsigned int nbox;
  162. struct drm_clip_rect boxes[VIA_NR_SAREA_CLIPRECTS];
  163. drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1];
  164. int texAge; /* last time texture was uploaded */
  165. int ctxOwner; /* last context to upload state */
  166. int vertexPrim;
  167. /*
  168. * Below is for XvMC.
  169. * We want the lock integers alone on, and aligned to, a cache line.
  170. * Therefore this somewhat strange construct.
  171. */
  172. char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];
  173. unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
  174. unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
  175. unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */
  176. /* Used by the 3d driver only at this point, for pageflipping:
  177. */
  178. unsigned int pfCurrentOffset;
  179. } drm_via_sarea_t;
  180. typedef struct _drm_via_cmdbuf_size {
  181. enum {
  182. VIA_CMDBUF_SPACE = 0x01,
  183. VIA_CMDBUF_LAG = 0x02
  184. } func;
  185. int wait;
  186. uint32_t size;
  187. } drm_via_cmdbuf_size_t;
  188. typedef enum {
  189. VIA_IRQ_ABSOLUTE = 0x0,
  190. VIA_IRQ_RELATIVE = 0x1,
  191. VIA_IRQ_SIGNAL = 0x10000000,
  192. VIA_IRQ_FORCE_SEQUENCE = 0x20000000
  193. } via_irq_seq_type_t;
  194. #define VIA_IRQ_FLAGS_MASK 0xF0000000
  195. enum drm_via_irqs {
  196. drm_via_irq_hqv0 = 0,
  197. drm_via_irq_hqv1,
  198. drm_via_irq_dma0_dd,
  199. drm_via_irq_dma0_td,
  200. drm_via_irq_dma1_dd,
  201. drm_via_irq_dma1_td,
  202. drm_via_irq_num
  203. };
  204. struct drm_via_wait_irq_request {
  205. unsigned irq;
  206. via_irq_seq_type_t type;
  207. uint32_t sequence;
  208. uint32_t signal;
  209. };
  210. typedef union drm_via_irqwait {
  211. struct drm_via_wait_irq_request request;
  212. struct drm_wait_vblank_reply reply;
  213. } drm_via_irqwait_t;
  214. typedef struct drm_via_blitsync {
  215. uint32_t sync_handle;
  216. unsigned engine;
  217. } drm_via_blitsync_t;
  218. /* - * Below,"flags" is currently unused but will be used for possible future
  219. * extensions like kernel space bounce buffers for bad alignments and
  220. * blit engine busy-wait polling for better latency in the absence of
  221. * interrupts.
  222. */
  223. typedef struct drm_via_dmablit {
  224. uint32_t num_lines;
  225. uint32_t line_length;
  226. uint32_t fb_addr;
  227. uint32_t fb_stride;
  228. unsigned char *mem_addr;
  229. uint32_t mem_stride;
  230. uint32_t flags;
  231. int to_fb;
  232. drm_via_blitsync_t sync;
  233. } drm_via_dmablit_t;
  234. #endif /* _VIA_DRM_H_ */