whc-rc.c 14 KB

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  1. /*
  2. * Wireless Host Controller: Radio Control Interface (WHCI v0.95[2.3])
  3. * Radio Control command/event transport to the UWB stack
  4. *
  5. * Copyright (C) 2005-2006 Intel Corporation
  6. * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License version
  10. * 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  20. * 02110-1301, USA.
  21. *
  22. *
  23. * Initialize and hook up the Radio Control interface.
  24. *
  25. * For each device probed, creates an 'struct whcrc' which contains
  26. * just the representation of the UWB Radio Controller, and the logic
  27. * for reading notifications and passing them to the UWB Core.
  28. *
  29. * So we initialize all of those, register the UWB Radio Controller
  30. * and setup the notification/event handle to pipe the notifications
  31. * to the UWB management Daemon.
  32. *
  33. * Once uwb_rc_add() is called, the UWB stack takes control, resets
  34. * the radio and readies the device to take commands the UWB
  35. * API/user-space.
  36. *
  37. * Note this driver is just a transport driver; the commands are
  38. * formed at the UWB stack and given to this driver who will deliver
  39. * them to the hw and transfer the replies/notifications back to the
  40. * UWB stack through the UWB daemon (UWBD).
  41. */
  42. #include <linux/version.h>
  43. #include <linux/init.h>
  44. #include <linux/module.h>
  45. #include <linux/pci.h>
  46. #include <linux/dma-mapping.h>
  47. #include <linux/interrupt.h>
  48. #include <linux/workqueue.h>
  49. #include <linux/uwb.h>
  50. #include <linux/uwb/whci.h>
  51. #include <linux/uwb/umc.h>
  52. #include "uwb-internal.h"
  53. #define D_LOCAL 0
  54. #include <linux/uwb/debug.h>
  55. /**
  56. * Descriptor for an instance of the UWB Radio Control Driver that
  57. * attaches to the URC interface of the WHCI PCI card.
  58. *
  59. * Unless there is a lock specific to the 'data members', all access
  60. * is protected by uwb_rc->mutex.
  61. */
  62. struct whcrc {
  63. struct umc_dev *umc_dev;
  64. struct uwb_rc *uwb_rc; /* UWB host controller */
  65. unsigned long area;
  66. void __iomem *rc_base;
  67. size_t rc_len;
  68. spinlock_t irq_lock;
  69. void *evt_buf, *cmd_buf;
  70. dma_addr_t evt_dma_buf, cmd_dma_buf;
  71. wait_queue_head_t cmd_wq;
  72. struct work_struct event_work;
  73. };
  74. /**
  75. * Execute an UWB RC command on WHCI/RC
  76. *
  77. * @rc: Instance of a Radio Controller that is a whcrc
  78. * @cmd: Buffer containing the RCCB and payload to execute
  79. * @cmd_size: Size of the command buffer.
  80. *
  81. * We copy the command into whcrc->cmd_buf (as it is pretty and
  82. * aligned`and physically contiguous) and then press the right keys in
  83. * the controller's URCCMD register to get it to read it. We might
  84. * have to wait for the cmd_sem to be open to us.
  85. *
  86. * NOTE: rc's mutex has to be locked
  87. */
  88. static int whcrc_cmd(struct uwb_rc *uwb_rc,
  89. const struct uwb_rccb *cmd, size_t cmd_size)
  90. {
  91. int result = 0;
  92. struct whcrc *whcrc = uwb_rc->priv;
  93. struct device *dev = &whcrc->umc_dev->dev;
  94. u32 urccmd;
  95. d_fnstart(3, dev, "(%p, %p, %zu)\n", uwb_rc, cmd, cmd_size);
  96. might_sleep();
  97. if (cmd_size >= 4096) {
  98. result = -E2BIG;
  99. goto error;
  100. }
  101. /*
  102. * If the URC is halted, then the hardware has reset itself.
  103. * Attempt to recover by restarting the device and then return
  104. * an error as it's likely that the current command isn't
  105. * valid for a newly started RC.
  106. */
  107. if (le_readl(whcrc->rc_base + URCSTS) & URCSTS_HALTED) {
  108. dev_err(dev, "requesting reset of halted radio controller\n");
  109. uwb_rc_reset_all(uwb_rc);
  110. result = -EIO;
  111. goto error;
  112. }
  113. result = wait_event_timeout(whcrc->cmd_wq,
  114. !(le_readl(whcrc->rc_base + URCCMD) & URCCMD_ACTIVE), HZ/2);
  115. if (result == 0) {
  116. dev_err(dev, "device is not ready to execute commands\n");
  117. result = -ETIMEDOUT;
  118. goto error;
  119. }
  120. memmove(whcrc->cmd_buf, cmd, cmd_size);
  121. le_writeq(whcrc->cmd_dma_buf, whcrc->rc_base + URCCMDADDR);
  122. spin_lock(&whcrc->irq_lock);
  123. urccmd = le_readl(whcrc->rc_base + URCCMD);
  124. urccmd &= ~(URCCMD_EARV | URCCMD_SIZE_MASK);
  125. le_writel(urccmd | URCCMD_ACTIVE | URCCMD_IWR | cmd_size,
  126. whcrc->rc_base + URCCMD);
  127. spin_unlock(&whcrc->irq_lock);
  128. error:
  129. d_fnend(3, dev, "(%p, %p, %zu) = %d\n",
  130. uwb_rc, cmd, cmd_size, result);
  131. return result;
  132. }
  133. static int whcrc_reset(struct uwb_rc *rc)
  134. {
  135. struct whcrc *whcrc = rc->priv;
  136. return umc_controller_reset(whcrc->umc_dev);
  137. }
  138. /**
  139. * Reset event reception mechanism and tell hw we are ready to get more
  140. *
  141. * We have read all the events in the event buffer, so we are ready to
  142. * reset it to the beginning.
  143. *
  144. * This is only called during initialization or after an event buffer
  145. * has been retired. This means we can be sure that event processing
  146. * is disabled and it's safe to update the URCEVTADDR register.
  147. *
  148. * There's no need to wait for the event processing to start as the
  149. * URC will not clear URCCMD_ACTIVE until (internal) event buffer
  150. * space is available.
  151. */
  152. static
  153. void whcrc_enable_events(struct whcrc *whcrc)
  154. {
  155. struct device *dev = &whcrc->umc_dev->dev;
  156. u32 urccmd;
  157. d_fnstart(4, dev, "(whcrc %p)\n", whcrc);
  158. le_writeq(whcrc->evt_dma_buf, whcrc->rc_base + URCEVTADDR);
  159. spin_lock(&whcrc->irq_lock);
  160. urccmd = le_readl(whcrc->rc_base + URCCMD) & ~URCCMD_ACTIVE;
  161. le_writel(urccmd | URCCMD_EARV, whcrc->rc_base + URCCMD);
  162. spin_unlock(&whcrc->irq_lock);
  163. d_fnend(4, dev, "(whcrc %p) = void\n", whcrc);
  164. }
  165. static void whcrc_event_work(struct work_struct *work)
  166. {
  167. struct whcrc *whcrc = container_of(work, struct whcrc, event_work);
  168. struct device *dev = &whcrc->umc_dev->dev;
  169. size_t size;
  170. u64 urcevtaddr;
  171. urcevtaddr = le_readq(whcrc->rc_base + URCEVTADDR);
  172. size = urcevtaddr & URCEVTADDR_OFFSET_MASK;
  173. d_printf(3, dev, "received %zu octet event\n", size);
  174. d_dump(4, dev, whcrc->evt_buf, size > 32 ? 32 : size);
  175. uwb_rc_neh_grok(whcrc->uwb_rc, whcrc->evt_buf, size);
  176. whcrc_enable_events(whcrc);
  177. }
  178. /**
  179. * Catch interrupts?
  180. *
  181. * We ack inmediately (and expect the hw to do the right thing and
  182. * raise another IRQ if things have changed :)
  183. */
  184. static
  185. irqreturn_t whcrc_irq_cb(int irq, void *_whcrc)
  186. {
  187. struct whcrc *whcrc = _whcrc;
  188. struct device *dev = &whcrc->umc_dev->dev;
  189. u32 urcsts;
  190. urcsts = le_readl(whcrc->rc_base + URCSTS);
  191. if (!(urcsts & URCSTS_INT_MASK))
  192. return IRQ_NONE;
  193. le_writel(urcsts & URCSTS_INT_MASK, whcrc->rc_base + URCSTS);
  194. d_printf(4, dev, "acked 0x%08x, urcsts 0x%08x\n",
  195. le_readl(whcrc->rc_base + URCSTS), urcsts);
  196. if (urcsts & URCSTS_HSE) {
  197. dev_err(dev, "host system error -- hardware halted\n");
  198. /* FIXME: do something sensible here */
  199. goto out;
  200. }
  201. if (urcsts & URCSTS_ER) {
  202. d_printf(3, dev, "ER: event ready\n");
  203. schedule_work(&whcrc->event_work);
  204. }
  205. if (urcsts & URCSTS_RCI) {
  206. d_printf(3, dev, "RCI: ready to execute another command\n");
  207. wake_up_all(&whcrc->cmd_wq);
  208. }
  209. out:
  210. return IRQ_HANDLED;
  211. }
  212. /**
  213. * Initialize a UMC RC interface: map regions, get (shared) IRQ
  214. */
  215. static
  216. int whcrc_setup_rc_umc(struct whcrc *whcrc)
  217. {
  218. int result = 0;
  219. struct device *dev = &whcrc->umc_dev->dev;
  220. struct umc_dev *umc_dev = whcrc->umc_dev;
  221. whcrc->area = umc_dev->resource.start;
  222. whcrc->rc_len = umc_dev->resource.end - umc_dev->resource.start + 1;
  223. result = -EBUSY;
  224. if (request_mem_region(whcrc->area, whcrc->rc_len, KBUILD_MODNAME)
  225. == NULL) {
  226. dev_err(dev, "can't request URC region (%zu bytes @ 0x%lx): %d\n",
  227. whcrc->rc_len, whcrc->area, result);
  228. goto error_request_region;
  229. }
  230. whcrc->rc_base = ioremap_nocache(whcrc->area, whcrc->rc_len);
  231. if (whcrc->rc_base == NULL) {
  232. dev_err(dev, "can't ioremap registers (%zu bytes @ 0x%lx): %d\n",
  233. whcrc->rc_len, whcrc->area, result);
  234. goto error_ioremap_nocache;
  235. }
  236. result = request_irq(umc_dev->irq, whcrc_irq_cb, IRQF_SHARED,
  237. KBUILD_MODNAME, whcrc);
  238. if (result < 0) {
  239. dev_err(dev, "can't allocate IRQ %d: %d\n",
  240. umc_dev->irq, result);
  241. goto error_request_irq;
  242. }
  243. result = -ENOMEM;
  244. whcrc->cmd_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE,
  245. &whcrc->cmd_dma_buf, GFP_KERNEL);
  246. if (whcrc->cmd_buf == NULL) {
  247. dev_err(dev, "Can't allocate cmd transfer buffer\n");
  248. goto error_cmd_buffer;
  249. }
  250. whcrc->evt_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE,
  251. &whcrc->evt_dma_buf, GFP_KERNEL);
  252. if (whcrc->evt_buf == NULL) {
  253. dev_err(dev, "Can't allocate evt transfer buffer\n");
  254. goto error_evt_buffer;
  255. }
  256. d_printf(3, dev, "UWB RC Interface: %zu bytes at 0x%p, irq %u\n",
  257. whcrc->rc_len, whcrc->rc_base, umc_dev->irq);
  258. return 0;
  259. error_evt_buffer:
  260. dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf,
  261. whcrc->cmd_dma_buf);
  262. error_cmd_buffer:
  263. free_irq(umc_dev->irq, whcrc);
  264. error_request_irq:
  265. iounmap(whcrc->rc_base);
  266. error_ioremap_nocache:
  267. release_mem_region(whcrc->area, whcrc->rc_len);
  268. error_request_region:
  269. return result;
  270. }
  271. /**
  272. * Release RC's UMC resources
  273. */
  274. static
  275. void whcrc_release_rc_umc(struct whcrc *whcrc)
  276. {
  277. struct umc_dev *umc_dev = whcrc->umc_dev;
  278. dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->evt_buf,
  279. whcrc->evt_dma_buf);
  280. dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf,
  281. whcrc->cmd_dma_buf);
  282. free_irq(umc_dev->irq, whcrc);
  283. iounmap(whcrc->rc_base);
  284. release_mem_region(whcrc->area, whcrc->rc_len);
  285. }
  286. /**
  287. * whcrc_start_rc - start a WHCI radio controller
  288. * @whcrc: the radio controller to start
  289. *
  290. * Reset the UMC device, start the radio controller, enable events and
  291. * finally enable interrupts.
  292. */
  293. static int whcrc_start_rc(struct uwb_rc *rc)
  294. {
  295. struct whcrc *whcrc = rc->priv;
  296. int result = 0;
  297. struct device *dev = &whcrc->umc_dev->dev;
  298. unsigned long start, duration;
  299. /* Reset the thing */
  300. le_writel(URCCMD_RESET, whcrc->rc_base + URCCMD);
  301. if (d_test(3))
  302. start = jiffies;
  303. if (whci_wait_for(dev, whcrc->rc_base + URCCMD, URCCMD_RESET, 0,
  304. 5000, "device to reset at init") < 0) {
  305. result = -EBUSY;
  306. goto error;
  307. } else if (d_test(3)) {
  308. duration = jiffies - start;
  309. if (duration > msecs_to_jiffies(40))
  310. dev_err(dev, "Device took %ums to "
  311. "reset. MAX expected: 40ms\n",
  312. jiffies_to_msecs(duration));
  313. }
  314. /* Set the event buffer, start the controller (enable IRQs later) */
  315. le_writel(0, whcrc->rc_base + URCINTR);
  316. le_writel(URCCMD_RS, whcrc->rc_base + URCCMD);
  317. result = -ETIMEDOUT;
  318. if (d_test(3))
  319. start = jiffies;
  320. if (whci_wait_for(dev, whcrc->rc_base + URCSTS, URCSTS_HALTED, 0,
  321. 5000, "device to start") < 0)
  322. goto error;
  323. if (d_test(3)) {
  324. duration = jiffies - start;
  325. if (duration > msecs_to_jiffies(40))
  326. dev_err(dev, "Device took %ums to start. "
  327. "MAX expected: 40ms\n",
  328. jiffies_to_msecs(duration));
  329. }
  330. whcrc_enable_events(whcrc);
  331. result = 0;
  332. le_writel(URCINTR_EN_ALL, whcrc->rc_base + URCINTR);
  333. error:
  334. return result;
  335. }
  336. /**
  337. * whcrc_stop_rc - stop a WHCI radio controller
  338. * @whcrc: the radio controller to stop
  339. *
  340. * Disable interrupts and cancel any pending event processing work
  341. * before clearing the Run/Stop bit.
  342. */
  343. static
  344. void whcrc_stop_rc(struct uwb_rc *rc)
  345. {
  346. struct whcrc *whcrc = rc->priv;
  347. struct umc_dev *umc_dev = whcrc->umc_dev;
  348. le_writel(0, whcrc->rc_base + URCINTR);
  349. cancel_work_sync(&whcrc->event_work);
  350. le_writel(0, whcrc->rc_base + URCCMD);
  351. whci_wait_for(&umc_dev->dev, whcrc->rc_base + URCSTS,
  352. URCSTS_HALTED, 0, 40, "URCSTS.HALTED");
  353. }
  354. static void whcrc_init(struct whcrc *whcrc)
  355. {
  356. spin_lock_init(&whcrc->irq_lock);
  357. init_waitqueue_head(&whcrc->cmd_wq);
  358. INIT_WORK(&whcrc->event_work, whcrc_event_work);
  359. }
  360. /**
  361. * Initialize the radio controller.
  362. *
  363. * NOTE: we setup whcrc->uwb_rc before calling uwb_rc_add(); in the
  364. * IRQ handler we use that to determine if the hw is ready to
  365. * handle events. Looks like a race condition, but it really is
  366. * not.
  367. */
  368. static
  369. int whcrc_probe(struct umc_dev *umc_dev)
  370. {
  371. int result;
  372. struct uwb_rc *uwb_rc;
  373. struct whcrc *whcrc;
  374. struct device *dev = &umc_dev->dev;
  375. d_fnstart(3, dev, "(umc_dev %p)\n", umc_dev);
  376. result = -ENOMEM;
  377. uwb_rc = uwb_rc_alloc();
  378. if (uwb_rc == NULL) {
  379. dev_err(dev, "unable to allocate RC instance\n");
  380. goto error_rc_alloc;
  381. }
  382. whcrc = kzalloc(sizeof(*whcrc), GFP_KERNEL);
  383. if (whcrc == NULL) {
  384. dev_err(dev, "unable to allocate WHC-RC instance\n");
  385. goto error_alloc;
  386. }
  387. whcrc_init(whcrc);
  388. whcrc->umc_dev = umc_dev;
  389. result = whcrc_setup_rc_umc(whcrc);
  390. if (result < 0) {
  391. dev_err(dev, "Can't setup RC UMC interface: %d\n", result);
  392. goto error_setup_rc_umc;
  393. }
  394. whcrc->uwb_rc = uwb_rc;
  395. uwb_rc->owner = THIS_MODULE;
  396. uwb_rc->cmd = whcrc_cmd;
  397. uwb_rc->reset = whcrc_reset;
  398. uwb_rc->start = whcrc_start_rc;
  399. uwb_rc->stop = whcrc_stop_rc;
  400. result = uwb_rc_add(uwb_rc, dev, whcrc);
  401. if (result < 0)
  402. goto error_rc_add;
  403. umc_set_drvdata(umc_dev, whcrc);
  404. d_fnend(3, dev, "(umc_dev %p) = 0\n", umc_dev);
  405. return 0;
  406. error_rc_add:
  407. whcrc_release_rc_umc(whcrc);
  408. error_setup_rc_umc:
  409. kfree(whcrc);
  410. error_alloc:
  411. uwb_rc_put(uwb_rc);
  412. error_rc_alloc:
  413. d_fnend(3, dev, "(umc_dev %p) = %d\n", umc_dev, result);
  414. return result;
  415. }
  416. /**
  417. * Clean up the radio control resources
  418. *
  419. * When we up the command semaphore, everybody possibly held trying to
  420. * execute a command should be granted entry and then they'll see the
  421. * host is quiescing and up it (so it will chain to the next waiter).
  422. * This should not happen (in any case), as we can only remove when
  423. * there are no handles open...
  424. */
  425. static void whcrc_remove(struct umc_dev *umc_dev)
  426. {
  427. struct whcrc *whcrc = umc_get_drvdata(umc_dev);
  428. struct uwb_rc *uwb_rc = whcrc->uwb_rc;
  429. umc_set_drvdata(umc_dev, NULL);
  430. uwb_rc_rm(uwb_rc);
  431. whcrc_release_rc_umc(whcrc);
  432. kfree(whcrc);
  433. uwb_rc_put(uwb_rc);
  434. d_printf(1, &umc_dev->dev, "freed whcrc %p\n", whcrc);
  435. }
  436. /* PCI device ID's that we handle [so it gets loaded] */
  437. static struct pci_device_id whcrc_id_table[] = {
  438. { PCI_DEVICE_CLASS(PCI_CLASS_WIRELESS_WHCI, ~0) },
  439. { /* empty last entry */ }
  440. };
  441. MODULE_DEVICE_TABLE(pci, whcrc_id_table);
  442. static struct umc_driver whcrc_driver = {
  443. .name = "whc-rc",
  444. .cap_id = UMC_CAP_ID_WHCI_RC,
  445. .probe = whcrc_probe,
  446. .remove = whcrc_remove,
  447. };
  448. static int __init whcrc_driver_init(void)
  449. {
  450. return umc_driver_register(&whcrc_driver);
  451. }
  452. module_init(whcrc_driver_init);
  453. static void __exit whcrc_driver_exit(void)
  454. {
  455. umc_driver_unregister(&whcrc_driver);
  456. }
  457. module_exit(whcrc_driver_exit);
  458. MODULE_AUTHOR("Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>");
  459. MODULE_DESCRIPTION("Wireless Host Controller Radio Control Driver");
  460. MODULE_LICENSE("GPL");