mpc52xx_uart.c 33 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288
  1. /*
  2. * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
  3. *
  4. * FIXME According to the usermanual the status bits in the status register
  5. * are only updated when the peripherals access the FIFO and not when the
  6. * CPU access them. So since we use this bits to know when we stop writing
  7. * and reading, they may not be updated in-time and a race condition may
  8. * exists. But I haven't be able to prove this and I don't care. But if
  9. * any problem arises, it might worth checking. The TX/RX FIFO Stats
  10. * registers should be used in addition.
  11. * Update: Actually, they seem updated ... At least the bits we use.
  12. *
  13. *
  14. * Maintainer : Sylvain Munaut <tnt@246tNt.com>
  15. *
  16. * Some of the code has been inspired/copied from the 2.4 code written
  17. * by Dale Farnsworth <dfarnsworth@mvista.com>.
  18. *
  19. * Copyright (C) 2008 Freescale Semiconductor Inc.
  20. * John Rigby <jrigby@gmail.com>
  21. * Added support for MPC5121
  22. * Copyright (C) 2006 Secret Lab Technologies Ltd.
  23. * Grant Likely <grant.likely@secretlab.ca>
  24. * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
  25. * Copyright (C) 2003 MontaVista, Software, Inc.
  26. *
  27. * This file is licensed under the terms of the GNU General Public License
  28. * version 2. This program is licensed "as is" without any warranty of any
  29. * kind, whether express or implied.
  30. */
  31. /* Platform device Usage :
  32. *
  33. * Since PSCs can have multiple function, the correct driver for each one
  34. * is selected by calling mpc52xx_match_psc_function(...). The function
  35. * handled by this driver is "uart".
  36. *
  37. * The driver init all necessary registers to place the PSC in uart mode without
  38. * DCD. However, the pin multiplexing aren't changed and should be set either
  39. * by the bootloader or in the platform init code.
  40. *
  41. * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
  42. * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
  43. * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
  44. * fpr the console code : without this 1:1 mapping, at early boot time, when we
  45. * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
  46. * will be mapped to.
  47. */
  48. /* OF Platform device Usage :
  49. *
  50. * This driver is only used for PSCs configured in uart mode. The device
  51. * tree will have a node for each PSC in uart mode w/ device_type = "serial"
  52. * and "mpc52xx-psc-uart" in the compatible string
  53. *
  54. * By default, PSC devices are enumerated in the order they are found. However
  55. * a particular PSC number can be forces by adding 'device_no = <port#>'
  56. * to the device node.
  57. *
  58. * The driver init all necessary registers to place the PSC in uart mode without
  59. * DCD. However, the pin multiplexing aren't changed and should be set either
  60. * by the bootloader or in the platform init code.
  61. */
  62. #undef DEBUG
  63. #include <linux/device.h>
  64. #include <linux/module.h>
  65. #include <linux/tty.h>
  66. #include <linux/serial.h>
  67. #include <linux/sysrq.h>
  68. #include <linux/console.h>
  69. #include <linux/delay.h>
  70. #include <linux/io.h>
  71. #include <linux/of.h>
  72. #include <linux/of_platform.h>
  73. #include <asm/mpc52xx.h>
  74. #include <asm/mpc512x.h>
  75. #include <asm/mpc52xx_psc.h>
  76. #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  77. #define SUPPORT_SYSRQ
  78. #endif
  79. #include <linux/serial_core.h>
  80. /* We've been assigned a range on the "Low-density serial ports" major */
  81. #define SERIAL_PSC_MAJOR 204
  82. #define SERIAL_PSC_MINOR 148
  83. #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
  84. static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
  85. /* Rem: - We use the read_status_mask as a shadow of
  86. * psc->mpc52xx_psc_imr
  87. * - It's important that is array is all zero on start as we
  88. * use it to know if it's initialized or not ! If it's not sure
  89. * it's cleared, then a memset(...,0,...) should be added to
  90. * the console_init
  91. */
  92. /* lookup table for matching device nodes to index numbers */
  93. static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
  94. static void mpc52xx_uart_of_enumerate(void);
  95. #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
  96. /* Forward declaration of the interruption handling routine */
  97. static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
  98. /* Simple macro to test if a port is console or not. This one is taken
  99. * for serial_core.c and maybe should be moved to serial_core.h ? */
  100. #ifdef CONFIG_SERIAL_CORE_CONSOLE
  101. #define uart_console(port) \
  102. ((port)->cons && (port)->cons->index == (port)->line)
  103. #else
  104. #define uart_console(port) (0)
  105. #endif
  106. /* ======================================================================== */
  107. /* PSC fifo operations for isolating differences between 52xx and 512x */
  108. /* ======================================================================== */
  109. struct psc_ops {
  110. void (*fifo_init)(struct uart_port *port);
  111. int (*raw_rx_rdy)(struct uart_port *port);
  112. int (*raw_tx_rdy)(struct uart_port *port);
  113. int (*rx_rdy)(struct uart_port *port);
  114. int (*tx_rdy)(struct uart_port *port);
  115. int (*tx_empty)(struct uart_port *port);
  116. void (*stop_rx)(struct uart_port *port);
  117. void (*start_tx)(struct uart_port *port);
  118. void (*stop_tx)(struct uart_port *port);
  119. void (*rx_clr_irq)(struct uart_port *port);
  120. void (*tx_clr_irq)(struct uart_port *port);
  121. void (*write_char)(struct uart_port *port, unsigned char c);
  122. unsigned char (*read_char)(struct uart_port *port);
  123. void (*cw_disable_ints)(struct uart_port *port);
  124. void (*cw_restore_ints)(struct uart_port *port);
  125. unsigned long (*getuartclk)(void *p);
  126. };
  127. #ifdef CONFIG_PPC_MPC52xx
  128. #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
  129. static void mpc52xx_psc_fifo_init(struct uart_port *port)
  130. {
  131. struct mpc52xx_psc __iomem *psc = PSC(port);
  132. struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
  133. /* /32 prescaler */
  134. out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
  135. out_8(&fifo->rfcntl, 0x00);
  136. out_be16(&fifo->rfalarm, 0x1ff);
  137. out_8(&fifo->tfcntl, 0x07);
  138. out_be16(&fifo->tfalarm, 0x80);
  139. port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
  140. out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
  141. }
  142. static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
  143. {
  144. return in_be16(&PSC(port)->mpc52xx_psc_status)
  145. & MPC52xx_PSC_SR_RXRDY;
  146. }
  147. static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
  148. {
  149. return in_be16(&PSC(port)->mpc52xx_psc_status)
  150. & MPC52xx_PSC_SR_TXRDY;
  151. }
  152. static int mpc52xx_psc_rx_rdy(struct uart_port *port)
  153. {
  154. return in_be16(&PSC(port)->mpc52xx_psc_isr)
  155. & port->read_status_mask
  156. & MPC52xx_PSC_IMR_RXRDY;
  157. }
  158. static int mpc52xx_psc_tx_rdy(struct uart_port *port)
  159. {
  160. return in_be16(&PSC(port)->mpc52xx_psc_isr)
  161. & port->read_status_mask
  162. & MPC52xx_PSC_IMR_TXRDY;
  163. }
  164. static int mpc52xx_psc_tx_empty(struct uart_port *port)
  165. {
  166. return in_be16(&PSC(port)->mpc52xx_psc_status)
  167. & MPC52xx_PSC_SR_TXEMP;
  168. }
  169. static void mpc52xx_psc_start_tx(struct uart_port *port)
  170. {
  171. port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
  172. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  173. }
  174. static void mpc52xx_psc_stop_tx(struct uart_port *port)
  175. {
  176. port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
  177. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  178. }
  179. static void mpc52xx_psc_stop_rx(struct uart_port *port)
  180. {
  181. port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
  182. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  183. }
  184. static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
  185. {
  186. }
  187. static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
  188. {
  189. }
  190. static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
  191. {
  192. out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
  193. }
  194. static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
  195. {
  196. return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
  197. }
  198. static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
  199. {
  200. out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
  201. }
  202. static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
  203. {
  204. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  205. }
  206. /* Search for bus-frequency property in this node or a parent */
  207. static unsigned long mpc52xx_getuartclk(void *p)
  208. {
  209. /*
  210. * 5200 UARTs have a / 32 prescaler
  211. * but the generic serial code assumes 16
  212. * so return ipb freq / 2
  213. */
  214. return mpc52xx_find_ipb_freq(p) / 2;
  215. }
  216. static struct psc_ops mpc52xx_psc_ops = {
  217. .fifo_init = mpc52xx_psc_fifo_init,
  218. .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
  219. .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
  220. .rx_rdy = mpc52xx_psc_rx_rdy,
  221. .tx_rdy = mpc52xx_psc_tx_rdy,
  222. .tx_empty = mpc52xx_psc_tx_empty,
  223. .stop_rx = mpc52xx_psc_stop_rx,
  224. .start_tx = mpc52xx_psc_start_tx,
  225. .stop_tx = mpc52xx_psc_stop_tx,
  226. .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
  227. .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
  228. .write_char = mpc52xx_psc_write_char,
  229. .read_char = mpc52xx_psc_read_char,
  230. .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
  231. .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
  232. .getuartclk = mpc52xx_getuartclk,
  233. };
  234. #endif /* CONFIG_MPC52xx */
  235. #ifdef CONFIG_PPC_MPC512x
  236. #define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
  237. static void mpc512x_psc_fifo_init(struct uart_port *port)
  238. {
  239. out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
  240. out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
  241. out_be32(&FIFO_512x(port)->txalarm, 1);
  242. out_be32(&FIFO_512x(port)->tximr, 0);
  243. out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
  244. out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
  245. out_be32(&FIFO_512x(port)->rxalarm, 1);
  246. out_be32(&FIFO_512x(port)->rximr, 0);
  247. out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
  248. out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
  249. }
  250. static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
  251. {
  252. return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
  253. }
  254. static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
  255. {
  256. return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
  257. }
  258. static int mpc512x_psc_rx_rdy(struct uart_port *port)
  259. {
  260. return in_be32(&FIFO_512x(port)->rxsr)
  261. & in_be32(&FIFO_512x(port)->rximr)
  262. & MPC512x_PSC_FIFO_ALARM;
  263. }
  264. static int mpc512x_psc_tx_rdy(struct uart_port *port)
  265. {
  266. return in_be32(&FIFO_512x(port)->txsr)
  267. & in_be32(&FIFO_512x(port)->tximr)
  268. & MPC512x_PSC_FIFO_ALARM;
  269. }
  270. static int mpc512x_psc_tx_empty(struct uart_port *port)
  271. {
  272. return in_be32(&FIFO_512x(port)->txsr)
  273. & MPC512x_PSC_FIFO_EMPTY;
  274. }
  275. static void mpc512x_psc_stop_rx(struct uart_port *port)
  276. {
  277. unsigned long rx_fifo_imr;
  278. rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
  279. rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
  280. out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
  281. }
  282. static void mpc512x_psc_start_tx(struct uart_port *port)
  283. {
  284. unsigned long tx_fifo_imr;
  285. tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
  286. tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
  287. out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
  288. }
  289. static void mpc512x_psc_stop_tx(struct uart_port *port)
  290. {
  291. unsigned long tx_fifo_imr;
  292. tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
  293. tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
  294. out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
  295. }
  296. static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
  297. {
  298. out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
  299. }
  300. static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
  301. {
  302. out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
  303. }
  304. static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
  305. {
  306. out_8(&FIFO_512x(port)->txdata_8, c);
  307. }
  308. static unsigned char mpc512x_psc_read_char(struct uart_port *port)
  309. {
  310. return in_8(&FIFO_512x(port)->rxdata_8);
  311. }
  312. static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
  313. {
  314. port->read_status_mask =
  315. in_be32(&FIFO_512x(port)->tximr) << 16 |
  316. in_be32(&FIFO_512x(port)->rximr);
  317. out_be32(&FIFO_512x(port)->tximr, 0);
  318. out_be32(&FIFO_512x(port)->rximr, 0);
  319. }
  320. static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
  321. {
  322. out_be32(&FIFO_512x(port)->tximr,
  323. (port->read_status_mask >> 16) & 0x7f);
  324. out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
  325. }
  326. static unsigned long mpc512x_getuartclk(void *p)
  327. {
  328. return mpc512x_find_ips_freq(p);
  329. }
  330. static struct psc_ops mpc512x_psc_ops = {
  331. .fifo_init = mpc512x_psc_fifo_init,
  332. .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
  333. .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
  334. .rx_rdy = mpc512x_psc_rx_rdy,
  335. .tx_rdy = mpc512x_psc_tx_rdy,
  336. .tx_empty = mpc512x_psc_tx_empty,
  337. .stop_rx = mpc512x_psc_stop_rx,
  338. .start_tx = mpc512x_psc_start_tx,
  339. .stop_tx = mpc512x_psc_stop_tx,
  340. .rx_clr_irq = mpc512x_psc_rx_clr_irq,
  341. .tx_clr_irq = mpc512x_psc_tx_clr_irq,
  342. .write_char = mpc512x_psc_write_char,
  343. .read_char = mpc512x_psc_read_char,
  344. .cw_disable_ints = mpc512x_psc_cw_disable_ints,
  345. .cw_restore_ints = mpc512x_psc_cw_restore_ints,
  346. .getuartclk = mpc512x_getuartclk,
  347. };
  348. #endif
  349. static struct psc_ops *psc_ops;
  350. /* ======================================================================== */
  351. /* UART operations */
  352. /* ======================================================================== */
  353. static unsigned int
  354. mpc52xx_uart_tx_empty(struct uart_port *port)
  355. {
  356. return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
  357. }
  358. static void
  359. mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  360. {
  361. /* Not implemented */
  362. }
  363. static unsigned int
  364. mpc52xx_uart_get_mctrl(struct uart_port *port)
  365. {
  366. /* Not implemented */
  367. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  368. }
  369. static void
  370. mpc52xx_uart_stop_tx(struct uart_port *port)
  371. {
  372. /* port->lock taken by caller */
  373. psc_ops->stop_tx(port);
  374. }
  375. static void
  376. mpc52xx_uart_start_tx(struct uart_port *port)
  377. {
  378. /* port->lock taken by caller */
  379. psc_ops->start_tx(port);
  380. }
  381. static void
  382. mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
  383. {
  384. unsigned long flags;
  385. spin_lock_irqsave(&port->lock, flags);
  386. port->x_char = ch;
  387. if (ch) {
  388. /* Make sure tx interrupts are on */
  389. /* Truly necessary ??? They should be anyway */
  390. psc_ops->start_tx(port);
  391. }
  392. spin_unlock_irqrestore(&port->lock, flags);
  393. }
  394. static void
  395. mpc52xx_uart_stop_rx(struct uart_port *port)
  396. {
  397. /* port->lock taken by caller */
  398. psc_ops->stop_rx(port);
  399. }
  400. static void
  401. mpc52xx_uart_enable_ms(struct uart_port *port)
  402. {
  403. /* Not implemented */
  404. }
  405. static void
  406. mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
  407. {
  408. unsigned long flags;
  409. spin_lock_irqsave(&port->lock, flags);
  410. if (ctl == -1)
  411. out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
  412. else
  413. out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
  414. spin_unlock_irqrestore(&port->lock, flags);
  415. }
  416. static int
  417. mpc52xx_uart_startup(struct uart_port *port)
  418. {
  419. struct mpc52xx_psc __iomem *psc = PSC(port);
  420. int ret;
  421. /* Request IRQ */
  422. ret = request_irq(port->irq, mpc52xx_uart_int,
  423. IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
  424. "mpc52xx_psc_uart", port);
  425. if (ret)
  426. return ret;
  427. /* Reset/activate the port, clear and enable interrupts */
  428. out_8(&psc->command, MPC52xx_PSC_RST_RX);
  429. out_8(&psc->command, MPC52xx_PSC_RST_TX);
  430. out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
  431. psc_ops->fifo_init(port);
  432. out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
  433. out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
  434. return 0;
  435. }
  436. static void
  437. mpc52xx_uart_shutdown(struct uart_port *port)
  438. {
  439. struct mpc52xx_psc __iomem *psc = PSC(port);
  440. /* Shut down the port. Leave TX active if on a console port */
  441. out_8(&psc->command, MPC52xx_PSC_RST_RX);
  442. if (!uart_console(port))
  443. out_8(&psc->command, MPC52xx_PSC_RST_TX);
  444. port->read_status_mask = 0;
  445. out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
  446. /* Release interrupt */
  447. free_irq(port->irq, port);
  448. }
  449. static void
  450. mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
  451. struct ktermios *old)
  452. {
  453. struct mpc52xx_psc __iomem *psc = PSC(port);
  454. unsigned long flags;
  455. unsigned char mr1, mr2;
  456. unsigned short ctr;
  457. unsigned int j, baud, quot;
  458. /* Prepare what we're gonna write */
  459. mr1 = 0;
  460. switch (new->c_cflag & CSIZE) {
  461. case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
  462. break;
  463. case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
  464. break;
  465. case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
  466. break;
  467. case CS8:
  468. default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
  469. }
  470. if (new->c_cflag & PARENB) {
  471. mr1 |= (new->c_cflag & PARODD) ?
  472. MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
  473. } else
  474. mr1 |= MPC52xx_PSC_MODE_PARNONE;
  475. mr2 = 0;
  476. if (new->c_cflag & CSTOPB)
  477. mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
  478. else
  479. mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
  480. MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
  481. MPC52xx_PSC_MODE_ONE_STOP;
  482. baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
  483. quot = uart_get_divisor(port, baud);
  484. ctr = quot & 0xffff;
  485. /* Get the lock */
  486. spin_lock_irqsave(&port->lock, flags);
  487. /* Update the per-port timeout */
  488. uart_update_timeout(port, new->c_cflag, baud);
  489. /* Do our best to flush TX & RX, so we don't loose anything */
  490. /* But we don't wait indefinitly ! */
  491. j = 5000000; /* Maximum wait */
  492. /* FIXME Can't receive chars since set_termios might be called at early
  493. * boot for the console, all stuff is not yet ready to receive at that
  494. * time and that just makes the kernel oops */
  495. /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
  496. while (!mpc52xx_uart_tx_empty(port) && --j)
  497. udelay(1);
  498. if (!j)
  499. printk(KERN_ERR "mpc52xx_uart.c: "
  500. "Unable to flush RX & TX fifos in-time in set_termios."
  501. "Some chars may have been lost.\n");
  502. /* Reset the TX & RX */
  503. out_8(&psc->command, MPC52xx_PSC_RST_RX);
  504. out_8(&psc->command, MPC52xx_PSC_RST_TX);
  505. /* Send new mode settings */
  506. out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
  507. out_8(&psc->mode, mr1);
  508. out_8(&psc->mode, mr2);
  509. out_8(&psc->ctur, ctr >> 8);
  510. out_8(&psc->ctlr, ctr & 0xff);
  511. /* Reenable TX & RX */
  512. out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
  513. out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
  514. /* We're all set, release the lock */
  515. spin_unlock_irqrestore(&port->lock, flags);
  516. }
  517. static const char *
  518. mpc52xx_uart_type(struct uart_port *port)
  519. {
  520. return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
  521. }
  522. static void
  523. mpc52xx_uart_release_port(struct uart_port *port)
  524. {
  525. /* remapped by us ? */
  526. if (port->flags & UPF_IOREMAP) {
  527. iounmap(port->membase);
  528. port->membase = NULL;
  529. }
  530. release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
  531. }
  532. static int
  533. mpc52xx_uart_request_port(struct uart_port *port)
  534. {
  535. int err;
  536. if (port->flags & UPF_IOREMAP) /* Need to remap ? */
  537. port->membase = ioremap(port->mapbase,
  538. sizeof(struct mpc52xx_psc));
  539. if (!port->membase)
  540. return -EINVAL;
  541. err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
  542. "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
  543. if (err && (port->flags & UPF_IOREMAP)) {
  544. iounmap(port->membase);
  545. port->membase = NULL;
  546. }
  547. return err;
  548. }
  549. static void
  550. mpc52xx_uart_config_port(struct uart_port *port, int flags)
  551. {
  552. if ((flags & UART_CONFIG_TYPE)
  553. && (mpc52xx_uart_request_port(port) == 0))
  554. port->type = PORT_MPC52xx;
  555. }
  556. static int
  557. mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
  558. {
  559. if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
  560. return -EINVAL;
  561. if ((ser->irq != port->irq) ||
  562. (ser->io_type != SERIAL_IO_MEM) ||
  563. (ser->baud_base != port->uartclk) ||
  564. (ser->iomem_base != (void *)port->mapbase) ||
  565. (ser->hub6 != 0))
  566. return -EINVAL;
  567. return 0;
  568. }
  569. static struct uart_ops mpc52xx_uart_ops = {
  570. .tx_empty = mpc52xx_uart_tx_empty,
  571. .set_mctrl = mpc52xx_uart_set_mctrl,
  572. .get_mctrl = mpc52xx_uart_get_mctrl,
  573. .stop_tx = mpc52xx_uart_stop_tx,
  574. .start_tx = mpc52xx_uart_start_tx,
  575. .send_xchar = mpc52xx_uart_send_xchar,
  576. .stop_rx = mpc52xx_uart_stop_rx,
  577. .enable_ms = mpc52xx_uart_enable_ms,
  578. .break_ctl = mpc52xx_uart_break_ctl,
  579. .startup = mpc52xx_uart_startup,
  580. .shutdown = mpc52xx_uart_shutdown,
  581. .set_termios = mpc52xx_uart_set_termios,
  582. /* .pm = mpc52xx_uart_pm, Not supported yet */
  583. /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
  584. .type = mpc52xx_uart_type,
  585. .release_port = mpc52xx_uart_release_port,
  586. .request_port = mpc52xx_uart_request_port,
  587. .config_port = mpc52xx_uart_config_port,
  588. .verify_port = mpc52xx_uart_verify_port
  589. };
  590. /* ======================================================================== */
  591. /* Interrupt handling */
  592. /* ======================================================================== */
  593. static inline int
  594. mpc52xx_uart_int_rx_chars(struct uart_port *port)
  595. {
  596. struct tty_struct *tty = port->info->port.tty;
  597. unsigned char ch, flag;
  598. unsigned short status;
  599. /* While we can read, do so ! */
  600. while (psc_ops->raw_rx_rdy(port)) {
  601. /* Get the char */
  602. ch = psc_ops->read_char(port);
  603. /* Handle sysreq char */
  604. #ifdef SUPPORT_SYSRQ
  605. if (uart_handle_sysrq_char(port, ch)) {
  606. port->sysrq = 0;
  607. continue;
  608. }
  609. #endif
  610. /* Store it */
  611. flag = TTY_NORMAL;
  612. port->icount.rx++;
  613. status = in_be16(&PSC(port)->mpc52xx_psc_status);
  614. if (status & (MPC52xx_PSC_SR_PE |
  615. MPC52xx_PSC_SR_FE |
  616. MPC52xx_PSC_SR_RB)) {
  617. if (status & MPC52xx_PSC_SR_RB) {
  618. flag = TTY_BREAK;
  619. uart_handle_break(port);
  620. } else if (status & MPC52xx_PSC_SR_PE)
  621. flag = TTY_PARITY;
  622. else if (status & MPC52xx_PSC_SR_FE)
  623. flag = TTY_FRAME;
  624. /* Clear error condition */
  625. out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
  626. }
  627. tty_insert_flip_char(tty, ch, flag);
  628. if (status & MPC52xx_PSC_SR_OE) {
  629. /*
  630. * Overrun is special, since it's
  631. * reported immediately, and doesn't
  632. * affect the current character
  633. */
  634. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  635. }
  636. }
  637. spin_unlock(&port->lock);
  638. tty_flip_buffer_push(tty);
  639. spin_lock(&port->lock);
  640. return psc_ops->raw_rx_rdy(port);
  641. }
  642. static inline int
  643. mpc52xx_uart_int_tx_chars(struct uart_port *port)
  644. {
  645. struct circ_buf *xmit = &port->info->xmit;
  646. /* Process out of band chars */
  647. if (port->x_char) {
  648. psc_ops->write_char(port, port->x_char);
  649. port->icount.tx++;
  650. port->x_char = 0;
  651. return 1;
  652. }
  653. /* Nothing to do ? */
  654. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  655. mpc52xx_uart_stop_tx(port);
  656. return 0;
  657. }
  658. /* Send chars */
  659. while (psc_ops->raw_tx_rdy(port)) {
  660. psc_ops->write_char(port, xmit->buf[xmit->tail]);
  661. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  662. port->icount.tx++;
  663. if (uart_circ_empty(xmit))
  664. break;
  665. }
  666. /* Wake up */
  667. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  668. uart_write_wakeup(port);
  669. /* Maybe we're done after all */
  670. if (uart_circ_empty(xmit)) {
  671. mpc52xx_uart_stop_tx(port);
  672. return 0;
  673. }
  674. return 1;
  675. }
  676. static irqreturn_t
  677. mpc52xx_uart_int(int irq, void *dev_id)
  678. {
  679. struct uart_port *port = dev_id;
  680. unsigned long pass = ISR_PASS_LIMIT;
  681. unsigned int keepgoing;
  682. spin_lock(&port->lock);
  683. /* While we have stuff to do, we continue */
  684. do {
  685. /* If we don't find anything to do, we stop */
  686. keepgoing = 0;
  687. psc_ops->rx_clr_irq(port);
  688. if (psc_ops->rx_rdy(port))
  689. keepgoing |= mpc52xx_uart_int_rx_chars(port);
  690. psc_ops->tx_clr_irq(port);
  691. if (psc_ops->tx_rdy(port))
  692. keepgoing |= mpc52xx_uart_int_tx_chars(port);
  693. /* Limit number of iteration */
  694. if (!(--pass))
  695. keepgoing = 0;
  696. } while (keepgoing);
  697. spin_unlock(&port->lock);
  698. return IRQ_HANDLED;
  699. }
  700. /* ======================================================================== */
  701. /* Console ( if applicable ) */
  702. /* ======================================================================== */
  703. #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
  704. static void __init
  705. mpc52xx_console_get_options(struct uart_port *port,
  706. int *baud, int *parity, int *bits, int *flow)
  707. {
  708. struct mpc52xx_psc __iomem *psc = PSC(port);
  709. unsigned char mr1;
  710. pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
  711. /* Read the mode registers */
  712. out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
  713. mr1 = in_8(&psc->mode);
  714. /* CT{U,L}R are write-only ! */
  715. *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  716. /* Parse them */
  717. switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
  718. case MPC52xx_PSC_MODE_5_BITS:
  719. *bits = 5;
  720. break;
  721. case MPC52xx_PSC_MODE_6_BITS:
  722. *bits = 6;
  723. break;
  724. case MPC52xx_PSC_MODE_7_BITS:
  725. *bits = 7;
  726. break;
  727. case MPC52xx_PSC_MODE_8_BITS:
  728. default:
  729. *bits = 8;
  730. }
  731. if (mr1 & MPC52xx_PSC_MODE_PARNONE)
  732. *parity = 'n';
  733. else
  734. *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
  735. }
  736. static void
  737. mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
  738. {
  739. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  740. unsigned int i, j;
  741. /* Disable interrupts */
  742. psc_ops->cw_disable_ints(port);
  743. /* Wait the TX buffer to be empty */
  744. j = 5000000; /* Maximum wait */
  745. while (!mpc52xx_uart_tx_empty(port) && --j)
  746. udelay(1);
  747. /* Write all the chars */
  748. for (i = 0; i < count; i++, s++) {
  749. /* Line return handling */
  750. if (*s == '\n')
  751. psc_ops->write_char(port, '\r');
  752. /* Send the char */
  753. psc_ops->write_char(port, *s);
  754. /* Wait the TX buffer to be empty */
  755. j = 20000; /* Maximum wait */
  756. while (!mpc52xx_uart_tx_empty(port) && --j)
  757. udelay(1);
  758. }
  759. /* Restore interrupt state */
  760. psc_ops->cw_restore_ints(port);
  761. }
  762. static int __init
  763. mpc52xx_console_setup(struct console *co, char *options)
  764. {
  765. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  766. struct device_node *np = mpc52xx_uart_nodes[co->index];
  767. unsigned int uartclk;
  768. struct resource res;
  769. int ret;
  770. int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  771. int bits = 8;
  772. int parity = 'n';
  773. int flow = 'n';
  774. pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
  775. co, co->index, options);
  776. if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
  777. pr_debug("PSC%x out of range\n", co->index);
  778. return -EINVAL;
  779. }
  780. if (!np) {
  781. pr_debug("PSC%x not found in device tree\n", co->index);
  782. return -EINVAL;
  783. }
  784. pr_debug("Console on ttyPSC%x is %s\n",
  785. co->index, mpc52xx_uart_nodes[co->index]->full_name);
  786. /* Fetch register locations */
  787. ret = of_address_to_resource(np, 0, &res);
  788. if (ret) {
  789. pr_debug("Could not get resources for PSC%x\n", co->index);
  790. return ret;
  791. }
  792. uartclk = psc_ops->getuartclk(np);
  793. if (uartclk == 0) {
  794. pr_debug("Could not find uart clock frequency!\n");
  795. return -EINVAL;
  796. }
  797. /* Basic port init. Needed since we use some uart_??? func before
  798. * real init for early access */
  799. spin_lock_init(&port->lock);
  800. port->uartclk = uartclk;
  801. port->ops = &mpc52xx_uart_ops;
  802. port->mapbase = res.start;
  803. port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
  804. port->irq = irq_of_parse_and_map(np, 0);
  805. if (port->membase == NULL)
  806. return -EINVAL;
  807. pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
  808. (void *)port->mapbase, port->membase,
  809. port->irq, port->uartclk);
  810. /* Setup the port parameters accoding to options */
  811. if (options)
  812. uart_parse_options(options, &baud, &parity, &bits, &flow);
  813. else
  814. mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
  815. pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
  816. baud, bits, parity, flow);
  817. return uart_set_options(port, co, baud, parity, bits, flow);
  818. }
  819. static struct uart_driver mpc52xx_uart_driver;
  820. static struct console mpc52xx_console = {
  821. .name = "ttyPSC",
  822. .write = mpc52xx_console_write,
  823. .device = uart_console_device,
  824. .setup = mpc52xx_console_setup,
  825. .flags = CON_PRINTBUFFER,
  826. .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
  827. .data = &mpc52xx_uart_driver,
  828. };
  829. static int __init
  830. mpc52xx_console_init(void)
  831. {
  832. mpc52xx_uart_of_enumerate();
  833. register_console(&mpc52xx_console);
  834. return 0;
  835. }
  836. console_initcall(mpc52xx_console_init);
  837. #define MPC52xx_PSC_CONSOLE &mpc52xx_console
  838. #else
  839. #define MPC52xx_PSC_CONSOLE NULL
  840. #endif
  841. /* ======================================================================== */
  842. /* UART Driver */
  843. /* ======================================================================== */
  844. static struct uart_driver mpc52xx_uart_driver = {
  845. .driver_name = "mpc52xx_psc_uart",
  846. .dev_name = "ttyPSC",
  847. .major = SERIAL_PSC_MAJOR,
  848. .minor = SERIAL_PSC_MINOR,
  849. .nr = MPC52xx_PSC_MAXNUM,
  850. .cons = MPC52xx_PSC_CONSOLE,
  851. };
  852. /* ======================================================================== */
  853. /* OF Platform Driver */
  854. /* ======================================================================== */
  855. static struct of_device_id mpc52xx_uart_of_match[] = {
  856. #ifdef CONFIG_PPC_MPC52xx
  857. { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
  858. /* binding used by old lite5200 device trees: */
  859. { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
  860. /* binding used by efika: */
  861. { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
  862. #endif
  863. #ifdef CONFIG_PPC_MPC512x
  864. { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
  865. #endif
  866. {},
  867. };
  868. static int __devinit
  869. mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
  870. {
  871. int idx = -1;
  872. unsigned int uartclk;
  873. struct uart_port *port = NULL;
  874. struct resource res;
  875. int ret;
  876. dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
  877. /* Check validity & presence */
  878. for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
  879. if (mpc52xx_uart_nodes[idx] == op->node)
  880. break;
  881. if (idx >= MPC52xx_PSC_MAXNUM)
  882. return -EINVAL;
  883. pr_debug("Found %s assigned to ttyPSC%x\n",
  884. mpc52xx_uart_nodes[idx]->full_name, idx);
  885. uartclk = psc_ops->getuartclk(op->node);
  886. if (uartclk == 0) {
  887. dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
  888. return -EINVAL;
  889. }
  890. /* Init the port structure */
  891. port = &mpc52xx_uart_ports[idx];
  892. spin_lock_init(&port->lock);
  893. port->uartclk = uartclk;
  894. port->fifosize = 512;
  895. port->iotype = UPIO_MEM;
  896. port->flags = UPF_BOOT_AUTOCONF |
  897. (uart_console(port) ? 0 : UPF_IOREMAP);
  898. port->line = idx;
  899. port->ops = &mpc52xx_uart_ops;
  900. port->dev = &op->dev;
  901. /* Search for IRQ and mapbase */
  902. ret = of_address_to_resource(op->node, 0, &res);
  903. if (ret)
  904. return ret;
  905. port->mapbase = res.start;
  906. port->irq = irq_of_parse_and_map(op->node, 0);
  907. dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
  908. (void *)port->mapbase, port->irq, port->uartclk);
  909. if ((port->irq == NO_IRQ) || !port->mapbase) {
  910. printk(KERN_ERR "Could not allocate resources for PSC\n");
  911. return -EINVAL;
  912. }
  913. /* Add the port to the uart sub-system */
  914. ret = uart_add_one_port(&mpc52xx_uart_driver, port);
  915. if (!ret)
  916. dev_set_drvdata(&op->dev, (void *)port);
  917. return ret;
  918. }
  919. static int
  920. mpc52xx_uart_of_remove(struct of_device *op)
  921. {
  922. struct uart_port *port = dev_get_drvdata(&op->dev);
  923. dev_set_drvdata(&op->dev, NULL);
  924. if (port) {
  925. uart_remove_one_port(&mpc52xx_uart_driver, port);
  926. irq_dispose_mapping(port->irq);
  927. }
  928. return 0;
  929. }
  930. #ifdef CONFIG_PM
  931. static int
  932. mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
  933. {
  934. struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
  935. if (port)
  936. uart_suspend_port(&mpc52xx_uart_driver, port);
  937. return 0;
  938. }
  939. static int
  940. mpc52xx_uart_of_resume(struct of_device *op)
  941. {
  942. struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
  943. if (port)
  944. uart_resume_port(&mpc52xx_uart_driver, port);
  945. return 0;
  946. }
  947. #endif
  948. static void
  949. mpc52xx_uart_of_assign(struct device_node *np, int idx)
  950. {
  951. int free_idx = -1;
  952. int i;
  953. /* Find the first free node */
  954. for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
  955. if (mpc52xx_uart_nodes[i] == NULL) {
  956. free_idx = i;
  957. break;
  958. }
  959. }
  960. if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
  961. idx = free_idx;
  962. if (idx < 0)
  963. return; /* No free slot; abort */
  964. of_node_get(np);
  965. /* If the slot is already occupied, then swap slots */
  966. if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
  967. mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
  968. mpc52xx_uart_nodes[idx] = np;
  969. }
  970. static void
  971. mpc52xx_uart_of_enumerate(void)
  972. {
  973. static int enum_done;
  974. struct device_node *np;
  975. const unsigned int *devno;
  976. const struct of_device_id *match;
  977. int i;
  978. if (enum_done)
  979. return;
  980. for_each_node_by_type(np, "serial") {
  981. match = of_match_node(mpc52xx_uart_of_match, np);
  982. if (!match)
  983. continue;
  984. psc_ops = match->data;
  985. /* Is a particular device number requested? */
  986. devno = of_get_property(np, "port-number", NULL);
  987. mpc52xx_uart_of_assign(np, devno ? *devno : -1);
  988. }
  989. enum_done = 1;
  990. for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
  991. if (mpc52xx_uart_nodes[i])
  992. pr_debug("%s assigned to ttyPSC%x\n",
  993. mpc52xx_uart_nodes[i]->full_name, i);
  994. }
  995. }
  996. MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
  997. static struct of_platform_driver mpc52xx_uart_of_driver = {
  998. .match_table = mpc52xx_uart_of_match,
  999. .probe = mpc52xx_uart_of_probe,
  1000. .remove = mpc52xx_uart_of_remove,
  1001. #ifdef CONFIG_PM
  1002. .suspend = mpc52xx_uart_of_suspend,
  1003. .resume = mpc52xx_uart_of_resume,
  1004. #endif
  1005. .driver = {
  1006. .name = "mpc52xx-psc-uart",
  1007. },
  1008. };
  1009. /* ======================================================================== */
  1010. /* Module */
  1011. /* ======================================================================== */
  1012. static int __init
  1013. mpc52xx_uart_init(void)
  1014. {
  1015. int ret;
  1016. printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
  1017. ret = uart_register_driver(&mpc52xx_uart_driver);
  1018. if (ret) {
  1019. printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
  1020. __FILE__, ret);
  1021. return ret;
  1022. }
  1023. mpc52xx_uart_of_enumerate();
  1024. ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
  1025. if (ret) {
  1026. printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
  1027. __FILE__, ret);
  1028. uart_unregister_driver(&mpc52xx_uart_driver);
  1029. return ret;
  1030. }
  1031. return 0;
  1032. }
  1033. static void __exit
  1034. mpc52xx_uart_exit(void)
  1035. {
  1036. of_unregister_platform_driver(&mpc52xx_uart_of_driver);
  1037. uart_unregister_driver(&mpc52xx_uart_driver);
  1038. }
  1039. module_init(mpc52xx_uart_init);
  1040. module_exit(mpc52xx_uart_exit);
  1041. MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
  1042. MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
  1043. MODULE_LICENSE("GPL");