ctcm_fsms.c 73 KB

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  1. /*
  2. * drivers/s390/net/ctcm_fsms.c
  3. *
  4. * Copyright IBM Corp. 2001, 2007
  5. * Authors: Fritz Elfert (felfert@millenux.com)
  6. * Peter Tiedemann (ptiedem@de.ibm.com)
  7. * MPC additions :
  8. * Belinda Thompson (belindat@us.ibm.com)
  9. * Andy Richter (richtera@us.ibm.com)
  10. */
  11. #undef DEBUG
  12. #undef DEBUGDATA
  13. #undef DEBUGCCW
  14. #include <linux/module.h>
  15. #include <linux/init.h>
  16. #include <linux/kernel.h>
  17. #include <linux/slab.h>
  18. #include <linux/errno.h>
  19. #include <linux/types.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/timer.h>
  22. #include <linux/bitops.h>
  23. #include <linux/signal.h>
  24. #include <linux/string.h>
  25. #include <linux/ip.h>
  26. #include <linux/if_arp.h>
  27. #include <linux/tcp.h>
  28. #include <linux/skbuff.h>
  29. #include <linux/ctype.h>
  30. #include <net/dst.h>
  31. #include <linux/io.h>
  32. #include <asm/ccwdev.h>
  33. #include <asm/ccwgroup.h>
  34. #include <linux/uaccess.h>
  35. #include <asm/idals.h>
  36. #include "fsm.h"
  37. #include "cu3088.h"
  38. #include "ctcm_dbug.h"
  39. #include "ctcm_main.h"
  40. #include "ctcm_fsms.h"
  41. const char *dev_state_names[] = {
  42. [DEV_STATE_STOPPED] = "Stopped",
  43. [DEV_STATE_STARTWAIT_RXTX] = "StartWait RXTX",
  44. [DEV_STATE_STARTWAIT_RX] = "StartWait RX",
  45. [DEV_STATE_STARTWAIT_TX] = "StartWait TX",
  46. [DEV_STATE_STOPWAIT_RXTX] = "StopWait RXTX",
  47. [DEV_STATE_STOPWAIT_RX] = "StopWait RX",
  48. [DEV_STATE_STOPWAIT_TX] = "StopWait TX",
  49. [DEV_STATE_RUNNING] = "Running",
  50. };
  51. const char *dev_event_names[] = {
  52. [DEV_EVENT_START] = "Start",
  53. [DEV_EVENT_STOP] = "Stop",
  54. [DEV_EVENT_RXUP] = "RX up",
  55. [DEV_EVENT_TXUP] = "TX up",
  56. [DEV_EVENT_RXDOWN] = "RX down",
  57. [DEV_EVENT_TXDOWN] = "TX down",
  58. [DEV_EVENT_RESTART] = "Restart",
  59. };
  60. const char *ctc_ch_event_names[] = {
  61. [CTC_EVENT_IO_SUCCESS] = "ccw_device success",
  62. [CTC_EVENT_IO_EBUSY] = "ccw_device busy",
  63. [CTC_EVENT_IO_ENODEV] = "ccw_device enodev",
  64. [CTC_EVENT_IO_UNKNOWN] = "ccw_device unknown",
  65. [CTC_EVENT_ATTNBUSY] = "Status ATTN & BUSY",
  66. [CTC_EVENT_ATTN] = "Status ATTN",
  67. [CTC_EVENT_BUSY] = "Status BUSY",
  68. [CTC_EVENT_UC_RCRESET] = "Unit check remote reset",
  69. [CTC_EVENT_UC_RSRESET] = "Unit check remote system reset",
  70. [CTC_EVENT_UC_TXTIMEOUT] = "Unit check TX timeout",
  71. [CTC_EVENT_UC_TXPARITY] = "Unit check TX parity",
  72. [CTC_EVENT_UC_HWFAIL] = "Unit check Hardware failure",
  73. [CTC_EVENT_UC_RXPARITY] = "Unit check RX parity",
  74. [CTC_EVENT_UC_ZERO] = "Unit check ZERO",
  75. [CTC_EVENT_UC_UNKNOWN] = "Unit check Unknown",
  76. [CTC_EVENT_SC_UNKNOWN] = "SubChannel check Unknown",
  77. [CTC_EVENT_MC_FAIL] = "Machine check failure",
  78. [CTC_EVENT_MC_GOOD] = "Machine check operational",
  79. [CTC_EVENT_IRQ] = "IRQ normal",
  80. [CTC_EVENT_FINSTAT] = "IRQ final",
  81. [CTC_EVENT_TIMER] = "Timer",
  82. [CTC_EVENT_START] = "Start",
  83. [CTC_EVENT_STOP] = "Stop",
  84. /*
  85. * additional MPC events
  86. */
  87. [CTC_EVENT_SEND_XID] = "XID Exchange",
  88. [CTC_EVENT_RSWEEP_TIMER] = "MPC Group Sweep Timer",
  89. };
  90. const char *ctc_ch_state_names[] = {
  91. [CTC_STATE_IDLE] = "Idle",
  92. [CTC_STATE_STOPPED] = "Stopped",
  93. [CTC_STATE_STARTWAIT] = "StartWait",
  94. [CTC_STATE_STARTRETRY] = "StartRetry",
  95. [CTC_STATE_SETUPWAIT] = "SetupWait",
  96. [CTC_STATE_RXINIT] = "RX init",
  97. [CTC_STATE_TXINIT] = "TX init",
  98. [CTC_STATE_RX] = "RX",
  99. [CTC_STATE_TX] = "TX",
  100. [CTC_STATE_RXIDLE] = "RX idle",
  101. [CTC_STATE_TXIDLE] = "TX idle",
  102. [CTC_STATE_RXERR] = "RX error",
  103. [CTC_STATE_TXERR] = "TX error",
  104. [CTC_STATE_TERM] = "Terminating",
  105. [CTC_STATE_DTERM] = "Restarting",
  106. [CTC_STATE_NOTOP] = "Not operational",
  107. /*
  108. * additional MPC states
  109. */
  110. [CH_XID0_PENDING] = "Pending XID0 Start",
  111. [CH_XID0_INPROGRESS] = "In XID0 Negotiations ",
  112. [CH_XID7_PENDING] = "Pending XID7 P1 Start",
  113. [CH_XID7_PENDING1] = "Active XID7 P1 Exchange ",
  114. [CH_XID7_PENDING2] = "Pending XID7 P2 Start ",
  115. [CH_XID7_PENDING3] = "Active XID7 P2 Exchange ",
  116. [CH_XID7_PENDING4] = "XID7 Complete - Pending READY ",
  117. };
  118. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg);
  119. /*
  120. * ----- static ctcm actions for channel statemachine -----
  121. *
  122. */
  123. static void chx_txdone(fsm_instance *fi, int event, void *arg);
  124. static void chx_rx(fsm_instance *fi, int event, void *arg);
  125. static void chx_rxidle(fsm_instance *fi, int event, void *arg);
  126. static void chx_firstio(fsm_instance *fi, int event, void *arg);
  127. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  128. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  129. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  130. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  131. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  132. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  133. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  134. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  135. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  136. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  137. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  138. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  139. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  140. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  141. /*
  142. * ----- static ctcmpc actions for ctcmpc channel statemachine -----
  143. *
  144. */
  145. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg);
  146. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg);
  147. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg);
  148. /* shared :
  149. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  150. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  151. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  152. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  153. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  154. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  155. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  156. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  157. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  158. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  159. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  160. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  161. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  162. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  163. */
  164. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg);
  165. static void ctcmpc_chx_attnbusy(fsm_instance *, int, void *);
  166. static void ctcmpc_chx_resend(fsm_instance *, int, void *);
  167. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg);
  168. /**
  169. * Check return code of a preceeding ccw_device call, halt_IO etc...
  170. *
  171. * ch : The channel, the error belongs to.
  172. * Returns the error code (!= 0) to inspect.
  173. */
  174. void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg)
  175. {
  176. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  177. "%s(%s): %s: %04x\n",
  178. CTCM_FUNTAIL, ch->id, msg, rc);
  179. switch (rc) {
  180. case -EBUSY:
  181. ctcm_pr_warn("%s (%s): Busy !\n", ch->id, msg);
  182. fsm_event(ch->fsm, CTC_EVENT_IO_EBUSY, ch);
  183. break;
  184. case -ENODEV:
  185. ctcm_pr_emerg("%s (%s): Invalid device called for IO\n",
  186. ch->id, msg);
  187. fsm_event(ch->fsm, CTC_EVENT_IO_ENODEV, ch);
  188. break;
  189. default:
  190. ctcm_pr_emerg("%s (%s): Unknown error in do_IO %04x\n",
  191. ch->id, msg, rc);
  192. fsm_event(ch->fsm, CTC_EVENT_IO_UNKNOWN, ch);
  193. }
  194. }
  195. void ctcm_purge_skb_queue(struct sk_buff_head *q)
  196. {
  197. struct sk_buff *skb;
  198. CTCM_DBF_TEXT(TRACE, CTC_DBF_DEBUG, __func__);
  199. while ((skb = skb_dequeue(q))) {
  200. atomic_dec(&skb->users);
  201. dev_kfree_skb_any(skb);
  202. }
  203. }
  204. /**
  205. * NOP action for statemachines
  206. */
  207. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg)
  208. {
  209. }
  210. /*
  211. * Actions for channel - statemachines.
  212. */
  213. /**
  214. * Normal data has been send. Free the corresponding
  215. * skb (it's in io_queue), reset dev->tbusy and
  216. * revert to idle state.
  217. *
  218. * fi An instance of a channel statemachine.
  219. * event The event, just happened.
  220. * arg Generic pointer, casted from channel * upon call.
  221. */
  222. static void chx_txdone(fsm_instance *fi, int event, void *arg)
  223. {
  224. struct channel *ch = arg;
  225. struct net_device *dev = ch->netdev;
  226. struct ctcm_priv *priv = dev->ml_priv;
  227. struct sk_buff *skb;
  228. int first = 1;
  229. int i;
  230. unsigned long duration;
  231. struct timespec done_stamp = current_kernel_time(); /* xtime */
  232. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  233. duration =
  234. (done_stamp.tv_sec - ch->prof.send_stamp.tv_sec) * 1000000 +
  235. (done_stamp.tv_nsec - ch->prof.send_stamp.tv_nsec) / 1000;
  236. if (duration > ch->prof.tx_time)
  237. ch->prof.tx_time = duration;
  238. if (ch->irb->scsw.cmd.count != 0)
  239. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  240. "%s(%s): TX not complete, remaining %d bytes",
  241. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  242. fsm_deltimer(&ch->timer);
  243. while ((skb = skb_dequeue(&ch->io_queue))) {
  244. priv->stats.tx_packets++;
  245. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  246. if (first) {
  247. priv->stats.tx_bytes += 2;
  248. first = 0;
  249. }
  250. atomic_dec(&skb->users);
  251. dev_kfree_skb_irq(skb);
  252. }
  253. spin_lock(&ch->collect_lock);
  254. clear_normalized_cda(&ch->ccw[4]);
  255. if (ch->collect_len > 0) {
  256. int rc;
  257. if (ctcm_checkalloc_buffer(ch)) {
  258. spin_unlock(&ch->collect_lock);
  259. return;
  260. }
  261. ch->trans_skb->data = ch->trans_skb_data;
  262. skb_reset_tail_pointer(ch->trans_skb);
  263. ch->trans_skb->len = 0;
  264. if (ch->prof.maxmulti < (ch->collect_len + 2))
  265. ch->prof.maxmulti = ch->collect_len + 2;
  266. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  267. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  268. *((__u16 *)skb_put(ch->trans_skb, 2)) = ch->collect_len + 2;
  269. i = 0;
  270. while ((skb = skb_dequeue(&ch->collect_queue))) {
  271. skb_copy_from_linear_data(skb,
  272. skb_put(ch->trans_skb, skb->len), skb->len);
  273. priv->stats.tx_packets++;
  274. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  275. atomic_dec(&skb->users);
  276. dev_kfree_skb_irq(skb);
  277. i++;
  278. }
  279. ch->collect_len = 0;
  280. spin_unlock(&ch->collect_lock);
  281. ch->ccw[1].count = ch->trans_skb->len;
  282. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  283. ch->prof.send_stamp = current_kernel_time(); /* xtime */
  284. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  285. (unsigned long)ch, 0xff, 0);
  286. ch->prof.doios_multi++;
  287. if (rc != 0) {
  288. priv->stats.tx_dropped += i;
  289. priv->stats.tx_errors += i;
  290. fsm_deltimer(&ch->timer);
  291. ctcm_ccw_check_rc(ch, rc, "chained TX");
  292. }
  293. } else {
  294. spin_unlock(&ch->collect_lock);
  295. fsm_newstate(fi, CTC_STATE_TXIDLE);
  296. }
  297. ctcm_clear_busy_do(dev);
  298. }
  299. /**
  300. * Initial data is sent.
  301. * Notify device statemachine that we are up and
  302. * running.
  303. *
  304. * fi An instance of a channel statemachine.
  305. * event The event, just happened.
  306. * arg Generic pointer, casted from channel * upon call.
  307. */
  308. void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg)
  309. {
  310. struct channel *ch = arg;
  311. struct net_device *dev = ch->netdev;
  312. struct ctcm_priv *priv = dev->ml_priv;
  313. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  314. fsm_deltimer(&ch->timer);
  315. fsm_newstate(fi, CTC_STATE_TXIDLE);
  316. fsm_event(priv->fsm, DEV_EVENT_TXUP, ch->netdev);
  317. }
  318. /**
  319. * Got normal data, check for sanity, queue it up, allocate new buffer
  320. * trigger bottom half, and initiate next read.
  321. *
  322. * fi An instance of a channel statemachine.
  323. * event The event, just happened.
  324. * arg Generic pointer, casted from channel * upon call.
  325. */
  326. static void chx_rx(fsm_instance *fi, int event, void *arg)
  327. {
  328. struct channel *ch = arg;
  329. struct net_device *dev = ch->netdev;
  330. struct ctcm_priv *priv = dev->ml_priv;
  331. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  332. struct sk_buff *skb = ch->trans_skb;
  333. __u16 block_len = *((__u16 *)skb->data);
  334. int check_len;
  335. int rc;
  336. fsm_deltimer(&ch->timer);
  337. if (len < 8) {
  338. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  339. "%s(%s): got packet with length %d < 8\n",
  340. CTCM_FUNTAIL, dev->name, len);
  341. priv->stats.rx_dropped++;
  342. priv->stats.rx_length_errors++;
  343. goto again;
  344. }
  345. if (len > ch->max_bufsize) {
  346. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  347. "%s(%s): got packet with length %d > %d\n",
  348. CTCM_FUNTAIL, dev->name, len, ch->max_bufsize);
  349. priv->stats.rx_dropped++;
  350. priv->stats.rx_length_errors++;
  351. goto again;
  352. }
  353. /*
  354. * VM TCP seems to have a bug sending 2 trailing bytes of garbage.
  355. */
  356. switch (ch->protocol) {
  357. case CTCM_PROTO_S390:
  358. case CTCM_PROTO_OS390:
  359. check_len = block_len + 2;
  360. break;
  361. default:
  362. check_len = block_len;
  363. break;
  364. }
  365. if ((len < block_len) || (len > check_len)) {
  366. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  367. "%s(%s): got block length %d != rx length %d\n",
  368. CTCM_FUNTAIL, dev->name, block_len, len);
  369. if (do_debug)
  370. ctcmpc_dump_skb(skb, 0);
  371. *((__u16 *)skb->data) = len;
  372. priv->stats.rx_dropped++;
  373. priv->stats.rx_length_errors++;
  374. goto again;
  375. }
  376. block_len -= 2;
  377. if (block_len > 0) {
  378. *((__u16 *)skb->data) = block_len;
  379. ctcm_unpack_skb(ch, skb);
  380. }
  381. again:
  382. skb->data = ch->trans_skb_data;
  383. skb_reset_tail_pointer(skb);
  384. skb->len = 0;
  385. if (ctcm_checkalloc_buffer(ch))
  386. return;
  387. ch->ccw[1].count = ch->max_bufsize;
  388. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  389. (unsigned long)ch, 0xff, 0);
  390. if (rc != 0)
  391. ctcm_ccw_check_rc(ch, rc, "normal RX");
  392. }
  393. /**
  394. * Initialize connection by sending a __u16 of value 0.
  395. *
  396. * fi An instance of a channel statemachine.
  397. * event The event, just happened.
  398. * arg Generic pointer, casted from channel * upon call.
  399. */
  400. static void chx_firstio(fsm_instance *fi, int event, void *arg)
  401. {
  402. int rc;
  403. struct channel *ch = arg;
  404. int fsmstate = fsm_getstate(fi);
  405. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  406. "%s(%s) : %02x",
  407. CTCM_FUNTAIL, ch->id, fsmstate);
  408. ch->sense_rc = 0; /* reset unit check report control */
  409. if (fsmstate == CTC_STATE_TXIDLE)
  410. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  411. "%s(%s): remote side issued READ?, init.\n",
  412. CTCM_FUNTAIL, ch->id);
  413. fsm_deltimer(&ch->timer);
  414. if (ctcm_checkalloc_buffer(ch))
  415. return;
  416. if ((fsmstate == CTC_STATE_SETUPWAIT) &&
  417. (ch->protocol == CTCM_PROTO_OS390)) {
  418. /* OS/390 resp. z/OS */
  419. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  420. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  421. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC,
  422. CTC_EVENT_TIMER, ch);
  423. chx_rxidle(fi, event, arg);
  424. } else {
  425. struct net_device *dev = ch->netdev;
  426. struct ctcm_priv *priv = dev->ml_priv;
  427. fsm_newstate(fi, CTC_STATE_TXIDLE);
  428. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  429. }
  430. return;
  431. }
  432. /*
  433. * Don't setup a timer for receiving the initial RX frame
  434. * if in compatibility mode, since VM TCP delays the initial
  435. * frame until it has some data to send.
  436. */
  437. if ((CHANNEL_DIRECTION(ch->flags) == WRITE) ||
  438. (ch->protocol != CTCM_PROTO_S390))
  439. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  440. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  441. ch->ccw[1].count = 2; /* Transfer only length */
  442. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == READ)
  443. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  444. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  445. (unsigned long)ch, 0xff, 0);
  446. if (rc != 0) {
  447. fsm_deltimer(&ch->timer);
  448. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  449. ctcm_ccw_check_rc(ch, rc, "init IO");
  450. }
  451. /*
  452. * If in compatibility mode since we don't setup a timer, we
  453. * also signal RX channel up immediately. This enables us
  454. * to send packets early which in turn usually triggers some
  455. * reply from VM TCP which brings up the RX channel to it's
  456. * final state.
  457. */
  458. if ((CHANNEL_DIRECTION(ch->flags) == READ) &&
  459. (ch->protocol == CTCM_PROTO_S390)) {
  460. struct net_device *dev = ch->netdev;
  461. struct ctcm_priv *priv = dev->ml_priv;
  462. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  463. }
  464. }
  465. /**
  466. * Got initial data, check it. If OK,
  467. * notify device statemachine that we are up and
  468. * running.
  469. *
  470. * fi An instance of a channel statemachine.
  471. * event The event, just happened.
  472. * arg Generic pointer, casted from channel * upon call.
  473. */
  474. static void chx_rxidle(fsm_instance *fi, int event, void *arg)
  475. {
  476. struct channel *ch = arg;
  477. struct net_device *dev = ch->netdev;
  478. struct ctcm_priv *priv = dev->ml_priv;
  479. __u16 buflen;
  480. int rc;
  481. fsm_deltimer(&ch->timer);
  482. buflen = *((__u16 *)ch->trans_skb->data);
  483. CTCM_PR_DEBUG("%s: %s: Initial RX count = %d\n",
  484. __func__, dev->name, buflen);
  485. if (buflen >= CTCM_INITIAL_BLOCKLEN) {
  486. if (ctcm_checkalloc_buffer(ch))
  487. return;
  488. ch->ccw[1].count = ch->max_bufsize;
  489. fsm_newstate(fi, CTC_STATE_RXIDLE);
  490. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  491. (unsigned long)ch, 0xff, 0);
  492. if (rc != 0) {
  493. fsm_newstate(fi, CTC_STATE_RXINIT);
  494. ctcm_ccw_check_rc(ch, rc, "initial RX");
  495. } else
  496. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  497. } else {
  498. CTCM_PR_DEBUG("%s: %s: Initial RX count %d not %d\n",
  499. __func__, dev->name,
  500. buflen, CTCM_INITIAL_BLOCKLEN);
  501. chx_firstio(fi, event, arg);
  502. }
  503. }
  504. /**
  505. * Set channel into extended mode.
  506. *
  507. * fi An instance of a channel statemachine.
  508. * event The event, just happened.
  509. * arg Generic pointer, casted from channel * upon call.
  510. */
  511. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg)
  512. {
  513. struct channel *ch = arg;
  514. int rc;
  515. unsigned long saveflags = 0;
  516. int timeout = CTCM_TIME_5_SEC;
  517. fsm_deltimer(&ch->timer);
  518. if (IS_MPC(ch)) {
  519. timeout = 1500;
  520. CTCM_PR_DEBUG("enter %s: cp=%i ch=0x%p id=%s\n",
  521. __func__, smp_processor_id(), ch, ch->id);
  522. }
  523. fsm_addtimer(&ch->timer, timeout, CTC_EVENT_TIMER, ch);
  524. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  525. CTCM_CCW_DUMP((char *)&ch->ccw[6], sizeof(struct ccw1) * 2);
  526. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  527. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  528. /* Such conditional locking is undeterministic in
  529. * static view. => ignore sparse warnings here. */
  530. rc = ccw_device_start(ch->cdev, &ch->ccw[6],
  531. (unsigned long)ch, 0xff, 0);
  532. if (event == CTC_EVENT_TIMER) /* see above comments */
  533. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  534. if (rc != 0) {
  535. fsm_deltimer(&ch->timer);
  536. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  537. ctcm_ccw_check_rc(ch, rc, "set Mode");
  538. } else
  539. ch->retry = 0;
  540. }
  541. /**
  542. * Setup channel.
  543. *
  544. * fi An instance of a channel statemachine.
  545. * event The event, just happened.
  546. * arg Generic pointer, casted from channel * upon call.
  547. */
  548. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg)
  549. {
  550. struct channel *ch = arg;
  551. unsigned long saveflags;
  552. int rc;
  553. CTCM_DBF_TEXT_(SETUP, CTC_DBF_INFO, "%s(%s): %s",
  554. CTCM_FUNTAIL, ch->id,
  555. (CHANNEL_DIRECTION(ch->flags) == READ) ? "RX" : "TX");
  556. if (ch->trans_skb != NULL) {
  557. clear_normalized_cda(&ch->ccw[1]);
  558. dev_kfree_skb(ch->trans_skb);
  559. ch->trans_skb = NULL;
  560. }
  561. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  562. ch->ccw[1].cmd_code = CCW_CMD_READ;
  563. ch->ccw[1].flags = CCW_FLAG_SLI;
  564. ch->ccw[1].count = 0;
  565. } else {
  566. ch->ccw[1].cmd_code = CCW_CMD_WRITE;
  567. ch->ccw[1].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  568. ch->ccw[1].count = 0;
  569. }
  570. if (ctcm_checkalloc_buffer(ch)) {
  571. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  572. "%s(%s): %s trans_skb alloc delayed "
  573. "until first transfer",
  574. CTCM_FUNTAIL, ch->id,
  575. (CHANNEL_DIRECTION(ch->flags) == READ) ? "RX" : "TX");
  576. }
  577. ch->ccw[0].cmd_code = CCW_CMD_PREPARE;
  578. ch->ccw[0].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  579. ch->ccw[0].count = 0;
  580. ch->ccw[0].cda = 0;
  581. ch->ccw[2].cmd_code = CCW_CMD_NOOP; /* jointed CE + DE */
  582. ch->ccw[2].flags = CCW_FLAG_SLI;
  583. ch->ccw[2].count = 0;
  584. ch->ccw[2].cda = 0;
  585. memcpy(&ch->ccw[3], &ch->ccw[0], sizeof(struct ccw1) * 3);
  586. ch->ccw[4].cda = 0;
  587. ch->ccw[4].flags &= ~CCW_FLAG_IDA;
  588. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  589. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  590. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  591. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  592. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  593. if (rc != 0) {
  594. if (rc != -EBUSY)
  595. fsm_deltimer(&ch->timer);
  596. ctcm_ccw_check_rc(ch, rc, "initial HaltIO");
  597. }
  598. }
  599. /**
  600. * Shutdown a channel.
  601. *
  602. * fi An instance of a channel statemachine.
  603. * event The event, just happened.
  604. * arg Generic pointer, casted from channel * upon call.
  605. */
  606. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg)
  607. {
  608. struct channel *ch = arg;
  609. unsigned long saveflags = 0;
  610. int rc;
  611. int oldstate;
  612. fsm_deltimer(&ch->timer);
  613. if (IS_MPC(ch))
  614. fsm_deltimer(&ch->sweep_timer);
  615. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  616. if (event == CTC_EVENT_STOP) /* only for STOP not yet locked */
  617. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  618. /* Such conditional locking is undeterministic in
  619. * static view. => ignore sparse warnings here. */
  620. oldstate = fsm_getstate(fi);
  621. fsm_newstate(fi, CTC_STATE_TERM);
  622. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  623. if (event == CTC_EVENT_STOP)
  624. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  625. /* see remark above about conditional locking */
  626. if (rc != 0 && rc != -EBUSY) {
  627. fsm_deltimer(&ch->timer);
  628. if (event != CTC_EVENT_STOP) {
  629. fsm_newstate(fi, oldstate);
  630. ctcm_ccw_check_rc(ch, rc, (char *)__func__);
  631. }
  632. }
  633. }
  634. /**
  635. * Cleanup helper for chx_fail and chx_stopped
  636. * cleanup channels queue and notify interface statemachine.
  637. *
  638. * fi An instance of a channel statemachine.
  639. * state The next state (depending on caller).
  640. * ch The channel to operate on.
  641. */
  642. static void ctcm_chx_cleanup(fsm_instance *fi, int state,
  643. struct channel *ch)
  644. {
  645. struct net_device *dev = ch->netdev;
  646. struct ctcm_priv *priv = dev->ml_priv;
  647. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  648. "%s(%s): %s[%d]\n",
  649. CTCM_FUNTAIL, dev->name, ch->id, state);
  650. fsm_deltimer(&ch->timer);
  651. if (IS_MPC(ch))
  652. fsm_deltimer(&ch->sweep_timer);
  653. fsm_newstate(fi, state);
  654. if (state == CTC_STATE_STOPPED && ch->trans_skb != NULL) {
  655. clear_normalized_cda(&ch->ccw[1]);
  656. dev_kfree_skb_any(ch->trans_skb);
  657. ch->trans_skb = NULL;
  658. }
  659. ch->th_seg = 0x00;
  660. ch->th_seq_num = 0x00;
  661. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  662. skb_queue_purge(&ch->io_queue);
  663. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  664. } else {
  665. ctcm_purge_skb_queue(&ch->io_queue);
  666. if (IS_MPC(ch))
  667. ctcm_purge_skb_queue(&ch->sweep_queue);
  668. spin_lock(&ch->collect_lock);
  669. ctcm_purge_skb_queue(&ch->collect_queue);
  670. ch->collect_len = 0;
  671. spin_unlock(&ch->collect_lock);
  672. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  673. }
  674. }
  675. /**
  676. * A channel has successfully been halted.
  677. * Cleanup it's queue and notify interface statemachine.
  678. *
  679. * fi An instance of a channel statemachine.
  680. * event The event, just happened.
  681. * arg Generic pointer, casted from channel * upon call.
  682. */
  683. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg)
  684. {
  685. ctcm_chx_cleanup(fi, CTC_STATE_STOPPED, arg);
  686. }
  687. /**
  688. * A stop command from device statemachine arrived and we are in
  689. * not operational mode. Set state to stopped.
  690. *
  691. * fi An instance of a channel statemachine.
  692. * event The event, just happened.
  693. * arg Generic pointer, casted from channel * upon call.
  694. */
  695. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg)
  696. {
  697. fsm_newstate(fi, CTC_STATE_STOPPED);
  698. }
  699. /**
  700. * A machine check for no path, not operational status or gone device has
  701. * happened.
  702. * Cleanup queue and notify interface statemachine.
  703. *
  704. * fi An instance of a channel statemachine.
  705. * event The event, just happened.
  706. * arg Generic pointer, casted from channel * upon call.
  707. */
  708. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg)
  709. {
  710. ctcm_chx_cleanup(fi, CTC_STATE_NOTOP, arg);
  711. }
  712. /**
  713. * Handle error during setup of channel.
  714. *
  715. * fi An instance of a channel statemachine.
  716. * event The event, just happened.
  717. * arg Generic pointer, casted from channel * upon call.
  718. */
  719. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg)
  720. {
  721. struct channel *ch = arg;
  722. struct net_device *dev = ch->netdev;
  723. struct ctcm_priv *priv = dev->ml_priv;
  724. /*
  725. * Special case: Got UC_RCRESET on setmode.
  726. * This means that remote side isn't setup. In this case
  727. * simply retry after some 10 secs...
  728. */
  729. if ((fsm_getstate(fi) == CTC_STATE_SETUPWAIT) &&
  730. ((event == CTC_EVENT_UC_RCRESET) ||
  731. (event == CTC_EVENT_UC_RSRESET))) {
  732. fsm_newstate(fi, CTC_STATE_STARTRETRY);
  733. fsm_deltimer(&ch->timer);
  734. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  735. if (!IS_MPC(ch) && (CHANNEL_DIRECTION(ch->flags) == READ)) {
  736. int rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  737. if (rc != 0)
  738. ctcm_ccw_check_rc(ch, rc,
  739. "HaltIO in chx_setuperr");
  740. }
  741. return;
  742. }
  743. CTCM_DBF_TEXT_(ERROR, CTC_DBF_CRIT,
  744. "%s(%s) : %s error during %s channel setup state=%s\n",
  745. CTCM_FUNTAIL, dev->name, ctc_ch_event_names[event],
  746. (CHANNEL_DIRECTION(ch->flags) == READ) ? "RX" : "TX",
  747. fsm_getstate_str(fi));
  748. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  749. fsm_newstate(fi, CTC_STATE_RXERR);
  750. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  751. } else {
  752. fsm_newstate(fi, CTC_STATE_TXERR);
  753. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  754. }
  755. }
  756. /**
  757. * Restart a channel after an error.
  758. *
  759. * fi An instance of a channel statemachine.
  760. * event The event, just happened.
  761. * arg Generic pointer, casted from channel * upon call.
  762. */
  763. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg)
  764. {
  765. struct channel *ch = arg;
  766. struct net_device *dev = ch->netdev;
  767. unsigned long saveflags = 0;
  768. int oldstate;
  769. int rc;
  770. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  771. "%s: %s[%d] of %s\n",
  772. CTCM_FUNTAIL, ch->id, event, dev->name);
  773. fsm_deltimer(&ch->timer);
  774. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  775. oldstate = fsm_getstate(fi);
  776. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  777. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  778. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  779. /* Such conditional locking is a known problem for
  780. * sparse because its undeterministic in static view.
  781. * Warnings should be ignored here. */
  782. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  783. if (event == CTC_EVENT_TIMER)
  784. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  785. if (rc != 0) {
  786. if (rc != -EBUSY) {
  787. fsm_deltimer(&ch->timer);
  788. fsm_newstate(fi, oldstate);
  789. }
  790. ctcm_ccw_check_rc(ch, rc, "HaltIO in ctcm_chx_restart");
  791. }
  792. }
  793. /**
  794. * Handle error during RX initial handshake (exchange of
  795. * 0-length block header)
  796. *
  797. * fi An instance of a channel statemachine.
  798. * event The event, just happened.
  799. * arg Generic pointer, casted from channel * upon call.
  800. */
  801. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg)
  802. {
  803. struct channel *ch = arg;
  804. struct net_device *dev = ch->netdev;
  805. struct ctcm_priv *priv = dev->ml_priv;
  806. if (event == CTC_EVENT_TIMER) {
  807. if (!IS_MPCDEV(dev))
  808. /* TODO : check if MPC deletes timer somewhere */
  809. fsm_deltimer(&ch->timer);
  810. if (ch->retry++ < 3)
  811. ctcm_chx_restart(fi, event, arg);
  812. else {
  813. fsm_newstate(fi, CTC_STATE_RXERR);
  814. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  815. }
  816. } else
  817. ctcm_pr_warn("%s: Error during RX init handshake\n", dev->name);
  818. }
  819. /**
  820. * Notify device statemachine if we gave up initialization
  821. * of RX channel.
  822. *
  823. * fi An instance of a channel statemachine.
  824. * event The event, just happened.
  825. * arg Generic pointer, casted from channel * upon call.
  826. */
  827. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg)
  828. {
  829. struct channel *ch = arg;
  830. struct net_device *dev = ch->netdev;
  831. struct ctcm_priv *priv = dev->ml_priv;
  832. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  833. "%s(%s): RX %s busy, init. fail",
  834. CTCM_FUNTAIL, dev->name, ch->id);
  835. fsm_newstate(fi, CTC_STATE_RXERR);
  836. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  837. }
  838. /**
  839. * Handle RX Unit check remote reset (remote disconnected)
  840. *
  841. * fi An instance of a channel statemachine.
  842. * event The event, just happened.
  843. * arg Generic pointer, casted from channel * upon call.
  844. */
  845. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg)
  846. {
  847. struct channel *ch = arg;
  848. struct channel *ch2;
  849. struct net_device *dev = ch->netdev;
  850. struct ctcm_priv *priv = dev->ml_priv;
  851. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  852. "%s: %s: remote disconnect - re-init ...",
  853. CTCM_FUNTAIL, dev->name);
  854. fsm_deltimer(&ch->timer);
  855. /*
  856. * Notify device statemachine
  857. */
  858. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  859. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  860. fsm_newstate(fi, CTC_STATE_DTERM);
  861. ch2 = priv->channel[WRITE];
  862. fsm_newstate(ch2->fsm, CTC_STATE_DTERM);
  863. ccw_device_halt(ch->cdev, (unsigned long)ch);
  864. ccw_device_halt(ch2->cdev, (unsigned long)ch2);
  865. }
  866. /**
  867. * Handle error during TX channel initialization.
  868. *
  869. * fi An instance of a channel statemachine.
  870. * event The event, just happened.
  871. * arg Generic pointer, casted from channel * upon call.
  872. */
  873. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg)
  874. {
  875. struct channel *ch = arg;
  876. struct net_device *dev = ch->netdev;
  877. struct ctcm_priv *priv = dev->ml_priv;
  878. if (event == CTC_EVENT_TIMER) {
  879. fsm_deltimer(&ch->timer);
  880. if (ch->retry++ < 3)
  881. ctcm_chx_restart(fi, event, arg);
  882. else {
  883. fsm_newstate(fi, CTC_STATE_TXERR);
  884. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  885. }
  886. } else {
  887. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  888. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  889. ctc_ch_event_names[event], fsm_getstate_str(fi));
  890. ctcm_pr_warn("%s: Error during TX init handshake\n", dev->name);
  891. }
  892. }
  893. /**
  894. * Handle TX timeout by retrying operation.
  895. *
  896. * fi An instance of a channel statemachine.
  897. * event The event, just happened.
  898. * arg Generic pointer, casted from channel * upon call.
  899. */
  900. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg)
  901. {
  902. struct channel *ch = arg;
  903. struct net_device *dev = ch->netdev;
  904. struct ctcm_priv *priv = dev->ml_priv;
  905. struct sk_buff *skb;
  906. CTCM_PR_DEBUG("Enter: %s: cp=%i ch=0x%p id=%s\n",
  907. __func__, smp_processor_id(), ch, ch->id);
  908. fsm_deltimer(&ch->timer);
  909. if (ch->retry++ > 3) {
  910. struct mpc_group *gptr = priv->mpcg;
  911. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  912. "%s: %s: retries exceeded",
  913. CTCM_FUNTAIL, ch->id);
  914. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  915. /* call restart if not MPC or if MPC and mpcg fsm is ready.
  916. use gptr as mpc indicator */
  917. if (!(gptr && (fsm_getstate(gptr->fsm) != MPCG_STATE_READY)))
  918. ctcm_chx_restart(fi, event, arg);
  919. goto done;
  920. }
  921. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  922. "%s : %s: retry %d",
  923. CTCM_FUNTAIL, ch->id, ch->retry);
  924. skb = skb_peek(&ch->io_queue);
  925. if (skb) {
  926. int rc = 0;
  927. unsigned long saveflags = 0;
  928. clear_normalized_cda(&ch->ccw[4]);
  929. ch->ccw[4].count = skb->len;
  930. if (set_normalized_cda(&ch->ccw[4], skb->data)) {
  931. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  932. "%s: %s: IDAL alloc failed",
  933. CTCM_FUNTAIL, ch->id);
  934. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  935. ctcm_chx_restart(fi, event, arg);
  936. goto done;
  937. }
  938. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  939. if (event == CTC_EVENT_TIMER) /* for TIMER not yet locked */
  940. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  941. /* Such conditional locking is a known problem for
  942. * sparse because its undeterministic in static view.
  943. * Warnings should be ignored here. */
  944. if (do_debug_ccw)
  945. ctcmpc_dumpit((char *)&ch->ccw[3],
  946. sizeof(struct ccw1) * 3);
  947. rc = ccw_device_start(ch->cdev, &ch->ccw[3],
  948. (unsigned long)ch, 0xff, 0);
  949. if (event == CTC_EVENT_TIMER)
  950. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev),
  951. saveflags);
  952. if (rc != 0) {
  953. fsm_deltimer(&ch->timer);
  954. ctcm_ccw_check_rc(ch, rc, "TX in chx_txretry");
  955. ctcm_purge_skb_queue(&ch->io_queue);
  956. }
  957. }
  958. done:
  959. return;
  960. }
  961. /**
  962. * Handle fatal errors during an I/O command.
  963. *
  964. * fi An instance of a channel statemachine.
  965. * event The event, just happened.
  966. * arg Generic pointer, casted from channel * upon call.
  967. */
  968. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg)
  969. {
  970. struct channel *ch = arg;
  971. struct net_device *dev = ch->netdev;
  972. struct ctcm_priv *priv = dev->ml_priv;
  973. int rd = CHANNEL_DIRECTION(ch->flags);
  974. fsm_deltimer(&ch->timer);
  975. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  976. "%s: %s: %s unrecoverable channel error",
  977. CTCM_FUNTAIL, ch->id, rd == READ ? "RX" : "TX");
  978. if (IS_MPC(ch)) {
  979. priv->stats.tx_dropped++;
  980. priv->stats.tx_errors++;
  981. }
  982. if (rd == READ) {
  983. fsm_newstate(fi, CTC_STATE_RXERR);
  984. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  985. } else {
  986. fsm_newstate(fi, CTC_STATE_TXERR);
  987. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  988. }
  989. }
  990. /*
  991. * The ctcm statemachine for a channel.
  992. */
  993. const fsm_node ch_fsm[] = {
  994. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  995. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  996. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  997. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  998. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  999. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1000. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1001. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1002. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1003. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1004. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1005. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1006. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1007. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1008. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1009. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1010. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1011. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1012. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1013. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1014. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1015. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, chx_firstio },
  1016. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1017. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1018. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1019. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1020. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1021. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1022. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1023. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, chx_rxidle },
  1024. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1025. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1026. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1027. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1028. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1029. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, chx_firstio },
  1030. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1031. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1032. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1033. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, chx_rx },
  1034. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1035. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1036. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1037. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, chx_rx },
  1038. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1039. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1040. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1041. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1042. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1043. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1044. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1045. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1046. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1047. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1048. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, chx_firstio },
  1049. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1050. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1051. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1052. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1053. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1054. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1055. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1056. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1057. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1058. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1059. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1060. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1061. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1062. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1063. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1064. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1065. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1066. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1067. { CTC_STATE_TX, CTC_EVENT_FINSTAT, chx_txdone },
  1068. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_txretry },
  1069. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_txretry },
  1070. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1071. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1072. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1073. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1074. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1075. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1076. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1077. };
  1078. int ch_fsm_len = ARRAY_SIZE(ch_fsm);
  1079. /*
  1080. * MPC actions for mpc channel statemachine
  1081. * handling of MPC protocol requires extra
  1082. * statemachine and actions which are prefixed ctcmpc_ .
  1083. * The ctc_ch_states and ctc_ch_state_names,
  1084. * ctc_ch_events and ctc_ch_event_names share the ctcm definitions
  1085. * which are expanded by some elements.
  1086. */
  1087. /*
  1088. * Actions for mpc channel statemachine.
  1089. */
  1090. /**
  1091. * Normal data has been send. Free the corresponding
  1092. * skb (it's in io_queue), reset dev->tbusy and
  1093. * revert to idle state.
  1094. *
  1095. * fi An instance of a channel statemachine.
  1096. * event The event, just happened.
  1097. * arg Generic pointer, casted from channel * upon call.
  1098. */
  1099. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg)
  1100. {
  1101. struct channel *ch = arg;
  1102. struct net_device *dev = ch->netdev;
  1103. struct ctcm_priv *priv = dev->ml_priv;
  1104. struct mpc_group *grp = priv->mpcg;
  1105. struct sk_buff *skb;
  1106. int first = 1;
  1107. int i;
  1108. __u32 data_space;
  1109. unsigned long duration;
  1110. struct sk_buff *peekskb;
  1111. int rc;
  1112. struct th_header *header;
  1113. struct pdu *p_header;
  1114. struct timespec done_stamp = current_kernel_time(); /* xtime */
  1115. CTCM_PR_DEBUG("Enter %s: %s cp:%i\n",
  1116. __func__, dev->name, smp_processor_id());
  1117. duration =
  1118. (done_stamp.tv_sec - ch->prof.send_stamp.tv_sec) * 1000000 +
  1119. (done_stamp.tv_nsec - ch->prof.send_stamp.tv_nsec) / 1000;
  1120. if (duration > ch->prof.tx_time)
  1121. ch->prof.tx_time = duration;
  1122. if (ch->irb->scsw.cmd.count != 0)
  1123. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_DEBUG,
  1124. "%s(%s): TX not complete, remaining %d bytes",
  1125. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  1126. fsm_deltimer(&ch->timer);
  1127. while ((skb = skb_dequeue(&ch->io_queue))) {
  1128. priv->stats.tx_packets++;
  1129. priv->stats.tx_bytes += skb->len - TH_HEADER_LENGTH;
  1130. if (first) {
  1131. priv->stats.tx_bytes += 2;
  1132. first = 0;
  1133. }
  1134. atomic_dec(&skb->users);
  1135. dev_kfree_skb_irq(skb);
  1136. }
  1137. spin_lock(&ch->collect_lock);
  1138. clear_normalized_cda(&ch->ccw[4]);
  1139. if ((ch->collect_len <= 0) || (grp->in_sweep != 0)) {
  1140. spin_unlock(&ch->collect_lock);
  1141. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1142. goto done;
  1143. }
  1144. if (ctcm_checkalloc_buffer(ch)) {
  1145. spin_unlock(&ch->collect_lock);
  1146. goto done;
  1147. }
  1148. ch->trans_skb->data = ch->trans_skb_data;
  1149. skb_reset_tail_pointer(ch->trans_skb);
  1150. ch->trans_skb->len = 0;
  1151. if (ch->prof.maxmulti < (ch->collect_len + TH_HEADER_LENGTH))
  1152. ch->prof.maxmulti = ch->collect_len + TH_HEADER_LENGTH;
  1153. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  1154. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  1155. i = 0;
  1156. p_header = NULL;
  1157. data_space = grp->group_max_buflen - TH_HEADER_LENGTH;
  1158. CTCM_PR_DBGDATA("%s: building trans_skb from collect_q"
  1159. " data_space:%04x\n",
  1160. __func__, data_space);
  1161. while ((skb = skb_dequeue(&ch->collect_queue))) {
  1162. memcpy(skb_put(ch->trans_skb, skb->len), skb->data, skb->len);
  1163. p_header = (struct pdu *)
  1164. (skb_tail_pointer(ch->trans_skb) - skb->len);
  1165. p_header->pdu_flag = 0x00;
  1166. if (skb->protocol == ntohs(ETH_P_SNAP))
  1167. p_header->pdu_flag |= 0x60;
  1168. else
  1169. p_header->pdu_flag |= 0x20;
  1170. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1171. __func__, ch->trans_skb->len);
  1172. CTCM_PR_DBGDATA("%s: pdu header and data for up"
  1173. " to 32 bytes sent to vtam\n", __func__);
  1174. CTCM_D3_DUMP((char *)p_header, min_t(int, skb->len, 32));
  1175. ch->collect_len -= skb->len;
  1176. data_space -= skb->len;
  1177. priv->stats.tx_packets++;
  1178. priv->stats.tx_bytes += skb->len;
  1179. atomic_dec(&skb->users);
  1180. dev_kfree_skb_any(skb);
  1181. peekskb = skb_peek(&ch->collect_queue);
  1182. if (peekskb->len > data_space)
  1183. break;
  1184. i++;
  1185. }
  1186. /* p_header points to the last one we handled */
  1187. if (p_header)
  1188. p_header->pdu_flag |= PDU_LAST; /*Say it's the last one*/
  1189. header = kzalloc(TH_HEADER_LENGTH, gfp_type());
  1190. if (!header) {
  1191. spin_unlock(&ch->collect_lock);
  1192. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1193. goto done;
  1194. }
  1195. header->th_ch_flag = TH_HAS_PDU; /* Normal data */
  1196. ch->th_seq_num++;
  1197. header->th_seq_num = ch->th_seq_num;
  1198. CTCM_PR_DBGDATA("%s: ToVTAM_th_seq= %08x\n" ,
  1199. __func__, ch->th_seq_num);
  1200. memcpy(skb_push(ch->trans_skb, TH_HEADER_LENGTH), header,
  1201. TH_HEADER_LENGTH); /* put the TH on the packet */
  1202. kfree(header);
  1203. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1204. __func__, ch->trans_skb->len);
  1205. CTCM_PR_DBGDATA("%s: up-to-50 bytes of trans_skb "
  1206. "data to vtam from collect_q\n", __func__);
  1207. CTCM_D3_DUMP((char *)ch->trans_skb->data,
  1208. min_t(int, ch->trans_skb->len, 50));
  1209. spin_unlock(&ch->collect_lock);
  1210. clear_normalized_cda(&ch->ccw[1]);
  1211. if (set_normalized_cda(&ch->ccw[1], ch->trans_skb->data)) {
  1212. dev_kfree_skb_any(ch->trans_skb);
  1213. ch->trans_skb = NULL;
  1214. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_ERROR,
  1215. "%s: %s: IDAL alloc failed",
  1216. CTCM_FUNTAIL, ch->id);
  1217. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1218. return;
  1219. }
  1220. ch->ccw[1].count = ch->trans_skb->len;
  1221. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  1222. ch->prof.send_stamp = current_kernel_time(); /* xtime */
  1223. if (do_debug_ccw)
  1224. ctcmpc_dumpit((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1225. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1226. (unsigned long)ch, 0xff, 0);
  1227. ch->prof.doios_multi++;
  1228. if (rc != 0) {
  1229. priv->stats.tx_dropped += i;
  1230. priv->stats.tx_errors += i;
  1231. fsm_deltimer(&ch->timer);
  1232. ctcm_ccw_check_rc(ch, rc, "chained TX");
  1233. }
  1234. done:
  1235. ctcm_clear_busy(dev);
  1236. return;
  1237. }
  1238. /**
  1239. * Got normal data, check for sanity, queue it up, allocate new buffer
  1240. * trigger bottom half, and initiate next read.
  1241. *
  1242. * fi An instance of a channel statemachine.
  1243. * event The event, just happened.
  1244. * arg Generic pointer, casted from channel * upon call.
  1245. */
  1246. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg)
  1247. {
  1248. struct channel *ch = arg;
  1249. struct net_device *dev = ch->netdev;
  1250. struct ctcm_priv *priv = dev->ml_priv;
  1251. struct mpc_group *grp = priv->mpcg;
  1252. struct sk_buff *skb = ch->trans_skb;
  1253. struct sk_buff *new_skb;
  1254. unsigned long saveflags = 0; /* avoids compiler warning */
  1255. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  1256. CTCM_PR_DEBUG("%s: %s: cp:%i %s maxbuf : %04x, len: %04x\n",
  1257. CTCM_FUNTAIL, dev->name, smp_processor_id(),
  1258. ch->id, ch->max_bufsize, len);
  1259. fsm_deltimer(&ch->timer);
  1260. if (skb == NULL) {
  1261. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1262. "%s(%s): TRANS_SKB = NULL",
  1263. CTCM_FUNTAIL, dev->name);
  1264. goto again;
  1265. }
  1266. if (len < TH_HEADER_LENGTH) {
  1267. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1268. "%s(%s): packet length %d to short",
  1269. CTCM_FUNTAIL, dev->name, len);
  1270. priv->stats.rx_dropped++;
  1271. priv->stats.rx_length_errors++;
  1272. } else {
  1273. /* must have valid th header or game over */
  1274. __u32 block_len = len;
  1275. len = TH_HEADER_LENGTH + XID2_LENGTH + 4;
  1276. new_skb = __dev_alloc_skb(ch->max_bufsize, GFP_ATOMIC);
  1277. if (new_skb == NULL) {
  1278. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1279. "%s(%d): skb allocation failed",
  1280. CTCM_FUNTAIL, dev->name);
  1281. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1282. goto again;
  1283. }
  1284. switch (fsm_getstate(grp->fsm)) {
  1285. case MPCG_STATE_RESET:
  1286. case MPCG_STATE_INOP:
  1287. dev_kfree_skb_any(new_skb);
  1288. break;
  1289. case MPCG_STATE_FLOWC:
  1290. case MPCG_STATE_READY:
  1291. memcpy(skb_put(new_skb, block_len),
  1292. skb->data, block_len);
  1293. skb_queue_tail(&ch->io_queue, new_skb);
  1294. tasklet_schedule(&ch->ch_tasklet);
  1295. break;
  1296. default:
  1297. memcpy(skb_put(new_skb, len), skb->data, len);
  1298. skb_queue_tail(&ch->io_queue, new_skb);
  1299. tasklet_hi_schedule(&ch->ch_tasklet);
  1300. break;
  1301. }
  1302. }
  1303. again:
  1304. switch (fsm_getstate(grp->fsm)) {
  1305. int rc, dolock;
  1306. case MPCG_STATE_FLOWC:
  1307. case MPCG_STATE_READY:
  1308. if (ctcm_checkalloc_buffer(ch))
  1309. break;
  1310. ch->trans_skb->data = ch->trans_skb_data;
  1311. skb_reset_tail_pointer(ch->trans_skb);
  1312. ch->trans_skb->len = 0;
  1313. ch->ccw[1].count = ch->max_bufsize;
  1314. if (do_debug_ccw)
  1315. ctcmpc_dumpit((char *)&ch->ccw[0],
  1316. sizeof(struct ccw1) * 3);
  1317. dolock = !in_irq();
  1318. if (dolock)
  1319. spin_lock_irqsave(
  1320. get_ccwdev_lock(ch->cdev), saveflags);
  1321. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1322. (unsigned long)ch, 0xff, 0);
  1323. if (dolock) /* see remark about conditional locking */
  1324. spin_unlock_irqrestore(
  1325. get_ccwdev_lock(ch->cdev), saveflags);
  1326. if (rc != 0)
  1327. ctcm_ccw_check_rc(ch, rc, "normal RX");
  1328. default:
  1329. break;
  1330. }
  1331. CTCM_PR_DEBUG("Exit %s: %s, ch=0x%p, id=%s\n",
  1332. __func__, dev->name, ch, ch->id);
  1333. }
  1334. /**
  1335. * Initialize connection by sending a __u16 of value 0.
  1336. *
  1337. * fi An instance of a channel statemachine.
  1338. * event The event, just happened.
  1339. * arg Generic pointer, casted from channel * upon call.
  1340. */
  1341. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg)
  1342. {
  1343. struct channel *ch = arg;
  1344. struct net_device *dev = ch->netdev;
  1345. struct ctcm_priv *priv = dev->ml_priv;
  1346. struct mpc_group *gptr = priv->mpcg;
  1347. CTCM_PR_DEBUG("Enter %s: id=%s, ch=0x%p\n",
  1348. __func__, ch->id, ch);
  1349. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_INFO,
  1350. "%s: %s: chstate:%i, grpstate:%i, prot:%i\n",
  1351. CTCM_FUNTAIL, ch->id, fsm_getstate(fi),
  1352. fsm_getstate(gptr->fsm), ch->protocol);
  1353. if (fsm_getstate(fi) == CTC_STATE_TXIDLE)
  1354. MPC_DBF_DEV_NAME(TRACE, dev, "remote side issued READ? ");
  1355. fsm_deltimer(&ch->timer);
  1356. if (ctcm_checkalloc_buffer(ch))
  1357. goto done;
  1358. switch (fsm_getstate(fi)) {
  1359. case CTC_STATE_STARTRETRY:
  1360. case CTC_STATE_SETUPWAIT:
  1361. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  1362. ctcmpc_chx_rxidle(fi, event, arg);
  1363. } else {
  1364. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1365. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  1366. }
  1367. goto done;
  1368. default:
  1369. break;
  1370. };
  1371. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == READ)
  1372. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  1373. done:
  1374. CTCM_PR_DEBUG("Exit %s: id=%s, ch=0x%p\n",
  1375. __func__, ch->id, ch);
  1376. return;
  1377. }
  1378. /**
  1379. * Got initial data, check it. If OK,
  1380. * notify device statemachine that we are up and
  1381. * running.
  1382. *
  1383. * fi An instance of a channel statemachine.
  1384. * event The event, just happened.
  1385. * arg Generic pointer, casted from channel * upon call.
  1386. */
  1387. void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg)
  1388. {
  1389. struct channel *ch = arg;
  1390. struct net_device *dev = ch->netdev;
  1391. struct ctcm_priv *priv = dev->ml_priv;
  1392. struct mpc_group *grp = priv->mpcg;
  1393. int rc;
  1394. unsigned long saveflags = 0; /* avoids compiler warning */
  1395. fsm_deltimer(&ch->timer);
  1396. CTCM_PR_DEBUG("%s: %s: %s: cp:%i, chstate:%i grpstate:%i\n",
  1397. __func__, ch->id, dev->name, smp_processor_id(),
  1398. fsm_getstate(fi), fsm_getstate(grp->fsm));
  1399. fsm_newstate(fi, CTC_STATE_RXIDLE);
  1400. /* XID processing complete */
  1401. switch (fsm_getstate(grp->fsm)) {
  1402. case MPCG_STATE_FLOWC:
  1403. case MPCG_STATE_READY:
  1404. if (ctcm_checkalloc_buffer(ch))
  1405. goto done;
  1406. ch->trans_skb->data = ch->trans_skb_data;
  1407. skb_reset_tail_pointer(ch->trans_skb);
  1408. ch->trans_skb->len = 0;
  1409. ch->ccw[1].count = ch->max_bufsize;
  1410. CTCM_CCW_DUMP((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1411. if (event == CTC_EVENT_START)
  1412. /* see remark about conditional locking */
  1413. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  1414. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1415. (unsigned long)ch, 0xff, 0);
  1416. if (event == CTC_EVENT_START)
  1417. spin_unlock_irqrestore(
  1418. get_ccwdev_lock(ch->cdev), saveflags);
  1419. if (rc != 0) {
  1420. fsm_newstate(fi, CTC_STATE_RXINIT);
  1421. ctcm_ccw_check_rc(ch, rc, "initial RX");
  1422. goto done;
  1423. }
  1424. break;
  1425. default:
  1426. break;
  1427. }
  1428. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  1429. done:
  1430. return;
  1431. }
  1432. /*
  1433. * ctcmpc channel FSM action
  1434. * called from several points in ctcmpc_ch_fsm
  1435. * ctcmpc only
  1436. */
  1437. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg)
  1438. {
  1439. struct channel *ch = arg;
  1440. struct net_device *dev = ch->netdev;
  1441. struct ctcm_priv *priv = dev->ml_priv;
  1442. struct mpc_group *grp = priv->mpcg;
  1443. CTCM_PR_DEBUG("%s(%s): %s(ch=0x%p), cp=%i, ChStat:%s, GrpStat:%s\n",
  1444. __func__, dev->name, ch->id, ch, smp_processor_id(),
  1445. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1446. switch (fsm_getstate(grp->fsm)) {
  1447. case MPCG_STATE_XID2INITW:
  1448. /* ok..start yside xid exchanges */
  1449. if (!ch->in_mpcgroup)
  1450. break;
  1451. if (fsm_getstate(ch->fsm) == CH_XID0_PENDING) {
  1452. fsm_deltimer(&grp->timer);
  1453. fsm_addtimer(&grp->timer,
  1454. MPC_XID_TIMEOUT_VALUE,
  1455. MPCG_EVENT_TIMER, dev);
  1456. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1457. } else if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1458. /* attn rcvd before xid0 processed via bh */
  1459. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1460. break;
  1461. case MPCG_STATE_XID2INITX:
  1462. case MPCG_STATE_XID0IOWAIT:
  1463. case MPCG_STATE_XID0IOWAIX:
  1464. /* attn rcvd before xid0 processed on ch
  1465. but mid-xid0 processing for group */
  1466. if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1467. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1468. break;
  1469. case MPCG_STATE_XID7INITW:
  1470. case MPCG_STATE_XID7INITX:
  1471. case MPCG_STATE_XID7INITI:
  1472. case MPCG_STATE_XID7INITZ:
  1473. switch (fsm_getstate(ch->fsm)) {
  1474. case CH_XID7_PENDING:
  1475. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1476. break;
  1477. case CH_XID7_PENDING2:
  1478. fsm_newstate(ch->fsm, CH_XID7_PENDING3);
  1479. break;
  1480. }
  1481. fsm_event(grp->fsm, MPCG_EVENT_XID7DONE, dev);
  1482. break;
  1483. }
  1484. return;
  1485. }
  1486. /*
  1487. * ctcmpc channel FSM action
  1488. * called from one point in ctcmpc_ch_fsm
  1489. * ctcmpc only
  1490. */
  1491. static void ctcmpc_chx_attnbusy(fsm_instance *fsm, int event, void *arg)
  1492. {
  1493. struct channel *ch = arg;
  1494. struct net_device *dev = ch->netdev;
  1495. struct ctcm_priv *priv = dev->ml_priv;
  1496. struct mpc_group *grp = priv->mpcg;
  1497. CTCM_PR_DEBUG("%s(%s): %s\n ChState:%s GrpState:%s\n",
  1498. __func__, dev->name, ch->id,
  1499. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1500. fsm_deltimer(&ch->timer);
  1501. switch (fsm_getstate(grp->fsm)) {
  1502. case MPCG_STATE_XID0IOWAIT:
  1503. /* vtam wants to be primary.start yside xid exchanges*/
  1504. /* only receive one attn-busy at a time so must not */
  1505. /* change state each time */
  1506. grp->changed_side = 1;
  1507. fsm_newstate(grp->fsm, MPCG_STATE_XID2INITW);
  1508. break;
  1509. case MPCG_STATE_XID2INITW:
  1510. if (grp->changed_side == 1) {
  1511. grp->changed_side = 2;
  1512. break;
  1513. }
  1514. /* process began via call to establish_conn */
  1515. /* so must report failure instead of reverting */
  1516. /* back to ready-for-xid passive state */
  1517. if (grp->estconnfunc)
  1518. goto done;
  1519. /* this attnbusy is NOT the result of xside xid */
  1520. /* collisions so yside must have been triggered */
  1521. /* by an ATTN that was not intended to start XID */
  1522. /* processing. Revert back to ready-for-xid and */
  1523. /* wait for ATTN interrupt to signal xid start */
  1524. if (fsm_getstate(ch->fsm) == CH_XID0_INPROGRESS) {
  1525. fsm_newstate(ch->fsm, CH_XID0_PENDING) ;
  1526. fsm_deltimer(&grp->timer);
  1527. goto done;
  1528. }
  1529. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1530. goto done;
  1531. case MPCG_STATE_XID2INITX:
  1532. /* XID2 was received before ATTN Busy for second
  1533. channel.Send yside xid for second channel.
  1534. */
  1535. if (grp->changed_side == 1) {
  1536. grp->changed_side = 2;
  1537. break;
  1538. }
  1539. case MPCG_STATE_XID0IOWAIX:
  1540. case MPCG_STATE_XID7INITW:
  1541. case MPCG_STATE_XID7INITX:
  1542. case MPCG_STATE_XID7INITI:
  1543. case MPCG_STATE_XID7INITZ:
  1544. default:
  1545. /* multiple attn-busy indicates too out-of-sync */
  1546. /* and they are certainly not being received as part */
  1547. /* of valid mpc group negotiations.. */
  1548. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1549. goto done;
  1550. }
  1551. if (grp->changed_side == 1) {
  1552. fsm_deltimer(&grp->timer);
  1553. fsm_addtimer(&grp->timer, MPC_XID_TIMEOUT_VALUE,
  1554. MPCG_EVENT_TIMER, dev);
  1555. }
  1556. if (ch->in_mpcgroup)
  1557. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1558. else
  1559. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1560. "%s(%s): channel %s not added to group",
  1561. CTCM_FUNTAIL, dev->name, ch->id);
  1562. done:
  1563. return;
  1564. }
  1565. /*
  1566. * ctcmpc channel FSM action
  1567. * called from several points in ctcmpc_ch_fsm
  1568. * ctcmpc only
  1569. */
  1570. static void ctcmpc_chx_resend(fsm_instance *fsm, int event, void *arg)
  1571. {
  1572. struct channel *ch = arg;
  1573. struct net_device *dev = ch->netdev;
  1574. struct ctcm_priv *priv = dev->ml_priv;
  1575. struct mpc_group *grp = priv->mpcg;
  1576. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1577. return;
  1578. }
  1579. /*
  1580. * ctcmpc channel FSM action
  1581. * called from several points in ctcmpc_ch_fsm
  1582. * ctcmpc only
  1583. */
  1584. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg)
  1585. {
  1586. struct channel *ach = arg;
  1587. struct net_device *dev = ach->netdev;
  1588. struct ctcm_priv *priv = dev->ml_priv;
  1589. struct mpc_group *grp = priv->mpcg;
  1590. struct channel *wch = priv->channel[WRITE];
  1591. struct channel *rch = priv->channel[READ];
  1592. struct sk_buff *skb;
  1593. struct th_sweep *header;
  1594. int rc = 0;
  1595. unsigned long saveflags = 0;
  1596. CTCM_PR_DEBUG("ctcmpc enter: %s(): cp=%i ch=0x%p id=%s\n",
  1597. __func__, smp_processor_id(), ach, ach->id);
  1598. if (grp->in_sweep == 0)
  1599. goto done;
  1600. CTCM_PR_DBGDATA("%s: 1: ToVTAM_th_seq= %08x\n" ,
  1601. __func__, wch->th_seq_num);
  1602. CTCM_PR_DBGDATA("%s: 1: FromVTAM_th_seq= %08x\n" ,
  1603. __func__, rch->th_seq_num);
  1604. if (fsm_getstate(wch->fsm) != CTC_STATE_TXIDLE) {
  1605. /* give the previous IO time to complete */
  1606. fsm_addtimer(&wch->sweep_timer,
  1607. 200, CTC_EVENT_RSWEEP_TIMER, wch);
  1608. goto done;
  1609. }
  1610. skb = skb_dequeue(&wch->sweep_queue);
  1611. if (!skb)
  1612. goto done;
  1613. if (set_normalized_cda(&wch->ccw[4], skb->data)) {
  1614. grp->in_sweep = 0;
  1615. ctcm_clear_busy_do(dev);
  1616. dev_kfree_skb_any(skb);
  1617. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1618. goto done;
  1619. } else {
  1620. atomic_inc(&skb->users);
  1621. skb_queue_tail(&wch->io_queue, skb);
  1622. }
  1623. /* send out the sweep */
  1624. wch->ccw[4].count = skb->len;
  1625. header = (struct th_sweep *)skb->data;
  1626. switch (header->th.th_ch_flag) {
  1627. case TH_SWEEP_REQ:
  1628. grp->sweep_req_pend_num--;
  1629. break;
  1630. case TH_SWEEP_RESP:
  1631. grp->sweep_rsp_pend_num--;
  1632. break;
  1633. }
  1634. header->sw.th_last_seq = wch->th_seq_num;
  1635. CTCM_CCW_DUMP((char *)&wch->ccw[3], sizeof(struct ccw1) * 3);
  1636. CTCM_PR_DBGDATA("%s: sweep packet\n", __func__);
  1637. CTCM_D3_DUMP((char *)header, TH_SWEEP_LENGTH);
  1638. fsm_addtimer(&wch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, wch);
  1639. fsm_newstate(wch->fsm, CTC_STATE_TX);
  1640. spin_lock_irqsave(get_ccwdev_lock(wch->cdev), saveflags);
  1641. wch->prof.send_stamp = current_kernel_time(); /* xtime */
  1642. rc = ccw_device_start(wch->cdev, &wch->ccw[3],
  1643. (unsigned long) wch, 0xff, 0);
  1644. spin_unlock_irqrestore(get_ccwdev_lock(wch->cdev), saveflags);
  1645. if ((grp->sweep_req_pend_num == 0) &&
  1646. (grp->sweep_rsp_pend_num == 0)) {
  1647. grp->in_sweep = 0;
  1648. rch->th_seq_num = 0x00;
  1649. wch->th_seq_num = 0x00;
  1650. ctcm_clear_busy_do(dev);
  1651. }
  1652. CTCM_PR_DBGDATA("%s: To-/From-VTAM_th_seq = %08x/%08x\n" ,
  1653. __func__, wch->th_seq_num, rch->th_seq_num);
  1654. if (rc != 0)
  1655. ctcm_ccw_check_rc(wch, rc, "send sweep");
  1656. done:
  1657. return;
  1658. }
  1659. /*
  1660. * The ctcmpc statemachine for a channel.
  1661. */
  1662. const fsm_node ctcmpc_ch_fsm[] = {
  1663. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  1664. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  1665. { CTC_STATE_STOPPED, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1666. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1667. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1668. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1669. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1670. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1671. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1672. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1673. { CTC_STATE_NOTOP, CTC_EVENT_UC_RCRESET, ctcm_chx_stop },
  1674. { CTC_STATE_NOTOP, CTC_EVENT_UC_RSRESET, ctcm_chx_stop },
  1675. { CTC_STATE_NOTOP, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1676. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1677. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1678. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1679. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1680. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1681. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1682. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1683. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1684. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1685. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1686. { CTC_STATE_STARTRETRY, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1687. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1688. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1689. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1690. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1691. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1692. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1693. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1694. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1695. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1696. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1697. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, ctcmpc_chx_rxidle },
  1698. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1699. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1700. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1701. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1702. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1703. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, ctcmpc_chx_firstio },
  1704. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1705. { CH_XID0_PENDING, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1706. { CH_XID0_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1707. { CH_XID0_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1708. { CH_XID0_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1709. { CH_XID0_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1710. { CH_XID0_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1711. { CH_XID0_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1712. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1713. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1714. { CH_XID0_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1715. { CH_XID0_INPROGRESS, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1716. { CH_XID0_INPROGRESS, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1717. { CH_XID0_INPROGRESS, CTC_EVENT_STOP, ctcm_chx_haltio },
  1718. { CH_XID0_INPROGRESS, CTC_EVENT_START, ctcm_action_nop },
  1719. { CH_XID0_INPROGRESS, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1720. { CH_XID0_INPROGRESS, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1721. { CH_XID0_INPROGRESS, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1722. { CH_XID0_INPROGRESS, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1723. { CH_XID0_INPROGRESS, CTC_EVENT_ATTNBUSY, ctcmpc_chx_attnbusy },
  1724. { CH_XID0_INPROGRESS, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1725. { CH_XID0_INPROGRESS, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1726. { CH_XID7_PENDING, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1727. { CH_XID7_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1728. { CH_XID7_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1729. { CH_XID7_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1730. { CH_XID7_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1731. { CH_XID7_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1732. { CH_XID7_PENDING, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1733. { CH_XID7_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1734. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1735. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1736. { CH_XID7_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1737. { CH_XID7_PENDING, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1738. { CH_XID7_PENDING, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1739. { CH_XID7_PENDING1, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1740. { CH_XID7_PENDING1, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1741. { CH_XID7_PENDING1, CTC_EVENT_STOP, ctcm_chx_haltio },
  1742. { CH_XID7_PENDING1, CTC_EVENT_START, ctcm_action_nop },
  1743. { CH_XID7_PENDING1, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1744. { CH_XID7_PENDING1, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1745. { CH_XID7_PENDING1, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1746. { CH_XID7_PENDING1, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1747. { CH_XID7_PENDING1, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1748. { CH_XID7_PENDING1, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1749. { CH_XID7_PENDING1, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1750. { CH_XID7_PENDING1, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1751. { CH_XID7_PENDING2, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1752. { CH_XID7_PENDING2, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1753. { CH_XID7_PENDING2, CTC_EVENT_STOP, ctcm_chx_haltio },
  1754. { CH_XID7_PENDING2, CTC_EVENT_START, ctcm_action_nop },
  1755. { CH_XID7_PENDING2, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1756. { CH_XID7_PENDING2, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1757. { CH_XID7_PENDING2, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1758. { CH_XID7_PENDING2, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1759. { CH_XID7_PENDING2, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1760. { CH_XID7_PENDING2, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1761. { CH_XID7_PENDING2, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1762. { CH_XID7_PENDING2, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1763. { CH_XID7_PENDING3, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1764. { CH_XID7_PENDING3, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1765. { CH_XID7_PENDING3, CTC_EVENT_STOP, ctcm_chx_haltio },
  1766. { CH_XID7_PENDING3, CTC_EVENT_START, ctcm_action_nop },
  1767. { CH_XID7_PENDING3, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1768. { CH_XID7_PENDING3, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1769. { CH_XID7_PENDING3, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1770. { CH_XID7_PENDING3, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1771. { CH_XID7_PENDING3, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1772. { CH_XID7_PENDING3, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1773. { CH_XID7_PENDING3, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1774. { CH_XID7_PENDING3, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1775. { CH_XID7_PENDING4, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1776. { CH_XID7_PENDING4, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1777. { CH_XID7_PENDING4, CTC_EVENT_STOP, ctcm_chx_haltio },
  1778. { CH_XID7_PENDING4, CTC_EVENT_START, ctcm_action_nop },
  1779. { CH_XID7_PENDING4, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1780. { CH_XID7_PENDING4, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1781. { CH_XID7_PENDING4, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1782. { CH_XID7_PENDING4, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1783. { CH_XID7_PENDING4, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1784. { CH_XID7_PENDING4, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1785. { CH_XID7_PENDING4, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1786. { CH_XID7_PENDING4, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1787. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1788. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1789. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1790. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1791. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1792. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1793. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1794. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1795. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1796. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1797. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1798. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1799. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1800. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1801. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1802. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1803. { CTC_STATE_TXINIT, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1804. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1805. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1806. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1807. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1808. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1809. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1810. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1811. { CTC_STATE_TXIDLE, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1812. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1813. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1814. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1815. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1816. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1817. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1818. { CTC_STATE_TERM, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1819. { CTC_STATE_TERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1820. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1821. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1822. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1823. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1824. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1825. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1826. { CTC_STATE_DTERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1827. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1828. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1829. { CTC_STATE_TX, CTC_EVENT_FINSTAT, ctcmpc_chx_txdone },
  1830. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1831. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1832. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1833. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1834. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1835. { CTC_STATE_TX, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1836. { CTC_STATE_TX, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1837. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1838. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1839. { CTC_STATE_TXERR, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1840. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1841. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1842. };
  1843. int mpc_ch_fsm_len = ARRAY_SIZE(ctcmpc_ch_fsm);
  1844. /*
  1845. * Actions for interface - statemachine.
  1846. */
  1847. /**
  1848. * Startup channels by sending CTC_EVENT_START to each channel.
  1849. *
  1850. * fi An instance of an interface statemachine.
  1851. * event The event, just happened.
  1852. * arg Generic pointer, casted from struct net_device * upon call.
  1853. */
  1854. static void dev_action_start(fsm_instance *fi, int event, void *arg)
  1855. {
  1856. struct net_device *dev = arg;
  1857. struct ctcm_priv *priv = dev->ml_priv;
  1858. int direction;
  1859. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1860. fsm_deltimer(&priv->restart_timer);
  1861. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  1862. if (IS_MPC(priv))
  1863. priv->mpcg->channels_terminating = 0;
  1864. for (direction = READ; direction <= WRITE; direction++) {
  1865. struct channel *ch = priv->channel[direction];
  1866. fsm_event(ch->fsm, CTC_EVENT_START, ch);
  1867. }
  1868. }
  1869. /**
  1870. * Shutdown channels by sending CTC_EVENT_STOP to each channel.
  1871. *
  1872. * fi An instance of an interface statemachine.
  1873. * event The event, just happened.
  1874. * arg Generic pointer, casted from struct net_device * upon call.
  1875. */
  1876. static void dev_action_stop(fsm_instance *fi, int event, void *arg)
  1877. {
  1878. int direction;
  1879. struct net_device *dev = arg;
  1880. struct ctcm_priv *priv = dev->ml_priv;
  1881. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1882. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1883. for (direction = READ; direction <= WRITE; direction++) {
  1884. struct channel *ch = priv->channel[direction];
  1885. fsm_event(ch->fsm, CTC_EVENT_STOP, ch);
  1886. ch->th_seq_num = 0x00;
  1887. CTCM_PR_DEBUG("%s: CH_th_seq= %08x\n",
  1888. __func__, ch->th_seq_num);
  1889. }
  1890. if (IS_MPC(priv))
  1891. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1892. }
  1893. static void dev_action_restart(fsm_instance *fi, int event, void *arg)
  1894. {
  1895. int restart_timer;
  1896. struct net_device *dev = arg;
  1897. struct ctcm_priv *priv = dev->ml_priv;
  1898. CTCMY_DBF_DEV_NAME(TRACE, dev, "");
  1899. if (IS_MPC(priv)) {
  1900. ctcm_pr_info("ctcm: %s Restarting Device and "
  1901. "MPC Group in 5 seconds\n",
  1902. dev->name);
  1903. restart_timer = CTCM_TIME_1_SEC;
  1904. } else {
  1905. ctcm_pr_info("%s: Restarting\n", dev->name);
  1906. restart_timer = CTCM_TIME_5_SEC;
  1907. }
  1908. dev_action_stop(fi, event, arg);
  1909. fsm_event(priv->fsm, DEV_EVENT_STOP, dev);
  1910. if (IS_MPC(priv))
  1911. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1912. /* going back into start sequence too quickly can */
  1913. /* result in the other side becoming unreachable due */
  1914. /* to sense reported when IO is aborted */
  1915. fsm_addtimer(&priv->restart_timer, restart_timer,
  1916. DEV_EVENT_START, dev);
  1917. }
  1918. /**
  1919. * Called from channel statemachine
  1920. * when a channel is up and running.
  1921. *
  1922. * fi An instance of an interface statemachine.
  1923. * event The event, just happened.
  1924. * arg Generic pointer, casted from struct net_device * upon call.
  1925. */
  1926. static void dev_action_chup(fsm_instance *fi, int event, void *arg)
  1927. {
  1928. struct net_device *dev = arg;
  1929. struct ctcm_priv *priv = dev->ml_priv;
  1930. int dev_stat = fsm_getstate(fi);
  1931. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  1932. "%s(%s): priv = %p [%d,%d]\n ", CTCM_FUNTAIL,
  1933. dev->name, dev->ml_priv, dev_stat, event);
  1934. switch (fsm_getstate(fi)) {
  1935. case DEV_STATE_STARTWAIT_RXTX:
  1936. if (event == DEV_EVENT_RXUP)
  1937. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  1938. else
  1939. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  1940. break;
  1941. case DEV_STATE_STARTWAIT_RX:
  1942. if (event == DEV_EVENT_RXUP) {
  1943. fsm_newstate(fi, DEV_STATE_RUNNING);
  1944. ctcm_pr_info("%s: connected with remote side\n",
  1945. dev->name);
  1946. ctcm_clear_busy(dev);
  1947. }
  1948. break;
  1949. case DEV_STATE_STARTWAIT_TX:
  1950. if (event == DEV_EVENT_TXUP) {
  1951. fsm_newstate(fi, DEV_STATE_RUNNING);
  1952. ctcm_pr_info("%s: connected with remote side\n",
  1953. dev->name);
  1954. ctcm_clear_busy(dev);
  1955. }
  1956. break;
  1957. case DEV_STATE_STOPWAIT_TX:
  1958. if (event == DEV_EVENT_RXUP)
  1959. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1960. break;
  1961. case DEV_STATE_STOPWAIT_RX:
  1962. if (event == DEV_EVENT_TXUP)
  1963. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1964. break;
  1965. }
  1966. if (IS_MPC(priv)) {
  1967. if (event == DEV_EVENT_RXUP)
  1968. mpc_channel_action(priv->channel[READ],
  1969. READ, MPC_CHANNEL_ADD);
  1970. else
  1971. mpc_channel_action(priv->channel[WRITE],
  1972. WRITE, MPC_CHANNEL_ADD);
  1973. }
  1974. }
  1975. /**
  1976. * Called from device statemachine
  1977. * when a channel has been shutdown.
  1978. *
  1979. * fi An instance of an interface statemachine.
  1980. * event The event, just happened.
  1981. * arg Generic pointer, casted from struct net_device * upon call.
  1982. */
  1983. static void dev_action_chdown(fsm_instance *fi, int event, void *arg)
  1984. {
  1985. struct net_device *dev = arg;
  1986. struct ctcm_priv *priv = dev->ml_priv;
  1987. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1988. switch (fsm_getstate(fi)) {
  1989. case DEV_STATE_RUNNING:
  1990. if (event == DEV_EVENT_TXDOWN)
  1991. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  1992. else
  1993. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  1994. break;
  1995. case DEV_STATE_STARTWAIT_RX:
  1996. if (event == DEV_EVENT_TXDOWN)
  1997. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  1998. break;
  1999. case DEV_STATE_STARTWAIT_TX:
  2000. if (event == DEV_EVENT_RXDOWN)
  2001. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  2002. break;
  2003. case DEV_STATE_STOPWAIT_RXTX:
  2004. if (event == DEV_EVENT_TXDOWN)
  2005. fsm_newstate(fi, DEV_STATE_STOPWAIT_RX);
  2006. else
  2007. fsm_newstate(fi, DEV_STATE_STOPWAIT_TX);
  2008. break;
  2009. case DEV_STATE_STOPWAIT_RX:
  2010. if (event == DEV_EVENT_RXDOWN)
  2011. fsm_newstate(fi, DEV_STATE_STOPPED);
  2012. break;
  2013. case DEV_STATE_STOPWAIT_TX:
  2014. if (event == DEV_EVENT_TXDOWN)
  2015. fsm_newstate(fi, DEV_STATE_STOPPED);
  2016. break;
  2017. }
  2018. if (IS_MPC(priv)) {
  2019. if (event == DEV_EVENT_RXDOWN)
  2020. mpc_channel_action(priv->channel[READ],
  2021. READ, MPC_CHANNEL_REMOVE);
  2022. else
  2023. mpc_channel_action(priv->channel[WRITE],
  2024. WRITE, MPC_CHANNEL_REMOVE);
  2025. }
  2026. }
  2027. const fsm_node dev_fsm[] = {
  2028. { DEV_STATE_STOPPED, DEV_EVENT_START, dev_action_start },
  2029. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_START, dev_action_start },
  2030. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2031. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2032. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2033. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_START, dev_action_start },
  2034. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2035. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2036. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2037. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2038. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_START, dev_action_start },
  2039. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2040. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2041. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2042. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2043. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_STOP, dev_action_stop },
  2044. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXUP, dev_action_chup },
  2045. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXUP, dev_action_chup },
  2046. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2047. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2048. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2049. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_STOP, dev_action_stop },
  2050. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2051. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2052. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2053. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2054. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_STOP, dev_action_stop },
  2055. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2056. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2057. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2058. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2059. { DEV_STATE_RUNNING, DEV_EVENT_STOP, dev_action_stop },
  2060. { DEV_STATE_RUNNING, DEV_EVENT_RXDOWN, dev_action_chdown },
  2061. { DEV_STATE_RUNNING, DEV_EVENT_TXDOWN, dev_action_chdown },
  2062. { DEV_STATE_RUNNING, DEV_EVENT_TXUP, ctcm_action_nop },
  2063. { DEV_STATE_RUNNING, DEV_EVENT_RXUP, ctcm_action_nop },
  2064. { DEV_STATE_RUNNING, DEV_EVENT_RESTART, dev_action_restart },
  2065. };
  2066. int dev_fsm_len = ARRAY_SIZE(dev_fsm);
  2067. /* --- This is the END my friend --- */