synclink_cs.c 114 KB

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  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/module.h>
  36. #include <linux/errno.h>
  37. #include <linux/signal.h>
  38. #include <linux/sched.h>
  39. #include <linux/timer.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/tty.h>
  43. #include <linux/tty_flip.h>
  44. #include <linux/serial.h>
  45. #include <linux/major.h>
  46. #include <linux/string.h>
  47. #include <linux/fcntl.h>
  48. #include <linux/ptrace.h>
  49. #include <linux/ioport.h>
  50. #include <linux/mm.h>
  51. #include <linux/slab.h>
  52. #include <linux/netdevice.h>
  53. #include <linux/vmalloc.h>
  54. #include <linux/init.h>
  55. #include <linux/delay.h>
  56. #include <linux/ioctl.h>
  57. #include <linux/synclink.h>
  58. #include <asm/system.h>
  59. #include <asm/io.h>
  60. #include <asm/irq.h>
  61. #include <asm/dma.h>
  62. #include <linux/bitops.h>
  63. #include <asm/types.h>
  64. #include <linux/termios.h>
  65. #include <linux/workqueue.h>
  66. #include <linux/hdlc.h>
  67. #include <pcmcia/cs_types.h>
  68. #include <pcmcia/cs.h>
  69. #include <pcmcia/cistpl.h>
  70. #include <pcmcia/cisreg.h>
  71. #include <pcmcia/ds.h>
  72. #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  73. #define SYNCLINK_GENERIC_HDLC 1
  74. #else
  75. #define SYNCLINK_GENERIC_HDLC 0
  76. #endif
  77. #define GET_USER(error,value,addr) error = get_user(value,addr)
  78. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  79. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  80. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  81. #include <asm/uaccess.h>
  82. static MGSL_PARAMS default_params = {
  83. MGSL_MODE_HDLC, /* unsigned long mode */
  84. 0, /* unsigned char loopback; */
  85. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  86. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  87. 0, /* unsigned long clock_speed; */
  88. 0xff, /* unsigned char addr_filter; */
  89. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  90. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  91. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  92. 9600, /* unsigned long data_rate; */
  93. 8, /* unsigned char data_bits; */
  94. 1, /* unsigned char stop_bits; */
  95. ASYNC_PARITY_NONE /* unsigned char parity; */
  96. };
  97. typedef struct
  98. {
  99. int count;
  100. unsigned char status;
  101. char data[1];
  102. } RXBUF;
  103. /* The queue of BH actions to be performed */
  104. #define BH_RECEIVE 1
  105. #define BH_TRANSMIT 2
  106. #define BH_STATUS 4
  107. #define IO_PIN_SHUTDOWN_LIMIT 100
  108. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  109. struct _input_signal_events {
  110. int ri_up;
  111. int ri_down;
  112. int dsr_up;
  113. int dsr_down;
  114. int dcd_up;
  115. int dcd_down;
  116. int cts_up;
  117. int cts_down;
  118. };
  119. /*
  120. * Device instance data structure
  121. */
  122. typedef struct _mgslpc_info {
  123. void *if_ptr; /* General purpose pointer (used by SPPP) */
  124. int magic;
  125. int flags;
  126. int count; /* count of opens */
  127. int line;
  128. unsigned short close_delay;
  129. unsigned short closing_wait; /* time to wait before closing */
  130. struct mgsl_icount icount;
  131. struct tty_struct *tty;
  132. int timeout;
  133. int x_char; /* xon/xoff character */
  134. int blocked_open; /* # of blocked opens */
  135. unsigned char read_status_mask;
  136. unsigned char ignore_status_mask;
  137. unsigned char *tx_buf;
  138. int tx_put;
  139. int tx_get;
  140. int tx_count;
  141. /* circular list of fixed length rx buffers */
  142. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  143. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  144. int rx_put; /* index of next empty rx buffer */
  145. int rx_get; /* index of next full rx buffer */
  146. int rx_buf_size; /* size in bytes of single rx buffer */
  147. int rx_buf_count; /* total number of rx buffers */
  148. int rx_frame_count; /* number of full rx buffers */
  149. wait_queue_head_t open_wait;
  150. wait_queue_head_t close_wait;
  151. wait_queue_head_t status_event_wait_q;
  152. wait_queue_head_t event_wait_q;
  153. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  154. struct _mgslpc_info *next_device; /* device list link */
  155. unsigned short imra_value;
  156. unsigned short imrb_value;
  157. unsigned char pim_value;
  158. spinlock_t lock;
  159. struct work_struct task; /* task structure for scheduling bh */
  160. u32 max_frame_size;
  161. u32 pending_bh;
  162. bool bh_running;
  163. bool bh_requested;
  164. int dcd_chkcount; /* check counts to prevent */
  165. int cts_chkcount; /* too many IRQs if a signal */
  166. int dsr_chkcount; /* is floating */
  167. int ri_chkcount;
  168. bool rx_enabled;
  169. bool rx_overflow;
  170. bool tx_enabled;
  171. bool tx_active;
  172. bool tx_aborting;
  173. u32 idle_mode;
  174. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  175. char device_name[25]; /* device instance name */
  176. unsigned int io_base; /* base I/O address of adapter */
  177. unsigned int irq_level;
  178. MGSL_PARAMS params; /* communications parameters */
  179. unsigned char serial_signals; /* current serial signal states */
  180. bool irq_occurred; /* for diagnostics use */
  181. char testing_irq;
  182. unsigned int init_error; /* startup error (DIAGS) */
  183. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  184. bool drop_rts_on_tx_done;
  185. struct _input_signal_events input_signal_events;
  186. /* PCMCIA support */
  187. struct pcmcia_device *p_dev;
  188. dev_node_t node;
  189. int stop;
  190. /* SPPP/Cisco HDLC device parts */
  191. int netcount;
  192. spinlock_t netlock;
  193. #if SYNCLINK_GENERIC_HDLC
  194. struct net_device *netdev;
  195. #endif
  196. } MGSLPC_INFO;
  197. #define MGSLPC_MAGIC 0x5402
  198. /*
  199. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  200. */
  201. #define TXBUFSIZE 4096
  202. #define CHA 0x00 /* channel A offset */
  203. #define CHB 0x40 /* channel B offset */
  204. /*
  205. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  206. */
  207. #undef PVR
  208. #define RXFIFO 0
  209. #define TXFIFO 0
  210. #define STAR 0x20
  211. #define CMDR 0x20
  212. #define RSTA 0x21
  213. #define PRE 0x21
  214. #define MODE 0x22
  215. #define TIMR 0x23
  216. #define XAD1 0x24
  217. #define XAD2 0x25
  218. #define RAH1 0x26
  219. #define RAH2 0x27
  220. #define DAFO 0x27
  221. #define RAL1 0x28
  222. #define RFC 0x28
  223. #define RHCR 0x29
  224. #define RAL2 0x29
  225. #define RBCL 0x2a
  226. #define XBCL 0x2a
  227. #define RBCH 0x2b
  228. #define XBCH 0x2b
  229. #define CCR0 0x2c
  230. #define CCR1 0x2d
  231. #define CCR2 0x2e
  232. #define CCR3 0x2f
  233. #define VSTR 0x34
  234. #define BGR 0x34
  235. #define RLCR 0x35
  236. #define AML 0x36
  237. #define AMH 0x37
  238. #define GIS 0x38
  239. #define IVA 0x38
  240. #define IPC 0x39
  241. #define ISR 0x3a
  242. #define IMR 0x3a
  243. #define PVR 0x3c
  244. #define PIS 0x3d
  245. #define PIM 0x3d
  246. #define PCR 0x3e
  247. #define CCR4 0x3f
  248. // IMR/ISR
  249. #define IRQ_BREAK_ON BIT15 // rx break detected
  250. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  251. #define IRQ_ALLSENT BIT13 // all sent
  252. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  253. #define IRQ_TIMER BIT11 // timer interrupt
  254. #define IRQ_CTS BIT10 // CTS status change
  255. #define IRQ_TXREPEAT BIT9 // tx message repeat
  256. #define IRQ_TXFIFO BIT8 // transmit pool ready
  257. #define IRQ_RXEOM BIT7 // receive message end
  258. #define IRQ_EXITHUNT BIT6 // receive frame start
  259. #define IRQ_RXTIME BIT6 // rx char timeout
  260. #define IRQ_DCD BIT2 // carrier detect status change
  261. #define IRQ_OVERRUN BIT1 // receive frame overflow
  262. #define IRQ_RXFIFO BIT0 // receive pool full
  263. // STAR
  264. #define XFW BIT6 // transmit FIFO write enable
  265. #define CEC BIT2 // command executing
  266. #define CTS BIT1 // CTS state
  267. #define PVR_DTR BIT0
  268. #define PVR_DSR BIT1
  269. #define PVR_RI BIT2
  270. #define PVR_AUTOCTS BIT3
  271. #define PVR_RS232 0x20 /* 0010b */
  272. #define PVR_V35 0xe0 /* 1110b */
  273. #define PVR_RS422 0x40 /* 0100b */
  274. /* Register access functions */
  275. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  276. #define read_reg(info, reg) inb((info)->io_base + (reg))
  277. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  278. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  279. #define set_reg_bits(info, reg, mask) \
  280. write_reg(info, (reg), \
  281. (unsigned char) (read_reg(info, (reg)) | (mask)))
  282. #define clear_reg_bits(info, reg, mask) \
  283. write_reg(info, (reg), \
  284. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  285. /*
  286. * interrupt enable/disable routines
  287. */
  288. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  289. {
  290. if (channel == CHA) {
  291. info->imra_value |= mask;
  292. write_reg16(info, CHA + IMR, info->imra_value);
  293. } else {
  294. info->imrb_value |= mask;
  295. write_reg16(info, CHB + IMR, info->imrb_value);
  296. }
  297. }
  298. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  299. {
  300. if (channel == CHA) {
  301. info->imra_value &= ~mask;
  302. write_reg16(info, CHA + IMR, info->imra_value);
  303. } else {
  304. info->imrb_value &= ~mask;
  305. write_reg16(info, CHB + IMR, info->imrb_value);
  306. }
  307. }
  308. #define port_irq_disable(info, mask) \
  309. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  310. #define port_irq_enable(info, mask) \
  311. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  312. static void rx_start(MGSLPC_INFO *info);
  313. static void rx_stop(MGSLPC_INFO *info);
  314. static void tx_start(MGSLPC_INFO *info);
  315. static void tx_stop(MGSLPC_INFO *info);
  316. static void tx_set_idle(MGSLPC_INFO *info);
  317. static void get_signals(MGSLPC_INFO *info);
  318. static void set_signals(MGSLPC_INFO *info);
  319. static void reset_device(MGSLPC_INFO *info);
  320. static void hdlc_mode(MGSLPC_INFO *info);
  321. static void async_mode(MGSLPC_INFO *info);
  322. static void tx_timeout(unsigned long context);
  323. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
  324. #if SYNCLINK_GENERIC_HDLC
  325. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  326. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  327. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  328. static int hdlcdev_init(MGSLPC_INFO *info);
  329. static void hdlcdev_exit(MGSLPC_INFO *info);
  330. #endif
  331. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  332. static bool register_test(MGSLPC_INFO *info);
  333. static bool irq_test(MGSLPC_INFO *info);
  334. static int adapter_test(MGSLPC_INFO *info);
  335. static int claim_resources(MGSLPC_INFO *info);
  336. static void release_resources(MGSLPC_INFO *info);
  337. static void mgslpc_add_device(MGSLPC_INFO *info);
  338. static void mgslpc_remove_device(MGSLPC_INFO *info);
  339. static bool rx_get_frame(MGSLPC_INFO *info);
  340. static void rx_reset_buffers(MGSLPC_INFO *info);
  341. static int rx_alloc_buffers(MGSLPC_INFO *info);
  342. static void rx_free_buffers(MGSLPC_INFO *info);
  343. static irqreturn_t mgslpc_isr(int irq, void *dev_id);
  344. /*
  345. * Bottom half interrupt handlers
  346. */
  347. static void bh_handler(struct work_struct *work);
  348. static void bh_transmit(MGSLPC_INFO *info);
  349. static void bh_status(MGSLPC_INFO *info);
  350. /*
  351. * ioctl handlers
  352. */
  353. static int tiocmget(struct tty_struct *tty, struct file *file);
  354. static int tiocmset(struct tty_struct *tty, struct file *file,
  355. unsigned int set, unsigned int clear);
  356. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  357. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  358. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
  359. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  360. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  361. static int set_txenable(MGSLPC_INFO *info, int enable);
  362. static int tx_abort(MGSLPC_INFO *info);
  363. static int set_rxenable(MGSLPC_INFO *info, int enable);
  364. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  365. static MGSLPC_INFO *mgslpc_device_list = NULL;
  366. static int mgslpc_device_count = 0;
  367. /*
  368. * Set this param to non-zero to load eax with the
  369. * .text section address and breakpoint on module load.
  370. * This is useful for use with gdb and add-symbol-file command.
  371. */
  372. static int break_on_load=0;
  373. /*
  374. * Driver major number, defaults to zero to get auto
  375. * assigned major number. May be forced as module parameter.
  376. */
  377. static int ttymajor=0;
  378. static int debug_level = 0;
  379. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  380. module_param(break_on_load, bool, 0);
  381. module_param(ttymajor, int, 0);
  382. module_param(debug_level, int, 0);
  383. module_param_array(maxframe, int, NULL, 0);
  384. MODULE_LICENSE("GPL");
  385. static char *driver_name = "SyncLink PC Card driver";
  386. static char *driver_version = "$Revision: 4.34 $";
  387. static struct tty_driver *serial_driver;
  388. /* number of characters left in xmit buffer before we ask for more */
  389. #define WAKEUP_CHARS 256
  390. static void mgslpc_change_params(MGSLPC_INFO *info);
  391. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  392. /* PCMCIA prototypes */
  393. static int mgslpc_config(struct pcmcia_device *link);
  394. static void mgslpc_release(u_long arg);
  395. static void mgslpc_detach(struct pcmcia_device *p_dev);
  396. /*
  397. * 1st function defined in .text section. Calling this function in
  398. * init_module() followed by a breakpoint allows a remote debugger
  399. * (gdb) to get the .text address for the add-symbol-file command.
  400. * This allows remote debugging of dynamically loadable modules.
  401. */
  402. static void* mgslpc_get_text_ptr(void)
  403. {
  404. return mgslpc_get_text_ptr;
  405. }
  406. /**
  407. * line discipline callback wrappers
  408. *
  409. * The wrappers maintain line discipline references
  410. * while calling into the line discipline.
  411. *
  412. * ldisc_receive_buf - pass receive data to line discipline
  413. */
  414. static void ldisc_receive_buf(struct tty_struct *tty,
  415. const __u8 *data, char *flags, int count)
  416. {
  417. struct tty_ldisc *ld;
  418. if (!tty)
  419. return;
  420. ld = tty_ldisc_ref(tty);
  421. if (ld) {
  422. if (ld->ops->receive_buf)
  423. ld->ops->receive_buf(tty, data, flags, count);
  424. tty_ldisc_deref(ld);
  425. }
  426. }
  427. static int mgslpc_probe(struct pcmcia_device *link)
  428. {
  429. MGSLPC_INFO *info;
  430. int ret;
  431. if (debug_level >= DEBUG_LEVEL_INFO)
  432. printk("mgslpc_attach\n");
  433. info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  434. if (!info) {
  435. printk("Error can't allocate device instance data\n");
  436. return -ENOMEM;
  437. }
  438. info->magic = MGSLPC_MAGIC;
  439. INIT_WORK(&info->task, bh_handler);
  440. info->max_frame_size = 4096;
  441. info->close_delay = 5*HZ/10;
  442. info->closing_wait = 30*HZ;
  443. init_waitqueue_head(&info->open_wait);
  444. init_waitqueue_head(&info->close_wait);
  445. init_waitqueue_head(&info->status_event_wait_q);
  446. init_waitqueue_head(&info->event_wait_q);
  447. spin_lock_init(&info->lock);
  448. spin_lock_init(&info->netlock);
  449. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  450. info->idle_mode = HDLC_TXIDLE_FLAGS;
  451. info->imra_value = 0xffff;
  452. info->imrb_value = 0xffff;
  453. info->pim_value = 0xff;
  454. info->p_dev = link;
  455. link->priv = info;
  456. /* Initialize the struct pcmcia_device structure */
  457. /* Interrupt setup */
  458. link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
  459. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  460. link->irq.Handler = NULL;
  461. link->conf.Attributes = 0;
  462. link->conf.IntType = INT_MEMORY_AND_IO;
  463. ret = mgslpc_config(link);
  464. if (ret)
  465. return ret;
  466. mgslpc_add_device(info);
  467. return 0;
  468. }
  469. /* Card has been inserted.
  470. */
  471. #define CS_CHECK(fn, ret) \
  472. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  473. static int mgslpc_config(struct pcmcia_device *link)
  474. {
  475. MGSLPC_INFO *info = link->priv;
  476. tuple_t tuple;
  477. cisparse_t parse;
  478. int last_fn, last_ret;
  479. u_char buf[64];
  480. cistpl_cftable_entry_t dflt = { 0 };
  481. cistpl_cftable_entry_t *cfg;
  482. if (debug_level >= DEBUG_LEVEL_INFO)
  483. printk("mgslpc_config(0x%p)\n", link);
  484. tuple.Attributes = 0;
  485. tuple.TupleData = buf;
  486. tuple.TupleDataMax = sizeof(buf);
  487. tuple.TupleOffset = 0;
  488. /* get CIS configuration entry */
  489. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  490. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  491. cfg = &(parse.cftable_entry);
  492. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
  493. CS_CHECK(ParseTuple, pcmcia_parse_tuple(&tuple, &parse));
  494. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  495. if (cfg->index == 0)
  496. goto cs_failed;
  497. link->conf.ConfigIndex = cfg->index;
  498. link->conf.Attributes |= CONF_ENABLE_IRQ;
  499. /* IO window settings */
  500. link->io.NumPorts1 = 0;
  501. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  502. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  503. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  504. if (!(io->flags & CISTPL_IO_8BIT))
  505. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  506. if (!(io->flags & CISTPL_IO_16BIT))
  507. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  508. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  509. link->io.BasePort1 = io->win[0].base;
  510. link->io.NumPorts1 = io->win[0].len;
  511. CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
  512. }
  513. link->conf.Attributes = CONF_ENABLE_IRQ;
  514. link->conf.IntType = INT_MEMORY_AND_IO;
  515. link->conf.ConfigIndex = 8;
  516. link->conf.Present = PRESENT_OPTION;
  517. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  518. link->irq.Handler = mgslpc_isr;
  519. link->irq.Instance = info;
  520. CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
  521. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
  522. info->io_base = link->io.BasePort1;
  523. info->irq_level = link->irq.AssignedIRQ;
  524. /* add to linked list of devices */
  525. sprintf(info->node.dev_name, "mgslpc0");
  526. info->node.major = info->node.minor = 0;
  527. link->dev_node = &info->node;
  528. printk(KERN_INFO "%s: index 0x%02x:",
  529. info->node.dev_name, link->conf.ConfigIndex);
  530. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  531. printk(", irq %d", link->irq.AssignedIRQ);
  532. if (link->io.NumPorts1)
  533. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  534. link->io.BasePort1+link->io.NumPorts1-1);
  535. printk("\n");
  536. return 0;
  537. cs_failed:
  538. cs_error(link, last_fn, last_ret);
  539. mgslpc_release((u_long)link);
  540. return -ENODEV;
  541. }
  542. /* Card has been removed.
  543. * Unregister device and release PCMCIA configuration.
  544. * If device is open, postpone until it is closed.
  545. */
  546. static void mgslpc_release(u_long arg)
  547. {
  548. struct pcmcia_device *link = (struct pcmcia_device *)arg;
  549. if (debug_level >= DEBUG_LEVEL_INFO)
  550. printk("mgslpc_release(0x%p)\n", link);
  551. pcmcia_disable_device(link);
  552. }
  553. static void mgslpc_detach(struct pcmcia_device *link)
  554. {
  555. if (debug_level >= DEBUG_LEVEL_INFO)
  556. printk("mgslpc_detach(0x%p)\n", link);
  557. ((MGSLPC_INFO *)link->priv)->stop = 1;
  558. mgslpc_release((u_long)link);
  559. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  560. }
  561. static int mgslpc_suspend(struct pcmcia_device *link)
  562. {
  563. MGSLPC_INFO *info = link->priv;
  564. info->stop = 1;
  565. return 0;
  566. }
  567. static int mgslpc_resume(struct pcmcia_device *link)
  568. {
  569. MGSLPC_INFO *info = link->priv;
  570. info->stop = 0;
  571. return 0;
  572. }
  573. static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
  574. char *name, const char *routine)
  575. {
  576. #ifdef MGSLPC_PARANOIA_CHECK
  577. static const char *badmagic =
  578. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  579. static const char *badinfo =
  580. "Warning: null mgslpc_info for (%s) in %s\n";
  581. if (!info) {
  582. printk(badinfo, name, routine);
  583. return true;
  584. }
  585. if (info->magic != MGSLPC_MAGIC) {
  586. printk(badmagic, name, routine);
  587. return true;
  588. }
  589. #else
  590. if (!info)
  591. return true;
  592. #endif
  593. return false;
  594. }
  595. #define CMD_RXFIFO BIT7 // release current rx FIFO
  596. #define CMD_RXRESET BIT6 // receiver reset
  597. #define CMD_RXFIFO_READ BIT5
  598. #define CMD_START_TIMER BIT4
  599. #define CMD_TXFIFO BIT3 // release current tx FIFO
  600. #define CMD_TXEOM BIT1 // transmit end message
  601. #define CMD_TXRESET BIT0 // transmit reset
  602. static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  603. {
  604. int i = 0;
  605. /* wait for command completion */
  606. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  607. udelay(1);
  608. if (i++ == 1000)
  609. return false;
  610. }
  611. return true;
  612. }
  613. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  614. {
  615. wait_command_complete(info, channel);
  616. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  617. }
  618. static void tx_pause(struct tty_struct *tty)
  619. {
  620. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  621. unsigned long flags;
  622. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  623. return;
  624. if (debug_level >= DEBUG_LEVEL_INFO)
  625. printk("tx_pause(%s)\n",info->device_name);
  626. spin_lock_irqsave(&info->lock,flags);
  627. if (info->tx_enabled)
  628. tx_stop(info);
  629. spin_unlock_irqrestore(&info->lock,flags);
  630. }
  631. static void tx_release(struct tty_struct *tty)
  632. {
  633. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  634. unsigned long flags;
  635. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  636. return;
  637. if (debug_level >= DEBUG_LEVEL_INFO)
  638. printk("tx_release(%s)\n",info->device_name);
  639. spin_lock_irqsave(&info->lock,flags);
  640. if (!info->tx_enabled)
  641. tx_start(info);
  642. spin_unlock_irqrestore(&info->lock,flags);
  643. }
  644. /* Return next bottom half action to perform.
  645. * or 0 if nothing to do.
  646. */
  647. static int bh_action(MGSLPC_INFO *info)
  648. {
  649. unsigned long flags;
  650. int rc = 0;
  651. spin_lock_irqsave(&info->lock,flags);
  652. if (info->pending_bh & BH_RECEIVE) {
  653. info->pending_bh &= ~BH_RECEIVE;
  654. rc = BH_RECEIVE;
  655. } else if (info->pending_bh & BH_TRANSMIT) {
  656. info->pending_bh &= ~BH_TRANSMIT;
  657. rc = BH_TRANSMIT;
  658. } else if (info->pending_bh & BH_STATUS) {
  659. info->pending_bh &= ~BH_STATUS;
  660. rc = BH_STATUS;
  661. }
  662. if (!rc) {
  663. /* Mark BH routine as complete */
  664. info->bh_running = false;
  665. info->bh_requested = false;
  666. }
  667. spin_unlock_irqrestore(&info->lock,flags);
  668. return rc;
  669. }
  670. static void bh_handler(struct work_struct *work)
  671. {
  672. MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
  673. int action;
  674. if (!info)
  675. return;
  676. if (debug_level >= DEBUG_LEVEL_BH)
  677. printk( "%s(%d):bh_handler(%s) entry\n",
  678. __FILE__,__LINE__,info->device_name);
  679. info->bh_running = true;
  680. while((action = bh_action(info)) != 0) {
  681. /* Process work item */
  682. if ( debug_level >= DEBUG_LEVEL_BH )
  683. printk( "%s(%d):bh_handler() work item action=%d\n",
  684. __FILE__,__LINE__,action);
  685. switch (action) {
  686. case BH_RECEIVE:
  687. while(rx_get_frame(info));
  688. break;
  689. case BH_TRANSMIT:
  690. bh_transmit(info);
  691. break;
  692. case BH_STATUS:
  693. bh_status(info);
  694. break;
  695. default:
  696. /* unknown work item ID */
  697. printk("Unknown work item ID=%08X!\n", action);
  698. break;
  699. }
  700. }
  701. if (debug_level >= DEBUG_LEVEL_BH)
  702. printk( "%s(%d):bh_handler(%s) exit\n",
  703. __FILE__,__LINE__,info->device_name);
  704. }
  705. static void bh_transmit(MGSLPC_INFO *info)
  706. {
  707. struct tty_struct *tty = info->tty;
  708. if (debug_level >= DEBUG_LEVEL_BH)
  709. printk("bh_transmit() entry on %s\n", info->device_name);
  710. if (tty)
  711. tty_wakeup(tty);
  712. }
  713. static void bh_status(MGSLPC_INFO *info)
  714. {
  715. info->ri_chkcount = 0;
  716. info->dsr_chkcount = 0;
  717. info->dcd_chkcount = 0;
  718. info->cts_chkcount = 0;
  719. }
  720. /* eom: non-zero = end of frame */
  721. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  722. {
  723. unsigned char data[2];
  724. unsigned char fifo_count, read_count, i;
  725. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  726. if (debug_level >= DEBUG_LEVEL_ISR)
  727. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  728. if (!info->rx_enabled)
  729. return;
  730. if (info->rx_frame_count >= info->rx_buf_count) {
  731. /* no more free buffers */
  732. issue_command(info, CHA, CMD_RXRESET);
  733. info->pending_bh |= BH_RECEIVE;
  734. info->rx_overflow = true;
  735. info->icount.buf_overrun++;
  736. return;
  737. }
  738. if (eom) {
  739. /* end of frame, get FIFO count from RBCL register */
  740. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  741. fifo_count = 32;
  742. } else
  743. fifo_count = 32;
  744. do {
  745. if (fifo_count == 1) {
  746. read_count = 1;
  747. data[0] = read_reg(info, CHA + RXFIFO);
  748. } else {
  749. read_count = 2;
  750. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  751. }
  752. fifo_count -= read_count;
  753. if (!fifo_count && eom)
  754. buf->status = data[--read_count];
  755. for (i = 0; i < read_count; i++) {
  756. if (buf->count >= info->max_frame_size) {
  757. /* frame too large, reset receiver and reset current buffer */
  758. issue_command(info, CHA, CMD_RXRESET);
  759. buf->count = 0;
  760. return;
  761. }
  762. *(buf->data + buf->count) = data[i];
  763. buf->count++;
  764. }
  765. } while (fifo_count);
  766. if (eom) {
  767. info->pending_bh |= BH_RECEIVE;
  768. info->rx_frame_count++;
  769. info->rx_put++;
  770. if (info->rx_put >= info->rx_buf_count)
  771. info->rx_put = 0;
  772. }
  773. issue_command(info, CHA, CMD_RXFIFO);
  774. }
  775. static void rx_ready_async(MGSLPC_INFO *info, int tcd)
  776. {
  777. unsigned char data, status, flag;
  778. int fifo_count;
  779. int work = 0;
  780. struct tty_struct *tty = info->tty;
  781. struct mgsl_icount *icount = &info->icount;
  782. if (tcd) {
  783. /* early termination, get FIFO count from RBCL register */
  784. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  785. /* Zero fifo count could mean 0 or 32 bytes available.
  786. * If BIT5 of STAR is set then at least 1 byte is available.
  787. */
  788. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  789. fifo_count = 32;
  790. } else
  791. fifo_count = 32;
  792. tty_buffer_request_room(tty, fifo_count);
  793. /* Flush received async data to receive data buffer. */
  794. while (fifo_count) {
  795. data = read_reg(info, CHA + RXFIFO);
  796. status = read_reg(info, CHA + RXFIFO);
  797. fifo_count -= 2;
  798. icount->rx++;
  799. flag = TTY_NORMAL;
  800. // if no frameing/crc error then save data
  801. // BIT7:parity error
  802. // BIT6:framing error
  803. if (status & (BIT7 + BIT6)) {
  804. if (status & BIT7)
  805. icount->parity++;
  806. else
  807. icount->frame++;
  808. /* discard char if tty control flags say so */
  809. if (status & info->ignore_status_mask)
  810. continue;
  811. status &= info->read_status_mask;
  812. if (status & BIT7)
  813. flag = TTY_PARITY;
  814. else if (status & BIT6)
  815. flag = TTY_FRAME;
  816. }
  817. work += tty_insert_flip_char(tty, data, flag);
  818. }
  819. issue_command(info, CHA, CMD_RXFIFO);
  820. if (debug_level >= DEBUG_LEVEL_ISR) {
  821. printk("%s(%d):rx_ready_async",
  822. __FILE__,__LINE__);
  823. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  824. __FILE__,__LINE__,icount->rx,icount->brk,
  825. icount->parity,icount->frame,icount->overrun);
  826. }
  827. if (work)
  828. tty_flip_buffer_push(tty);
  829. }
  830. static void tx_done(MGSLPC_INFO *info)
  831. {
  832. if (!info->tx_active)
  833. return;
  834. info->tx_active = false;
  835. info->tx_aborting = false;
  836. if (info->params.mode == MGSL_MODE_ASYNC)
  837. return;
  838. info->tx_count = info->tx_put = info->tx_get = 0;
  839. del_timer(&info->tx_timer);
  840. if (info->drop_rts_on_tx_done) {
  841. get_signals(info);
  842. if (info->serial_signals & SerialSignal_RTS) {
  843. info->serial_signals &= ~SerialSignal_RTS;
  844. set_signals(info);
  845. }
  846. info->drop_rts_on_tx_done = false;
  847. }
  848. #if SYNCLINK_GENERIC_HDLC
  849. if (info->netcount)
  850. hdlcdev_tx_done(info);
  851. else
  852. #endif
  853. {
  854. if (info->tty->stopped || info->tty->hw_stopped) {
  855. tx_stop(info);
  856. return;
  857. }
  858. info->pending_bh |= BH_TRANSMIT;
  859. }
  860. }
  861. static void tx_ready(MGSLPC_INFO *info)
  862. {
  863. unsigned char fifo_count = 32;
  864. int c;
  865. if (debug_level >= DEBUG_LEVEL_ISR)
  866. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  867. if (info->params.mode == MGSL_MODE_HDLC) {
  868. if (!info->tx_active)
  869. return;
  870. } else {
  871. if (info->tty->stopped || info->tty->hw_stopped) {
  872. tx_stop(info);
  873. return;
  874. }
  875. if (!info->tx_count)
  876. info->tx_active = false;
  877. }
  878. if (!info->tx_count)
  879. return;
  880. while (info->tx_count && fifo_count) {
  881. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  882. if (c == 1) {
  883. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  884. } else {
  885. write_reg16(info, CHA + TXFIFO,
  886. *((unsigned short*)(info->tx_buf + info->tx_get)));
  887. }
  888. info->tx_count -= c;
  889. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  890. fifo_count -= c;
  891. }
  892. if (info->params.mode == MGSL_MODE_ASYNC) {
  893. if (info->tx_count < WAKEUP_CHARS)
  894. info->pending_bh |= BH_TRANSMIT;
  895. issue_command(info, CHA, CMD_TXFIFO);
  896. } else {
  897. if (info->tx_count)
  898. issue_command(info, CHA, CMD_TXFIFO);
  899. else
  900. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  901. }
  902. }
  903. static void cts_change(MGSLPC_INFO *info)
  904. {
  905. get_signals(info);
  906. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  907. irq_disable(info, CHB, IRQ_CTS);
  908. info->icount.cts++;
  909. if (info->serial_signals & SerialSignal_CTS)
  910. info->input_signal_events.cts_up++;
  911. else
  912. info->input_signal_events.cts_down++;
  913. wake_up_interruptible(&info->status_event_wait_q);
  914. wake_up_interruptible(&info->event_wait_q);
  915. if (info->flags & ASYNC_CTS_FLOW) {
  916. if (info->tty->hw_stopped) {
  917. if (info->serial_signals & SerialSignal_CTS) {
  918. if (debug_level >= DEBUG_LEVEL_ISR)
  919. printk("CTS tx start...");
  920. if (info->tty)
  921. info->tty->hw_stopped = 0;
  922. tx_start(info);
  923. info->pending_bh |= BH_TRANSMIT;
  924. return;
  925. }
  926. } else {
  927. if (!(info->serial_signals & SerialSignal_CTS)) {
  928. if (debug_level >= DEBUG_LEVEL_ISR)
  929. printk("CTS tx stop...");
  930. if (info->tty)
  931. info->tty->hw_stopped = 1;
  932. tx_stop(info);
  933. }
  934. }
  935. }
  936. info->pending_bh |= BH_STATUS;
  937. }
  938. static void dcd_change(MGSLPC_INFO *info)
  939. {
  940. get_signals(info);
  941. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  942. irq_disable(info, CHB, IRQ_DCD);
  943. info->icount.dcd++;
  944. if (info->serial_signals & SerialSignal_DCD) {
  945. info->input_signal_events.dcd_up++;
  946. }
  947. else
  948. info->input_signal_events.dcd_down++;
  949. #if SYNCLINK_GENERIC_HDLC
  950. if (info->netcount) {
  951. if (info->serial_signals & SerialSignal_DCD)
  952. netif_carrier_on(info->netdev);
  953. else
  954. netif_carrier_off(info->netdev);
  955. }
  956. #endif
  957. wake_up_interruptible(&info->status_event_wait_q);
  958. wake_up_interruptible(&info->event_wait_q);
  959. if (info->flags & ASYNC_CHECK_CD) {
  960. if (debug_level >= DEBUG_LEVEL_ISR)
  961. printk("%s CD now %s...", info->device_name,
  962. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  963. if (info->serial_signals & SerialSignal_DCD)
  964. wake_up_interruptible(&info->open_wait);
  965. else {
  966. if (debug_level >= DEBUG_LEVEL_ISR)
  967. printk("doing serial hangup...");
  968. if (info->tty)
  969. tty_hangup(info->tty);
  970. }
  971. }
  972. info->pending_bh |= BH_STATUS;
  973. }
  974. static void dsr_change(MGSLPC_INFO *info)
  975. {
  976. get_signals(info);
  977. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  978. port_irq_disable(info, PVR_DSR);
  979. info->icount.dsr++;
  980. if (info->serial_signals & SerialSignal_DSR)
  981. info->input_signal_events.dsr_up++;
  982. else
  983. info->input_signal_events.dsr_down++;
  984. wake_up_interruptible(&info->status_event_wait_q);
  985. wake_up_interruptible(&info->event_wait_q);
  986. info->pending_bh |= BH_STATUS;
  987. }
  988. static void ri_change(MGSLPC_INFO *info)
  989. {
  990. get_signals(info);
  991. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  992. port_irq_disable(info, PVR_RI);
  993. info->icount.rng++;
  994. if (info->serial_signals & SerialSignal_RI)
  995. info->input_signal_events.ri_up++;
  996. else
  997. info->input_signal_events.ri_down++;
  998. wake_up_interruptible(&info->status_event_wait_q);
  999. wake_up_interruptible(&info->event_wait_q);
  1000. info->pending_bh |= BH_STATUS;
  1001. }
  1002. /* Interrupt service routine entry point.
  1003. *
  1004. * Arguments:
  1005. *
  1006. * irq interrupt number that caused interrupt
  1007. * dev_id device ID supplied during interrupt registration
  1008. */
  1009. static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
  1010. {
  1011. MGSLPC_INFO *info = dev_id;
  1012. unsigned short isr;
  1013. unsigned char gis, pis;
  1014. int count=0;
  1015. if (debug_level >= DEBUG_LEVEL_ISR)
  1016. printk("mgslpc_isr(%d) entry.\n", info->irq_level);
  1017. if (!(info->p_dev->_locked))
  1018. return IRQ_HANDLED;
  1019. spin_lock(&info->lock);
  1020. while ((gis = read_reg(info, CHA + GIS))) {
  1021. if (debug_level >= DEBUG_LEVEL_ISR)
  1022. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1023. if ((gis & 0x70) || count > 1000) {
  1024. printk("synclink_cs:hardware failed or ejected\n");
  1025. break;
  1026. }
  1027. count++;
  1028. if (gis & (BIT1 + BIT0)) {
  1029. isr = read_reg16(info, CHB + ISR);
  1030. if (isr & IRQ_DCD)
  1031. dcd_change(info);
  1032. if (isr & IRQ_CTS)
  1033. cts_change(info);
  1034. }
  1035. if (gis & (BIT3 + BIT2))
  1036. {
  1037. isr = read_reg16(info, CHA + ISR);
  1038. if (isr & IRQ_TIMER) {
  1039. info->irq_occurred = true;
  1040. irq_disable(info, CHA, IRQ_TIMER);
  1041. }
  1042. /* receive IRQs */
  1043. if (isr & IRQ_EXITHUNT) {
  1044. info->icount.exithunt++;
  1045. wake_up_interruptible(&info->event_wait_q);
  1046. }
  1047. if (isr & IRQ_BREAK_ON) {
  1048. info->icount.brk++;
  1049. if (info->flags & ASYNC_SAK)
  1050. do_SAK(info->tty);
  1051. }
  1052. if (isr & IRQ_RXTIME) {
  1053. issue_command(info, CHA, CMD_RXFIFO_READ);
  1054. }
  1055. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1056. if (info->params.mode == MGSL_MODE_HDLC)
  1057. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1058. else
  1059. rx_ready_async(info, isr & IRQ_RXEOM);
  1060. }
  1061. /* transmit IRQs */
  1062. if (isr & IRQ_UNDERRUN) {
  1063. if (info->tx_aborting)
  1064. info->icount.txabort++;
  1065. else
  1066. info->icount.txunder++;
  1067. tx_done(info);
  1068. }
  1069. else if (isr & IRQ_ALLSENT) {
  1070. info->icount.txok++;
  1071. tx_done(info);
  1072. }
  1073. else if (isr & IRQ_TXFIFO)
  1074. tx_ready(info);
  1075. }
  1076. if (gis & BIT7) {
  1077. pis = read_reg(info, CHA + PIS);
  1078. if (pis & BIT1)
  1079. dsr_change(info);
  1080. if (pis & BIT2)
  1081. ri_change(info);
  1082. }
  1083. }
  1084. /* Request bottom half processing if there's something
  1085. * for it to do and the bh is not already running
  1086. */
  1087. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1088. if ( debug_level >= DEBUG_LEVEL_ISR )
  1089. printk("%s(%d):%s queueing bh task.\n",
  1090. __FILE__,__LINE__,info->device_name);
  1091. schedule_work(&info->task);
  1092. info->bh_requested = true;
  1093. }
  1094. spin_unlock(&info->lock);
  1095. if (debug_level >= DEBUG_LEVEL_ISR)
  1096. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1097. __FILE__, __LINE__, info->irq_level);
  1098. return IRQ_HANDLED;
  1099. }
  1100. /* Initialize and start device.
  1101. */
  1102. static int startup(MGSLPC_INFO * info)
  1103. {
  1104. int retval = 0;
  1105. if (debug_level >= DEBUG_LEVEL_INFO)
  1106. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1107. if (info->flags & ASYNC_INITIALIZED)
  1108. return 0;
  1109. if (!info->tx_buf) {
  1110. /* allocate a page of memory for a transmit buffer */
  1111. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1112. if (!info->tx_buf) {
  1113. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1114. __FILE__,__LINE__,info->device_name);
  1115. return -ENOMEM;
  1116. }
  1117. }
  1118. info->pending_bh = 0;
  1119. memset(&info->icount, 0, sizeof(info->icount));
  1120. setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
  1121. /* Allocate and claim adapter resources */
  1122. retval = claim_resources(info);
  1123. /* perform existance check and diagnostics */
  1124. if ( !retval )
  1125. retval = adapter_test(info);
  1126. if ( retval ) {
  1127. if (capable(CAP_SYS_ADMIN) && info->tty)
  1128. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1129. release_resources(info);
  1130. return retval;
  1131. }
  1132. /* program hardware for current parameters */
  1133. mgslpc_change_params(info);
  1134. if (info->tty)
  1135. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  1136. info->flags |= ASYNC_INITIALIZED;
  1137. return 0;
  1138. }
  1139. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1140. */
  1141. static void shutdown(MGSLPC_INFO * info)
  1142. {
  1143. unsigned long flags;
  1144. if (!(info->flags & ASYNC_INITIALIZED))
  1145. return;
  1146. if (debug_level >= DEBUG_LEVEL_INFO)
  1147. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1148. __FILE__,__LINE__, info->device_name );
  1149. /* clear status wait queue because status changes */
  1150. /* can't happen after shutting down the hardware */
  1151. wake_up_interruptible(&info->status_event_wait_q);
  1152. wake_up_interruptible(&info->event_wait_q);
  1153. del_timer_sync(&info->tx_timer);
  1154. if (info->tx_buf) {
  1155. free_page((unsigned long) info->tx_buf);
  1156. info->tx_buf = NULL;
  1157. }
  1158. spin_lock_irqsave(&info->lock,flags);
  1159. rx_stop(info);
  1160. tx_stop(info);
  1161. /* TODO:disable interrupts instead of reset to preserve signal states */
  1162. reset_device(info);
  1163. if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
  1164. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1165. set_signals(info);
  1166. }
  1167. spin_unlock_irqrestore(&info->lock,flags);
  1168. release_resources(info);
  1169. if (info->tty)
  1170. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1171. info->flags &= ~ASYNC_INITIALIZED;
  1172. }
  1173. static void mgslpc_program_hw(MGSLPC_INFO *info)
  1174. {
  1175. unsigned long flags;
  1176. spin_lock_irqsave(&info->lock,flags);
  1177. rx_stop(info);
  1178. tx_stop(info);
  1179. info->tx_count = info->tx_put = info->tx_get = 0;
  1180. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1181. hdlc_mode(info);
  1182. else
  1183. async_mode(info);
  1184. set_signals(info);
  1185. info->dcd_chkcount = 0;
  1186. info->cts_chkcount = 0;
  1187. info->ri_chkcount = 0;
  1188. info->dsr_chkcount = 0;
  1189. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1190. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1191. get_signals(info);
  1192. if (info->netcount || info->tty->termios->c_cflag & CREAD)
  1193. rx_start(info);
  1194. spin_unlock_irqrestore(&info->lock,flags);
  1195. }
  1196. /* Reconfigure adapter based on new parameters
  1197. */
  1198. static void mgslpc_change_params(MGSLPC_INFO *info)
  1199. {
  1200. unsigned cflag;
  1201. int bits_per_char;
  1202. if (!info->tty || !info->tty->termios)
  1203. return;
  1204. if (debug_level >= DEBUG_LEVEL_INFO)
  1205. printk("%s(%d):mgslpc_change_params(%s)\n",
  1206. __FILE__,__LINE__, info->device_name );
  1207. cflag = info->tty->termios->c_cflag;
  1208. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1209. /* otherwise assert DTR and RTS */
  1210. if (cflag & CBAUD)
  1211. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1212. else
  1213. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1214. /* byte size and parity */
  1215. switch (cflag & CSIZE) {
  1216. case CS5: info->params.data_bits = 5; break;
  1217. case CS6: info->params.data_bits = 6; break;
  1218. case CS7: info->params.data_bits = 7; break;
  1219. case CS8: info->params.data_bits = 8; break;
  1220. default: info->params.data_bits = 7; break;
  1221. }
  1222. if (cflag & CSTOPB)
  1223. info->params.stop_bits = 2;
  1224. else
  1225. info->params.stop_bits = 1;
  1226. info->params.parity = ASYNC_PARITY_NONE;
  1227. if (cflag & PARENB) {
  1228. if (cflag & PARODD)
  1229. info->params.parity = ASYNC_PARITY_ODD;
  1230. else
  1231. info->params.parity = ASYNC_PARITY_EVEN;
  1232. #ifdef CMSPAR
  1233. if (cflag & CMSPAR)
  1234. info->params.parity = ASYNC_PARITY_SPACE;
  1235. #endif
  1236. }
  1237. /* calculate number of jiffies to transmit a full
  1238. * FIFO (32 bytes) at specified data rate
  1239. */
  1240. bits_per_char = info->params.data_bits +
  1241. info->params.stop_bits + 1;
  1242. /* if port data rate is set to 460800 or less then
  1243. * allow tty settings to override, otherwise keep the
  1244. * current data rate.
  1245. */
  1246. if (info->params.data_rate <= 460800) {
  1247. info->params.data_rate = tty_get_baud_rate(info->tty);
  1248. }
  1249. if ( info->params.data_rate ) {
  1250. info->timeout = (32*HZ*bits_per_char) /
  1251. info->params.data_rate;
  1252. }
  1253. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1254. if (cflag & CRTSCTS)
  1255. info->flags |= ASYNC_CTS_FLOW;
  1256. else
  1257. info->flags &= ~ASYNC_CTS_FLOW;
  1258. if (cflag & CLOCAL)
  1259. info->flags &= ~ASYNC_CHECK_CD;
  1260. else
  1261. info->flags |= ASYNC_CHECK_CD;
  1262. /* process tty input control flags */
  1263. info->read_status_mask = 0;
  1264. if (I_INPCK(info->tty))
  1265. info->read_status_mask |= BIT7 | BIT6;
  1266. if (I_IGNPAR(info->tty))
  1267. info->ignore_status_mask |= BIT7 | BIT6;
  1268. mgslpc_program_hw(info);
  1269. }
  1270. /* Add a character to the transmit buffer
  1271. */
  1272. static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1273. {
  1274. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1275. unsigned long flags;
  1276. if (debug_level >= DEBUG_LEVEL_INFO) {
  1277. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1278. __FILE__,__LINE__,ch,info->device_name);
  1279. }
  1280. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1281. return 0;
  1282. if (!info->tx_buf)
  1283. return 0;
  1284. spin_lock_irqsave(&info->lock,flags);
  1285. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1286. if (info->tx_count < TXBUFSIZE - 1) {
  1287. info->tx_buf[info->tx_put++] = ch;
  1288. info->tx_put &= TXBUFSIZE-1;
  1289. info->tx_count++;
  1290. }
  1291. }
  1292. spin_unlock_irqrestore(&info->lock,flags);
  1293. return 1;
  1294. }
  1295. /* Enable transmitter so remaining characters in the
  1296. * transmit buffer are sent.
  1297. */
  1298. static void mgslpc_flush_chars(struct tty_struct *tty)
  1299. {
  1300. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1301. unsigned long flags;
  1302. if (debug_level >= DEBUG_LEVEL_INFO)
  1303. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1304. __FILE__,__LINE__,info->device_name,info->tx_count);
  1305. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1306. return;
  1307. if (info->tx_count <= 0 || tty->stopped ||
  1308. tty->hw_stopped || !info->tx_buf)
  1309. return;
  1310. if (debug_level >= DEBUG_LEVEL_INFO)
  1311. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1312. __FILE__,__LINE__,info->device_name);
  1313. spin_lock_irqsave(&info->lock,flags);
  1314. if (!info->tx_active)
  1315. tx_start(info);
  1316. spin_unlock_irqrestore(&info->lock,flags);
  1317. }
  1318. /* Send a block of data
  1319. *
  1320. * Arguments:
  1321. *
  1322. * tty pointer to tty information structure
  1323. * buf pointer to buffer containing send data
  1324. * count size of send data in bytes
  1325. *
  1326. * Returns: number of characters written
  1327. */
  1328. static int mgslpc_write(struct tty_struct * tty,
  1329. const unsigned char *buf, int count)
  1330. {
  1331. int c, ret = 0;
  1332. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1333. unsigned long flags;
  1334. if (debug_level >= DEBUG_LEVEL_INFO)
  1335. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1336. __FILE__,__LINE__,info->device_name,count);
  1337. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1338. !info->tx_buf)
  1339. goto cleanup;
  1340. if (info->params.mode == MGSL_MODE_HDLC) {
  1341. if (count > TXBUFSIZE) {
  1342. ret = -EIO;
  1343. goto cleanup;
  1344. }
  1345. if (info->tx_active)
  1346. goto cleanup;
  1347. else if (info->tx_count)
  1348. goto start;
  1349. }
  1350. for (;;) {
  1351. c = min(count,
  1352. min(TXBUFSIZE - info->tx_count - 1,
  1353. TXBUFSIZE - info->tx_put));
  1354. if (c <= 0)
  1355. break;
  1356. memcpy(info->tx_buf + info->tx_put, buf, c);
  1357. spin_lock_irqsave(&info->lock,flags);
  1358. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1359. info->tx_count += c;
  1360. spin_unlock_irqrestore(&info->lock,flags);
  1361. buf += c;
  1362. count -= c;
  1363. ret += c;
  1364. }
  1365. start:
  1366. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1367. spin_lock_irqsave(&info->lock,flags);
  1368. if (!info->tx_active)
  1369. tx_start(info);
  1370. spin_unlock_irqrestore(&info->lock,flags);
  1371. }
  1372. cleanup:
  1373. if (debug_level >= DEBUG_LEVEL_INFO)
  1374. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1375. __FILE__,__LINE__,info->device_name,ret);
  1376. return ret;
  1377. }
  1378. /* Return the count of free bytes in transmit buffer
  1379. */
  1380. static int mgslpc_write_room(struct tty_struct *tty)
  1381. {
  1382. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1383. int ret;
  1384. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1385. return 0;
  1386. if (info->params.mode == MGSL_MODE_HDLC) {
  1387. /* HDLC (frame oriented) mode */
  1388. if (info->tx_active)
  1389. return 0;
  1390. else
  1391. return HDLC_MAX_FRAME_SIZE;
  1392. } else {
  1393. ret = TXBUFSIZE - info->tx_count - 1;
  1394. if (ret < 0)
  1395. ret = 0;
  1396. }
  1397. if (debug_level >= DEBUG_LEVEL_INFO)
  1398. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1399. __FILE__,__LINE__, info->device_name, ret);
  1400. return ret;
  1401. }
  1402. /* Return the count of bytes in transmit buffer
  1403. */
  1404. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1405. {
  1406. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1407. int rc;
  1408. if (debug_level >= DEBUG_LEVEL_INFO)
  1409. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1410. __FILE__,__LINE__, info->device_name );
  1411. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1412. return 0;
  1413. if (info->params.mode == MGSL_MODE_HDLC)
  1414. rc = info->tx_active ? info->max_frame_size : 0;
  1415. else
  1416. rc = info->tx_count;
  1417. if (debug_level >= DEBUG_LEVEL_INFO)
  1418. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1419. __FILE__,__LINE__, info->device_name, rc);
  1420. return rc;
  1421. }
  1422. /* Discard all data in the send buffer
  1423. */
  1424. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1425. {
  1426. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1427. unsigned long flags;
  1428. if (debug_level >= DEBUG_LEVEL_INFO)
  1429. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1430. __FILE__,__LINE__, info->device_name );
  1431. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1432. return;
  1433. spin_lock_irqsave(&info->lock,flags);
  1434. info->tx_count = info->tx_put = info->tx_get = 0;
  1435. del_timer(&info->tx_timer);
  1436. spin_unlock_irqrestore(&info->lock,flags);
  1437. wake_up_interruptible(&tty->write_wait);
  1438. tty_wakeup(tty);
  1439. }
  1440. /* Send a high-priority XON/XOFF character
  1441. */
  1442. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1443. {
  1444. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1445. unsigned long flags;
  1446. if (debug_level >= DEBUG_LEVEL_INFO)
  1447. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1448. __FILE__,__LINE__, info->device_name, ch );
  1449. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1450. return;
  1451. info->x_char = ch;
  1452. if (ch) {
  1453. spin_lock_irqsave(&info->lock,flags);
  1454. if (!info->tx_enabled)
  1455. tx_start(info);
  1456. spin_unlock_irqrestore(&info->lock,flags);
  1457. }
  1458. }
  1459. /* Signal remote device to throttle send data (our receive data)
  1460. */
  1461. static void mgslpc_throttle(struct tty_struct * tty)
  1462. {
  1463. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1464. unsigned long flags;
  1465. if (debug_level >= DEBUG_LEVEL_INFO)
  1466. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1467. __FILE__,__LINE__, info->device_name );
  1468. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1469. return;
  1470. if (I_IXOFF(tty))
  1471. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1472. if (tty->termios->c_cflag & CRTSCTS) {
  1473. spin_lock_irqsave(&info->lock,flags);
  1474. info->serial_signals &= ~SerialSignal_RTS;
  1475. set_signals(info);
  1476. spin_unlock_irqrestore(&info->lock,flags);
  1477. }
  1478. }
  1479. /* Signal remote device to stop throttling send data (our receive data)
  1480. */
  1481. static void mgslpc_unthrottle(struct tty_struct * tty)
  1482. {
  1483. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1484. unsigned long flags;
  1485. if (debug_level >= DEBUG_LEVEL_INFO)
  1486. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1487. __FILE__,__LINE__, info->device_name );
  1488. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1489. return;
  1490. if (I_IXOFF(tty)) {
  1491. if (info->x_char)
  1492. info->x_char = 0;
  1493. else
  1494. mgslpc_send_xchar(tty, START_CHAR(tty));
  1495. }
  1496. if (tty->termios->c_cflag & CRTSCTS) {
  1497. spin_lock_irqsave(&info->lock,flags);
  1498. info->serial_signals |= SerialSignal_RTS;
  1499. set_signals(info);
  1500. spin_unlock_irqrestore(&info->lock,flags);
  1501. }
  1502. }
  1503. /* get the current serial statistics
  1504. */
  1505. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1506. {
  1507. int err;
  1508. if (debug_level >= DEBUG_LEVEL_INFO)
  1509. printk("get_params(%s)\n", info->device_name);
  1510. if (!user_icount) {
  1511. memset(&info->icount, 0, sizeof(info->icount));
  1512. } else {
  1513. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1514. if (err)
  1515. return -EFAULT;
  1516. }
  1517. return 0;
  1518. }
  1519. /* get the current serial parameters
  1520. */
  1521. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1522. {
  1523. int err;
  1524. if (debug_level >= DEBUG_LEVEL_INFO)
  1525. printk("get_params(%s)\n", info->device_name);
  1526. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1527. if (err)
  1528. return -EFAULT;
  1529. return 0;
  1530. }
  1531. /* set the serial parameters
  1532. *
  1533. * Arguments:
  1534. *
  1535. * info pointer to device instance data
  1536. * new_params user buffer containing new serial params
  1537. *
  1538. * Returns: 0 if success, otherwise error code
  1539. */
  1540. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
  1541. {
  1542. unsigned long flags;
  1543. MGSL_PARAMS tmp_params;
  1544. int err;
  1545. if (debug_level >= DEBUG_LEVEL_INFO)
  1546. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1547. info->device_name );
  1548. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1549. if (err) {
  1550. if ( debug_level >= DEBUG_LEVEL_INFO )
  1551. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1552. __FILE__,__LINE__,info->device_name);
  1553. return -EFAULT;
  1554. }
  1555. spin_lock_irqsave(&info->lock,flags);
  1556. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1557. spin_unlock_irqrestore(&info->lock,flags);
  1558. mgslpc_change_params(info);
  1559. return 0;
  1560. }
  1561. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1562. {
  1563. int err;
  1564. if (debug_level >= DEBUG_LEVEL_INFO)
  1565. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1566. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1567. if (err)
  1568. return -EFAULT;
  1569. return 0;
  1570. }
  1571. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1572. {
  1573. unsigned long flags;
  1574. if (debug_level >= DEBUG_LEVEL_INFO)
  1575. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1576. spin_lock_irqsave(&info->lock,flags);
  1577. info->idle_mode = idle_mode;
  1578. tx_set_idle(info);
  1579. spin_unlock_irqrestore(&info->lock,flags);
  1580. return 0;
  1581. }
  1582. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1583. {
  1584. int err;
  1585. if (debug_level >= DEBUG_LEVEL_INFO)
  1586. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1587. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1588. if (err)
  1589. return -EFAULT;
  1590. return 0;
  1591. }
  1592. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1593. {
  1594. unsigned long flags;
  1595. unsigned char val;
  1596. if (debug_level >= DEBUG_LEVEL_INFO)
  1597. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1598. spin_lock_irqsave(&info->lock,flags);
  1599. info->if_mode = if_mode;
  1600. val = read_reg(info, PVR) & 0x0f;
  1601. switch (info->if_mode)
  1602. {
  1603. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1604. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1605. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1606. }
  1607. write_reg(info, PVR, val);
  1608. spin_unlock_irqrestore(&info->lock,flags);
  1609. return 0;
  1610. }
  1611. static int set_txenable(MGSLPC_INFO * info, int enable)
  1612. {
  1613. unsigned long flags;
  1614. if (debug_level >= DEBUG_LEVEL_INFO)
  1615. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1616. spin_lock_irqsave(&info->lock,flags);
  1617. if (enable) {
  1618. if (!info->tx_enabled)
  1619. tx_start(info);
  1620. } else {
  1621. if (info->tx_enabled)
  1622. tx_stop(info);
  1623. }
  1624. spin_unlock_irqrestore(&info->lock,flags);
  1625. return 0;
  1626. }
  1627. static int tx_abort(MGSLPC_INFO * info)
  1628. {
  1629. unsigned long flags;
  1630. if (debug_level >= DEBUG_LEVEL_INFO)
  1631. printk("tx_abort(%s)\n", info->device_name);
  1632. spin_lock_irqsave(&info->lock,flags);
  1633. if (info->tx_active && info->tx_count &&
  1634. info->params.mode == MGSL_MODE_HDLC) {
  1635. /* clear data count so FIFO is not filled on next IRQ.
  1636. * This results in underrun and abort transmission.
  1637. */
  1638. info->tx_count = info->tx_put = info->tx_get = 0;
  1639. info->tx_aborting = true;
  1640. }
  1641. spin_unlock_irqrestore(&info->lock,flags);
  1642. return 0;
  1643. }
  1644. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1645. {
  1646. unsigned long flags;
  1647. if (debug_level >= DEBUG_LEVEL_INFO)
  1648. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1649. spin_lock_irqsave(&info->lock,flags);
  1650. if (enable) {
  1651. if (!info->rx_enabled)
  1652. rx_start(info);
  1653. } else {
  1654. if (info->rx_enabled)
  1655. rx_stop(info);
  1656. }
  1657. spin_unlock_irqrestore(&info->lock,flags);
  1658. return 0;
  1659. }
  1660. /* wait for specified event to occur
  1661. *
  1662. * Arguments: info pointer to device instance data
  1663. * mask pointer to bitmask of events to wait for
  1664. * Return Value: 0 if successful and bit mask updated with
  1665. * of events triggerred,
  1666. * otherwise error code
  1667. */
  1668. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1669. {
  1670. unsigned long flags;
  1671. int s;
  1672. int rc=0;
  1673. struct mgsl_icount cprev, cnow;
  1674. int events;
  1675. int mask;
  1676. struct _input_signal_events oldsigs, newsigs;
  1677. DECLARE_WAITQUEUE(wait, current);
  1678. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1679. if (rc)
  1680. return -EFAULT;
  1681. if (debug_level >= DEBUG_LEVEL_INFO)
  1682. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1683. spin_lock_irqsave(&info->lock,flags);
  1684. /* return immediately if state matches requested events */
  1685. get_signals(info);
  1686. s = info->serial_signals;
  1687. events = mask &
  1688. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1689. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1690. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1691. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1692. if (events) {
  1693. spin_unlock_irqrestore(&info->lock,flags);
  1694. goto exit;
  1695. }
  1696. /* save current irq counts */
  1697. cprev = info->icount;
  1698. oldsigs = info->input_signal_events;
  1699. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1700. (mask & MgslEvent_ExitHuntMode))
  1701. irq_enable(info, CHA, IRQ_EXITHUNT);
  1702. set_current_state(TASK_INTERRUPTIBLE);
  1703. add_wait_queue(&info->event_wait_q, &wait);
  1704. spin_unlock_irqrestore(&info->lock,flags);
  1705. for(;;) {
  1706. schedule();
  1707. if (signal_pending(current)) {
  1708. rc = -ERESTARTSYS;
  1709. break;
  1710. }
  1711. /* get current irq counts */
  1712. spin_lock_irqsave(&info->lock,flags);
  1713. cnow = info->icount;
  1714. newsigs = info->input_signal_events;
  1715. set_current_state(TASK_INTERRUPTIBLE);
  1716. spin_unlock_irqrestore(&info->lock,flags);
  1717. /* if no change, wait aborted for some reason */
  1718. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1719. newsigs.dsr_down == oldsigs.dsr_down &&
  1720. newsigs.dcd_up == oldsigs.dcd_up &&
  1721. newsigs.dcd_down == oldsigs.dcd_down &&
  1722. newsigs.cts_up == oldsigs.cts_up &&
  1723. newsigs.cts_down == oldsigs.cts_down &&
  1724. newsigs.ri_up == oldsigs.ri_up &&
  1725. newsigs.ri_down == oldsigs.ri_down &&
  1726. cnow.exithunt == cprev.exithunt &&
  1727. cnow.rxidle == cprev.rxidle) {
  1728. rc = -EIO;
  1729. break;
  1730. }
  1731. events = mask &
  1732. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1733. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1734. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1735. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1736. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1737. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1738. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1739. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1740. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1741. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1742. if (events)
  1743. break;
  1744. cprev = cnow;
  1745. oldsigs = newsigs;
  1746. }
  1747. remove_wait_queue(&info->event_wait_q, &wait);
  1748. set_current_state(TASK_RUNNING);
  1749. if (mask & MgslEvent_ExitHuntMode) {
  1750. spin_lock_irqsave(&info->lock,flags);
  1751. if (!waitqueue_active(&info->event_wait_q))
  1752. irq_disable(info, CHA, IRQ_EXITHUNT);
  1753. spin_unlock_irqrestore(&info->lock,flags);
  1754. }
  1755. exit:
  1756. if (rc == 0)
  1757. PUT_USER(rc, events, mask_ptr);
  1758. return rc;
  1759. }
  1760. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1761. {
  1762. unsigned long flags;
  1763. int rc;
  1764. struct mgsl_icount cprev, cnow;
  1765. DECLARE_WAITQUEUE(wait, current);
  1766. /* save current irq counts */
  1767. spin_lock_irqsave(&info->lock,flags);
  1768. cprev = info->icount;
  1769. add_wait_queue(&info->status_event_wait_q, &wait);
  1770. set_current_state(TASK_INTERRUPTIBLE);
  1771. spin_unlock_irqrestore(&info->lock,flags);
  1772. for(;;) {
  1773. schedule();
  1774. if (signal_pending(current)) {
  1775. rc = -ERESTARTSYS;
  1776. break;
  1777. }
  1778. /* get new irq counts */
  1779. spin_lock_irqsave(&info->lock,flags);
  1780. cnow = info->icount;
  1781. set_current_state(TASK_INTERRUPTIBLE);
  1782. spin_unlock_irqrestore(&info->lock,flags);
  1783. /* if no change, wait aborted for some reason */
  1784. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1785. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1786. rc = -EIO;
  1787. break;
  1788. }
  1789. /* check for change in caller specified modem input */
  1790. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1791. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1792. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1793. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1794. rc = 0;
  1795. break;
  1796. }
  1797. cprev = cnow;
  1798. }
  1799. remove_wait_queue(&info->status_event_wait_q, &wait);
  1800. set_current_state(TASK_RUNNING);
  1801. return rc;
  1802. }
  1803. /* return the state of the serial control and status signals
  1804. */
  1805. static int tiocmget(struct tty_struct *tty, struct file *file)
  1806. {
  1807. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1808. unsigned int result;
  1809. unsigned long flags;
  1810. spin_lock_irqsave(&info->lock,flags);
  1811. get_signals(info);
  1812. spin_unlock_irqrestore(&info->lock,flags);
  1813. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1814. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1815. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1816. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1817. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1818. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1819. if (debug_level >= DEBUG_LEVEL_INFO)
  1820. printk("%s(%d):%s tiocmget() value=%08X\n",
  1821. __FILE__,__LINE__, info->device_name, result );
  1822. return result;
  1823. }
  1824. /* set modem control signals (DTR/RTS)
  1825. */
  1826. static int tiocmset(struct tty_struct *tty, struct file *file,
  1827. unsigned int set, unsigned int clear)
  1828. {
  1829. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1830. unsigned long flags;
  1831. if (debug_level >= DEBUG_LEVEL_INFO)
  1832. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1833. __FILE__,__LINE__,info->device_name, set, clear);
  1834. if (set & TIOCM_RTS)
  1835. info->serial_signals |= SerialSignal_RTS;
  1836. if (set & TIOCM_DTR)
  1837. info->serial_signals |= SerialSignal_DTR;
  1838. if (clear & TIOCM_RTS)
  1839. info->serial_signals &= ~SerialSignal_RTS;
  1840. if (clear & TIOCM_DTR)
  1841. info->serial_signals &= ~SerialSignal_DTR;
  1842. spin_lock_irqsave(&info->lock,flags);
  1843. set_signals(info);
  1844. spin_unlock_irqrestore(&info->lock,flags);
  1845. return 0;
  1846. }
  1847. /* Set or clear transmit break condition
  1848. *
  1849. * Arguments: tty pointer to tty instance data
  1850. * break_state -1=set break condition, 0=clear
  1851. */
  1852. static int mgslpc_break(struct tty_struct *tty, int break_state)
  1853. {
  1854. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1855. unsigned long flags;
  1856. if (debug_level >= DEBUG_LEVEL_INFO)
  1857. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1858. __FILE__,__LINE__, info->device_name, break_state);
  1859. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1860. return -EINVAL;
  1861. spin_lock_irqsave(&info->lock,flags);
  1862. if (break_state == -1)
  1863. set_reg_bits(info, CHA+DAFO, BIT6);
  1864. else
  1865. clear_reg_bits(info, CHA+DAFO, BIT6);
  1866. spin_unlock_irqrestore(&info->lock,flags);
  1867. return 0;
  1868. }
  1869. /* Service an IOCTL request
  1870. *
  1871. * Arguments:
  1872. *
  1873. * tty pointer to tty instance data
  1874. * file pointer to associated file object for device
  1875. * cmd IOCTL command code
  1876. * arg command argument/context
  1877. *
  1878. * Return Value: 0 if success, otherwise error code
  1879. */
  1880. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1881. unsigned int cmd, unsigned long arg)
  1882. {
  1883. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1884. if (debug_level >= DEBUG_LEVEL_INFO)
  1885. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1886. info->device_name, cmd );
  1887. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1888. return -ENODEV;
  1889. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1890. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1891. if (tty->flags & (1 << TTY_IO_ERROR))
  1892. return -EIO;
  1893. }
  1894. return ioctl_common(info, cmd, arg);
  1895. }
  1896. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
  1897. {
  1898. int error;
  1899. struct mgsl_icount cnow; /* kernel counter temps */
  1900. struct serial_icounter_struct __user *p_cuser; /* user space */
  1901. void __user *argp = (void __user *)arg;
  1902. unsigned long flags;
  1903. switch (cmd) {
  1904. case MGSL_IOCGPARAMS:
  1905. return get_params(info, argp);
  1906. case MGSL_IOCSPARAMS:
  1907. return set_params(info, argp);
  1908. case MGSL_IOCGTXIDLE:
  1909. return get_txidle(info, argp);
  1910. case MGSL_IOCSTXIDLE:
  1911. return set_txidle(info, (int)arg);
  1912. case MGSL_IOCGIF:
  1913. return get_interface(info, argp);
  1914. case MGSL_IOCSIF:
  1915. return set_interface(info,(int)arg);
  1916. case MGSL_IOCTXENABLE:
  1917. return set_txenable(info,(int)arg);
  1918. case MGSL_IOCRXENABLE:
  1919. return set_rxenable(info,(int)arg);
  1920. case MGSL_IOCTXABORT:
  1921. return tx_abort(info);
  1922. case MGSL_IOCGSTATS:
  1923. return get_stats(info, argp);
  1924. case MGSL_IOCWAITEVENT:
  1925. return wait_events(info, argp);
  1926. case TIOCMIWAIT:
  1927. return modem_input_wait(info,(int)arg);
  1928. case TIOCGICOUNT:
  1929. spin_lock_irqsave(&info->lock,flags);
  1930. cnow = info->icount;
  1931. spin_unlock_irqrestore(&info->lock,flags);
  1932. p_cuser = argp;
  1933. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1934. if (error) return error;
  1935. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1936. if (error) return error;
  1937. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1938. if (error) return error;
  1939. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1940. if (error) return error;
  1941. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1942. if (error) return error;
  1943. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1944. if (error) return error;
  1945. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1946. if (error) return error;
  1947. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1948. if (error) return error;
  1949. PUT_USER(error,cnow.parity, &p_cuser->parity);
  1950. if (error) return error;
  1951. PUT_USER(error,cnow.brk, &p_cuser->brk);
  1952. if (error) return error;
  1953. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  1954. if (error) return error;
  1955. return 0;
  1956. default:
  1957. return -ENOIOCTLCMD;
  1958. }
  1959. return 0;
  1960. }
  1961. /* Set new termios settings
  1962. *
  1963. * Arguments:
  1964. *
  1965. * tty pointer to tty structure
  1966. * termios pointer to buffer to hold returned old termios
  1967. */
  1968. static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1969. {
  1970. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1971. unsigned long flags;
  1972. if (debug_level >= DEBUG_LEVEL_INFO)
  1973. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  1974. tty->driver->name );
  1975. /* just return if nothing has changed */
  1976. if ((tty->termios->c_cflag == old_termios->c_cflag)
  1977. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  1978. == RELEVANT_IFLAG(old_termios->c_iflag)))
  1979. return;
  1980. mgslpc_change_params(info);
  1981. /* Handle transition to B0 status */
  1982. if (old_termios->c_cflag & CBAUD &&
  1983. !(tty->termios->c_cflag & CBAUD)) {
  1984. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1985. spin_lock_irqsave(&info->lock,flags);
  1986. set_signals(info);
  1987. spin_unlock_irqrestore(&info->lock,flags);
  1988. }
  1989. /* Handle transition away from B0 status */
  1990. if (!(old_termios->c_cflag & CBAUD) &&
  1991. tty->termios->c_cflag & CBAUD) {
  1992. info->serial_signals |= SerialSignal_DTR;
  1993. if (!(tty->termios->c_cflag & CRTSCTS) ||
  1994. !test_bit(TTY_THROTTLED, &tty->flags)) {
  1995. info->serial_signals |= SerialSignal_RTS;
  1996. }
  1997. spin_lock_irqsave(&info->lock,flags);
  1998. set_signals(info);
  1999. spin_unlock_irqrestore(&info->lock,flags);
  2000. }
  2001. /* Handle turning off CRTSCTS */
  2002. if (old_termios->c_cflag & CRTSCTS &&
  2003. !(tty->termios->c_cflag & CRTSCTS)) {
  2004. tty->hw_stopped = 0;
  2005. tx_release(tty);
  2006. }
  2007. }
  2008. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2009. {
  2010. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2011. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2012. return;
  2013. if (debug_level >= DEBUG_LEVEL_INFO)
  2014. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2015. __FILE__,__LINE__, info->device_name, info->count);
  2016. if (!info->count)
  2017. return;
  2018. if (tty_hung_up_p(filp))
  2019. goto cleanup;
  2020. if ((tty->count == 1) && (info->count != 1)) {
  2021. /*
  2022. * tty->count is 1 and the tty structure will be freed.
  2023. * info->count should be one in this case.
  2024. * if it's not, correct it so that the port is shutdown.
  2025. */
  2026. printk("mgslpc_close: bad refcount; tty->count is 1, "
  2027. "info->count is %d\n", info->count);
  2028. info->count = 1;
  2029. }
  2030. info->count--;
  2031. /* if at least one open remaining, leave hardware active */
  2032. if (info->count)
  2033. goto cleanup;
  2034. info->flags |= ASYNC_CLOSING;
  2035. /* set tty->closing to notify line discipline to
  2036. * only process XON/XOFF characters. Only the N_TTY
  2037. * discipline appears to use this (ppp does not).
  2038. */
  2039. tty->closing = 1;
  2040. /* wait for transmit data to clear all layers */
  2041. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
  2042. if (debug_level >= DEBUG_LEVEL_INFO)
  2043. printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
  2044. __FILE__,__LINE__, info->device_name );
  2045. tty_wait_until_sent(tty, info->closing_wait);
  2046. }
  2047. if (info->flags & ASYNC_INITIALIZED)
  2048. mgslpc_wait_until_sent(tty, info->timeout);
  2049. mgslpc_flush_buffer(tty);
  2050. tty_ldisc_flush(tty);
  2051. shutdown(info);
  2052. tty->closing = 0;
  2053. info->tty = NULL;
  2054. if (info->blocked_open) {
  2055. if (info->close_delay) {
  2056. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  2057. }
  2058. wake_up_interruptible(&info->open_wait);
  2059. }
  2060. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  2061. wake_up_interruptible(&info->close_wait);
  2062. cleanup:
  2063. if (debug_level >= DEBUG_LEVEL_INFO)
  2064. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2065. tty->driver->name, info->count);
  2066. }
  2067. /* Wait until the transmitter is empty.
  2068. */
  2069. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2070. {
  2071. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2072. unsigned long orig_jiffies, char_time;
  2073. if (!info )
  2074. return;
  2075. if (debug_level >= DEBUG_LEVEL_INFO)
  2076. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2077. __FILE__,__LINE__, info->device_name );
  2078. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2079. return;
  2080. if (!(info->flags & ASYNC_INITIALIZED))
  2081. goto exit;
  2082. orig_jiffies = jiffies;
  2083. /* Set check interval to 1/5 of estimated time to
  2084. * send a character, and make it at least 1. The check
  2085. * interval should also be less than the timeout.
  2086. * Note: use tight timings here to satisfy the NIST-PCTS.
  2087. */
  2088. if ( info->params.data_rate ) {
  2089. char_time = info->timeout/(32 * 5);
  2090. if (!char_time)
  2091. char_time++;
  2092. } else
  2093. char_time = 1;
  2094. if (timeout)
  2095. char_time = min_t(unsigned long, char_time, timeout);
  2096. if (info->params.mode == MGSL_MODE_HDLC) {
  2097. while (info->tx_active) {
  2098. msleep_interruptible(jiffies_to_msecs(char_time));
  2099. if (signal_pending(current))
  2100. break;
  2101. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2102. break;
  2103. }
  2104. } else {
  2105. while ((info->tx_count || info->tx_active) &&
  2106. info->tx_enabled) {
  2107. msleep_interruptible(jiffies_to_msecs(char_time));
  2108. if (signal_pending(current))
  2109. break;
  2110. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2111. break;
  2112. }
  2113. }
  2114. exit:
  2115. if (debug_level >= DEBUG_LEVEL_INFO)
  2116. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2117. __FILE__,__LINE__, info->device_name );
  2118. }
  2119. /* Called by tty_hangup() when a hangup is signaled.
  2120. * This is the same as closing all open files for the port.
  2121. */
  2122. static void mgslpc_hangup(struct tty_struct *tty)
  2123. {
  2124. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2125. if (debug_level >= DEBUG_LEVEL_INFO)
  2126. printk("%s(%d):mgslpc_hangup(%s)\n",
  2127. __FILE__,__LINE__, info->device_name );
  2128. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2129. return;
  2130. mgslpc_flush_buffer(tty);
  2131. shutdown(info);
  2132. info->count = 0;
  2133. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  2134. info->tty = NULL;
  2135. wake_up_interruptible(&info->open_wait);
  2136. }
  2137. /* Block the current process until the specified port
  2138. * is ready to be opened.
  2139. */
  2140. static int block_til_ready(struct tty_struct *tty, struct file *filp,
  2141. MGSLPC_INFO *info)
  2142. {
  2143. DECLARE_WAITQUEUE(wait, current);
  2144. int retval;
  2145. bool do_clocal = false;
  2146. bool extra_count = false;
  2147. unsigned long flags;
  2148. if (debug_level >= DEBUG_LEVEL_INFO)
  2149. printk("%s(%d):block_til_ready on %s\n",
  2150. __FILE__,__LINE__, tty->driver->name );
  2151. if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
  2152. /* nonblock mode is set or port is not enabled */
  2153. /* just verify that callout device is not active */
  2154. info->flags |= ASYNC_NORMAL_ACTIVE;
  2155. return 0;
  2156. }
  2157. if (tty->termios->c_cflag & CLOCAL)
  2158. do_clocal = true;
  2159. /* Wait for carrier detect and the line to become
  2160. * free (i.e., not in use by the callout). While we are in
  2161. * this loop, info->count is dropped by one, so that
  2162. * mgslpc_close() knows when to free things. We restore it upon
  2163. * exit, either normal or abnormal.
  2164. */
  2165. retval = 0;
  2166. add_wait_queue(&info->open_wait, &wait);
  2167. if (debug_level >= DEBUG_LEVEL_INFO)
  2168. printk("%s(%d):block_til_ready before block on %s count=%d\n",
  2169. __FILE__,__LINE__, tty->driver->name, info->count );
  2170. spin_lock_irqsave(&info->lock, flags);
  2171. if (!tty_hung_up_p(filp)) {
  2172. extra_count = true;
  2173. info->count--;
  2174. }
  2175. spin_unlock_irqrestore(&info->lock, flags);
  2176. info->blocked_open++;
  2177. while (1) {
  2178. if ((tty->termios->c_cflag & CBAUD)) {
  2179. spin_lock_irqsave(&info->lock,flags);
  2180. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2181. set_signals(info);
  2182. spin_unlock_irqrestore(&info->lock,flags);
  2183. }
  2184. set_current_state(TASK_INTERRUPTIBLE);
  2185. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
  2186. retval = (info->flags & ASYNC_HUP_NOTIFY) ?
  2187. -EAGAIN : -ERESTARTSYS;
  2188. break;
  2189. }
  2190. spin_lock_irqsave(&info->lock,flags);
  2191. get_signals(info);
  2192. spin_unlock_irqrestore(&info->lock,flags);
  2193. if (!(info->flags & ASYNC_CLOSING) &&
  2194. (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
  2195. break;
  2196. }
  2197. if (signal_pending(current)) {
  2198. retval = -ERESTARTSYS;
  2199. break;
  2200. }
  2201. if (debug_level >= DEBUG_LEVEL_INFO)
  2202. printk("%s(%d):block_til_ready blocking on %s count=%d\n",
  2203. __FILE__,__LINE__, tty->driver->name, info->count );
  2204. schedule();
  2205. }
  2206. set_current_state(TASK_RUNNING);
  2207. remove_wait_queue(&info->open_wait, &wait);
  2208. if (extra_count)
  2209. info->count++;
  2210. info->blocked_open--;
  2211. if (debug_level >= DEBUG_LEVEL_INFO)
  2212. printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
  2213. __FILE__,__LINE__, tty->driver->name, info->count );
  2214. if (!retval)
  2215. info->flags |= ASYNC_NORMAL_ACTIVE;
  2216. return retval;
  2217. }
  2218. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2219. {
  2220. MGSLPC_INFO *info;
  2221. int retval, line;
  2222. unsigned long flags;
  2223. /* verify range of specified line number */
  2224. line = tty->index;
  2225. if ((line < 0) || (line >= mgslpc_device_count)) {
  2226. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2227. __FILE__,__LINE__,line);
  2228. return -ENODEV;
  2229. }
  2230. /* find the info structure for the specified line */
  2231. info = mgslpc_device_list;
  2232. while(info && info->line != line)
  2233. info = info->next_device;
  2234. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2235. return -ENODEV;
  2236. tty->driver_data = info;
  2237. info->tty = tty;
  2238. if (debug_level >= DEBUG_LEVEL_INFO)
  2239. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2240. __FILE__,__LINE__,tty->driver->name, info->count);
  2241. /* If port is closing, signal caller to try again */
  2242. if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
  2243. if (info->flags & ASYNC_CLOSING)
  2244. interruptible_sleep_on(&info->close_wait);
  2245. retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
  2246. -EAGAIN : -ERESTARTSYS);
  2247. goto cleanup;
  2248. }
  2249. info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2250. spin_lock_irqsave(&info->netlock, flags);
  2251. if (info->netcount) {
  2252. retval = -EBUSY;
  2253. spin_unlock_irqrestore(&info->netlock, flags);
  2254. goto cleanup;
  2255. }
  2256. info->count++;
  2257. spin_unlock_irqrestore(&info->netlock, flags);
  2258. if (info->count == 1) {
  2259. /* 1st open on this device, init hardware */
  2260. retval = startup(info);
  2261. if (retval < 0)
  2262. goto cleanup;
  2263. }
  2264. retval = block_til_ready(tty, filp, info);
  2265. if (retval) {
  2266. if (debug_level >= DEBUG_LEVEL_INFO)
  2267. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2268. __FILE__,__LINE__, info->device_name, retval);
  2269. goto cleanup;
  2270. }
  2271. if (debug_level >= DEBUG_LEVEL_INFO)
  2272. printk("%s(%d):mgslpc_open(%s) success\n",
  2273. __FILE__,__LINE__, info->device_name);
  2274. retval = 0;
  2275. cleanup:
  2276. if (retval) {
  2277. if (tty->count == 1)
  2278. info->tty = NULL; /* tty layer will release tty struct */
  2279. if(info->count)
  2280. info->count--;
  2281. }
  2282. return retval;
  2283. }
  2284. /*
  2285. * /proc fs routines....
  2286. */
  2287. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2288. {
  2289. char stat_buf[30];
  2290. int ret;
  2291. unsigned long flags;
  2292. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2293. info->device_name, info->io_base, info->irq_level);
  2294. /* output current serial signal states */
  2295. spin_lock_irqsave(&info->lock,flags);
  2296. get_signals(info);
  2297. spin_unlock_irqrestore(&info->lock,flags);
  2298. stat_buf[0] = 0;
  2299. stat_buf[1] = 0;
  2300. if (info->serial_signals & SerialSignal_RTS)
  2301. strcat(stat_buf, "|RTS");
  2302. if (info->serial_signals & SerialSignal_CTS)
  2303. strcat(stat_buf, "|CTS");
  2304. if (info->serial_signals & SerialSignal_DTR)
  2305. strcat(stat_buf, "|DTR");
  2306. if (info->serial_signals & SerialSignal_DSR)
  2307. strcat(stat_buf, "|DSR");
  2308. if (info->serial_signals & SerialSignal_DCD)
  2309. strcat(stat_buf, "|CD");
  2310. if (info->serial_signals & SerialSignal_RI)
  2311. strcat(stat_buf, "|RI");
  2312. if (info->params.mode == MGSL_MODE_HDLC) {
  2313. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2314. info->icount.txok, info->icount.rxok);
  2315. if (info->icount.txunder)
  2316. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2317. if (info->icount.txabort)
  2318. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2319. if (info->icount.rxshort)
  2320. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2321. if (info->icount.rxlong)
  2322. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2323. if (info->icount.rxover)
  2324. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2325. if (info->icount.rxcrc)
  2326. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2327. } else {
  2328. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2329. info->icount.tx, info->icount.rx);
  2330. if (info->icount.frame)
  2331. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2332. if (info->icount.parity)
  2333. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2334. if (info->icount.brk)
  2335. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2336. if (info->icount.overrun)
  2337. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2338. }
  2339. /* Append serial signal status to end */
  2340. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2341. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2342. info->tx_active,info->bh_requested,info->bh_running,
  2343. info->pending_bh);
  2344. return ret;
  2345. }
  2346. /* Called to print information about devices
  2347. */
  2348. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2349. int *eof, void *data)
  2350. {
  2351. int len = 0, l;
  2352. off_t begin = 0;
  2353. MGSLPC_INFO *info;
  2354. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2355. info = mgslpc_device_list;
  2356. while( info ) {
  2357. l = line_info(page + len, info);
  2358. len += l;
  2359. if (len+begin > off+count)
  2360. goto done;
  2361. if (len+begin < off) {
  2362. begin += len;
  2363. len = 0;
  2364. }
  2365. info = info->next_device;
  2366. }
  2367. *eof = 1;
  2368. done:
  2369. if (off >= len+begin)
  2370. return 0;
  2371. *start = page + (off-begin);
  2372. return ((count < begin+len-off) ? count : begin+len-off);
  2373. }
  2374. static int rx_alloc_buffers(MGSLPC_INFO *info)
  2375. {
  2376. /* each buffer has header and data */
  2377. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2378. /* calculate total allocation size for 8 buffers */
  2379. info->rx_buf_total_size = info->rx_buf_size * 8;
  2380. /* limit total allocated memory */
  2381. if (info->rx_buf_total_size > 0x10000)
  2382. info->rx_buf_total_size = 0x10000;
  2383. /* calculate number of buffers */
  2384. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2385. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2386. if (info->rx_buf == NULL)
  2387. return -ENOMEM;
  2388. rx_reset_buffers(info);
  2389. return 0;
  2390. }
  2391. static void rx_free_buffers(MGSLPC_INFO *info)
  2392. {
  2393. kfree(info->rx_buf);
  2394. info->rx_buf = NULL;
  2395. }
  2396. static int claim_resources(MGSLPC_INFO *info)
  2397. {
  2398. if (rx_alloc_buffers(info) < 0 ) {
  2399. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2400. release_resources(info);
  2401. return -ENODEV;
  2402. }
  2403. return 0;
  2404. }
  2405. static void release_resources(MGSLPC_INFO *info)
  2406. {
  2407. if (debug_level >= DEBUG_LEVEL_INFO)
  2408. printk("release_resources(%s)\n", info->device_name);
  2409. rx_free_buffers(info);
  2410. }
  2411. /* Add the specified device instance data structure to the
  2412. * global linked list of devices and increment the device count.
  2413. *
  2414. * Arguments: info pointer to device instance data
  2415. */
  2416. static void mgslpc_add_device(MGSLPC_INFO *info)
  2417. {
  2418. info->next_device = NULL;
  2419. info->line = mgslpc_device_count;
  2420. sprintf(info->device_name,"ttySLP%d",info->line);
  2421. if (info->line < MAX_DEVICE_COUNT) {
  2422. if (maxframe[info->line])
  2423. info->max_frame_size = maxframe[info->line];
  2424. }
  2425. mgslpc_device_count++;
  2426. if (!mgslpc_device_list)
  2427. mgslpc_device_list = info;
  2428. else {
  2429. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2430. while( current_dev->next_device )
  2431. current_dev = current_dev->next_device;
  2432. current_dev->next_device = info;
  2433. }
  2434. if (info->max_frame_size < 4096)
  2435. info->max_frame_size = 4096;
  2436. else if (info->max_frame_size > 65535)
  2437. info->max_frame_size = 65535;
  2438. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2439. info->device_name, info->io_base, info->irq_level);
  2440. #if SYNCLINK_GENERIC_HDLC
  2441. hdlcdev_init(info);
  2442. #endif
  2443. }
  2444. static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2445. {
  2446. MGSLPC_INFO *info = mgslpc_device_list;
  2447. MGSLPC_INFO *last = NULL;
  2448. while(info) {
  2449. if (info == remove_info) {
  2450. if (last)
  2451. last->next_device = info->next_device;
  2452. else
  2453. mgslpc_device_list = info->next_device;
  2454. #if SYNCLINK_GENERIC_HDLC
  2455. hdlcdev_exit(info);
  2456. #endif
  2457. release_resources(info);
  2458. kfree(info);
  2459. mgslpc_device_count--;
  2460. return;
  2461. }
  2462. last = info;
  2463. info = info->next_device;
  2464. }
  2465. }
  2466. static struct pcmcia_device_id mgslpc_ids[] = {
  2467. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2468. PCMCIA_DEVICE_NULL
  2469. };
  2470. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2471. static struct pcmcia_driver mgslpc_driver = {
  2472. .owner = THIS_MODULE,
  2473. .drv = {
  2474. .name = "synclink_cs",
  2475. },
  2476. .probe = mgslpc_probe,
  2477. .remove = mgslpc_detach,
  2478. .id_table = mgslpc_ids,
  2479. .suspend = mgslpc_suspend,
  2480. .resume = mgslpc_resume,
  2481. };
  2482. static const struct tty_operations mgslpc_ops = {
  2483. .open = mgslpc_open,
  2484. .close = mgslpc_close,
  2485. .write = mgslpc_write,
  2486. .put_char = mgslpc_put_char,
  2487. .flush_chars = mgslpc_flush_chars,
  2488. .write_room = mgslpc_write_room,
  2489. .chars_in_buffer = mgslpc_chars_in_buffer,
  2490. .flush_buffer = mgslpc_flush_buffer,
  2491. .ioctl = mgslpc_ioctl,
  2492. .throttle = mgslpc_throttle,
  2493. .unthrottle = mgslpc_unthrottle,
  2494. .send_xchar = mgslpc_send_xchar,
  2495. .break_ctl = mgslpc_break,
  2496. .wait_until_sent = mgslpc_wait_until_sent,
  2497. .read_proc = mgslpc_read_proc,
  2498. .set_termios = mgslpc_set_termios,
  2499. .stop = tx_pause,
  2500. .start = tx_release,
  2501. .hangup = mgslpc_hangup,
  2502. .tiocmget = tiocmget,
  2503. .tiocmset = tiocmset,
  2504. };
  2505. static void synclink_cs_cleanup(void)
  2506. {
  2507. int rc;
  2508. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2509. while(mgslpc_device_list)
  2510. mgslpc_remove_device(mgslpc_device_list);
  2511. if (serial_driver) {
  2512. if ((rc = tty_unregister_driver(serial_driver)))
  2513. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2514. __FILE__,__LINE__,rc);
  2515. put_tty_driver(serial_driver);
  2516. }
  2517. pcmcia_unregister_driver(&mgslpc_driver);
  2518. }
  2519. static int __init synclink_cs_init(void)
  2520. {
  2521. int rc;
  2522. if (break_on_load) {
  2523. mgslpc_get_text_ptr();
  2524. BREAKPOINT();
  2525. }
  2526. printk("%s %s\n", driver_name, driver_version);
  2527. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2528. return rc;
  2529. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2530. if (!serial_driver) {
  2531. rc = -ENOMEM;
  2532. goto error;
  2533. }
  2534. /* Initialize the tty_driver structure */
  2535. serial_driver->owner = THIS_MODULE;
  2536. serial_driver->driver_name = "synclink_cs";
  2537. serial_driver->name = "ttySLP";
  2538. serial_driver->major = ttymajor;
  2539. serial_driver->minor_start = 64;
  2540. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2541. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2542. serial_driver->init_termios = tty_std_termios;
  2543. serial_driver->init_termios.c_cflag =
  2544. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2545. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2546. tty_set_operations(serial_driver, &mgslpc_ops);
  2547. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2548. printk("%s(%d):Couldn't register serial driver\n",
  2549. __FILE__,__LINE__);
  2550. put_tty_driver(serial_driver);
  2551. serial_driver = NULL;
  2552. goto error;
  2553. }
  2554. printk("%s %s, tty major#%d\n",
  2555. driver_name, driver_version,
  2556. serial_driver->major);
  2557. return 0;
  2558. error:
  2559. synclink_cs_cleanup();
  2560. return rc;
  2561. }
  2562. static void __exit synclink_cs_exit(void)
  2563. {
  2564. synclink_cs_cleanup();
  2565. }
  2566. module_init(synclink_cs_init);
  2567. module_exit(synclink_cs_exit);
  2568. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2569. {
  2570. unsigned int M, N;
  2571. unsigned char val;
  2572. /* note:standard BRG mode is broken in V3.2 chip
  2573. * so enhanced mode is always used
  2574. */
  2575. if (rate) {
  2576. N = 3686400 / rate;
  2577. if (!N)
  2578. N = 1;
  2579. N >>= 1;
  2580. for (M = 1; N > 64 && M < 16; M++)
  2581. N >>= 1;
  2582. N--;
  2583. /* BGR[5..0] = N
  2584. * BGR[9..6] = M
  2585. * BGR[7..0] contained in BGR register
  2586. * BGR[9..8] contained in CCR2[7..6]
  2587. * divisor = (N+1)*2^M
  2588. *
  2589. * Note: M *must* not be zero (causes asymetric duty cycle)
  2590. */
  2591. write_reg(info, (unsigned char) (channel + BGR),
  2592. (unsigned char) ((M << 6) + N));
  2593. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2594. val |= ((M << 4) & 0xc0);
  2595. write_reg(info, (unsigned char) (channel + CCR2), val);
  2596. }
  2597. }
  2598. /* Enabled the AUX clock output at the specified frequency.
  2599. */
  2600. static void enable_auxclk(MGSLPC_INFO *info)
  2601. {
  2602. unsigned char val;
  2603. /* MODE
  2604. *
  2605. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2606. * 05 ADM Address Mode, 0 = no addr recognition
  2607. * 04 TMD Timer Mode, 0 = external
  2608. * 03 RAC Receiver Active, 0 = inactive
  2609. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2610. * 01 TRS Timer Resolution, 1=512
  2611. * 00 TLP Test Loop, 0 = no loop
  2612. *
  2613. * 1000 0010
  2614. */
  2615. val = 0x82;
  2616. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2617. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2618. val |= BIT2;
  2619. write_reg(info, CHB + MODE, val);
  2620. /* CCR0
  2621. *
  2622. * 07 PU Power Up, 1=active, 0=power down
  2623. * 06 MCE Master Clock Enable, 1=enabled
  2624. * 05 Reserved, 0
  2625. * 04..02 SC[2..0] Encoding
  2626. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2627. *
  2628. * 11000000
  2629. */
  2630. write_reg(info, CHB + CCR0, 0xc0);
  2631. /* CCR1
  2632. *
  2633. * 07 SFLG Shared Flag, 0 = disable shared flags
  2634. * 06 GALP Go Active On Loop, 0 = not used
  2635. * 05 GLP Go On Loop, 0 = not used
  2636. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2637. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2638. * 02..00 CM[2..0] Clock Mode
  2639. *
  2640. * 0001 0111
  2641. */
  2642. write_reg(info, CHB + CCR1, 0x17);
  2643. /* CCR2 (Channel B)
  2644. *
  2645. * 07..06 BGR[9..8] Baud rate bits 9..8
  2646. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2647. * 04 SSEL Clock source select, 1=submode b
  2648. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2649. * 02 RWX Read/Write Exchange 0=disabled
  2650. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2651. * 00 DIV, data inversion 0=disabled, 1=enabled
  2652. *
  2653. * 0011 1000
  2654. */
  2655. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2656. write_reg(info, CHB + CCR2, 0x38);
  2657. else
  2658. write_reg(info, CHB + CCR2, 0x30);
  2659. /* CCR4
  2660. *
  2661. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2662. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2663. * 05 TST1 Test Pin, 0=normal operation
  2664. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2665. * 03..02 Reserved, must be 0
  2666. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2667. *
  2668. * 0101 0000
  2669. */
  2670. write_reg(info, CHB + CCR4, 0x50);
  2671. /* if auxclk not enabled, set internal BRG so
  2672. * CTS transitions can be detected (requires TxC)
  2673. */
  2674. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2675. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2676. else
  2677. mgslpc_set_rate(info, CHB, 921600);
  2678. }
  2679. static void loopback_enable(MGSLPC_INFO *info)
  2680. {
  2681. unsigned char val;
  2682. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2683. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2684. write_reg(info, CHA + CCR1, val);
  2685. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2686. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2687. write_reg(info, CHA + CCR2, val);
  2688. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2689. if (info->params.clock_speed)
  2690. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2691. else
  2692. mgslpc_set_rate(info, CHA, 1843200);
  2693. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2694. val = read_reg(info, CHA + MODE) | BIT0;
  2695. write_reg(info, CHA + MODE, val);
  2696. }
  2697. static void hdlc_mode(MGSLPC_INFO *info)
  2698. {
  2699. unsigned char val;
  2700. unsigned char clkmode, clksubmode;
  2701. /* disable all interrupts */
  2702. irq_disable(info, CHA, 0xffff);
  2703. irq_disable(info, CHB, 0xffff);
  2704. port_irq_disable(info, 0xff);
  2705. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2706. clkmode = clksubmode = 0;
  2707. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2708. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2709. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2710. clkmode = 7;
  2711. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2712. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2713. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2714. clkmode = 7;
  2715. clksubmode = 1;
  2716. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2717. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2718. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2719. clkmode = 6;
  2720. clksubmode = 1;
  2721. } else {
  2722. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2723. clkmode = 6;
  2724. }
  2725. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2726. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2727. clksubmode = 1;
  2728. }
  2729. /* MODE
  2730. *
  2731. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2732. * 05 ADM Address Mode, 0 = no addr recognition
  2733. * 04 TMD Timer Mode, 0 = external
  2734. * 03 RAC Receiver Active, 0 = inactive
  2735. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2736. * 01 TRS Timer Resolution, 1=512
  2737. * 00 TLP Test Loop, 0 = no loop
  2738. *
  2739. * 1000 0010
  2740. */
  2741. val = 0x82;
  2742. if (info->params.loopback)
  2743. val |= BIT0;
  2744. /* preserve RTS state */
  2745. if (info->serial_signals & SerialSignal_RTS)
  2746. val |= BIT2;
  2747. write_reg(info, CHA + MODE, val);
  2748. /* CCR0
  2749. *
  2750. * 07 PU Power Up, 1=active, 0=power down
  2751. * 06 MCE Master Clock Enable, 1=enabled
  2752. * 05 Reserved, 0
  2753. * 04..02 SC[2..0] Encoding
  2754. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2755. *
  2756. * 11000000
  2757. */
  2758. val = 0xc0;
  2759. switch (info->params.encoding)
  2760. {
  2761. case HDLC_ENCODING_NRZI:
  2762. val |= BIT3;
  2763. break;
  2764. case HDLC_ENCODING_BIPHASE_SPACE:
  2765. val |= BIT4;
  2766. break; // FM0
  2767. case HDLC_ENCODING_BIPHASE_MARK:
  2768. val |= BIT4 + BIT2;
  2769. break; // FM1
  2770. case HDLC_ENCODING_BIPHASE_LEVEL:
  2771. val |= BIT4 + BIT3;
  2772. break; // Manchester
  2773. }
  2774. write_reg(info, CHA + CCR0, val);
  2775. /* CCR1
  2776. *
  2777. * 07 SFLG Shared Flag, 0 = disable shared flags
  2778. * 06 GALP Go Active On Loop, 0 = not used
  2779. * 05 GLP Go On Loop, 0 = not used
  2780. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2781. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2782. * 02..00 CM[2..0] Clock Mode
  2783. *
  2784. * 0001 0000
  2785. */
  2786. val = 0x10 + clkmode;
  2787. write_reg(info, CHA + CCR1, val);
  2788. /* CCR2
  2789. *
  2790. * 07..06 BGR[9..8] Baud rate bits 9..8
  2791. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2792. * 04 SSEL Clock source select, 1=submode b
  2793. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2794. * 02 RWX Read/Write Exchange 0=disabled
  2795. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2796. * 00 DIV, data inversion 0=disabled, 1=enabled
  2797. *
  2798. * 0000 0000
  2799. */
  2800. val = 0x00;
  2801. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2802. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2803. val |= BIT5;
  2804. if (clksubmode)
  2805. val |= BIT4;
  2806. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2807. val |= BIT1;
  2808. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2809. val |= BIT0;
  2810. write_reg(info, CHA + CCR2, val);
  2811. /* CCR3
  2812. *
  2813. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2814. * 05 EPT Enable preamble transmission, 1=enabled
  2815. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2816. * 03 CRL CRC Reset Level, 0=FFFF
  2817. * 02 RCRC Rx CRC 0=On 1=Off
  2818. * 01 TCRC Tx CRC 0=On 1=Off
  2819. * 00 PSD DPLL Phase Shift Disable
  2820. *
  2821. * 0000 0000
  2822. */
  2823. val = 0x00;
  2824. if (info->params.crc_type == HDLC_CRC_NONE)
  2825. val |= BIT2 + BIT1;
  2826. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2827. val |= BIT5;
  2828. switch (info->params.preamble_length)
  2829. {
  2830. case HDLC_PREAMBLE_LENGTH_16BITS:
  2831. val |= BIT6;
  2832. break;
  2833. case HDLC_PREAMBLE_LENGTH_32BITS:
  2834. val |= BIT6;
  2835. break;
  2836. case HDLC_PREAMBLE_LENGTH_64BITS:
  2837. val |= BIT7 + BIT6;
  2838. break;
  2839. }
  2840. write_reg(info, CHA + CCR3, val);
  2841. /* PRE - Preamble pattern */
  2842. val = 0;
  2843. switch (info->params.preamble)
  2844. {
  2845. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2846. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2847. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2848. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2849. }
  2850. write_reg(info, CHA + PRE, val);
  2851. /* CCR4
  2852. *
  2853. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2854. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2855. * 05 TST1 Test Pin, 0=normal operation
  2856. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2857. * 03..02 Reserved, must be 0
  2858. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2859. *
  2860. * 0101 0000
  2861. */
  2862. val = 0x50;
  2863. write_reg(info, CHA + CCR4, val);
  2864. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2865. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2866. else
  2867. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2868. /* RLCR Receive length check register
  2869. *
  2870. * 7 1=enable receive length check
  2871. * 6..0 Max frame length = (RL + 1) * 32
  2872. */
  2873. write_reg(info, CHA + RLCR, 0);
  2874. /* XBCH Transmit Byte Count High
  2875. *
  2876. * 07 DMA mode, 0 = interrupt driven
  2877. * 06 NRM, 0=ABM (ignored)
  2878. * 05 CAS Carrier Auto Start
  2879. * 04 XC Transmit Continuously (ignored)
  2880. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2881. *
  2882. * 0000 0000
  2883. */
  2884. val = 0x00;
  2885. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2886. val |= BIT5;
  2887. write_reg(info, CHA + XBCH, val);
  2888. enable_auxclk(info);
  2889. if (info->params.loopback || info->testing_irq)
  2890. loopback_enable(info);
  2891. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2892. {
  2893. irq_enable(info, CHB, IRQ_CTS);
  2894. /* PVR[3] 1=AUTO CTS active */
  2895. set_reg_bits(info, CHA + PVR, BIT3);
  2896. } else
  2897. clear_reg_bits(info, CHA + PVR, BIT3);
  2898. irq_enable(info, CHA,
  2899. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2900. IRQ_UNDERRUN + IRQ_TXFIFO);
  2901. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2902. wait_command_complete(info, CHA);
  2903. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2904. /* Master clock mode enabled above to allow reset commands
  2905. * to complete even if no data clocks are present.
  2906. *
  2907. * Disable master clock mode for normal communications because
  2908. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2909. * IRQ when in master clock mode.
  2910. *
  2911. * Leave master clock mode enabled for IRQ test because the
  2912. * timer IRQ used by the test can only happen in master clock mode.
  2913. */
  2914. if (!info->testing_irq)
  2915. clear_reg_bits(info, CHA + CCR0, BIT6);
  2916. tx_set_idle(info);
  2917. tx_stop(info);
  2918. rx_stop(info);
  2919. }
  2920. static void rx_stop(MGSLPC_INFO *info)
  2921. {
  2922. if (debug_level >= DEBUG_LEVEL_ISR)
  2923. printk("%s(%d):rx_stop(%s)\n",
  2924. __FILE__,__LINE__, info->device_name );
  2925. /* MODE:03 RAC Receiver Active, 0=inactive */
  2926. clear_reg_bits(info, CHA + MODE, BIT3);
  2927. info->rx_enabled = false;
  2928. info->rx_overflow = false;
  2929. }
  2930. static void rx_start(MGSLPC_INFO *info)
  2931. {
  2932. if (debug_level >= DEBUG_LEVEL_ISR)
  2933. printk("%s(%d):rx_start(%s)\n",
  2934. __FILE__,__LINE__, info->device_name );
  2935. rx_reset_buffers(info);
  2936. info->rx_enabled = false;
  2937. info->rx_overflow = false;
  2938. /* MODE:03 RAC Receiver Active, 1=active */
  2939. set_reg_bits(info, CHA + MODE, BIT3);
  2940. info->rx_enabled = true;
  2941. }
  2942. static void tx_start(MGSLPC_INFO *info)
  2943. {
  2944. if (debug_level >= DEBUG_LEVEL_ISR)
  2945. printk("%s(%d):tx_start(%s)\n",
  2946. __FILE__,__LINE__, info->device_name );
  2947. if (info->tx_count) {
  2948. /* If auto RTS enabled and RTS is inactive, then assert */
  2949. /* RTS and set a flag indicating that the driver should */
  2950. /* negate RTS when the transmission completes. */
  2951. info->drop_rts_on_tx_done = false;
  2952. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  2953. get_signals(info);
  2954. if (!(info->serial_signals & SerialSignal_RTS)) {
  2955. info->serial_signals |= SerialSignal_RTS;
  2956. set_signals(info);
  2957. info->drop_rts_on_tx_done = true;
  2958. }
  2959. }
  2960. if (info->params.mode == MGSL_MODE_ASYNC) {
  2961. if (!info->tx_active) {
  2962. info->tx_active = true;
  2963. tx_ready(info);
  2964. }
  2965. } else {
  2966. info->tx_active = true;
  2967. tx_ready(info);
  2968. mod_timer(&info->tx_timer, jiffies +
  2969. msecs_to_jiffies(5000));
  2970. }
  2971. }
  2972. if (!info->tx_enabled)
  2973. info->tx_enabled = true;
  2974. }
  2975. static void tx_stop(MGSLPC_INFO *info)
  2976. {
  2977. if (debug_level >= DEBUG_LEVEL_ISR)
  2978. printk("%s(%d):tx_stop(%s)\n",
  2979. __FILE__,__LINE__, info->device_name );
  2980. del_timer(&info->tx_timer);
  2981. info->tx_enabled = false;
  2982. info->tx_active = false;
  2983. }
  2984. /* Reset the adapter to a known state and prepare it for further use.
  2985. */
  2986. static void reset_device(MGSLPC_INFO *info)
  2987. {
  2988. /* power up both channels (set BIT7) */
  2989. write_reg(info, CHA + CCR0, 0x80);
  2990. write_reg(info, CHB + CCR0, 0x80);
  2991. write_reg(info, CHA + MODE, 0);
  2992. write_reg(info, CHB + MODE, 0);
  2993. /* disable all interrupts */
  2994. irq_disable(info, CHA, 0xffff);
  2995. irq_disable(info, CHB, 0xffff);
  2996. port_irq_disable(info, 0xff);
  2997. /* PCR Port Configuration Register
  2998. *
  2999. * 07..04 DEC[3..0] Serial I/F select outputs
  3000. * 03 output, 1=AUTO CTS control enabled
  3001. * 02 RI Ring Indicator input 0=active
  3002. * 01 DSR input 0=active
  3003. * 00 DTR output 0=active
  3004. *
  3005. * 0000 0110
  3006. */
  3007. write_reg(info, PCR, 0x06);
  3008. /* PVR Port Value Register
  3009. *
  3010. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  3011. * 03 AUTO CTS output 1=enabled
  3012. * 02 RI Ring Indicator input
  3013. * 01 DSR input
  3014. * 00 DTR output (1=inactive)
  3015. *
  3016. * 0000 0001
  3017. */
  3018. // write_reg(info, PVR, PVR_DTR);
  3019. /* IPC Interrupt Port Configuration
  3020. *
  3021. * 07 VIS 1=Masked interrupts visible
  3022. * 06..05 Reserved, 0
  3023. * 04..03 SLA Slave address, 00 ignored
  3024. * 02 CASM Cascading Mode, 1=daisy chain
  3025. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  3026. *
  3027. * 0000 0101
  3028. */
  3029. write_reg(info, IPC, 0x05);
  3030. }
  3031. static void async_mode(MGSLPC_INFO *info)
  3032. {
  3033. unsigned char val;
  3034. /* disable all interrupts */
  3035. irq_disable(info, CHA, 0xffff);
  3036. irq_disable(info, CHB, 0xffff);
  3037. port_irq_disable(info, 0xff);
  3038. /* MODE
  3039. *
  3040. * 07 Reserved, 0
  3041. * 06 FRTS RTS State, 0=active
  3042. * 05 FCTS Flow Control on CTS
  3043. * 04 FLON Flow Control Enable
  3044. * 03 RAC Receiver Active, 0 = inactive
  3045. * 02 RTS 0=Auto RTS, 1=manual RTS
  3046. * 01 TRS Timer Resolution, 1=512
  3047. * 00 TLP Test Loop, 0 = no loop
  3048. *
  3049. * 0000 0110
  3050. */
  3051. val = 0x06;
  3052. if (info->params.loopback)
  3053. val |= BIT0;
  3054. /* preserve RTS state */
  3055. if (!(info->serial_signals & SerialSignal_RTS))
  3056. val |= BIT6;
  3057. write_reg(info, CHA + MODE, val);
  3058. /* CCR0
  3059. *
  3060. * 07 PU Power Up, 1=active, 0=power down
  3061. * 06 MCE Master Clock Enable, 1=enabled
  3062. * 05 Reserved, 0
  3063. * 04..02 SC[2..0] Encoding, 000=NRZ
  3064. * 01..00 SM[1..0] Serial Mode, 11=Async
  3065. *
  3066. * 1000 0011
  3067. */
  3068. write_reg(info, CHA + CCR0, 0x83);
  3069. /* CCR1
  3070. *
  3071. * 07..05 Reserved, 0
  3072. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  3073. * 03 BCR Bit Clock Rate, 1=16x
  3074. * 02..00 CM[2..0] Clock Mode, 111=BRG
  3075. *
  3076. * 0001 1111
  3077. */
  3078. write_reg(info, CHA + CCR1, 0x1f);
  3079. /* CCR2 (channel A)
  3080. *
  3081. * 07..06 BGR[9..8] Baud rate bits 9..8
  3082. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  3083. * 04 SSEL Clock source select, 1=submode b
  3084. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  3085. * 02 RWX Read/Write Exchange 0=disabled
  3086. * 01 Reserved, 0
  3087. * 00 DIV, data inversion 0=disabled, 1=enabled
  3088. *
  3089. * 0001 0000
  3090. */
  3091. write_reg(info, CHA + CCR2, 0x10);
  3092. /* CCR3
  3093. *
  3094. * 07..01 Reserved, 0
  3095. * 00 PSD DPLL Phase Shift Disable
  3096. *
  3097. * 0000 0000
  3098. */
  3099. write_reg(info, CHA + CCR3, 0);
  3100. /* CCR4
  3101. *
  3102. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3103. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3104. * 05 TST1 Test Pin, 0=normal operation
  3105. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3106. * 03..00 Reserved, must be 0
  3107. *
  3108. * 0101 0000
  3109. */
  3110. write_reg(info, CHA + CCR4, 0x50);
  3111. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3112. /* DAFO Data Format
  3113. *
  3114. * 07 Reserved, 0
  3115. * 06 XBRK transmit break, 0=normal operation
  3116. * 05 Stop bits (0=1, 1=2)
  3117. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3118. * 02 PAREN Parity Enable
  3119. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3120. *
  3121. */
  3122. val = 0x00;
  3123. if (info->params.data_bits != 8)
  3124. val |= BIT0; /* 7 bits */
  3125. if (info->params.stop_bits != 1)
  3126. val |= BIT5;
  3127. if (info->params.parity != ASYNC_PARITY_NONE)
  3128. {
  3129. val |= BIT2; /* Parity enable */
  3130. if (info->params.parity == ASYNC_PARITY_ODD)
  3131. val |= BIT3;
  3132. else
  3133. val |= BIT4;
  3134. }
  3135. write_reg(info, CHA + DAFO, val);
  3136. /* RFC Rx FIFO Control
  3137. *
  3138. * 07 Reserved, 0
  3139. * 06 DPS, 1=parity bit not stored in data byte
  3140. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3141. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3142. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3143. * 01 Reserved, 0
  3144. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3145. *
  3146. * 0101 1100
  3147. */
  3148. write_reg(info, CHA + RFC, 0x5c);
  3149. /* RLCR Receive length check register
  3150. *
  3151. * Max frame length = (RL + 1) * 32
  3152. */
  3153. write_reg(info, CHA + RLCR, 0);
  3154. /* XBCH Transmit Byte Count High
  3155. *
  3156. * 07 DMA mode, 0 = interrupt driven
  3157. * 06 NRM, 0=ABM (ignored)
  3158. * 05 CAS Carrier Auto Start
  3159. * 04 XC Transmit Continuously (ignored)
  3160. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3161. *
  3162. * 0000 0000
  3163. */
  3164. val = 0x00;
  3165. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3166. val |= BIT5;
  3167. write_reg(info, CHA + XBCH, val);
  3168. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3169. irq_enable(info, CHA, IRQ_CTS);
  3170. /* MODE:03 RAC Receiver Active, 1=active */
  3171. set_reg_bits(info, CHA + MODE, BIT3);
  3172. enable_auxclk(info);
  3173. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3174. irq_enable(info, CHB, IRQ_CTS);
  3175. /* PVR[3] 1=AUTO CTS active */
  3176. set_reg_bits(info, CHA + PVR, BIT3);
  3177. } else
  3178. clear_reg_bits(info, CHA + PVR, BIT3);
  3179. irq_enable(info, CHA,
  3180. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3181. IRQ_ALLSENT + IRQ_TXFIFO);
  3182. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3183. wait_command_complete(info, CHA);
  3184. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3185. }
  3186. /* Set the HDLC idle mode for the transmitter.
  3187. */
  3188. static void tx_set_idle(MGSLPC_INFO *info)
  3189. {
  3190. /* Note: ESCC2 only supports flags and one idle modes */
  3191. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3192. set_reg_bits(info, CHA + CCR1, BIT3);
  3193. else
  3194. clear_reg_bits(info, CHA + CCR1, BIT3);
  3195. }
  3196. /* get state of the V24 status (input) signals.
  3197. */
  3198. static void get_signals(MGSLPC_INFO *info)
  3199. {
  3200. unsigned char status = 0;
  3201. /* preserve DTR and RTS */
  3202. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3203. if (read_reg(info, CHB + VSTR) & BIT7)
  3204. info->serial_signals |= SerialSignal_DCD;
  3205. if (read_reg(info, CHB + STAR) & BIT1)
  3206. info->serial_signals |= SerialSignal_CTS;
  3207. status = read_reg(info, CHA + PVR);
  3208. if (!(status & PVR_RI))
  3209. info->serial_signals |= SerialSignal_RI;
  3210. if (!(status & PVR_DSR))
  3211. info->serial_signals |= SerialSignal_DSR;
  3212. }
  3213. /* Set the state of DTR and RTS based on contents of
  3214. * serial_signals member of device extension.
  3215. */
  3216. static void set_signals(MGSLPC_INFO *info)
  3217. {
  3218. unsigned char val;
  3219. val = read_reg(info, CHA + MODE);
  3220. if (info->params.mode == MGSL_MODE_ASYNC) {
  3221. if (info->serial_signals & SerialSignal_RTS)
  3222. val &= ~BIT6;
  3223. else
  3224. val |= BIT6;
  3225. } else {
  3226. if (info->serial_signals & SerialSignal_RTS)
  3227. val |= BIT2;
  3228. else
  3229. val &= ~BIT2;
  3230. }
  3231. write_reg(info, CHA + MODE, val);
  3232. if (info->serial_signals & SerialSignal_DTR)
  3233. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3234. else
  3235. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3236. }
  3237. static void rx_reset_buffers(MGSLPC_INFO *info)
  3238. {
  3239. RXBUF *buf;
  3240. int i;
  3241. info->rx_put = 0;
  3242. info->rx_get = 0;
  3243. info->rx_frame_count = 0;
  3244. for (i=0 ; i < info->rx_buf_count ; i++) {
  3245. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3246. buf->status = buf->count = 0;
  3247. }
  3248. }
  3249. /* Attempt to return a received HDLC frame
  3250. * Only frames received without errors are returned.
  3251. *
  3252. * Returns true if frame returned, otherwise false
  3253. */
  3254. static bool rx_get_frame(MGSLPC_INFO *info)
  3255. {
  3256. unsigned short status;
  3257. RXBUF *buf;
  3258. unsigned int framesize = 0;
  3259. unsigned long flags;
  3260. struct tty_struct *tty = info->tty;
  3261. bool return_frame = false;
  3262. if (info->rx_frame_count == 0)
  3263. return false;
  3264. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3265. status = buf->status;
  3266. /* 07 VFR 1=valid frame
  3267. * 06 RDO 1=data overrun
  3268. * 05 CRC 1=OK, 0=error
  3269. * 04 RAB 1=frame aborted
  3270. */
  3271. if ((status & 0xf0) != 0xA0) {
  3272. if (!(status & BIT7) || (status & BIT4))
  3273. info->icount.rxabort++;
  3274. else if (status & BIT6)
  3275. info->icount.rxover++;
  3276. else if (!(status & BIT5)) {
  3277. info->icount.rxcrc++;
  3278. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3279. return_frame = true;
  3280. }
  3281. framesize = 0;
  3282. #if SYNCLINK_GENERIC_HDLC
  3283. {
  3284. info->netdev->stats.rx_errors++;
  3285. info->netdev->stats.rx_frame_errors++;
  3286. }
  3287. #endif
  3288. } else
  3289. return_frame = true;
  3290. if (return_frame)
  3291. framesize = buf->count;
  3292. if (debug_level >= DEBUG_LEVEL_BH)
  3293. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3294. __FILE__,__LINE__,info->device_name,status,framesize);
  3295. if (debug_level >= DEBUG_LEVEL_DATA)
  3296. trace_block(info, buf->data, framesize, 0);
  3297. if (framesize) {
  3298. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3299. framesize+1 > info->max_frame_size) ||
  3300. framesize > info->max_frame_size)
  3301. info->icount.rxlong++;
  3302. else {
  3303. if (status & BIT5)
  3304. info->icount.rxok++;
  3305. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3306. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3307. ++framesize;
  3308. }
  3309. #if SYNCLINK_GENERIC_HDLC
  3310. if (info->netcount)
  3311. hdlcdev_rx(info, buf->data, framesize);
  3312. else
  3313. #endif
  3314. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3315. }
  3316. }
  3317. spin_lock_irqsave(&info->lock,flags);
  3318. buf->status = buf->count = 0;
  3319. info->rx_frame_count--;
  3320. info->rx_get++;
  3321. if (info->rx_get >= info->rx_buf_count)
  3322. info->rx_get = 0;
  3323. spin_unlock_irqrestore(&info->lock,flags);
  3324. return true;
  3325. }
  3326. static bool register_test(MGSLPC_INFO *info)
  3327. {
  3328. static unsigned char patterns[] =
  3329. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3330. static unsigned int count = ARRAY_SIZE(patterns);
  3331. unsigned int i;
  3332. bool rc = true;
  3333. unsigned long flags;
  3334. spin_lock_irqsave(&info->lock,flags);
  3335. reset_device(info);
  3336. for (i = 0; i < count; i++) {
  3337. write_reg(info, XAD1, patterns[i]);
  3338. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3339. if ((read_reg(info, XAD1) != patterns[i]) ||
  3340. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3341. rc = false;
  3342. break;
  3343. }
  3344. }
  3345. spin_unlock_irqrestore(&info->lock,flags);
  3346. return rc;
  3347. }
  3348. static bool irq_test(MGSLPC_INFO *info)
  3349. {
  3350. unsigned long end_time;
  3351. unsigned long flags;
  3352. spin_lock_irqsave(&info->lock,flags);
  3353. reset_device(info);
  3354. info->testing_irq = true;
  3355. hdlc_mode(info);
  3356. info->irq_occurred = false;
  3357. /* init hdlc mode */
  3358. irq_enable(info, CHA, IRQ_TIMER);
  3359. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3360. issue_command(info, CHA, CMD_START_TIMER);
  3361. spin_unlock_irqrestore(&info->lock,flags);
  3362. end_time=100;
  3363. while(end_time-- && !info->irq_occurred) {
  3364. msleep_interruptible(10);
  3365. }
  3366. info->testing_irq = false;
  3367. spin_lock_irqsave(&info->lock,flags);
  3368. reset_device(info);
  3369. spin_unlock_irqrestore(&info->lock,flags);
  3370. return info->irq_occurred;
  3371. }
  3372. static int adapter_test(MGSLPC_INFO *info)
  3373. {
  3374. if (!register_test(info)) {
  3375. info->init_error = DiagStatus_AddressFailure;
  3376. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3377. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3378. return -ENODEV;
  3379. }
  3380. if (!irq_test(info)) {
  3381. info->init_error = DiagStatus_IrqFailure;
  3382. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3383. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3384. return -ENODEV;
  3385. }
  3386. if (debug_level >= DEBUG_LEVEL_INFO)
  3387. printk("%s(%d):device %s passed diagnostics\n",
  3388. __FILE__,__LINE__,info->device_name);
  3389. return 0;
  3390. }
  3391. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3392. {
  3393. int i;
  3394. int linecount;
  3395. if (xmit)
  3396. printk("%s tx data:\n",info->device_name);
  3397. else
  3398. printk("%s rx data:\n",info->device_name);
  3399. while(count) {
  3400. if (count > 16)
  3401. linecount = 16;
  3402. else
  3403. linecount = count;
  3404. for(i=0;i<linecount;i++)
  3405. printk("%02X ",(unsigned char)data[i]);
  3406. for(;i<17;i++)
  3407. printk(" ");
  3408. for(i=0;i<linecount;i++) {
  3409. if (data[i]>=040 && data[i]<=0176)
  3410. printk("%c",data[i]);
  3411. else
  3412. printk(".");
  3413. }
  3414. printk("\n");
  3415. data += linecount;
  3416. count -= linecount;
  3417. }
  3418. }
  3419. /* HDLC frame time out
  3420. * update stats and do tx completion processing
  3421. */
  3422. static void tx_timeout(unsigned long context)
  3423. {
  3424. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3425. unsigned long flags;
  3426. if ( debug_level >= DEBUG_LEVEL_INFO )
  3427. printk( "%s(%d):tx_timeout(%s)\n",
  3428. __FILE__,__LINE__,info->device_name);
  3429. if(info->tx_active &&
  3430. info->params.mode == MGSL_MODE_HDLC) {
  3431. info->icount.txtimeout++;
  3432. }
  3433. spin_lock_irqsave(&info->lock,flags);
  3434. info->tx_active = false;
  3435. info->tx_count = info->tx_put = info->tx_get = 0;
  3436. spin_unlock_irqrestore(&info->lock,flags);
  3437. #if SYNCLINK_GENERIC_HDLC
  3438. if (info->netcount)
  3439. hdlcdev_tx_done(info);
  3440. else
  3441. #endif
  3442. bh_transmit(info);
  3443. }
  3444. #if SYNCLINK_GENERIC_HDLC
  3445. /**
  3446. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3447. * set encoding and frame check sequence (FCS) options
  3448. *
  3449. * dev pointer to network device structure
  3450. * encoding serial encoding setting
  3451. * parity FCS setting
  3452. *
  3453. * returns 0 if success, otherwise error code
  3454. */
  3455. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3456. unsigned short parity)
  3457. {
  3458. MGSLPC_INFO *info = dev_to_port(dev);
  3459. unsigned char new_encoding;
  3460. unsigned short new_crctype;
  3461. /* return error if TTY interface open */
  3462. if (info->count)
  3463. return -EBUSY;
  3464. switch (encoding)
  3465. {
  3466. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3467. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3468. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3469. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3470. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3471. default: return -EINVAL;
  3472. }
  3473. switch (parity)
  3474. {
  3475. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3476. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3477. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3478. default: return -EINVAL;
  3479. }
  3480. info->params.encoding = new_encoding;
  3481. info->params.crc_type = new_crctype;
  3482. /* if network interface up, reprogram hardware */
  3483. if (info->netcount)
  3484. mgslpc_program_hw(info);
  3485. return 0;
  3486. }
  3487. /**
  3488. * called by generic HDLC layer to send frame
  3489. *
  3490. * skb socket buffer containing HDLC frame
  3491. * dev pointer to network device structure
  3492. *
  3493. * returns 0 if success, otherwise error code
  3494. */
  3495. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3496. {
  3497. MGSLPC_INFO *info = dev_to_port(dev);
  3498. unsigned long flags;
  3499. if (debug_level >= DEBUG_LEVEL_INFO)
  3500. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3501. /* stop sending until this frame completes */
  3502. netif_stop_queue(dev);
  3503. /* copy data to device buffers */
  3504. skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
  3505. info->tx_get = 0;
  3506. info->tx_put = info->tx_count = skb->len;
  3507. /* update network statistics */
  3508. dev->stats.tx_packets++;
  3509. dev->stats.tx_bytes += skb->len;
  3510. /* done with socket buffer, so free it */
  3511. dev_kfree_skb(skb);
  3512. /* save start time for transmit timeout detection */
  3513. dev->trans_start = jiffies;
  3514. /* start hardware transmitter if necessary */
  3515. spin_lock_irqsave(&info->lock,flags);
  3516. if (!info->tx_active)
  3517. tx_start(info);
  3518. spin_unlock_irqrestore(&info->lock,flags);
  3519. return 0;
  3520. }
  3521. /**
  3522. * called by network layer when interface enabled
  3523. * claim resources and initialize hardware
  3524. *
  3525. * dev pointer to network device structure
  3526. *
  3527. * returns 0 if success, otherwise error code
  3528. */
  3529. static int hdlcdev_open(struct net_device *dev)
  3530. {
  3531. MGSLPC_INFO *info = dev_to_port(dev);
  3532. int rc;
  3533. unsigned long flags;
  3534. if (debug_level >= DEBUG_LEVEL_INFO)
  3535. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3536. /* generic HDLC layer open processing */
  3537. if ((rc = hdlc_open(dev)))
  3538. return rc;
  3539. /* arbitrate between network and tty opens */
  3540. spin_lock_irqsave(&info->netlock, flags);
  3541. if (info->count != 0 || info->netcount != 0) {
  3542. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3543. spin_unlock_irqrestore(&info->netlock, flags);
  3544. return -EBUSY;
  3545. }
  3546. info->netcount=1;
  3547. spin_unlock_irqrestore(&info->netlock, flags);
  3548. /* claim resources and init adapter */
  3549. if ((rc = startup(info)) != 0) {
  3550. spin_lock_irqsave(&info->netlock, flags);
  3551. info->netcount=0;
  3552. spin_unlock_irqrestore(&info->netlock, flags);
  3553. return rc;
  3554. }
  3555. /* assert DTR and RTS, apply hardware settings */
  3556. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3557. mgslpc_program_hw(info);
  3558. /* enable network layer transmit */
  3559. dev->trans_start = jiffies;
  3560. netif_start_queue(dev);
  3561. /* inform generic HDLC layer of current DCD status */
  3562. spin_lock_irqsave(&info->lock, flags);
  3563. get_signals(info);
  3564. spin_unlock_irqrestore(&info->lock, flags);
  3565. if (info->serial_signals & SerialSignal_DCD)
  3566. netif_carrier_on(dev);
  3567. else
  3568. netif_carrier_off(dev);
  3569. return 0;
  3570. }
  3571. /**
  3572. * called by network layer when interface is disabled
  3573. * shutdown hardware and release resources
  3574. *
  3575. * dev pointer to network device structure
  3576. *
  3577. * returns 0 if success, otherwise error code
  3578. */
  3579. static int hdlcdev_close(struct net_device *dev)
  3580. {
  3581. MGSLPC_INFO *info = dev_to_port(dev);
  3582. unsigned long flags;
  3583. if (debug_level >= DEBUG_LEVEL_INFO)
  3584. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3585. netif_stop_queue(dev);
  3586. /* shutdown adapter and release resources */
  3587. shutdown(info);
  3588. hdlc_close(dev);
  3589. spin_lock_irqsave(&info->netlock, flags);
  3590. info->netcount=0;
  3591. spin_unlock_irqrestore(&info->netlock, flags);
  3592. return 0;
  3593. }
  3594. /**
  3595. * called by network layer to process IOCTL call to network device
  3596. *
  3597. * dev pointer to network device structure
  3598. * ifr pointer to network interface request structure
  3599. * cmd IOCTL command code
  3600. *
  3601. * returns 0 if success, otherwise error code
  3602. */
  3603. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3604. {
  3605. const size_t size = sizeof(sync_serial_settings);
  3606. sync_serial_settings new_line;
  3607. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3608. MGSLPC_INFO *info = dev_to_port(dev);
  3609. unsigned int flags;
  3610. if (debug_level >= DEBUG_LEVEL_INFO)
  3611. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3612. /* return error if TTY interface open */
  3613. if (info->count)
  3614. return -EBUSY;
  3615. if (cmd != SIOCWANDEV)
  3616. return hdlc_ioctl(dev, ifr, cmd);
  3617. switch(ifr->ifr_settings.type) {
  3618. case IF_GET_IFACE: /* return current sync_serial_settings */
  3619. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3620. if (ifr->ifr_settings.size < size) {
  3621. ifr->ifr_settings.size = size; /* data size wanted */
  3622. return -ENOBUFS;
  3623. }
  3624. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3625. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3626. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3627. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3628. switch (flags){
  3629. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3630. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3631. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3632. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3633. default: new_line.clock_type = CLOCK_DEFAULT;
  3634. }
  3635. new_line.clock_rate = info->params.clock_speed;
  3636. new_line.loopback = info->params.loopback ? 1:0;
  3637. if (copy_to_user(line, &new_line, size))
  3638. return -EFAULT;
  3639. return 0;
  3640. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3641. if(!capable(CAP_NET_ADMIN))
  3642. return -EPERM;
  3643. if (copy_from_user(&new_line, line, size))
  3644. return -EFAULT;
  3645. switch (new_line.clock_type)
  3646. {
  3647. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3648. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3649. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3650. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3651. case CLOCK_DEFAULT: flags = info->params.flags &
  3652. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3653. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3654. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3655. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3656. default: return -EINVAL;
  3657. }
  3658. if (new_line.loopback != 0 && new_line.loopback != 1)
  3659. return -EINVAL;
  3660. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3661. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3662. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3663. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3664. info->params.flags |= flags;
  3665. info->params.loopback = new_line.loopback;
  3666. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3667. info->params.clock_speed = new_line.clock_rate;
  3668. else
  3669. info->params.clock_speed = 0;
  3670. /* if network interface up, reprogram hardware */
  3671. if (info->netcount)
  3672. mgslpc_program_hw(info);
  3673. return 0;
  3674. default:
  3675. return hdlc_ioctl(dev, ifr, cmd);
  3676. }
  3677. }
  3678. /**
  3679. * called by network layer when transmit timeout is detected
  3680. *
  3681. * dev pointer to network device structure
  3682. */
  3683. static void hdlcdev_tx_timeout(struct net_device *dev)
  3684. {
  3685. MGSLPC_INFO *info = dev_to_port(dev);
  3686. unsigned long flags;
  3687. if (debug_level >= DEBUG_LEVEL_INFO)
  3688. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3689. dev->stats.tx_errors++;
  3690. dev->stats.tx_aborted_errors++;
  3691. spin_lock_irqsave(&info->lock,flags);
  3692. tx_stop(info);
  3693. spin_unlock_irqrestore(&info->lock,flags);
  3694. netif_wake_queue(dev);
  3695. }
  3696. /**
  3697. * called by device driver when transmit completes
  3698. * reenable network layer transmit if stopped
  3699. *
  3700. * info pointer to device instance information
  3701. */
  3702. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3703. {
  3704. if (netif_queue_stopped(info->netdev))
  3705. netif_wake_queue(info->netdev);
  3706. }
  3707. /**
  3708. * called by device driver when frame received
  3709. * pass frame to network layer
  3710. *
  3711. * info pointer to device instance information
  3712. * buf pointer to buffer contianing frame data
  3713. * size count of data bytes in buf
  3714. */
  3715. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3716. {
  3717. struct sk_buff *skb = dev_alloc_skb(size);
  3718. struct net_device *dev = info->netdev;
  3719. if (debug_level >= DEBUG_LEVEL_INFO)
  3720. printk("hdlcdev_rx(%s)\n",dev->name);
  3721. if (skb == NULL) {
  3722. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3723. dev->stats.rx_dropped++;
  3724. return;
  3725. }
  3726. memcpy(skb_put(skb, size), buf, size);
  3727. skb->protocol = hdlc_type_trans(skb, dev);
  3728. dev->stats.rx_packets++;
  3729. dev->stats.rx_bytes += size;
  3730. netif_rx(skb);
  3731. dev->last_rx = jiffies;
  3732. }
  3733. /**
  3734. * called by device driver when adding device instance
  3735. * do generic HDLC initialization
  3736. *
  3737. * info pointer to device instance information
  3738. *
  3739. * returns 0 if success, otherwise error code
  3740. */
  3741. static int hdlcdev_init(MGSLPC_INFO *info)
  3742. {
  3743. int rc;
  3744. struct net_device *dev;
  3745. hdlc_device *hdlc;
  3746. /* allocate and initialize network and HDLC layer objects */
  3747. if (!(dev = alloc_hdlcdev(info))) {
  3748. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3749. return -ENOMEM;
  3750. }
  3751. /* for network layer reporting purposes only */
  3752. dev->base_addr = info->io_base;
  3753. dev->irq = info->irq_level;
  3754. /* network layer callbacks and settings */
  3755. dev->do_ioctl = hdlcdev_ioctl;
  3756. dev->open = hdlcdev_open;
  3757. dev->stop = hdlcdev_close;
  3758. dev->tx_timeout = hdlcdev_tx_timeout;
  3759. dev->watchdog_timeo = 10*HZ;
  3760. dev->tx_queue_len = 50;
  3761. /* generic HDLC layer callbacks and settings */
  3762. hdlc = dev_to_hdlc(dev);
  3763. hdlc->attach = hdlcdev_attach;
  3764. hdlc->xmit = hdlcdev_xmit;
  3765. /* register objects with HDLC layer */
  3766. if ((rc = register_hdlc_device(dev))) {
  3767. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3768. free_netdev(dev);
  3769. return rc;
  3770. }
  3771. info->netdev = dev;
  3772. return 0;
  3773. }
  3774. /**
  3775. * called by device driver when removing device instance
  3776. * do generic HDLC cleanup
  3777. *
  3778. * info pointer to device instance information
  3779. */
  3780. static void hdlcdev_exit(MGSLPC_INFO *info)
  3781. {
  3782. unregister_hdlc_device(info->netdev);
  3783. free_netdev(info->netdev);
  3784. info->netdev = NULL;
  3785. }
  3786. #endif /* CONFIG_HDLC */