mxser.c 72 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
  5. * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
  6. *
  7. * This code is loosely based on the 1.8 moxa driver which is based on
  8. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  9. * others.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  17. * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
  18. * www.moxa.com.
  19. * - Fixed x86_64 cleanness
  20. */
  21. #include <linux/module.h>
  22. #include <linux/errno.h>
  23. #include <linux/signal.h>
  24. #include <linux/sched.h>
  25. #include <linux/timer.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/tty.h>
  28. #include <linux/tty_flip.h>
  29. #include <linux/serial.h>
  30. #include <linux/serial_reg.h>
  31. #include <linux/major.h>
  32. #include <linux/string.h>
  33. #include <linux/fcntl.h>
  34. #include <linux/ptrace.h>
  35. #include <linux/gfp.h>
  36. #include <linux/ioport.h>
  37. #include <linux/mm.h>
  38. #include <linux/delay.h>
  39. #include <linux/pci.h>
  40. #include <linux/bitops.h>
  41. #include <asm/system.h>
  42. #include <asm/io.h>
  43. #include <asm/irq.h>
  44. #include <asm/uaccess.h>
  45. #include "mxser.h"
  46. #define MXSER_VERSION "2.0.4" /* 1.12 */
  47. #define MXSERMAJOR 174
  48. #define MXSER_BOARDS 4 /* Max. boards */
  49. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  50. #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
  51. #define MXSER_ISR_PASS_LIMIT 100
  52. /*CheckIsMoxaMust return value*/
  53. #define MOXA_OTHER_UART 0x00
  54. #define MOXA_MUST_MU150_HWID 0x01
  55. #define MOXA_MUST_MU860_HWID 0x02
  56. #define WAKEUP_CHARS 256
  57. #define UART_MCR_AFE 0x20
  58. #define UART_LSR_SPECIAL 0x1E
  59. #define PCI_DEVICE_ID_POS104UL 0x1044
  60. #define PCI_DEVICE_ID_CB108 0x1080
  61. #define PCI_DEVICE_ID_CP102UF 0x1023
  62. #define PCI_DEVICE_ID_CB114 0x1142
  63. #define PCI_DEVICE_ID_CP114UL 0x1143
  64. #define PCI_DEVICE_ID_CB134I 0x1341
  65. #define PCI_DEVICE_ID_CP138U 0x1380
  66. #define C168_ASIC_ID 1
  67. #define C104_ASIC_ID 2
  68. #define C102_ASIC_ID 0xB
  69. #define CI132_ASIC_ID 4
  70. #define CI134_ASIC_ID 3
  71. #define CI104J_ASIC_ID 5
  72. #define MXSER_HIGHBAUD 1
  73. #define MXSER_HAS2 2
  74. /* This is only for PCI */
  75. static const struct {
  76. int type;
  77. int tx_fifo;
  78. int rx_fifo;
  79. int xmit_fifo_size;
  80. int rx_high_water;
  81. int rx_trigger;
  82. int rx_low_water;
  83. long max_baud;
  84. } Gpci_uart_info[] = {
  85. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  86. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  87. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  88. };
  89. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  90. struct mxser_cardinfo {
  91. char *name;
  92. unsigned int nports;
  93. unsigned int flags;
  94. };
  95. static const struct mxser_cardinfo mxser_cards[] = {
  96. /* 0*/ { "C168 series", 8, },
  97. { "C104 series", 4, },
  98. { "CI-104J series", 4, },
  99. { "C168H/PCI series", 8, },
  100. { "C104H/PCI series", 4, },
  101. /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
  102. { "CI-132 series", 4, MXSER_HAS2 },
  103. { "CI-134 series", 4, },
  104. { "CP-132 series", 2, },
  105. { "CP-114 series", 4, },
  106. /*10*/ { "CT-114 series", 4, },
  107. { "CP-102 series", 2, MXSER_HIGHBAUD },
  108. { "CP-104U series", 4, },
  109. { "CP-168U series", 8, },
  110. { "CP-132U series", 2, },
  111. /*15*/ { "CP-134U series", 4, },
  112. { "CP-104JU series", 4, },
  113. { "Moxa UC7000 Serial", 8, }, /* RC7000 */
  114. { "CP-118U series", 8, },
  115. { "CP-102UL series", 2, },
  116. /*20*/ { "CP-102U series", 2, },
  117. { "CP-118EL series", 8, },
  118. { "CP-168EL series", 8, },
  119. { "CP-104EL series", 4, },
  120. { "CB-108 series", 8, },
  121. /*25*/ { "CB-114 series", 4, },
  122. { "CB-134I series", 4, },
  123. { "CP-138U series", 8, },
  124. { "POS-104UL series", 4, },
  125. { "CP-114UL series", 4, },
  126. /*30*/ { "CP-102UF series", 2, }
  127. };
  128. /* driver_data correspond to the lines in the structure above
  129. see also ISA probe function before you change something */
  130. static struct pci_device_id mxser_pcibrds[] = {
  131. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
  132. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
  133. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
  134. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
  135. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
  136. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
  137. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
  138. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
  139. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
  140. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
  141. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
  142. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
  143. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
  144. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
  145. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
  146. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
  147. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
  148. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
  149. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
  150. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
  151. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
  152. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
  153. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
  154. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
  155. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
  156. { }
  157. };
  158. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  159. static unsigned long ioaddr[MXSER_BOARDS];
  160. static int ttymajor = MXSERMAJOR;
  161. /* Variables for insmod */
  162. MODULE_AUTHOR("Casper Yang");
  163. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  164. module_param_array(ioaddr, ulong, NULL, 0);
  165. MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
  166. module_param(ttymajor, int, 0);
  167. MODULE_LICENSE("GPL");
  168. struct mxser_log {
  169. int tick;
  170. unsigned long rxcnt[MXSER_PORTS];
  171. unsigned long txcnt[MXSER_PORTS];
  172. };
  173. struct mxser_mon {
  174. unsigned long rxcnt;
  175. unsigned long txcnt;
  176. unsigned long up_rxcnt;
  177. unsigned long up_txcnt;
  178. int modem_status;
  179. unsigned char hold_reason;
  180. };
  181. struct mxser_mon_ext {
  182. unsigned long rx_cnt[32];
  183. unsigned long tx_cnt[32];
  184. unsigned long up_rxcnt[32];
  185. unsigned long up_txcnt[32];
  186. int modem_status[32];
  187. long baudrate[32];
  188. int databits[32];
  189. int stopbits[32];
  190. int parity[32];
  191. int flowctrl[32];
  192. int fifo[32];
  193. int iftype[32];
  194. };
  195. struct mxser_board;
  196. struct mxser_port {
  197. struct tty_port port;
  198. struct mxser_board *board;
  199. unsigned long ioaddr;
  200. unsigned long opmode_ioaddr;
  201. int max_baud;
  202. int rx_high_water;
  203. int rx_trigger; /* Rx fifo trigger level */
  204. int rx_low_water;
  205. int baud_base; /* max. speed */
  206. int type; /* UART type */
  207. int x_char; /* xon/xoff character */
  208. int IER; /* Interrupt Enable Register */
  209. int MCR; /* Modem control register */
  210. unsigned char stop_rx;
  211. unsigned char ldisc_stop_rx;
  212. int custom_divisor;
  213. unsigned char err_shadow;
  214. struct async_icount icount; /* kernel counters for 4 input interrupts */
  215. int timeout;
  216. int read_status_mask;
  217. int ignore_status_mask;
  218. int xmit_fifo_size;
  219. int xmit_head;
  220. int xmit_tail;
  221. int xmit_cnt;
  222. struct ktermios normal_termios;
  223. struct mxser_mon mon_data;
  224. spinlock_t slock;
  225. wait_queue_head_t delta_msr_wait;
  226. };
  227. struct mxser_board {
  228. unsigned int idx;
  229. int irq;
  230. const struct mxser_cardinfo *info;
  231. unsigned long vector;
  232. unsigned long vector_mask;
  233. int chip_flag;
  234. int uart_type;
  235. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  236. };
  237. struct mxser_mstatus {
  238. tcflag_t cflag;
  239. int cts;
  240. int dsr;
  241. int ri;
  242. int dcd;
  243. };
  244. static struct mxser_board mxser_boards[MXSER_BOARDS];
  245. static struct tty_driver *mxvar_sdriver;
  246. static struct mxser_log mxvar_log;
  247. static int mxser_set_baud_method[MXSER_PORTS + 1];
  248. static void mxser_enable_must_enchance_mode(unsigned long baseio)
  249. {
  250. u8 oldlcr;
  251. u8 efr;
  252. oldlcr = inb(baseio + UART_LCR);
  253. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  254. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  255. efr |= MOXA_MUST_EFR_EFRB_ENABLE;
  256. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  257. outb(oldlcr, baseio + UART_LCR);
  258. }
  259. static void mxser_disable_must_enchance_mode(unsigned long baseio)
  260. {
  261. u8 oldlcr;
  262. u8 efr;
  263. oldlcr = inb(baseio + UART_LCR);
  264. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  265. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  266. efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
  267. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  268. outb(oldlcr, baseio + UART_LCR);
  269. }
  270. static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
  271. {
  272. u8 oldlcr;
  273. u8 efr;
  274. oldlcr = inb(baseio + UART_LCR);
  275. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  276. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  277. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  278. efr |= MOXA_MUST_EFR_BANK0;
  279. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  280. outb(value, baseio + MOXA_MUST_XON1_REGISTER);
  281. outb(oldlcr, baseio + UART_LCR);
  282. }
  283. static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
  284. {
  285. u8 oldlcr;
  286. u8 efr;
  287. oldlcr = inb(baseio + UART_LCR);
  288. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  289. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  290. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  291. efr |= MOXA_MUST_EFR_BANK0;
  292. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  293. outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
  294. outb(oldlcr, baseio + UART_LCR);
  295. }
  296. static void mxser_set_must_fifo_value(struct mxser_port *info)
  297. {
  298. u8 oldlcr;
  299. u8 efr;
  300. oldlcr = inb(info->ioaddr + UART_LCR);
  301. outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
  302. efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
  303. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  304. efr |= MOXA_MUST_EFR_BANK1;
  305. outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
  306. outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
  307. outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
  308. outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
  309. outb(oldlcr, info->ioaddr + UART_LCR);
  310. }
  311. static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
  312. {
  313. u8 oldlcr;
  314. u8 efr;
  315. oldlcr = inb(baseio + UART_LCR);
  316. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  317. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  318. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  319. efr |= MOXA_MUST_EFR_BANK2;
  320. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  321. outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
  322. outb(oldlcr, baseio + UART_LCR);
  323. }
  324. static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
  325. {
  326. u8 oldlcr;
  327. u8 efr;
  328. oldlcr = inb(baseio + UART_LCR);
  329. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  330. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  331. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  332. efr |= MOXA_MUST_EFR_BANK2;
  333. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  334. *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
  335. outb(oldlcr, baseio + UART_LCR);
  336. }
  337. static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
  338. {
  339. u8 oldlcr;
  340. u8 efr;
  341. oldlcr = inb(baseio + UART_LCR);
  342. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  343. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  344. efr &= ~MOXA_MUST_EFR_SF_MASK;
  345. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  346. outb(oldlcr, baseio + UART_LCR);
  347. }
  348. static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
  349. {
  350. u8 oldlcr;
  351. u8 efr;
  352. oldlcr = inb(baseio + UART_LCR);
  353. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  354. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  355. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  356. efr |= MOXA_MUST_EFR_SF_TX1;
  357. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  358. outb(oldlcr, baseio + UART_LCR);
  359. }
  360. static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
  361. {
  362. u8 oldlcr;
  363. u8 efr;
  364. oldlcr = inb(baseio + UART_LCR);
  365. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  366. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  367. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  368. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  369. outb(oldlcr, baseio + UART_LCR);
  370. }
  371. static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
  372. {
  373. u8 oldlcr;
  374. u8 efr;
  375. oldlcr = inb(baseio + UART_LCR);
  376. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  377. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  378. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  379. efr |= MOXA_MUST_EFR_SF_RX1;
  380. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  381. outb(oldlcr, baseio + UART_LCR);
  382. }
  383. static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
  384. {
  385. u8 oldlcr;
  386. u8 efr;
  387. oldlcr = inb(baseio + UART_LCR);
  388. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  389. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  390. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  391. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  392. outb(oldlcr, baseio + UART_LCR);
  393. }
  394. #ifdef CONFIG_PCI
  395. static int __devinit CheckIsMoxaMust(unsigned long io)
  396. {
  397. u8 oldmcr, hwid;
  398. int i;
  399. outb(0, io + UART_LCR);
  400. mxser_disable_must_enchance_mode(io);
  401. oldmcr = inb(io + UART_MCR);
  402. outb(0, io + UART_MCR);
  403. mxser_set_must_xon1_value(io, 0x11);
  404. if ((hwid = inb(io + UART_MCR)) != 0) {
  405. outb(oldmcr, io + UART_MCR);
  406. return MOXA_OTHER_UART;
  407. }
  408. mxser_get_must_hardware_id(io, &hwid);
  409. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  410. if (hwid == Gpci_uart_info[i].type)
  411. return (int)hwid;
  412. }
  413. return MOXA_OTHER_UART;
  414. }
  415. #endif
  416. static void process_txrx_fifo(struct mxser_port *info)
  417. {
  418. int i;
  419. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  420. info->rx_trigger = 1;
  421. info->rx_high_water = 1;
  422. info->rx_low_water = 1;
  423. info->xmit_fifo_size = 1;
  424. } else
  425. for (i = 0; i < UART_INFO_NUM; i++)
  426. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  427. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  428. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  429. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  430. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  431. break;
  432. }
  433. }
  434. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  435. {
  436. static unsigned char mxser_msr[MXSER_PORTS + 1];
  437. unsigned char status = 0;
  438. status = inb(baseaddr + UART_MSR);
  439. mxser_msr[port] &= 0x0F;
  440. mxser_msr[port] |= status;
  441. status = mxser_msr[port];
  442. if (mode)
  443. mxser_msr[port] = 0;
  444. return status;
  445. }
  446. static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
  447. struct mxser_port *port)
  448. {
  449. DECLARE_WAITQUEUE(wait, current);
  450. int retval;
  451. int do_clocal = 0;
  452. unsigned long flags;
  453. /*
  454. * If non-blocking mode is set, or the port is not enabled,
  455. * then make the check up front and then exit.
  456. */
  457. if ((filp->f_flags & O_NONBLOCK) ||
  458. test_bit(TTY_IO_ERROR, &tty->flags)) {
  459. port->port.flags |= ASYNC_NORMAL_ACTIVE;
  460. return 0;
  461. }
  462. if (tty->termios->c_cflag & CLOCAL)
  463. do_clocal = 1;
  464. /*
  465. * Block waiting for the carrier detect and the line to become
  466. * free (i.e., not in use by the callout). While we are in
  467. * this loop, port->port.count is dropped by one, so that
  468. * mxser_close() knows when to free things. We restore it upon
  469. * exit, either normal or abnormal.
  470. */
  471. retval = 0;
  472. add_wait_queue(&port->port.open_wait, &wait);
  473. spin_lock_irqsave(&port->slock, flags);
  474. if (!tty_hung_up_p(filp))
  475. port->port.count--;
  476. spin_unlock_irqrestore(&port->slock, flags);
  477. port->port.blocked_open++;
  478. while (1) {
  479. spin_lock_irqsave(&port->slock, flags);
  480. outb(inb(port->ioaddr + UART_MCR) |
  481. UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
  482. spin_unlock_irqrestore(&port->slock, flags);
  483. set_current_state(TASK_INTERRUPTIBLE);
  484. if (tty_hung_up_p(filp) || !(port->port.flags & ASYNC_INITIALIZED)) {
  485. if (port->port.flags & ASYNC_HUP_NOTIFY)
  486. retval = -EAGAIN;
  487. else
  488. retval = -ERESTARTSYS;
  489. break;
  490. }
  491. if (!(port->port.flags & ASYNC_CLOSING) &&
  492. (do_clocal ||
  493. (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
  494. break;
  495. if (signal_pending(current)) {
  496. retval = -ERESTARTSYS;
  497. break;
  498. }
  499. schedule();
  500. }
  501. set_current_state(TASK_RUNNING);
  502. remove_wait_queue(&port->port.open_wait, &wait);
  503. if (!tty_hung_up_p(filp))
  504. port->port.count++;
  505. port->port.blocked_open--;
  506. if (retval)
  507. return retval;
  508. port->port.flags |= ASYNC_NORMAL_ACTIVE;
  509. return 0;
  510. }
  511. static int mxser_set_baud(struct tty_struct *tty, long newspd)
  512. {
  513. struct mxser_port *info = tty->driver_data;
  514. int quot = 0, baud;
  515. unsigned char cval;
  516. if (!info->ioaddr)
  517. return -1;
  518. if (newspd > info->max_baud)
  519. return -1;
  520. if (newspd == 134) {
  521. quot = 2 * info->baud_base / 269;
  522. tty_encode_baud_rate(tty, 134, 134);
  523. } else if (newspd) {
  524. quot = info->baud_base / newspd;
  525. if (quot == 0)
  526. quot = 1;
  527. baud = info->baud_base/quot;
  528. tty_encode_baud_rate(tty, baud, baud);
  529. } else {
  530. quot = 0;
  531. }
  532. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  533. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  534. if (quot) {
  535. info->MCR |= UART_MCR_DTR;
  536. outb(info->MCR, info->ioaddr + UART_MCR);
  537. } else {
  538. info->MCR &= ~UART_MCR_DTR;
  539. outb(info->MCR, info->ioaddr + UART_MCR);
  540. return 0;
  541. }
  542. cval = inb(info->ioaddr + UART_LCR);
  543. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  544. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  545. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  546. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  547. #ifdef BOTHER
  548. if (C_BAUD(tty) == BOTHER) {
  549. quot = info->baud_base % newspd;
  550. quot *= 8;
  551. if (quot % newspd > newspd / 2) {
  552. quot /= newspd;
  553. quot++;
  554. } else
  555. quot /= newspd;
  556. mxser_set_must_enum_value(info->ioaddr, quot);
  557. } else
  558. #endif
  559. mxser_set_must_enum_value(info->ioaddr, 0);
  560. return 0;
  561. }
  562. /*
  563. * This routine is called to set the UART divisor registers to match
  564. * the specified baud rate for a serial port.
  565. */
  566. static int mxser_change_speed(struct tty_struct *tty,
  567. struct ktermios *old_termios)
  568. {
  569. struct mxser_port *info = tty->driver_data;
  570. unsigned cflag, cval, fcr;
  571. int ret = 0;
  572. unsigned char status;
  573. cflag = tty->termios->c_cflag;
  574. if (!info->ioaddr)
  575. return ret;
  576. if (mxser_set_baud_method[tty->index] == 0)
  577. mxser_set_baud(tty, tty_get_baud_rate(tty));
  578. /* byte size and parity */
  579. switch (cflag & CSIZE) {
  580. case CS5:
  581. cval = 0x00;
  582. break;
  583. case CS6:
  584. cval = 0x01;
  585. break;
  586. case CS7:
  587. cval = 0x02;
  588. break;
  589. case CS8:
  590. cval = 0x03;
  591. break;
  592. default:
  593. cval = 0x00;
  594. break; /* too keep GCC shut... */
  595. }
  596. if (cflag & CSTOPB)
  597. cval |= 0x04;
  598. if (cflag & PARENB)
  599. cval |= UART_LCR_PARITY;
  600. if (!(cflag & PARODD))
  601. cval |= UART_LCR_EPAR;
  602. if (cflag & CMSPAR)
  603. cval |= UART_LCR_SPAR;
  604. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  605. if (info->board->chip_flag) {
  606. fcr = UART_FCR_ENABLE_FIFO;
  607. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  608. mxser_set_must_fifo_value(info);
  609. } else
  610. fcr = 0;
  611. } else {
  612. fcr = UART_FCR_ENABLE_FIFO;
  613. if (info->board->chip_flag) {
  614. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  615. mxser_set_must_fifo_value(info);
  616. } else {
  617. switch (info->rx_trigger) {
  618. case 1:
  619. fcr |= UART_FCR_TRIGGER_1;
  620. break;
  621. case 4:
  622. fcr |= UART_FCR_TRIGGER_4;
  623. break;
  624. case 8:
  625. fcr |= UART_FCR_TRIGGER_8;
  626. break;
  627. default:
  628. fcr |= UART_FCR_TRIGGER_14;
  629. break;
  630. }
  631. }
  632. }
  633. /* CTS flow control flag and modem status interrupts */
  634. info->IER &= ~UART_IER_MSI;
  635. info->MCR &= ~UART_MCR_AFE;
  636. if (cflag & CRTSCTS) {
  637. info->port.flags |= ASYNC_CTS_FLOW;
  638. info->IER |= UART_IER_MSI;
  639. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  640. info->MCR |= UART_MCR_AFE;
  641. } else {
  642. status = inb(info->ioaddr + UART_MSR);
  643. if (tty->hw_stopped) {
  644. if (status & UART_MSR_CTS) {
  645. tty->hw_stopped = 0;
  646. if (info->type != PORT_16550A &&
  647. !info->board->chip_flag) {
  648. outb(info->IER & ~UART_IER_THRI,
  649. info->ioaddr +
  650. UART_IER);
  651. info->IER |= UART_IER_THRI;
  652. outb(info->IER, info->ioaddr +
  653. UART_IER);
  654. }
  655. tty_wakeup(tty);
  656. }
  657. } else {
  658. if (!(status & UART_MSR_CTS)) {
  659. tty->hw_stopped = 1;
  660. if ((info->type != PORT_16550A) &&
  661. (!info->board->chip_flag)) {
  662. info->IER &= ~UART_IER_THRI;
  663. outb(info->IER, info->ioaddr +
  664. UART_IER);
  665. }
  666. }
  667. }
  668. }
  669. } else {
  670. info->port.flags &= ~ASYNC_CTS_FLOW;
  671. }
  672. outb(info->MCR, info->ioaddr + UART_MCR);
  673. if (cflag & CLOCAL) {
  674. info->port.flags &= ~ASYNC_CHECK_CD;
  675. } else {
  676. info->port.flags |= ASYNC_CHECK_CD;
  677. info->IER |= UART_IER_MSI;
  678. }
  679. outb(info->IER, info->ioaddr + UART_IER);
  680. /*
  681. * Set up parity check flag
  682. */
  683. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  684. if (I_INPCK(tty))
  685. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  686. if (I_BRKINT(tty) || I_PARMRK(tty))
  687. info->read_status_mask |= UART_LSR_BI;
  688. info->ignore_status_mask = 0;
  689. if (I_IGNBRK(tty)) {
  690. info->ignore_status_mask |= UART_LSR_BI;
  691. info->read_status_mask |= UART_LSR_BI;
  692. /*
  693. * If we're ignore parity and break indicators, ignore
  694. * overruns too. (For real raw support).
  695. */
  696. if (I_IGNPAR(tty)) {
  697. info->ignore_status_mask |=
  698. UART_LSR_OE |
  699. UART_LSR_PE |
  700. UART_LSR_FE;
  701. info->read_status_mask |=
  702. UART_LSR_OE |
  703. UART_LSR_PE |
  704. UART_LSR_FE;
  705. }
  706. }
  707. if (info->board->chip_flag) {
  708. mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
  709. mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
  710. if (I_IXON(tty)) {
  711. mxser_enable_must_rx_software_flow_control(
  712. info->ioaddr);
  713. } else {
  714. mxser_disable_must_rx_software_flow_control(
  715. info->ioaddr);
  716. }
  717. if (I_IXOFF(tty)) {
  718. mxser_enable_must_tx_software_flow_control(
  719. info->ioaddr);
  720. } else {
  721. mxser_disable_must_tx_software_flow_control(
  722. info->ioaddr);
  723. }
  724. }
  725. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  726. outb(cval, info->ioaddr + UART_LCR);
  727. return ret;
  728. }
  729. static void mxser_check_modem_status(struct tty_struct *tty,
  730. struct mxser_port *port, int status)
  731. {
  732. /* update input line counters */
  733. if (status & UART_MSR_TERI)
  734. port->icount.rng++;
  735. if (status & UART_MSR_DDSR)
  736. port->icount.dsr++;
  737. if (status & UART_MSR_DDCD)
  738. port->icount.dcd++;
  739. if (status & UART_MSR_DCTS)
  740. port->icount.cts++;
  741. port->mon_data.modem_status = status;
  742. wake_up_interruptible(&port->delta_msr_wait);
  743. if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  744. if (status & UART_MSR_DCD)
  745. wake_up_interruptible(&port->port.open_wait);
  746. }
  747. tty = tty_port_tty_get(&port->port);
  748. if (port->port.flags & ASYNC_CTS_FLOW) {
  749. if (tty->hw_stopped) {
  750. if (status & UART_MSR_CTS) {
  751. tty->hw_stopped = 0;
  752. if ((port->type != PORT_16550A) &&
  753. (!port->board->chip_flag)) {
  754. outb(port->IER & ~UART_IER_THRI,
  755. port->ioaddr + UART_IER);
  756. port->IER |= UART_IER_THRI;
  757. outb(port->IER, port->ioaddr +
  758. UART_IER);
  759. }
  760. tty_wakeup(tty);
  761. }
  762. } else {
  763. if (!(status & UART_MSR_CTS)) {
  764. tty->hw_stopped = 1;
  765. if (port->type != PORT_16550A &&
  766. !port->board->chip_flag) {
  767. port->IER &= ~UART_IER_THRI;
  768. outb(port->IER, port->ioaddr +
  769. UART_IER);
  770. }
  771. }
  772. }
  773. }
  774. }
  775. static int mxser_startup(struct tty_struct *tty)
  776. {
  777. struct mxser_port *info = tty->driver_data;
  778. unsigned long page;
  779. unsigned long flags;
  780. page = __get_free_page(GFP_KERNEL);
  781. if (!page)
  782. return -ENOMEM;
  783. spin_lock_irqsave(&info->slock, flags);
  784. if (info->port.flags & ASYNC_INITIALIZED) {
  785. free_page(page);
  786. spin_unlock_irqrestore(&info->slock, flags);
  787. return 0;
  788. }
  789. if (!info->ioaddr || !info->type) {
  790. set_bit(TTY_IO_ERROR, &tty->flags);
  791. free_page(page);
  792. spin_unlock_irqrestore(&info->slock, flags);
  793. return 0;
  794. }
  795. if (info->port.xmit_buf)
  796. free_page(page);
  797. else
  798. info->port.xmit_buf = (unsigned char *) page;
  799. /*
  800. * Clear the FIFO buffers and disable them
  801. * (they will be reenabled in mxser_change_speed())
  802. */
  803. if (info->board->chip_flag)
  804. outb((UART_FCR_CLEAR_RCVR |
  805. UART_FCR_CLEAR_XMIT |
  806. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  807. else
  808. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  809. info->ioaddr + UART_FCR);
  810. /*
  811. * At this point there's no way the LSR could still be 0xFF;
  812. * if it is, then bail out, because there's likely no UART
  813. * here.
  814. */
  815. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  816. spin_unlock_irqrestore(&info->slock, flags);
  817. if (capable(CAP_SYS_ADMIN)) {
  818. if (tty)
  819. set_bit(TTY_IO_ERROR, &tty->flags);
  820. return 0;
  821. } else
  822. return -ENODEV;
  823. }
  824. /*
  825. * Clear the interrupt registers.
  826. */
  827. (void) inb(info->ioaddr + UART_LSR);
  828. (void) inb(info->ioaddr + UART_RX);
  829. (void) inb(info->ioaddr + UART_IIR);
  830. (void) inb(info->ioaddr + UART_MSR);
  831. /*
  832. * Now, initialize the UART
  833. */
  834. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  835. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  836. outb(info->MCR, info->ioaddr + UART_MCR);
  837. /*
  838. * Finally, enable interrupts
  839. */
  840. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  841. if (info->board->chip_flag)
  842. info->IER |= MOXA_MUST_IER_EGDAI;
  843. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  844. /*
  845. * And clear the interrupt registers again for luck.
  846. */
  847. (void) inb(info->ioaddr + UART_LSR);
  848. (void) inb(info->ioaddr + UART_RX);
  849. (void) inb(info->ioaddr + UART_IIR);
  850. (void) inb(info->ioaddr + UART_MSR);
  851. clear_bit(TTY_IO_ERROR, &tty->flags);
  852. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  853. /*
  854. * and set the speed of the serial port
  855. */
  856. mxser_change_speed(tty, NULL);
  857. info->port.flags |= ASYNC_INITIALIZED;
  858. spin_unlock_irqrestore(&info->slock, flags);
  859. return 0;
  860. }
  861. /*
  862. * This routine will shutdown a serial port; interrupts maybe disabled, and
  863. * DTR is dropped if the hangup on close termio flag is on.
  864. */
  865. static void mxser_shutdown(struct tty_struct *tty)
  866. {
  867. struct mxser_port *info = tty->driver_data;
  868. unsigned long flags;
  869. if (!(info->port.flags & ASYNC_INITIALIZED))
  870. return;
  871. spin_lock_irqsave(&info->slock, flags);
  872. /*
  873. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  874. * here so the queue might never be waken up
  875. */
  876. wake_up_interruptible(&info->delta_msr_wait);
  877. /*
  878. * Free the IRQ, if necessary
  879. */
  880. if (info->port.xmit_buf) {
  881. free_page((unsigned long) info->port.xmit_buf);
  882. info->port.xmit_buf = NULL;
  883. }
  884. info->IER = 0;
  885. outb(0x00, info->ioaddr + UART_IER);
  886. if (tty->termios->c_cflag & HUPCL)
  887. info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
  888. outb(info->MCR, info->ioaddr + UART_MCR);
  889. /* clear Rx/Tx FIFO's */
  890. if (info->board->chip_flag)
  891. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  892. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  893. info->ioaddr + UART_FCR);
  894. else
  895. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  896. info->ioaddr + UART_FCR);
  897. /* read data port to reset things */
  898. (void) inb(info->ioaddr + UART_RX);
  899. set_bit(TTY_IO_ERROR, &tty->flags);
  900. info->port.flags &= ~ASYNC_INITIALIZED;
  901. if (info->board->chip_flag)
  902. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  903. spin_unlock_irqrestore(&info->slock, flags);
  904. }
  905. /*
  906. * This routine is called whenever a serial port is opened. It
  907. * enables interrupts for a serial port, linking in its async structure into
  908. * the IRQ chain. It also performs the serial-specific
  909. * initialization for the tty structure.
  910. */
  911. static int mxser_open(struct tty_struct *tty, struct file *filp)
  912. {
  913. struct mxser_port *info;
  914. unsigned long flags;
  915. int retval, line;
  916. line = tty->index;
  917. if (line == MXSER_PORTS)
  918. return 0;
  919. if (line < 0 || line > MXSER_PORTS)
  920. return -ENODEV;
  921. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  922. if (!info->ioaddr)
  923. return -ENODEV;
  924. tty->driver_data = info;
  925. tty_port_tty_set(&info->port, tty);
  926. /*
  927. * Start up serial port
  928. */
  929. spin_lock_irqsave(&info->slock, flags);
  930. info->port.count++;
  931. spin_unlock_irqrestore(&info->slock, flags);
  932. retval = mxser_startup(tty);
  933. if (retval)
  934. return retval;
  935. retval = mxser_block_til_ready(tty, filp, info);
  936. if (retval)
  937. return retval;
  938. /* unmark here for very high baud rate (ex. 921600 bps) used */
  939. tty->low_latency = 1;
  940. return 0;
  941. }
  942. static void mxser_flush_buffer(struct tty_struct *tty)
  943. {
  944. struct mxser_port *info = tty->driver_data;
  945. char fcr;
  946. unsigned long flags;
  947. spin_lock_irqsave(&info->slock, flags);
  948. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  949. fcr = inb(info->ioaddr + UART_FCR);
  950. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  951. info->ioaddr + UART_FCR);
  952. outb(fcr, info->ioaddr + UART_FCR);
  953. spin_unlock_irqrestore(&info->slock, flags);
  954. tty_wakeup(tty);
  955. }
  956. /*
  957. * This routine is called when the serial port gets closed. First, we
  958. * wait for the last remaining data to be sent. Then, we unlink its
  959. * async structure from the interrupt chain if necessary, and we free
  960. * that IRQ if nothing is left in the chain.
  961. */
  962. static void mxser_close(struct tty_struct *tty, struct file *filp)
  963. {
  964. struct mxser_port *info = tty->driver_data;
  965. unsigned long timeout;
  966. unsigned long flags;
  967. if (tty->index == MXSER_PORTS)
  968. return;
  969. if (!info)
  970. return;
  971. spin_lock_irqsave(&info->slock, flags);
  972. if (tty_hung_up_p(filp)) {
  973. spin_unlock_irqrestore(&info->slock, flags);
  974. return;
  975. }
  976. if ((tty->count == 1) && (info->port.count != 1)) {
  977. /*
  978. * Uh, oh. tty->count is 1, which means that the tty
  979. * structure will be freed. Info->port.count should always
  980. * be one in these conditions. If it's greater than
  981. * one, we've got real problems, since it means the
  982. * serial port won't be shutdown.
  983. */
  984. printk(KERN_ERR "mxser_close: bad serial port count; "
  985. "tty->count is 1, info->port.count is %d\n", info->port.count);
  986. info->port.count = 1;
  987. }
  988. if (--info->port.count < 0) {
  989. printk(KERN_ERR "mxser_close: bad serial port count for "
  990. "ttys%d: %d\n", tty->index, info->port.count);
  991. info->port.count = 0;
  992. }
  993. if (info->port.count) {
  994. spin_unlock_irqrestore(&info->slock, flags);
  995. return;
  996. }
  997. info->port.flags |= ASYNC_CLOSING;
  998. spin_unlock_irqrestore(&info->slock, flags);
  999. /*
  1000. * Save the termios structure, since this port may have
  1001. * separate termios for callout and dialin.
  1002. */
  1003. if (info->port.flags & ASYNC_NORMAL_ACTIVE)
  1004. info->normal_termios = *tty->termios;
  1005. /*
  1006. * Now we wait for the transmit buffer to clear; and we notify
  1007. * the line discipline to only process XON/XOFF characters.
  1008. */
  1009. tty->closing = 1;
  1010. if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
  1011. tty_wait_until_sent(tty, info->port.closing_wait);
  1012. /*
  1013. * At this point we stop accepting input. To do this, we
  1014. * disable the receive line status interrupts, and tell the
  1015. * interrupt driver to stop checking the data ready bit in the
  1016. * line status register.
  1017. */
  1018. info->IER &= ~UART_IER_RLSI;
  1019. if (info->board->chip_flag)
  1020. info->IER &= ~MOXA_MUST_RECV_ISR;
  1021. if (info->port.flags & ASYNC_INITIALIZED) {
  1022. outb(info->IER, info->ioaddr + UART_IER);
  1023. /*
  1024. * Before we drop DTR, make sure the UART transmitter
  1025. * has completely drained; this is especially
  1026. * important if there is a transmit FIFO!
  1027. */
  1028. timeout = jiffies + HZ;
  1029. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  1030. schedule_timeout_interruptible(5);
  1031. if (time_after(jiffies, timeout))
  1032. break;
  1033. }
  1034. }
  1035. mxser_shutdown(tty);
  1036. mxser_flush_buffer(tty);
  1037. tty_ldisc_flush(tty);
  1038. tty->closing = 0;
  1039. tty_port_tty_set(&info->port, NULL);
  1040. if (info->port.blocked_open) {
  1041. if (info->port.close_delay)
  1042. schedule_timeout_interruptible(info->port.close_delay);
  1043. wake_up_interruptible(&info->port.open_wait);
  1044. }
  1045. info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
  1046. }
  1047. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  1048. {
  1049. int c, total = 0;
  1050. struct mxser_port *info = tty->driver_data;
  1051. unsigned long flags;
  1052. if (!info->port.xmit_buf)
  1053. return 0;
  1054. while (1) {
  1055. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  1056. SERIAL_XMIT_SIZE - info->xmit_head));
  1057. if (c <= 0)
  1058. break;
  1059. memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
  1060. spin_lock_irqsave(&info->slock, flags);
  1061. info->xmit_head = (info->xmit_head + c) &
  1062. (SERIAL_XMIT_SIZE - 1);
  1063. info->xmit_cnt += c;
  1064. spin_unlock_irqrestore(&info->slock, flags);
  1065. buf += c;
  1066. count -= c;
  1067. total += c;
  1068. }
  1069. if (info->xmit_cnt && !tty->stopped) {
  1070. if (!tty->hw_stopped ||
  1071. (info->type == PORT_16550A) ||
  1072. (info->board->chip_flag)) {
  1073. spin_lock_irqsave(&info->slock, flags);
  1074. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  1075. UART_IER);
  1076. info->IER |= UART_IER_THRI;
  1077. outb(info->IER, info->ioaddr + UART_IER);
  1078. spin_unlock_irqrestore(&info->slock, flags);
  1079. }
  1080. }
  1081. return total;
  1082. }
  1083. static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
  1084. {
  1085. struct mxser_port *info = tty->driver_data;
  1086. unsigned long flags;
  1087. if (!info->port.xmit_buf)
  1088. return 0;
  1089. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  1090. return 0;
  1091. spin_lock_irqsave(&info->slock, flags);
  1092. info->port.xmit_buf[info->xmit_head++] = ch;
  1093. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  1094. info->xmit_cnt++;
  1095. spin_unlock_irqrestore(&info->slock, flags);
  1096. if (!tty->stopped) {
  1097. if (!tty->hw_stopped ||
  1098. (info->type == PORT_16550A) ||
  1099. info->board->chip_flag) {
  1100. spin_lock_irqsave(&info->slock, flags);
  1101. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1102. info->IER |= UART_IER_THRI;
  1103. outb(info->IER, info->ioaddr + UART_IER);
  1104. spin_unlock_irqrestore(&info->slock, flags);
  1105. }
  1106. }
  1107. return 1;
  1108. }
  1109. static void mxser_flush_chars(struct tty_struct *tty)
  1110. {
  1111. struct mxser_port *info = tty->driver_data;
  1112. unsigned long flags;
  1113. if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
  1114. (tty->hw_stopped && info->type != PORT_16550A &&
  1115. !info->board->chip_flag))
  1116. return;
  1117. spin_lock_irqsave(&info->slock, flags);
  1118. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1119. info->IER |= UART_IER_THRI;
  1120. outb(info->IER, info->ioaddr + UART_IER);
  1121. spin_unlock_irqrestore(&info->slock, flags);
  1122. }
  1123. static int mxser_write_room(struct tty_struct *tty)
  1124. {
  1125. struct mxser_port *info = tty->driver_data;
  1126. int ret;
  1127. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1128. return ret < 0 ? 0 : ret;
  1129. }
  1130. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1131. {
  1132. struct mxser_port *info = tty->driver_data;
  1133. return info->xmit_cnt;
  1134. }
  1135. /*
  1136. * ------------------------------------------------------------
  1137. * friends of mxser_ioctl()
  1138. * ------------------------------------------------------------
  1139. */
  1140. static int mxser_get_serial_info(struct tty_struct *tty,
  1141. struct serial_struct __user *retinfo)
  1142. {
  1143. struct mxser_port *info = tty->driver_data;
  1144. struct serial_struct tmp = {
  1145. .type = info->type,
  1146. .line = tty->index,
  1147. .port = info->ioaddr,
  1148. .irq = info->board->irq,
  1149. .flags = info->port.flags,
  1150. .baud_base = info->baud_base,
  1151. .close_delay = info->port.close_delay,
  1152. .closing_wait = info->port.closing_wait,
  1153. .custom_divisor = info->custom_divisor,
  1154. .hub6 = 0
  1155. };
  1156. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  1157. return -EFAULT;
  1158. return 0;
  1159. }
  1160. static int mxser_set_serial_info(struct tty_struct *tty,
  1161. struct serial_struct __user *new_info)
  1162. {
  1163. struct mxser_port *info = tty->driver_data;
  1164. struct serial_struct new_serial;
  1165. speed_t baud;
  1166. unsigned long sl_flags;
  1167. unsigned int flags;
  1168. int retval = 0;
  1169. if (!new_info || !info->ioaddr)
  1170. return -ENODEV;
  1171. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  1172. return -EFAULT;
  1173. if (new_serial.irq != info->board->irq ||
  1174. new_serial.port != info->ioaddr)
  1175. return -EINVAL;
  1176. flags = info->port.flags & ASYNC_SPD_MASK;
  1177. if (!capable(CAP_SYS_ADMIN)) {
  1178. if ((new_serial.baud_base != info->baud_base) ||
  1179. (new_serial.close_delay != info->port.close_delay) ||
  1180. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
  1181. return -EPERM;
  1182. info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
  1183. (new_serial.flags & ASYNC_USR_MASK));
  1184. } else {
  1185. /*
  1186. * OK, past this point, all the error checking has been done.
  1187. * At this point, we start making changes.....
  1188. */
  1189. info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
  1190. (new_serial.flags & ASYNC_FLAGS));
  1191. info->port.close_delay = new_serial.close_delay * HZ / 100;
  1192. info->port.closing_wait = new_serial.closing_wait * HZ / 100;
  1193. tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY)
  1194. ? 1 : 0;
  1195. if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
  1196. (new_serial.baud_base != info->baud_base ||
  1197. new_serial.custom_divisor !=
  1198. info->custom_divisor)) {
  1199. baud = new_serial.baud_base / new_serial.custom_divisor;
  1200. tty_encode_baud_rate(tty, baud, baud);
  1201. }
  1202. }
  1203. info->type = new_serial.type;
  1204. process_txrx_fifo(info);
  1205. if (info->port.flags & ASYNC_INITIALIZED) {
  1206. if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
  1207. spin_lock_irqsave(&info->slock, sl_flags);
  1208. mxser_change_speed(tty, NULL);
  1209. spin_unlock_irqrestore(&info->slock, sl_flags);
  1210. }
  1211. } else
  1212. retval = mxser_startup(tty);
  1213. return retval;
  1214. }
  1215. /*
  1216. * mxser_get_lsr_info - get line status register info
  1217. *
  1218. * Purpose: Let user call ioctl() to get info when the UART physically
  1219. * is emptied. On bus types like RS485, the transmitter must
  1220. * release the bus after transmitting. This must be done when
  1221. * the transmit shift register is empty, not be done when the
  1222. * transmit holding register is empty. This functionality
  1223. * allows an RS485 driver to be written in user space.
  1224. */
  1225. static int mxser_get_lsr_info(struct mxser_port *info,
  1226. unsigned int __user *value)
  1227. {
  1228. unsigned char status;
  1229. unsigned int result;
  1230. unsigned long flags;
  1231. spin_lock_irqsave(&info->slock, flags);
  1232. status = inb(info->ioaddr + UART_LSR);
  1233. spin_unlock_irqrestore(&info->slock, flags);
  1234. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1235. return put_user(result, value);
  1236. }
  1237. static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
  1238. {
  1239. struct mxser_port *info = tty->driver_data;
  1240. unsigned char control, status;
  1241. unsigned long flags;
  1242. if (tty->index == MXSER_PORTS)
  1243. return -ENOIOCTLCMD;
  1244. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1245. return -EIO;
  1246. control = info->MCR;
  1247. spin_lock_irqsave(&info->slock, flags);
  1248. status = inb(info->ioaddr + UART_MSR);
  1249. if (status & UART_MSR_ANY_DELTA)
  1250. mxser_check_modem_status(tty, info, status);
  1251. spin_unlock_irqrestore(&info->slock, flags);
  1252. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1253. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1254. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1255. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1256. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1257. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1258. }
  1259. static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
  1260. unsigned int set, unsigned int clear)
  1261. {
  1262. struct mxser_port *info = tty->driver_data;
  1263. unsigned long flags;
  1264. if (tty->index == MXSER_PORTS)
  1265. return -ENOIOCTLCMD;
  1266. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1267. return -EIO;
  1268. spin_lock_irqsave(&info->slock, flags);
  1269. if (set & TIOCM_RTS)
  1270. info->MCR |= UART_MCR_RTS;
  1271. if (set & TIOCM_DTR)
  1272. info->MCR |= UART_MCR_DTR;
  1273. if (clear & TIOCM_RTS)
  1274. info->MCR &= ~UART_MCR_RTS;
  1275. if (clear & TIOCM_DTR)
  1276. info->MCR &= ~UART_MCR_DTR;
  1277. outb(info->MCR, info->ioaddr + UART_MCR);
  1278. spin_unlock_irqrestore(&info->slock, flags);
  1279. return 0;
  1280. }
  1281. static int __init mxser_program_mode(int port)
  1282. {
  1283. int id, i, j, n;
  1284. outb(0, port);
  1285. outb(0, port);
  1286. outb(0, port);
  1287. (void)inb(port);
  1288. (void)inb(port);
  1289. outb(0, port);
  1290. (void)inb(port);
  1291. id = inb(port + 1) & 0x1F;
  1292. if ((id != C168_ASIC_ID) &&
  1293. (id != C104_ASIC_ID) &&
  1294. (id != C102_ASIC_ID) &&
  1295. (id != CI132_ASIC_ID) &&
  1296. (id != CI134_ASIC_ID) &&
  1297. (id != CI104J_ASIC_ID))
  1298. return -1;
  1299. for (i = 0, j = 0; i < 4; i++) {
  1300. n = inb(port + 2);
  1301. if (n == 'M') {
  1302. j = 1;
  1303. } else if ((j == 1) && (n == 1)) {
  1304. j = 2;
  1305. break;
  1306. } else
  1307. j = 0;
  1308. }
  1309. if (j != 2)
  1310. id = -2;
  1311. return id;
  1312. }
  1313. static void __init mxser_normal_mode(int port)
  1314. {
  1315. int i, n;
  1316. outb(0xA5, port + 1);
  1317. outb(0x80, port + 3);
  1318. outb(12, port + 0); /* 9600 bps */
  1319. outb(0, port + 1);
  1320. outb(0x03, port + 3); /* 8 data bits */
  1321. outb(0x13, port + 4); /* loop back mode */
  1322. for (i = 0; i < 16; i++) {
  1323. n = inb(port + 5);
  1324. if ((n & 0x61) == 0x60)
  1325. break;
  1326. if ((n & 1) == 1)
  1327. (void)inb(port);
  1328. }
  1329. outb(0x00, port + 4);
  1330. }
  1331. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1332. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1333. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1334. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1335. #define EN_CCMD 0x000 /* Chip's command register */
  1336. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1337. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1338. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1339. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1340. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1341. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1342. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1343. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1344. static int __init mxser_read_register(int port, unsigned short *regs)
  1345. {
  1346. int i, k, value, id;
  1347. unsigned int j;
  1348. id = mxser_program_mode(port);
  1349. if (id < 0)
  1350. return id;
  1351. for (i = 0; i < 14; i++) {
  1352. k = (i & 0x3F) | 0x180;
  1353. for (j = 0x100; j > 0; j >>= 1) {
  1354. outb(CHIP_CS, port);
  1355. if (k & j) {
  1356. outb(CHIP_CS | CHIP_DO, port);
  1357. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1358. } else {
  1359. outb(CHIP_CS, port);
  1360. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1361. }
  1362. }
  1363. (void)inb(port);
  1364. value = 0;
  1365. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1366. outb(CHIP_CS, port);
  1367. outb(CHIP_CS | CHIP_SK, port);
  1368. if (inb(port) & CHIP_DI)
  1369. value |= j;
  1370. }
  1371. regs[i] = value;
  1372. outb(0, port);
  1373. }
  1374. mxser_normal_mode(port);
  1375. return id;
  1376. }
  1377. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1378. {
  1379. struct mxser_port *port;
  1380. struct tty_struct *tty;
  1381. int result, status;
  1382. unsigned int i, j;
  1383. int ret = 0;
  1384. switch (cmd) {
  1385. case MOXA_GET_MAJOR:
  1386. if (printk_ratelimit())
  1387. printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
  1388. "%x (GET_MAJOR), fix your userspace\n",
  1389. current->comm, cmd);
  1390. return put_user(ttymajor, (int __user *)argp);
  1391. case MOXA_CHKPORTENABLE:
  1392. result = 0;
  1393. lock_kernel();
  1394. for (i = 0; i < MXSER_BOARDS; i++)
  1395. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1396. if (mxser_boards[i].ports[j].ioaddr)
  1397. result |= (1 << i);
  1398. unlock_kernel();
  1399. return put_user(result, (unsigned long __user *)argp);
  1400. case MOXA_GETDATACOUNT:
  1401. lock_kernel();
  1402. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1403. ret = -EFAULT;
  1404. unlock_kernel();
  1405. return ret;
  1406. case MOXA_GETMSTATUS: {
  1407. struct mxser_mstatus ms, __user *msu = argp;
  1408. lock_kernel();
  1409. for (i = 0; i < MXSER_BOARDS; i++)
  1410. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1411. port = &mxser_boards[i].ports[j];
  1412. memset(&ms, 0, sizeof(ms));
  1413. if (!port->ioaddr)
  1414. goto copy;
  1415. tty = tty_port_tty_get(&port->port);
  1416. if (!tty || !tty->termios)
  1417. ms.cflag = port->normal_termios.c_cflag;
  1418. else
  1419. ms.cflag = tty->termios->c_cflag;
  1420. tty_kref_put(tty);
  1421. status = inb(port->ioaddr + UART_MSR);
  1422. if (status & UART_MSR_DCD)
  1423. ms.dcd = 1;
  1424. if (status & UART_MSR_DSR)
  1425. ms.dsr = 1;
  1426. if (status & UART_MSR_CTS)
  1427. ms.cts = 1;
  1428. copy:
  1429. if (copy_to_user(msu, &ms, sizeof(ms))) {
  1430. unlock_kernel();
  1431. return -EFAULT;
  1432. }
  1433. msu++;
  1434. }
  1435. unlock_kernel();
  1436. return 0;
  1437. }
  1438. case MOXA_ASPP_MON_EXT: {
  1439. struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
  1440. unsigned int cflag, iflag, p;
  1441. u8 opmode;
  1442. me = kzalloc(sizeof(*me), GFP_KERNEL);
  1443. if (!me)
  1444. return -ENOMEM;
  1445. lock_kernel();
  1446. for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
  1447. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
  1448. if (p >= ARRAY_SIZE(me->rx_cnt)) {
  1449. i = MXSER_BOARDS;
  1450. break;
  1451. }
  1452. port = &mxser_boards[i].ports[j];
  1453. if (!port->ioaddr)
  1454. continue;
  1455. status = mxser_get_msr(port->ioaddr, 0, p);
  1456. if (status & UART_MSR_TERI)
  1457. port->icount.rng++;
  1458. if (status & UART_MSR_DDSR)
  1459. port->icount.dsr++;
  1460. if (status & UART_MSR_DDCD)
  1461. port->icount.dcd++;
  1462. if (status & UART_MSR_DCTS)
  1463. port->icount.cts++;
  1464. port->mon_data.modem_status = status;
  1465. me->rx_cnt[p] = port->mon_data.rxcnt;
  1466. me->tx_cnt[p] = port->mon_data.txcnt;
  1467. me->up_rxcnt[p] = port->mon_data.up_rxcnt;
  1468. me->up_txcnt[p] = port->mon_data.up_txcnt;
  1469. me->modem_status[p] =
  1470. port->mon_data.modem_status;
  1471. tty = tty_port_tty_get(&port->port);
  1472. if (!tty || !tty->termios) {
  1473. cflag = port->normal_termios.c_cflag;
  1474. iflag = port->normal_termios.c_iflag;
  1475. me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios);
  1476. } else {
  1477. cflag = tty->termios->c_cflag;
  1478. iflag = tty->termios->c_iflag;
  1479. me->baudrate[p] = tty_get_baud_rate(tty);
  1480. }
  1481. tty_kref_put(tty);
  1482. me->databits[p] = cflag & CSIZE;
  1483. me->stopbits[p] = cflag & CSTOPB;
  1484. me->parity[p] = cflag & (PARENB | PARODD |
  1485. CMSPAR);
  1486. if (cflag & CRTSCTS)
  1487. me->flowctrl[p] |= 0x03;
  1488. if (iflag & (IXON | IXOFF))
  1489. me->flowctrl[p] |= 0x0C;
  1490. if (port->type == PORT_16550A)
  1491. me->fifo[p] = 1;
  1492. opmode = inb(port->opmode_ioaddr) >>
  1493. ((p % 4) * 2);
  1494. opmode &= OP_MODE_MASK;
  1495. me->iftype[p] = opmode;
  1496. }
  1497. }
  1498. unlock_kernel();
  1499. if (copy_to_user(argp, me, sizeof(*me)))
  1500. ret = -EFAULT;
  1501. kfree(me);
  1502. return ret;
  1503. }
  1504. default:
  1505. return -ENOIOCTLCMD;
  1506. }
  1507. return 0;
  1508. }
  1509. static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
  1510. struct async_icount *cprev)
  1511. {
  1512. struct async_icount cnow;
  1513. unsigned long flags;
  1514. int ret;
  1515. spin_lock_irqsave(&info->slock, flags);
  1516. cnow = info->icount; /* atomic copy */
  1517. spin_unlock_irqrestore(&info->slock, flags);
  1518. ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
  1519. ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
  1520. ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
  1521. ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
  1522. *cprev = cnow;
  1523. return ret;
  1524. }
  1525. static int mxser_ioctl(struct tty_struct *tty, struct file *file,
  1526. unsigned int cmd, unsigned long arg)
  1527. {
  1528. struct mxser_port *info = tty->driver_data;
  1529. struct async_icount cnow;
  1530. unsigned long flags;
  1531. void __user *argp = (void __user *)arg;
  1532. int retval;
  1533. if (tty->index == MXSER_PORTS)
  1534. return mxser_ioctl_special(cmd, argp);
  1535. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1536. int p;
  1537. unsigned long opmode;
  1538. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1539. int shiftbit;
  1540. unsigned char val, mask;
  1541. p = tty->index % 4;
  1542. if (cmd == MOXA_SET_OP_MODE) {
  1543. if (get_user(opmode, (int __user *) argp))
  1544. return -EFAULT;
  1545. if (opmode != RS232_MODE &&
  1546. opmode != RS485_2WIRE_MODE &&
  1547. opmode != RS422_MODE &&
  1548. opmode != RS485_4WIRE_MODE)
  1549. return -EFAULT;
  1550. lock_kernel();
  1551. mask = ModeMask[p];
  1552. shiftbit = p * 2;
  1553. val = inb(info->opmode_ioaddr);
  1554. val &= mask;
  1555. val |= (opmode << shiftbit);
  1556. outb(val, info->opmode_ioaddr);
  1557. unlock_kernel();
  1558. } else {
  1559. lock_kernel();
  1560. shiftbit = p * 2;
  1561. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1562. opmode &= OP_MODE_MASK;
  1563. unlock_kernel();
  1564. if (put_user(opmode, (int __user *)argp))
  1565. return -EFAULT;
  1566. }
  1567. return 0;
  1568. }
  1569. if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
  1570. test_bit(TTY_IO_ERROR, &tty->flags))
  1571. return -EIO;
  1572. switch (cmd) {
  1573. case TIOCGSERIAL:
  1574. lock_kernel();
  1575. retval = mxser_get_serial_info(tty, argp);
  1576. unlock_kernel();
  1577. return retval;
  1578. case TIOCSSERIAL:
  1579. lock_kernel();
  1580. retval = mxser_set_serial_info(tty, argp);
  1581. unlock_kernel();
  1582. return retval;
  1583. case TIOCSERGETLSR: /* Get line status register */
  1584. return mxser_get_lsr_info(info, argp);
  1585. /*
  1586. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1587. * - mask passed in arg for lines of interest
  1588. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1589. * Caller should use TIOCGICOUNT to see which one it was
  1590. */
  1591. case TIOCMIWAIT:
  1592. spin_lock_irqsave(&info->slock, flags);
  1593. cnow = info->icount; /* note the counters on entry */
  1594. spin_unlock_irqrestore(&info->slock, flags);
  1595. return wait_event_interruptible(info->delta_msr_wait,
  1596. mxser_cflags_changed(info, arg, &cnow));
  1597. /*
  1598. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1599. * Return: write counters to the user passed counter struct
  1600. * NB: both 1->0 and 0->1 transitions are counted except for
  1601. * RI where only 0->1 is counted.
  1602. */
  1603. case TIOCGICOUNT: {
  1604. struct serial_icounter_struct icnt = { 0 };
  1605. spin_lock_irqsave(&info->slock, flags);
  1606. cnow = info->icount;
  1607. spin_unlock_irqrestore(&info->slock, flags);
  1608. icnt.frame = cnow.frame;
  1609. icnt.brk = cnow.brk;
  1610. icnt.overrun = cnow.overrun;
  1611. icnt.buf_overrun = cnow.buf_overrun;
  1612. icnt.parity = cnow.parity;
  1613. icnt.rx = cnow.rx;
  1614. icnt.tx = cnow.tx;
  1615. icnt.cts = cnow.cts;
  1616. icnt.dsr = cnow.dsr;
  1617. icnt.rng = cnow.rng;
  1618. icnt.dcd = cnow.dcd;
  1619. return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
  1620. }
  1621. case MOXA_HighSpeedOn:
  1622. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1623. case MOXA_SDS_RSTICOUNTER:
  1624. lock_kernel();
  1625. info->mon_data.rxcnt = 0;
  1626. info->mon_data.txcnt = 0;
  1627. unlock_kernel();
  1628. return 0;
  1629. case MOXA_ASPP_OQUEUE:{
  1630. int len, lsr;
  1631. lock_kernel();
  1632. len = mxser_chars_in_buffer(tty);
  1633. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
  1634. len += (lsr ? 0 : 1);
  1635. unlock_kernel();
  1636. return put_user(len, (int __user *)argp);
  1637. }
  1638. case MOXA_ASPP_MON: {
  1639. int mcr, status;
  1640. lock_kernel();
  1641. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1642. mxser_check_modem_status(tty, info, status);
  1643. mcr = inb(info->ioaddr + UART_MCR);
  1644. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1645. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1646. else
  1647. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1648. if (mcr & MOXA_MUST_MCR_TX_XON)
  1649. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1650. else
  1651. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1652. if (tty->hw_stopped)
  1653. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1654. else
  1655. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1656. unlock_kernel();
  1657. if (copy_to_user(argp, &info->mon_data,
  1658. sizeof(struct mxser_mon)))
  1659. return -EFAULT;
  1660. return 0;
  1661. }
  1662. case MOXA_ASPP_LSTATUS: {
  1663. if (put_user(info->err_shadow, (unsigned char __user *)argp))
  1664. return -EFAULT;
  1665. info->err_shadow = 0;
  1666. return 0;
  1667. }
  1668. case MOXA_SET_BAUD_METHOD: {
  1669. int method;
  1670. if (get_user(method, (int __user *)argp))
  1671. return -EFAULT;
  1672. mxser_set_baud_method[tty->index] = method;
  1673. return put_user(method, (int __user *)argp);
  1674. }
  1675. default:
  1676. return -ENOIOCTLCMD;
  1677. }
  1678. return 0;
  1679. }
  1680. static void mxser_stoprx(struct tty_struct *tty)
  1681. {
  1682. struct mxser_port *info = tty->driver_data;
  1683. info->ldisc_stop_rx = 1;
  1684. if (I_IXOFF(tty)) {
  1685. if (info->board->chip_flag) {
  1686. info->IER &= ~MOXA_MUST_RECV_ISR;
  1687. outb(info->IER, info->ioaddr + UART_IER);
  1688. } else {
  1689. info->x_char = STOP_CHAR(tty);
  1690. outb(0, info->ioaddr + UART_IER);
  1691. info->IER |= UART_IER_THRI;
  1692. outb(info->IER, info->ioaddr + UART_IER);
  1693. }
  1694. }
  1695. if (tty->termios->c_cflag & CRTSCTS) {
  1696. info->MCR &= ~UART_MCR_RTS;
  1697. outb(info->MCR, info->ioaddr + UART_MCR);
  1698. }
  1699. }
  1700. /*
  1701. * This routine is called by the upper-layer tty layer to signal that
  1702. * incoming characters should be throttled.
  1703. */
  1704. static void mxser_throttle(struct tty_struct *tty)
  1705. {
  1706. mxser_stoprx(tty);
  1707. }
  1708. static void mxser_unthrottle(struct tty_struct *tty)
  1709. {
  1710. struct mxser_port *info = tty->driver_data;
  1711. /* startrx */
  1712. info->ldisc_stop_rx = 0;
  1713. if (I_IXOFF(tty)) {
  1714. if (info->x_char)
  1715. info->x_char = 0;
  1716. else {
  1717. if (info->board->chip_flag) {
  1718. info->IER |= MOXA_MUST_RECV_ISR;
  1719. outb(info->IER, info->ioaddr + UART_IER);
  1720. } else {
  1721. info->x_char = START_CHAR(tty);
  1722. outb(0, info->ioaddr + UART_IER);
  1723. info->IER |= UART_IER_THRI;
  1724. outb(info->IER, info->ioaddr + UART_IER);
  1725. }
  1726. }
  1727. }
  1728. if (tty->termios->c_cflag & CRTSCTS) {
  1729. info->MCR |= UART_MCR_RTS;
  1730. outb(info->MCR, info->ioaddr + UART_MCR);
  1731. }
  1732. }
  1733. /*
  1734. * mxser_stop() and mxser_start()
  1735. *
  1736. * This routines are called before setting or resetting tty->stopped.
  1737. * They enable or disable transmitter interrupts, as necessary.
  1738. */
  1739. static void mxser_stop(struct tty_struct *tty)
  1740. {
  1741. struct mxser_port *info = tty->driver_data;
  1742. unsigned long flags;
  1743. spin_lock_irqsave(&info->slock, flags);
  1744. if (info->IER & UART_IER_THRI) {
  1745. info->IER &= ~UART_IER_THRI;
  1746. outb(info->IER, info->ioaddr + UART_IER);
  1747. }
  1748. spin_unlock_irqrestore(&info->slock, flags);
  1749. }
  1750. static void mxser_start(struct tty_struct *tty)
  1751. {
  1752. struct mxser_port *info = tty->driver_data;
  1753. unsigned long flags;
  1754. spin_lock_irqsave(&info->slock, flags);
  1755. if (info->xmit_cnt && info->port.xmit_buf) {
  1756. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1757. info->IER |= UART_IER_THRI;
  1758. outb(info->IER, info->ioaddr + UART_IER);
  1759. }
  1760. spin_unlock_irqrestore(&info->slock, flags);
  1761. }
  1762. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1763. {
  1764. struct mxser_port *info = tty->driver_data;
  1765. unsigned long flags;
  1766. spin_lock_irqsave(&info->slock, flags);
  1767. mxser_change_speed(tty, old_termios);
  1768. spin_unlock_irqrestore(&info->slock, flags);
  1769. if ((old_termios->c_cflag & CRTSCTS) &&
  1770. !(tty->termios->c_cflag & CRTSCTS)) {
  1771. tty->hw_stopped = 0;
  1772. mxser_start(tty);
  1773. }
  1774. /* Handle sw stopped */
  1775. if ((old_termios->c_iflag & IXON) &&
  1776. !(tty->termios->c_iflag & IXON)) {
  1777. tty->stopped = 0;
  1778. if (info->board->chip_flag) {
  1779. spin_lock_irqsave(&info->slock, flags);
  1780. mxser_disable_must_rx_software_flow_control(
  1781. info->ioaddr);
  1782. spin_unlock_irqrestore(&info->slock, flags);
  1783. }
  1784. mxser_start(tty);
  1785. }
  1786. }
  1787. /*
  1788. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1789. */
  1790. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1791. {
  1792. struct mxser_port *info = tty->driver_data;
  1793. unsigned long orig_jiffies, char_time;
  1794. int lsr;
  1795. if (info->type == PORT_UNKNOWN)
  1796. return;
  1797. if (info->xmit_fifo_size == 0)
  1798. return; /* Just in case.... */
  1799. orig_jiffies = jiffies;
  1800. /*
  1801. * Set the check interval to be 1/5 of the estimated time to
  1802. * send a single character, and make it at least 1. The check
  1803. * interval should also be less than the timeout.
  1804. *
  1805. * Note: we have to use pretty tight timings here to satisfy
  1806. * the NIST-PCTS.
  1807. */
  1808. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1809. char_time = char_time / 5;
  1810. if (char_time == 0)
  1811. char_time = 1;
  1812. if (timeout && timeout < char_time)
  1813. char_time = timeout;
  1814. /*
  1815. * If the transmitter hasn't cleared in twice the approximate
  1816. * amount of time to send the entire FIFO, it probably won't
  1817. * ever clear. This assumes the UART isn't doing flow
  1818. * control, which is currently the case. Hence, if it ever
  1819. * takes longer than info->timeout, this is probably due to a
  1820. * UART bug of some kind. So, we clamp the timeout parameter at
  1821. * 2*info->timeout.
  1822. */
  1823. if (!timeout || timeout > 2 * info->timeout)
  1824. timeout = 2 * info->timeout;
  1825. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1826. printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
  1827. timeout, char_time);
  1828. printk("jiff=%lu...", jiffies);
  1829. #endif
  1830. lock_kernel();
  1831. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1832. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1833. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1834. #endif
  1835. schedule_timeout_interruptible(char_time);
  1836. if (signal_pending(current))
  1837. break;
  1838. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1839. break;
  1840. }
  1841. set_current_state(TASK_RUNNING);
  1842. unlock_kernel();
  1843. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1844. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1845. #endif
  1846. }
  1847. /*
  1848. * This routine is called by tty_hangup() when a hangup is signaled.
  1849. */
  1850. static void mxser_hangup(struct tty_struct *tty)
  1851. {
  1852. struct mxser_port *info = tty->driver_data;
  1853. mxser_flush_buffer(tty);
  1854. mxser_shutdown(tty);
  1855. info->port.count = 0;
  1856. info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
  1857. tty_port_tty_set(&info->port, NULL);
  1858. wake_up_interruptible(&info->port.open_wait);
  1859. }
  1860. /*
  1861. * mxser_rs_break() --- routine which turns the break handling on or off
  1862. */
  1863. static int mxser_rs_break(struct tty_struct *tty, int break_state)
  1864. {
  1865. struct mxser_port *info = tty->driver_data;
  1866. unsigned long flags;
  1867. spin_lock_irqsave(&info->slock, flags);
  1868. if (break_state == -1)
  1869. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1870. info->ioaddr + UART_LCR);
  1871. else
  1872. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1873. info->ioaddr + UART_LCR);
  1874. spin_unlock_irqrestore(&info->slock, flags);
  1875. return 0;
  1876. }
  1877. static void mxser_receive_chars(struct tty_struct *tty,
  1878. struct mxser_port *port, int *status)
  1879. {
  1880. unsigned char ch, gdl;
  1881. int ignored = 0;
  1882. int cnt = 0;
  1883. int recv_room;
  1884. int max = 256;
  1885. recv_room = tty->receive_room;
  1886. if (recv_room == 0 && !port->ldisc_stop_rx)
  1887. mxser_stoprx(tty);
  1888. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1889. if (*status & UART_LSR_SPECIAL)
  1890. goto intr_old;
  1891. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1892. (*status & MOXA_MUST_LSR_RERR))
  1893. goto intr_old;
  1894. if (*status & MOXA_MUST_LSR_RERR)
  1895. goto intr_old;
  1896. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1897. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1898. gdl &= MOXA_MUST_GDL_MASK;
  1899. if (gdl >= recv_room) {
  1900. if (!port->ldisc_stop_rx)
  1901. mxser_stoprx(tty);
  1902. }
  1903. while (gdl--) {
  1904. ch = inb(port->ioaddr + UART_RX);
  1905. tty_insert_flip_char(tty, ch, 0);
  1906. cnt++;
  1907. }
  1908. goto end_intr;
  1909. }
  1910. intr_old:
  1911. do {
  1912. if (max-- < 0)
  1913. break;
  1914. ch = inb(port->ioaddr + UART_RX);
  1915. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1916. outb(0x23, port->ioaddr + UART_FCR);
  1917. *status &= port->read_status_mask;
  1918. if (*status & port->ignore_status_mask) {
  1919. if (++ignored > 100)
  1920. break;
  1921. } else {
  1922. char flag = 0;
  1923. if (*status & UART_LSR_SPECIAL) {
  1924. if (*status & UART_LSR_BI) {
  1925. flag = TTY_BREAK;
  1926. port->icount.brk++;
  1927. if (port->port.flags & ASYNC_SAK)
  1928. do_SAK(tty);
  1929. } else if (*status & UART_LSR_PE) {
  1930. flag = TTY_PARITY;
  1931. port->icount.parity++;
  1932. } else if (*status & UART_LSR_FE) {
  1933. flag = TTY_FRAME;
  1934. port->icount.frame++;
  1935. } else if (*status & UART_LSR_OE) {
  1936. flag = TTY_OVERRUN;
  1937. port->icount.overrun++;
  1938. } else
  1939. flag = TTY_BREAK;
  1940. }
  1941. tty_insert_flip_char(tty, ch, flag);
  1942. cnt++;
  1943. if (cnt >= recv_room) {
  1944. if (!port->ldisc_stop_rx)
  1945. mxser_stoprx(tty);
  1946. break;
  1947. }
  1948. }
  1949. if (port->board->chip_flag)
  1950. break;
  1951. *status = inb(port->ioaddr + UART_LSR);
  1952. } while (*status & UART_LSR_DR);
  1953. end_intr:
  1954. mxvar_log.rxcnt[tty->index] += cnt;
  1955. port->mon_data.rxcnt += cnt;
  1956. port->mon_data.up_rxcnt += cnt;
  1957. /*
  1958. * We are called from an interrupt context with &port->slock
  1959. * being held. Drop it temporarily in order to prevent
  1960. * recursive locking.
  1961. */
  1962. spin_unlock(&port->slock);
  1963. tty_flip_buffer_push(tty);
  1964. spin_lock(&port->slock);
  1965. }
  1966. static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
  1967. {
  1968. int count, cnt;
  1969. if (port->x_char) {
  1970. outb(port->x_char, port->ioaddr + UART_TX);
  1971. port->x_char = 0;
  1972. mxvar_log.txcnt[tty->index]++;
  1973. port->mon_data.txcnt++;
  1974. port->mon_data.up_txcnt++;
  1975. port->icount.tx++;
  1976. return;
  1977. }
  1978. if (port->port.xmit_buf == NULL)
  1979. return;
  1980. if (port->xmit_cnt <= 0 || tty->stopped ||
  1981. (tty->hw_stopped &&
  1982. (port->type != PORT_16550A) &&
  1983. (!port->board->chip_flag))) {
  1984. port->IER &= ~UART_IER_THRI;
  1985. outb(port->IER, port->ioaddr + UART_IER);
  1986. return;
  1987. }
  1988. cnt = port->xmit_cnt;
  1989. count = port->xmit_fifo_size;
  1990. do {
  1991. outb(port->port.xmit_buf[port->xmit_tail++],
  1992. port->ioaddr + UART_TX);
  1993. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  1994. if (--port->xmit_cnt <= 0)
  1995. break;
  1996. } while (--count > 0);
  1997. mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
  1998. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  1999. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  2000. port->icount.tx += (cnt - port->xmit_cnt);
  2001. if (port->xmit_cnt < WAKEUP_CHARS && tty)
  2002. tty_wakeup(tty);
  2003. if (port->xmit_cnt <= 0) {
  2004. port->IER &= ~UART_IER_THRI;
  2005. outb(port->IER, port->ioaddr + UART_IER);
  2006. }
  2007. }
  2008. /*
  2009. * This is the serial driver's generic interrupt routine
  2010. */
  2011. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  2012. {
  2013. int status, iir, i;
  2014. struct mxser_board *brd = NULL;
  2015. struct mxser_port *port;
  2016. int max, irqbits, bits, msr;
  2017. unsigned int int_cnt, pass_counter = 0;
  2018. int handled = IRQ_NONE;
  2019. struct tty_struct *tty;
  2020. for (i = 0; i < MXSER_BOARDS; i++)
  2021. if (dev_id == &mxser_boards[i]) {
  2022. brd = dev_id;
  2023. break;
  2024. }
  2025. if (i == MXSER_BOARDS)
  2026. goto irq_stop;
  2027. if (brd == NULL)
  2028. goto irq_stop;
  2029. max = brd->info->nports;
  2030. while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
  2031. irqbits = inb(brd->vector) & brd->vector_mask;
  2032. if (irqbits == brd->vector_mask)
  2033. break;
  2034. handled = IRQ_HANDLED;
  2035. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  2036. if (irqbits == brd->vector_mask)
  2037. break;
  2038. if (bits & irqbits)
  2039. continue;
  2040. port = &brd->ports[i];
  2041. int_cnt = 0;
  2042. spin_lock(&port->slock);
  2043. do {
  2044. iir = inb(port->ioaddr + UART_IIR);
  2045. if (iir & UART_IIR_NO_INT)
  2046. break;
  2047. iir &= MOXA_MUST_IIR_MASK;
  2048. tty = tty_port_tty_get(&port->port);
  2049. if (!tty ||
  2050. (port->port.flags & ASYNC_CLOSING) ||
  2051. !(port->port.flags &
  2052. ASYNC_INITIALIZED)) {
  2053. status = inb(port->ioaddr + UART_LSR);
  2054. outb(0x27, port->ioaddr + UART_FCR);
  2055. inb(port->ioaddr + UART_MSR);
  2056. tty_kref_put(tty);
  2057. break;
  2058. }
  2059. status = inb(port->ioaddr + UART_LSR);
  2060. if (status & UART_LSR_PE)
  2061. port->err_shadow |= NPPI_NOTIFY_PARITY;
  2062. if (status & UART_LSR_FE)
  2063. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  2064. if (status & UART_LSR_OE)
  2065. port->err_shadow |=
  2066. NPPI_NOTIFY_HW_OVERRUN;
  2067. if (status & UART_LSR_BI)
  2068. port->err_shadow |= NPPI_NOTIFY_BREAK;
  2069. if (port->board->chip_flag) {
  2070. if (iir == MOXA_MUST_IIR_GDA ||
  2071. iir == MOXA_MUST_IIR_RDA ||
  2072. iir == MOXA_MUST_IIR_RTO ||
  2073. iir == MOXA_MUST_IIR_LSR)
  2074. mxser_receive_chars(tty, port,
  2075. &status);
  2076. } else {
  2077. status &= port->read_status_mask;
  2078. if (status & UART_LSR_DR)
  2079. mxser_receive_chars(tty, port,
  2080. &status);
  2081. }
  2082. msr = inb(port->ioaddr + UART_MSR);
  2083. if (msr & UART_MSR_ANY_DELTA)
  2084. mxser_check_modem_status(tty, port, msr);
  2085. if (port->board->chip_flag) {
  2086. if (iir == 0x02 && (status &
  2087. UART_LSR_THRE))
  2088. mxser_transmit_chars(tty, port);
  2089. } else {
  2090. if (status & UART_LSR_THRE)
  2091. mxser_transmit_chars(tty, port);
  2092. }
  2093. tty_kref_put(tty);
  2094. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  2095. spin_unlock(&port->slock);
  2096. }
  2097. }
  2098. irq_stop:
  2099. return handled;
  2100. }
  2101. static const struct tty_operations mxser_ops = {
  2102. .open = mxser_open,
  2103. .close = mxser_close,
  2104. .write = mxser_write,
  2105. .put_char = mxser_put_char,
  2106. .flush_chars = mxser_flush_chars,
  2107. .write_room = mxser_write_room,
  2108. .chars_in_buffer = mxser_chars_in_buffer,
  2109. .flush_buffer = mxser_flush_buffer,
  2110. .ioctl = mxser_ioctl,
  2111. .throttle = mxser_throttle,
  2112. .unthrottle = mxser_unthrottle,
  2113. .set_termios = mxser_set_termios,
  2114. .stop = mxser_stop,
  2115. .start = mxser_start,
  2116. .hangup = mxser_hangup,
  2117. .break_ctl = mxser_rs_break,
  2118. .wait_until_sent = mxser_wait_until_sent,
  2119. .tiocmget = mxser_tiocmget,
  2120. .tiocmset = mxser_tiocmset,
  2121. };
  2122. /*
  2123. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2124. */
  2125. static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
  2126. unsigned int irq)
  2127. {
  2128. if (irq)
  2129. free_irq(brd->irq, brd);
  2130. if (pdev != NULL) { /* PCI */
  2131. #ifdef CONFIG_PCI
  2132. pci_release_region(pdev, 2);
  2133. pci_release_region(pdev, 3);
  2134. #endif
  2135. } else {
  2136. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2137. release_region(brd->vector, 1);
  2138. }
  2139. }
  2140. static int __devinit mxser_initbrd(struct mxser_board *brd,
  2141. struct pci_dev *pdev)
  2142. {
  2143. struct mxser_port *info;
  2144. unsigned int i;
  2145. int retval;
  2146. printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
  2147. brd->ports[0].max_baud);
  2148. for (i = 0; i < brd->info->nports; i++) {
  2149. info = &brd->ports[i];
  2150. tty_port_init(&info->port);
  2151. info->board = brd;
  2152. info->stop_rx = 0;
  2153. info->ldisc_stop_rx = 0;
  2154. /* Enhance mode enabled here */
  2155. if (brd->chip_flag != MOXA_OTHER_UART)
  2156. mxser_enable_must_enchance_mode(info->ioaddr);
  2157. info->port.flags = ASYNC_SHARE_IRQ;
  2158. info->type = brd->uart_type;
  2159. process_txrx_fifo(info);
  2160. info->custom_divisor = info->baud_base * 16;
  2161. info->port.close_delay = 5 * HZ / 10;
  2162. info->port.closing_wait = 30 * HZ;
  2163. info->normal_termios = mxvar_sdriver->init_termios;
  2164. init_waitqueue_head(&info->delta_msr_wait);
  2165. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2166. info->err_shadow = 0;
  2167. spin_lock_init(&info->slock);
  2168. /* before set INT ISR, disable all int */
  2169. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2170. info->ioaddr + UART_IER);
  2171. }
  2172. retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
  2173. brd);
  2174. if (retval) {
  2175. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2176. "conflict with another device.\n",
  2177. brd->info->name, brd->irq);
  2178. /* We hold resources, we need to release them. */
  2179. mxser_release_res(brd, pdev, 0);
  2180. }
  2181. return retval;
  2182. }
  2183. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2184. {
  2185. int id, i, bits;
  2186. unsigned short regs[16], irq;
  2187. unsigned char scratch, scratch2;
  2188. brd->chip_flag = MOXA_OTHER_UART;
  2189. id = mxser_read_register(cap, regs);
  2190. switch (id) {
  2191. case C168_ASIC_ID:
  2192. brd->info = &mxser_cards[0];
  2193. break;
  2194. case C104_ASIC_ID:
  2195. brd->info = &mxser_cards[1];
  2196. break;
  2197. case CI104J_ASIC_ID:
  2198. brd->info = &mxser_cards[2];
  2199. break;
  2200. case C102_ASIC_ID:
  2201. brd->info = &mxser_cards[5];
  2202. break;
  2203. case CI132_ASIC_ID:
  2204. brd->info = &mxser_cards[6];
  2205. break;
  2206. case CI134_ASIC_ID:
  2207. brd->info = &mxser_cards[7];
  2208. break;
  2209. default:
  2210. return 0;
  2211. }
  2212. irq = 0;
  2213. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2214. Flag-hack checks if configuration should be read as 2-port here. */
  2215. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2216. irq = regs[9] & 0xF000;
  2217. irq = irq | (irq >> 4);
  2218. if (irq != (regs[9] & 0xFF00))
  2219. goto err_irqconflict;
  2220. } else if (brd->info->nports == 4) {
  2221. irq = regs[9] & 0xF000;
  2222. irq = irq | (irq >> 4);
  2223. irq = irq | (irq >> 8);
  2224. if (irq != regs[9])
  2225. goto err_irqconflict;
  2226. } else if (brd->info->nports == 8) {
  2227. irq = regs[9] & 0xF000;
  2228. irq = irq | (irq >> 4);
  2229. irq = irq | (irq >> 8);
  2230. if ((irq != regs[9]) || (irq != regs[10]))
  2231. goto err_irqconflict;
  2232. }
  2233. if (!irq) {
  2234. printk(KERN_ERR "mxser: interrupt number unset\n");
  2235. return -EIO;
  2236. }
  2237. brd->irq = ((int)(irq & 0xF000) >> 12);
  2238. for (i = 0; i < 8; i++)
  2239. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2240. if ((regs[12] & 0x80) == 0) {
  2241. printk(KERN_ERR "mxser: invalid interrupt vector\n");
  2242. return -EIO;
  2243. }
  2244. brd->vector = (int)regs[11]; /* interrupt vector */
  2245. if (id == 1)
  2246. brd->vector_mask = 0x00FF;
  2247. else
  2248. brd->vector_mask = 0x000F;
  2249. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2250. if (regs[12] & bits) {
  2251. brd->ports[i].baud_base = 921600;
  2252. brd->ports[i].max_baud = 921600;
  2253. } else {
  2254. brd->ports[i].baud_base = 115200;
  2255. brd->ports[i].max_baud = 115200;
  2256. }
  2257. }
  2258. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2259. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2260. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2261. outb(scratch2, cap + UART_LCR);
  2262. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2263. scratch = inb(cap + UART_IIR);
  2264. if (scratch & 0xC0)
  2265. brd->uart_type = PORT_16550A;
  2266. else
  2267. brd->uart_type = PORT_16450;
  2268. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2269. "mxser(IO)")) {
  2270. printk(KERN_ERR "mxser: can't request ports I/O region: "
  2271. "0x%.8lx-0x%.8lx\n",
  2272. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2273. 8 * brd->info->nports - 1);
  2274. return -EIO;
  2275. }
  2276. if (!request_region(brd->vector, 1, "mxser(vector)")) {
  2277. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2278. printk(KERN_ERR "mxser: can't request interrupt vector region: "
  2279. "0x%.8lx-0x%.8lx\n",
  2280. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2281. 8 * brd->info->nports - 1);
  2282. return -EIO;
  2283. }
  2284. return brd->info->nports;
  2285. err_irqconflict:
  2286. printk(KERN_ERR "mxser: invalid interrupt number\n");
  2287. return -EIO;
  2288. }
  2289. static int __devinit mxser_probe(struct pci_dev *pdev,
  2290. const struct pci_device_id *ent)
  2291. {
  2292. #ifdef CONFIG_PCI
  2293. struct mxser_board *brd;
  2294. unsigned int i, j;
  2295. unsigned long ioaddress;
  2296. int retval = -EINVAL;
  2297. for (i = 0; i < MXSER_BOARDS; i++)
  2298. if (mxser_boards[i].info == NULL)
  2299. break;
  2300. if (i >= MXSER_BOARDS) {
  2301. dev_err(&pdev->dev, "too many boards found (maximum %d), board "
  2302. "not configured\n", MXSER_BOARDS);
  2303. goto err;
  2304. }
  2305. brd = &mxser_boards[i];
  2306. brd->idx = i * MXSER_PORTS_PER_BOARD;
  2307. dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
  2308. mxser_cards[ent->driver_data].name,
  2309. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2310. retval = pci_enable_device(pdev);
  2311. if (retval) {
  2312. dev_err(&pdev->dev, "PCI enable failed\n");
  2313. goto err;
  2314. }
  2315. /* io address */
  2316. ioaddress = pci_resource_start(pdev, 2);
  2317. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2318. if (retval)
  2319. goto err;
  2320. brd->info = &mxser_cards[ent->driver_data];
  2321. for (i = 0; i < brd->info->nports; i++)
  2322. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2323. /* vector */
  2324. ioaddress = pci_resource_start(pdev, 3);
  2325. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2326. if (retval)
  2327. goto err_relio;
  2328. brd->vector = ioaddress;
  2329. /* irq */
  2330. brd->irq = pdev->irq;
  2331. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2332. brd->uart_type = PORT_16550A;
  2333. brd->vector_mask = 0;
  2334. for (i = 0; i < brd->info->nports; i++) {
  2335. for (j = 0; j < UART_INFO_NUM; j++) {
  2336. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2337. brd->ports[i].max_baud =
  2338. Gpci_uart_info[j].max_baud;
  2339. /* exception....CP-102 */
  2340. if (brd->info->flags & MXSER_HIGHBAUD)
  2341. brd->ports[i].max_baud = 921600;
  2342. break;
  2343. }
  2344. }
  2345. }
  2346. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2347. for (i = 0; i < brd->info->nports; i++) {
  2348. if (i < 4)
  2349. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2350. else
  2351. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2352. }
  2353. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2354. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2355. }
  2356. for (i = 0; i < brd->info->nports; i++) {
  2357. brd->vector_mask |= (1 << i);
  2358. brd->ports[i].baud_base = 921600;
  2359. }
  2360. /* mxser_initbrd will hook ISR. */
  2361. retval = mxser_initbrd(brd, pdev);
  2362. if (retval)
  2363. goto err_null;
  2364. for (i = 0; i < brd->info->nports; i++)
  2365. tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
  2366. pci_set_drvdata(pdev, brd);
  2367. return 0;
  2368. err_relio:
  2369. pci_release_region(pdev, 2);
  2370. err_null:
  2371. brd->info = NULL;
  2372. err:
  2373. return retval;
  2374. #else
  2375. return -ENODEV;
  2376. #endif
  2377. }
  2378. static void __devexit mxser_remove(struct pci_dev *pdev)
  2379. {
  2380. struct mxser_board *brd = pci_get_drvdata(pdev);
  2381. unsigned int i;
  2382. for (i = 0; i < brd->info->nports; i++)
  2383. tty_unregister_device(mxvar_sdriver, brd->idx + i);
  2384. mxser_release_res(brd, pdev, 1);
  2385. brd->info = NULL;
  2386. }
  2387. static struct pci_driver mxser_driver = {
  2388. .name = "mxser",
  2389. .id_table = mxser_pcibrds,
  2390. .probe = mxser_probe,
  2391. .remove = __devexit_p(mxser_remove)
  2392. };
  2393. static int __init mxser_module_init(void)
  2394. {
  2395. struct mxser_board *brd;
  2396. unsigned int b, i, m;
  2397. int retval;
  2398. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2399. if (!mxvar_sdriver)
  2400. return -ENOMEM;
  2401. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2402. MXSER_VERSION);
  2403. /* Initialize the tty_driver structure */
  2404. mxvar_sdriver->owner = THIS_MODULE;
  2405. mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
  2406. mxvar_sdriver->name = "ttyMI";
  2407. mxvar_sdriver->major = ttymajor;
  2408. mxvar_sdriver->minor_start = 0;
  2409. mxvar_sdriver->num = MXSER_PORTS + 1;
  2410. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2411. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2412. mxvar_sdriver->init_termios = tty_std_termios;
  2413. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2414. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2415. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2416. retval = tty_register_driver(mxvar_sdriver);
  2417. if (retval) {
  2418. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2419. "tty driver !\n");
  2420. goto err_put;
  2421. }
  2422. /* Start finding ISA boards here */
  2423. for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
  2424. if (!ioaddr[b])
  2425. continue;
  2426. brd = &mxser_boards[m];
  2427. retval = mxser_get_ISA_conf(!ioaddr[b], brd);
  2428. if (retval <= 0) {
  2429. brd->info = NULL;
  2430. continue;
  2431. }
  2432. printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
  2433. brd->info->name, ioaddr[b]);
  2434. /* mxser_initbrd will hook ISR. */
  2435. if (mxser_initbrd(brd, NULL) < 0) {
  2436. brd->info = NULL;
  2437. continue;
  2438. }
  2439. brd->idx = m * MXSER_PORTS_PER_BOARD;
  2440. for (i = 0; i < brd->info->nports; i++)
  2441. tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
  2442. m++;
  2443. }
  2444. retval = pci_register_driver(&mxser_driver);
  2445. if (retval) {
  2446. printk(KERN_ERR "mxser: can't register pci driver\n");
  2447. if (!m) {
  2448. retval = -ENODEV;
  2449. goto err_unr;
  2450. } /* else: we have some ISA cards under control */
  2451. }
  2452. return 0;
  2453. err_unr:
  2454. tty_unregister_driver(mxvar_sdriver);
  2455. err_put:
  2456. put_tty_driver(mxvar_sdriver);
  2457. return retval;
  2458. }
  2459. static void __exit mxser_module_exit(void)
  2460. {
  2461. unsigned int i, j;
  2462. pci_unregister_driver(&mxser_driver);
  2463. for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
  2464. if (mxser_boards[i].info != NULL)
  2465. for (j = 0; j < mxser_boards[i].info->nports; j++)
  2466. tty_unregister_device(mxvar_sdriver,
  2467. mxser_boards[i].idx + j);
  2468. tty_unregister_driver(mxvar_sdriver);
  2469. put_tty_driver(mxvar_sdriver);
  2470. for (i = 0; i < MXSER_BOARDS; i++)
  2471. if (mxser_boards[i].info != NULL)
  2472. mxser_release_res(&mxser_boards[i], NULL, 1);
  2473. }
  2474. module_init(mxser_module_init);
  2475. module_exit(mxser_module_exit);