setup.c 18 KB

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  1. /*
  2. * linux/arch/mips/txx9/generic/setup.c
  3. *
  4. * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
  5. * and RBTX49xx patch from CELF patch archive.
  6. *
  7. * 2003-2005 (c) MontaVista Software, Inc.
  8. * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
  9. *
  10. * This file is subject to the terms and conditions of the GNU General Public
  11. * License. See the file "COPYING" in the main directory of this archive
  12. * for more details.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/string.h>
  19. #include <linux/module.h>
  20. #include <linux/clk.h>
  21. #include <linux/err.h>
  22. #include <linux/gpio.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/serial_core.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/leds.h>
  27. #include <asm/bootinfo.h>
  28. #include <asm/time.h>
  29. #include <asm/reboot.h>
  30. #include <asm/r4kcache.h>
  31. #include <asm/sections.h>
  32. #include <asm/txx9/generic.h>
  33. #include <asm/txx9/pci.h>
  34. #include <asm/txx9tmr.h>
  35. #ifdef CONFIG_CPU_TX49XX
  36. #include <asm/txx9/tx4938.h>
  37. #endif
  38. /* EBUSC settings of TX4927, etc. */
  39. struct resource txx9_ce_res[8];
  40. static char txx9_ce_res_name[8][4]; /* "CEn" */
  41. /* pcode, internal register */
  42. unsigned int txx9_pcode;
  43. char txx9_pcode_str[8];
  44. static struct resource txx9_reg_res = {
  45. .name = txx9_pcode_str,
  46. .flags = IORESOURCE_MEM,
  47. };
  48. void __init
  49. txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
  50. {
  51. int i;
  52. for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
  53. sprintf(txx9_ce_res_name[i], "CE%d", i);
  54. txx9_ce_res[i].flags = IORESOURCE_MEM;
  55. txx9_ce_res[i].name = txx9_ce_res_name[i];
  56. }
  57. txx9_pcode = pcode;
  58. sprintf(txx9_pcode_str, "TX%x", pcode);
  59. if (base) {
  60. txx9_reg_res.start = base & 0xfffffffffULL;
  61. txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
  62. request_resource(&iomem_resource, &txx9_reg_res);
  63. }
  64. }
  65. /* clocks */
  66. unsigned int txx9_master_clock;
  67. unsigned int txx9_cpu_clock;
  68. unsigned int txx9_gbus_clock;
  69. #ifdef CONFIG_CPU_TX39XX
  70. /* don't enable by default - see errata */
  71. int txx9_ccfg_toeon __initdata;
  72. #else
  73. int txx9_ccfg_toeon __initdata = 1;
  74. #endif
  75. /* Minimum CLK support */
  76. struct clk *clk_get(struct device *dev, const char *id)
  77. {
  78. if (!strcmp(id, "spi-baseclk"))
  79. return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4);
  80. if (!strcmp(id, "imbus_clk"))
  81. return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
  82. return ERR_PTR(-ENOENT);
  83. }
  84. EXPORT_SYMBOL(clk_get);
  85. int clk_enable(struct clk *clk)
  86. {
  87. return 0;
  88. }
  89. EXPORT_SYMBOL(clk_enable);
  90. void clk_disable(struct clk *clk)
  91. {
  92. }
  93. EXPORT_SYMBOL(clk_disable);
  94. unsigned long clk_get_rate(struct clk *clk)
  95. {
  96. return (unsigned long)clk;
  97. }
  98. EXPORT_SYMBOL(clk_get_rate);
  99. void clk_put(struct clk *clk)
  100. {
  101. }
  102. EXPORT_SYMBOL(clk_put);
  103. /* GPIO support */
  104. #ifdef CONFIG_GENERIC_GPIO
  105. int gpio_to_irq(unsigned gpio)
  106. {
  107. return -EINVAL;
  108. }
  109. EXPORT_SYMBOL(gpio_to_irq);
  110. int irq_to_gpio(unsigned irq)
  111. {
  112. return -EINVAL;
  113. }
  114. EXPORT_SYMBOL(irq_to_gpio);
  115. #endif
  116. #define BOARD_VEC(board) extern struct txx9_board_vec board;
  117. #include <asm/txx9/boards.h>
  118. #undef BOARD_VEC
  119. struct txx9_board_vec *txx9_board_vec __initdata;
  120. static char txx9_system_type[32];
  121. static struct txx9_board_vec *board_vecs[] __initdata = {
  122. #define BOARD_VEC(board) &board,
  123. #include <asm/txx9/boards.h>
  124. #undef BOARD_VEC
  125. };
  126. static struct txx9_board_vec *__init find_board_byname(const char *name)
  127. {
  128. int i;
  129. /* search board_vecs table */
  130. for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
  131. if (strstr(board_vecs[i]->system, name))
  132. return board_vecs[i];
  133. }
  134. return NULL;
  135. }
  136. static void __init prom_init_cmdline(void)
  137. {
  138. int argc;
  139. int *argv32;
  140. int i; /* Always ignore the "-c" at argv[0] */
  141. char builtin[CL_SIZE];
  142. if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
  143. /*
  144. * argc is not a valid number, or argv32 is not a valid
  145. * pointer
  146. */
  147. argc = 0;
  148. argv32 = NULL;
  149. } else {
  150. argc = (int)fw_arg0;
  151. argv32 = (int *)fw_arg1;
  152. }
  153. /* ignore all built-in args if any f/w args given */
  154. /*
  155. * But if built-in strings was started with '+', append them
  156. * to command line args. If built-in was started with '-',
  157. * ignore all f/w args.
  158. */
  159. builtin[0] = '\0';
  160. if (arcs_cmdline[0] == '+')
  161. strcpy(builtin, arcs_cmdline + 1);
  162. else if (arcs_cmdline[0] == '-') {
  163. strcpy(builtin, arcs_cmdline + 1);
  164. argc = 0;
  165. } else if (argc <= 1)
  166. strcpy(builtin, arcs_cmdline);
  167. arcs_cmdline[0] = '\0';
  168. for (i = 1; i < argc; i++) {
  169. char *str = (char *)(long)argv32[i];
  170. if (i != 1)
  171. strcat(arcs_cmdline, " ");
  172. if (strchr(str, ' ')) {
  173. strcat(arcs_cmdline, "\"");
  174. strcat(arcs_cmdline, str);
  175. strcat(arcs_cmdline, "\"");
  176. } else
  177. strcat(arcs_cmdline, str);
  178. }
  179. /* append saved builtin args */
  180. if (builtin[0]) {
  181. if (arcs_cmdline[0])
  182. strcat(arcs_cmdline, " ");
  183. strcat(arcs_cmdline, builtin);
  184. }
  185. }
  186. static int txx9_ic_disable __initdata;
  187. static int txx9_dc_disable __initdata;
  188. #if defined(CONFIG_CPU_TX49XX)
  189. /* flush all cache on very early stage (before 4k_cache_init) */
  190. static void __init early_flush_dcache(void)
  191. {
  192. unsigned int conf = read_c0_config();
  193. unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
  194. unsigned int linesz = 32;
  195. unsigned long addr, end;
  196. end = INDEX_BASE + dc_size / 4;
  197. /* 4way, waybit=0 */
  198. for (addr = INDEX_BASE; addr < end; addr += linesz) {
  199. cache_op(Index_Writeback_Inv_D, addr | 0);
  200. cache_op(Index_Writeback_Inv_D, addr | 1);
  201. cache_op(Index_Writeback_Inv_D, addr | 2);
  202. cache_op(Index_Writeback_Inv_D, addr | 3);
  203. }
  204. }
  205. static void __init txx9_cache_fixup(void)
  206. {
  207. unsigned int conf;
  208. conf = read_c0_config();
  209. /* flush and disable */
  210. if (txx9_ic_disable) {
  211. conf |= TX49_CONF_IC;
  212. write_c0_config(conf);
  213. }
  214. if (txx9_dc_disable) {
  215. early_flush_dcache();
  216. conf |= TX49_CONF_DC;
  217. write_c0_config(conf);
  218. }
  219. /* enable cache */
  220. conf = read_c0_config();
  221. if (!txx9_ic_disable)
  222. conf &= ~TX49_CONF_IC;
  223. if (!txx9_dc_disable)
  224. conf &= ~TX49_CONF_DC;
  225. write_c0_config(conf);
  226. if (conf & TX49_CONF_IC)
  227. pr_info("TX49XX I-Cache disabled.\n");
  228. if (conf & TX49_CONF_DC)
  229. pr_info("TX49XX D-Cache disabled.\n");
  230. }
  231. #elif defined(CONFIG_CPU_TX39XX)
  232. /* flush all cache on very early stage (before tx39_cache_init) */
  233. static void __init early_flush_dcache(void)
  234. {
  235. unsigned int conf = read_c0_config();
  236. unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
  237. TX39_CONF_DCS_SHIFT));
  238. unsigned int linesz = 16;
  239. unsigned long addr, end;
  240. end = INDEX_BASE + dc_size / 2;
  241. /* 2way, waybit=0 */
  242. for (addr = INDEX_BASE; addr < end; addr += linesz) {
  243. cache_op(Index_Writeback_Inv_D, addr | 0);
  244. cache_op(Index_Writeback_Inv_D, addr | 1);
  245. }
  246. }
  247. static void __init txx9_cache_fixup(void)
  248. {
  249. unsigned int conf;
  250. conf = read_c0_config();
  251. /* flush and disable */
  252. if (txx9_ic_disable) {
  253. conf &= ~TX39_CONF_ICE;
  254. write_c0_config(conf);
  255. }
  256. if (txx9_dc_disable) {
  257. early_flush_dcache();
  258. conf &= ~TX39_CONF_DCE;
  259. write_c0_config(conf);
  260. }
  261. /* enable cache */
  262. conf = read_c0_config();
  263. if (!txx9_ic_disable)
  264. conf |= TX39_CONF_ICE;
  265. if (!txx9_dc_disable)
  266. conf |= TX39_CONF_DCE;
  267. write_c0_config(conf);
  268. if (!(conf & TX39_CONF_ICE))
  269. pr_info("TX39XX I-Cache disabled.\n");
  270. if (!(conf & TX39_CONF_DCE))
  271. pr_info("TX39XX D-Cache disabled.\n");
  272. }
  273. #else
  274. static inline void txx9_cache_fixup(void)
  275. {
  276. }
  277. #endif
  278. static void __init preprocess_cmdline(void)
  279. {
  280. char cmdline[CL_SIZE];
  281. char *s;
  282. strcpy(cmdline, arcs_cmdline);
  283. s = cmdline;
  284. arcs_cmdline[0] = '\0';
  285. while (s && *s) {
  286. char *str = strsep(&s, " ");
  287. if (strncmp(str, "board=", 6) == 0) {
  288. txx9_board_vec = find_board_byname(str + 6);
  289. continue;
  290. } else if (strncmp(str, "masterclk=", 10) == 0) {
  291. unsigned long val;
  292. if (strict_strtoul(str + 10, 10, &val) == 0)
  293. txx9_master_clock = val;
  294. continue;
  295. } else if (strcmp(str, "icdisable") == 0) {
  296. txx9_ic_disable = 1;
  297. continue;
  298. } else if (strcmp(str, "dcdisable") == 0) {
  299. txx9_dc_disable = 1;
  300. continue;
  301. } else if (strcmp(str, "toeoff") == 0) {
  302. txx9_ccfg_toeon = 0;
  303. continue;
  304. } else if (strcmp(str, "toeon") == 0) {
  305. txx9_ccfg_toeon = 1;
  306. continue;
  307. }
  308. if (arcs_cmdline[0])
  309. strcat(arcs_cmdline, " ");
  310. strcat(arcs_cmdline, str);
  311. }
  312. txx9_cache_fixup();
  313. }
  314. static void __init select_board(void)
  315. {
  316. const char *envstr;
  317. /* first, determine by "board=" argument in preprocess_cmdline() */
  318. if (txx9_board_vec)
  319. return;
  320. /* next, determine by "board" envvar */
  321. envstr = prom_getenv("board");
  322. if (envstr) {
  323. txx9_board_vec = find_board_byname(envstr);
  324. if (txx9_board_vec)
  325. return;
  326. }
  327. /* select "default" board */
  328. #ifdef CONFIG_CPU_TX39XX
  329. txx9_board_vec = &jmr3927_vec;
  330. #endif
  331. #ifdef CONFIG_CPU_TX49XX
  332. switch (TX4938_REV_PCODE()) {
  333. #ifdef CONFIG_TOSHIBA_RBTX4927
  334. case 0x4927:
  335. txx9_board_vec = &rbtx4927_vec;
  336. break;
  337. case 0x4937:
  338. txx9_board_vec = &rbtx4937_vec;
  339. break;
  340. #endif
  341. #ifdef CONFIG_TOSHIBA_RBTX4938
  342. case 0x4938:
  343. txx9_board_vec = &rbtx4938_vec;
  344. break;
  345. #endif
  346. #ifdef CONFIG_TOSHIBA_RBTX4939
  347. case 0x4939:
  348. txx9_board_vec = &rbtx4939_vec;
  349. break;
  350. #endif
  351. }
  352. #endif
  353. }
  354. void __init prom_init(void)
  355. {
  356. prom_init_cmdline();
  357. preprocess_cmdline();
  358. select_board();
  359. strcpy(txx9_system_type, txx9_board_vec->system);
  360. txx9_board_vec->prom_init();
  361. }
  362. void __init prom_free_prom_memory(void)
  363. {
  364. unsigned long saddr = PAGE_SIZE;
  365. unsigned long eaddr = __pa_symbol(&_text);
  366. if (saddr < eaddr)
  367. free_init_pages("prom memory", saddr, eaddr);
  368. }
  369. const char *get_system_type(void)
  370. {
  371. return txx9_system_type;
  372. }
  373. char * __init prom_getcmdline(void)
  374. {
  375. return &(arcs_cmdline[0]);
  376. }
  377. const char *__init prom_getenv(const char *name)
  378. {
  379. const s32 *str;
  380. if (fw_arg2 < CKSEG0)
  381. return NULL;
  382. str = (const s32 *)fw_arg2;
  383. /* YAMON style ("name", "value" pairs) */
  384. while (str[0] && str[1]) {
  385. if (!strcmp((const char *)(unsigned long)str[0], name))
  386. return (const char *)(unsigned long)str[1];
  387. str += 2;
  388. }
  389. return NULL;
  390. }
  391. static void __noreturn txx9_machine_halt(void)
  392. {
  393. local_irq_disable();
  394. clear_c0_status(ST0_IM);
  395. while (1) {
  396. if (cpu_wait) {
  397. (*cpu_wait)();
  398. if (cpu_has_counter) {
  399. /*
  400. * Clear counter interrupt while it
  401. * breaks WAIT instruction even if
  402. * masked.
  403. */
  404. write_c0_compare(0);
  405. }
  406. }
  407. }
  408. }
  409. /* Watchdog support */
  410. void __init txx9_wdt_init(unsigned long base)
  411. {
  412. struct resource res = {
  413. .start = base,
  414. .end = base + 0x100 - 1,
  415. .flags = IORESOURCE_MEM,
  416. };
  417. platform_device_register_simple("txx9wdt", -1, &res, 1);
  418. }
  419. void txx9_wdt_now(unsigned long base)
  420. {
  421. struct txx9_tmr_reg __iomem *tmrptr =
  422. ioremap(base, sizeof(struct txx9_tmr_reg));
  423. /* disable watch dog timer */
  424. __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
  425. __raw_writel(0, &tmrptr->tcr);
  426. /* kick watchdog */
  427. __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
  428. __raw_writel(1, &tmrptr->cpra); /* immediate */
  429. __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
  430. &tmrptr->tcr);
  431. }
  432. /* SPI support */
  433. void __init txx9_spi_init(int busid, unsigned long base, int irq)
  434. {
  435. struct resource res[] = {
  436. {
  437. .start = base,
  438. .end = base + 0x20 - 1,
  439. .flags = IORESOURCE_MEM,
  440. }, {
  441. .start = irq,
  442. .flags = IORESOURCE_IRQ,
  443. },
  444. };
  445. platform_device_register_simple("spi_txx9", busid,
  446. res, ARRAY_SIZE(res));
  447. }
  448. void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
  449. {
  450. struct platform_device *pdev =
  451. platform_device_alloc("tc35815-mac", id);
  452. if (!pdev ||
  453. platform_device_add_data(pdev, ethaddr, 6) ||
  454. platform_device_add(pdev))
  455. platform_device_put(pdev);
  456. }
  457. void __init txx9_sio_init(unsigned long baseaddr, int irq,
  458. unsigned int line, unsigned int sclk, int nocts)
  459. {
  460. #ifdef CONFIG_SERIAL_TXX9
  461. struct uart_port req;
  462. memset(&req, 0, sizeof(req));
  463. req.line = line;
  464. req.iotype = UPIO_MEM;
  465. req.membase = ioremap(baseaddr, 0x24);
  466. req.mapbase = baseaddr;
  467. req.irq = irq;
  468. if (!nocts)
  469. req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
  470. if (sclk) {
  471. req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
  472. req.uartclk = sclk;
  473. } else
  474. req.uartclk = TXX9_IMCLK;
  475. early_serial_txx9_setup(&req);
  476. #endif /* CONFIG_SERIAL_TXX9 */
  477. }
  478. #ifdef CONFIG_EARLY_PRINTK
  479. static void __init null_prom_putchar(char c)
  480. {
  481. }
  482. void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;
  483. void __init prom_putchar(char c)
  484. {
  485. txx9_prom_putchar(c);
  486. }
  487. static void __iomem *early_txx9_sio_port;
  488. static void __init early_txx9_sio_putchar(char c)
  489. {
  490. #define TXX9_SICISR 0x0c
  491. #define TXX9_SITFIFO 0x1c
  492. #define TXX9_SICISR_TXALS 0x00000002
  493. while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
  494. TXX9_SICISR_TXALS))
  495. ;
  496. __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
  497. }
  498. void __init txx9_sio_putchar_init(unsigned long baseaddr)
  499. {
  500. early_txx9_sio_port = ioremap(baseaddr, 0x24);
  501. txx9_prom_putchar = early_txx9_sio_putchar;
  502. }
  503. #endif /* CONFIG_EARLY_PRINTK */
  504. /* wrappers */
  505. void __init plat_mem_setup(void)
  506. {
  507. ioport_resource.start = 0;
  508. ioport_resource.end = ~0UL; /* no limit */
  509. iomem_resource.start = 0;
  510. iomem_resource.end = ~0UL; /* no limit */
  511. /* fallback restart/halt routines */
  512. _machine_restart = (void (*)(char *))txx9_machine_halt;
  513. _machine_halt = txx9_machine_halt;
  514. pm_power_off = txx9_machine_halt;
  515. #ifdef CONFIG_PCI
  516. pcibios_plat_setup = txx9_pcibios_setup;
  517. #endif
  518. txx9_board_vec->mem_setup();
  519. }
  520. void __init arch_init_irq(void)
  521. {
  522. txx9_board_vec->irq_setup();
  523. }
  524. void __init plat_time_init(void)
  525. {
  526. #ifdef CONFIG_CPU_TX49XX
  527. mips_hpt_frequency = txx9_cpu_clock / 2;
  528. #endif
  529. txx9_board_vec->time_init();
  530. }
  531. static int __init _txx9_arch_init(void)
  532. {
  533. if (txx9_board_vec->arch_init)
  534. txx9_board_vec->arch_init();
  535. return 0;
  536. }
  537. arch_initcall(_txx9_arch_init);
  538. static int __init _txx9_device_init(void)
  539. {
  540. if (txx9_board_vec->device_init)
  541. txx9_board_vec->device_init();
  542. return 0;
  543. }
  544. device_initcall(_txx9_device_init);
  545. int (*txx9_irq_dispatch)(int pending);
  546. asmlinkage void plat_irq_dispatch(void)
  547. {
  548. int pending = read_c0_status() & read_c0_cause() & ST0_IM;
  549. int irq = txx9_irq_dispatch(pending);
  550. if (likely(irq >= 0))
  551. do_IRQ(irq);
  552. else
  553. spurious_interrupt();
  554. }
  555. /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
  556. #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
  557. static unsigned long __swizzle_addr_none(unsigned long port)
  558. {
  559. return port;
  560. }
  561. unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
  562. EXPORT_SYMBOL(__swizzle_addr_b);
  563. #endif
  564. #ifdef NEEDS_TXX9_IOSWABW
  565. static u16 ioswabw_default(volatile u16 *a, u16 x)
  566. {
  567. return le16_to_cpu(x);
  568. }
  569. static u16 __mem_ioswabw_default(volatile u16 *a, u16 x)
  570. {
  571. return x;
  572. }
  573. u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default;
  574. EXPORT_SYMBOL(ioswabw);
  575. u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default;
  576. EXPORT_SYMBOL(__mem_ioswabw);
  577. #endif
  578. void __init txx9_physmap_flash_init(int no, unsigned long addr,
  579. unsigned long size,
  580. const struct physmap_flash_data *pdata)
  581. {
  582. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  583. struct resource res = {
  584. .start = addr,
  585. .end = addr + size - 1,
  586. .flags = IORESOURCE_MEM,
  587. };
  588. struct platform_device *pdev;
  589. #ifdef CONFIG_MTD_PARTITIONS
  590. static struct mtd_partition parts[2];
  591. struct physmap_flash_data pdata_part;
  592. /* If this area contained boot area, make separate partition */
  593. if (pdata->nr_parts == 0 && !pdata->parts &&
  594. addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
  595. !parts[0].name) {
  596. parts[0].name = "boot";
  597. parts[0].offset = 0x1fc00000 - addr;
  598. parts[0].size = addr + size - 0x1fc00000;
  599. parts[1].name = "user";
  600. parts[1].offset = 0;
  601. parts[1].size = 0x1fc00000 - addr;
  602. pdata_part = *pdata;
  603. pdata_part.nr_parts = ARRAY_SIZE(parts);
  604. pdata_part.parts = parts;
  605. pdata = &pdata_part;
  606. }
  607. #endif
  608. pdev = platform_device_alloc("physmap-flash", no);
  609. if (!pdev ||
  610. platform_device_add_resources(pdev, &res, 1) ||
  611. platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
  612. platform_device_add(pdev))
  613. platform_device_put(pdev);
  614. #endif
  615. }
  616. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  617. static DEFINE_SPINLOCK(txx9_iocled_lock);
  618. #define TXX9_IOCLED_MAXLEDS 8
  619. struct txx9_iocled_data {
  620. struct gpio_chip chip;
  621. u8 cur_val;
  622. void __iomem *mmioaddr;
  623. struct gpio_led_platform_data pdata;
  624. struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
  625. char names[TXX9_IOCLED_MAXLEDS][32];
  626. };
  627. static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
  628. {
  629. struct txx9_iocled_data *data =
  630. container_of(chip, struct txx9_iocled_data, chip);
  631. return data->cur_val & (1 << offset);
  632. }
  633. static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
  634. int value)
  635. {
  636. struct txx9_iocled_data *data =
  637. container_of(chip, struct txx9_iocled_data, chip);
  638. unsigned long flags;
  639. spin_lock_irqsave(&txx9_iocled_lock, flags);
  640. if (value)
  641. data->cur_val |= 1 << offset;
  642. else
  643. data->cur_val &= ~(1 << offset);
  644. writeb(data->cur_val, data->mmioaddr);
  645. mmiowb();
  646. spin_unlock_irqrestore(&txx9_iocled_lock, flags);
  647. }
  648. static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
  649. {
  650. return 0;
  651. }
  652. static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
  653. int value)
  654. {
  655. txx9_iocled_set(chip, offset, value);
  656. return 0;
  657. }
  658. void __init txx9_iocled_init(unsigned long baseaddr,
  659. int basenum, unsigned int num, int lowactive,
  660. const char *color, char **deftriggers)
  661. {
  662. struct txx9_iocled_data *iocled;
  663. struct platform_device *pdev;
  664. int i;
  665. static char *default_triggers[] __initdata = {
  666. "heartbeat",
  667. "ide-disk",
  668. "nand-disk",
  669. NULL,
  670. };
  671. if (!deftriggers)
  672. deftriggers = default_triggers;
  673. iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
  674. if (!iocled)
  675. return;
  676. iocled->mmioaddr = ioremap(baseaddr, 1);
  677. if (!iocled->mmioaddr)
  678. return;
  679. iocled->chip.get = txx9_iocled_get;
  680. iocled->chip.set = txx9_iocled_set;
  681. iocled->chip.direction_input = txx9_iocled_dir_in;
  682. iocled->chip.direction_output = txx9_iocled_dir_out;
  683. iocled->chip.label = "iocled";
  684. iocled->chip.base = basenum;
  685. iocled->chip.ngpio = num;
  686. if (gpiochip_add(&iocled->chip))
  687. return;
  688. if (basenum < 0)
  689. basenum = iocled->chip.base;
  690. pdev = platform_device_alloc("leds-gpio", basenum);
  691. if (!pdev)
  692. return;
  693. iocled->pdata.num_leds = num;
  694. iocled->pdata.leds = iocled->leds;
  695. for (i = 0; i < num; i++) {
  696. struct gpio_led *led = &iocled->leds[i];
  697. snprintf(iocled->names[i], sizeof(iocled->names[i]),
  698. "iocled:%s:%u", color, i);
  699. led->name = iocled->names[i];
  700. led->gpio = basenum + i;
  701. led->active_low = lowactive;
  702. if (deftriggers && *deftriggers)
  703. led->default_trigger = *deftriggers++;
  704. }
  705. pdev->dev.platform_data = &iocled->pdata;
  706. if (platform_device_add(pdev))
  707. platform_device_put(pdev);
  708. }
  709. #else /* CONFIG_LEDS_GPIO */
  710. void __init txx9_iocled_init(unsigned long baseaddr,
  711. int basenum, unsigned int num, int lowactive,
  712. const char *color, char **deftriggers)
  713. {
  714. }
  715. #endif /* CONFIG_LEDS_GPIO */