x86.c 105 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372
  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * derived from drivers/kvm/kvm_main.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. * Copyright (C) 2008 Qumranet, Inc.
  8. * Copyright IBM Corporation, 2008
  9. *
  10. * Authors:
  11. * Avi Kivity <avi@qumranet.com>
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Amit Shah <amit.shah@qumranet.com>
  14. * Ben-Ami Yassour <benami@il.ibm.com>
  15. *
  16. * This work is licensed under the terms of the GNU GPL, version 2. See
  17. * the COPYING file in the top-level directory.
  18. *
  19. */
  20. #include <linux/kvm_host.h>
  21. #include "irq.h"
  22. #include "mmu.h"
  23. #include "i8254.h"
  24. #include "tss.h"
  25. #include "kvm_cache_regs.h"
  26. #include "x86.h"
  27. #include <linux/clocksource.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/kvm.h>
  30. #include <linux/fs.h>
  31. #include <linux/pci.h>
  32. #include <linux/vmalloc.h>
  33. #include <linux/module.h>
  34. #include <linux/mman.h>
  35. #include <linux/highmem.h>
  36. #include <asm/uaccess.h>
  37. #include <asm/msr.h>
  38. #include <asm/desc.h>
  39. #define MAX_IO_MSRS 256
  40. #define CR0_RESERVED_BITS \
  41. (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  42. | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  43. | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  44. #define CR4_RESERVED_BITS \
  45. (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  46. | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
  47. | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
  48. | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  49. #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  50. /* EFER defaults:
  51. * - enable syscall per default because its emulated by KVM
  52. * - enable LME and LMA per default on 64 bit KVM
  53. */
  54. #ifdef CONFIG_X86_64
  55. static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  56. #else
  57. static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  58. #endif
  59. #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  60. #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  61. static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  62. struct kvm_cpuid_entry2 __user *entries);
  63. struct kvm_x86_ops *kvm_x86_ops;
  64. EXPORT_SYMBOL_GPL(kvm_x86_ops);
  65. struct kvm_stats_debugfs_item debugfs_entries[] = {
  66. { "pf_fixed", VCPU_STAT(pf_fixed) },
  67. { "pf_guest", VCPU_STAT(pf_guest) },
  68. { "tlb_flush", VCPU_STAT(tlb_flush) },
  69. { "invlpg", VCPU_STAT(invlpg) },
  70. { "exits", VCPU_STAT(exits) },
  71. { "io_exits", VCPU_STAT(io_exits) },
  72. { "mmio_exits", VCPU_STAT(mmio_exits) },
  73. { "signal_exits", VCPU_STAT(signal_exits) },
  74. { "irq_window", VCPU_STAT(irq_window_exits) },
  75. { "nmi_window", VCPU_STAT(nmi_window_exits) },
  76. { "halt_exits", VCPU_STAT(halt_exits) },
  77. { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  78. { "hypercalls", VCPU_STAT(hypercalls) },
  79. { "request_irq", VCPU_STAT(request_irq_exits) },
  80. { "irq_exits", VCPU_STAT(irq_exits) },
  81. { "host_state_reload", VCPU_STAT(host_state_reload) },
  82. { "efer_reload", VCPU_STAT(efer_reload) },
  83. { "fpu_reload", VCPU_STAT(fpu_reload) },
  84. { "insn_emulation", VCPU_STAT(insn_emulation) },
  85. { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
  86. { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
  87. { "mmu_pte_write", VM_STAT(mmu_pte_write) },
  88. { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
  89. { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
  90. { "mmu_flooded", VM_STAT(mmu_flooded) },
  91. { "mmu_recycled", VM_STAT(mmu_recycled) },
  92. { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
  93. { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
  94. { "largepages", VM_STAT(lpages) },
  95. { NULL }
  96. };
  97. static struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head,
  98. int assigned_dev_id)
  99. {
  100. struct list_head *ptr;
  101. struct kvm_assigned_dev_kernel *match;
  102. list_for_each(ptr, head) {
  103. match = list_entry(ptr, struct kvm_assigned_dev_kernel, list);
  104. if (match->assigned_dev_id == assigned_dev_id)
  105. return match;
  106. }
  107. return NULL;
  108. }
  109. static void kvm_assigned_dev_interrupt_work_handler(struct work_struct *work)
  110. {
  111. struct kvm_assigned_dev_kernel *assigned_dev;
  112. assigned_dev = container_of(work, struct kvm_assigned_dev_kernel,
  113. interrupt_work);
  114. /* This is taken to safely inject irq inside the guest. When
  115. * the interrupt injection (or the ioapic code) uses a
  116. * finer-grained lock, update this
  117. */
  118. mutex_lock(&assigned_dev->kvm->lock);
  119. kvm_set_irq(assigned_dev->kvm,
  120. assigned_dev->guest_irq, 1);
  121. mutex_unlock(&assigned_dev->kvm->lock);
  122. kvm_put_kvm(assigned_dev->kvm);
  123. }
  124. /* FIXME: Implement the OR logic needed to make shared interrupts on
  125. * this line behave properly
  126. */
  127. static irqreturn_t kvm_assigned_dev_intr(int irq, void *dev_id)
  128. {
  129. struct kvm_assigned_dev_kernel *assigned_dev =
  130. (struct kvm_assigned_dev_kernel *) dev_id;
  131. kvm_get_kvm(assigned_dev->kvm);
  132. schedule_work(&assigned_dev->interrupt_work);
  133. disable_irq_nosync(irq);
  134. return IRQ_HANDLED;
  135. }
  136. /* Ack the irq line for an assigned device */
  137. static void kvm_assigned_dev_ack_irq(struct kvm_irq_ack_notifier *kian)
  138. {
  139. struct kvm_assigned_dev_kernel *dev;
  140. if (kian->gsi == -1)
  141. return;
  142. dev = container_of(kian, struct kvm_assigned_dev_kernel,
  143. ack_notifier);
  144. kvm_set_irq(dev->kvm, dev->guest_irq, 0);
  145. enable_irq(dev->host_irq);
  146. }
  147. static int kvm_vm_ioctl_assign_irq(struct kvm *kvm,
  148. struct kvm_assigned_irq
  149. *assigned_irq)
  150. {
  151. int r = 0;
  152. struct kvm_assigned_dev_kernel *match;
  153. mutex_lock(&kvm->lock);
  154. match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
  155. assigned_irq->assigned_dev_id);
  156. if (!match) {
  157. mutex_unlock(&kvm->lock);
  158. return -EINVAL;
  159. }
  160. if (match->irq_requested) {
  161. match->guest_irq = assigned_irq->guest_irq;
  162. match->ack_notifier.gsi = assigned_irq->guest_irq;
  163. mutex_unlock(&kvm->lock);
  164. return 0;
  165. }
  166. INIT_WORK(&match->interrupt_work,
  167. kvm_assigned_dev_interrupt_work_handler);
  168. if (irqchip_in_kernel(kvm)) {
  169. if (!capable(CAP_SYS_RAWIO)) {
  170. return -EPERM;
  171. goto out;
  172. }
  173. if (assigned_irq->host_irq)
  174. match->host_irq = assigned_irq->host_irq;
  175. else
  176. match->host_irq = match->dev->irq;
  177. match->guest_irq = assigned_irq->guest_irq;
  178. match->ack_notifier.gsi = assigned_irq->guest_irq;
  179. match->ack_notifier.irq_acked = kvm_assigned_dev_ack_irq;
  180. kvm_register_irq_ack_notifier(kvm, &match->ack_notifier);
  181. /* Even though this is PCI, we don't want to use shared
  182. * interrupts. Sharing host devices with guest-assigned devices
  183. * on the same interrupt line is not a happy situation: there
  184. * are going to be long delays in accepting, acking, etc.
  185. */
  186. if (request_irq(match->host_irq, kvm_assigned_dev_intr, 0,
  187. "kvm_assigned_device", (void *)match)) {
  188. printk(KERN_INFO "%s: couldn't allocate irq for pv "
  189. "device\n", __func__);
  190. r = -EIO;
  191. goto out;
  192. }
  193. }
  194. match->irq_requested = true;
  195. out:
  196. mutex_unlock(&kvm->lock);
  197. return r;
  198. }
  199. static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
  200. struct kvm_assigned_pci_dev *assigned_dev)
  201. {
  202. int r = 0;
  203. struct kvm_assigned_dev_kernel *match;
  204. struct pci_dev *dev;
  205. mutex_lock(&kvm->lock);
  206. match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
  207. assigned_dev->assigned_dev_id);
  208. if (match) {
  209. /* device already assigned */
  210. r = -EINVAL;
  211. goto out;
  212. }
  213. match = kzalloc(sizeof(struct kvm_assigned_dev_kernel), GFP_KERNEL);
  214. if (match == NULL) {
  215. printk(KERN_INFO "%s: Couldn't allocate memory\n",
  216. __func__);
  217. r = -ENOMEM;
  218. goto out;
  219. }
  220. dev = pci_get_bus_and_slot(assigned_dev->busnr,
  221. assigned_dev->devfn);
  222. if (!dev) {
  223. printk(KERN_INFO "%s: host device not found\n", __func__);
  224. r = -EINVAL;
  225. goto out_free;
  226. }
  227. if (pci_enable_device(dev)) {
  228. printk(KERN_INFO "%s: Could not enable PCI device\n", __func__);
  229. r = -EBUSY;
  230. goto out_put;
  231. }
  232. r = pci_request_regions(dev, "kvm_assigned_device");
  233. if (r) {
  234. printk(KERN_INFO "%s: Could not get access to device regions\n",
  235. __func__);
  236. goto out_disable;
  237. }
  238. match->assigned_dev_id = assigned_dev->assigned_dev_id;
  239. match->host_busnr = assigned_dev->busnr;
  240. match->host_devfn = assigned_dev->devfn;
  241. match->dev = dev;
  242. match->kvm = kvm;
  243. list_add(&match->list, &kvm->arch.assigned_dev_head);
  244. out:
  245. mutex_unlock(&kvm->lock);
  246. return r;
  247. out_disable:
  248. pci_disable_device(dev);
  249. out_put:
  250. pci_dev_put(dev);
  251. out_free:
  252. kfree(match);
  253. mutex_unlock(&kvm->lock);
  254. return r;
  255. }
  256. static void kvm_free_assigned_devices(struct kvm *kvm)
  257. {
  258. struct list_head *ptr, *ptr2;
  259. struct kvm_assigned_dev_kernel *assigned_dev;
  260. list_for_each_safe(ptr, ptr2, &kvm->arch.assigned_dev_head) {
  261. assigned_dev = list_entry(ptr,
  262. struct kvm_assigned_dev_kernel,
  263. list);
  264. if (irqchip_in_kernel(kvm) && assigned_dev->irq_requested) {
  265. free_irq(assigned_dev->host_irq,
  266. (void *)assigned_dev);
  267. kvm_unregister_irq_ack_notifier(kvm,
  268. &assigned_dev->
  269. ack_notifier);
  270. }
  271. if (cancel_work_sync(&assigned_dev->interrupt_work))
  272. /* We had pending work. That means we will have to take
  273. * care of kvm_put_kvm.
  274. */
  275. kvm_put_kvm(kvm);
  276. pci_release_regions(assigned_dev->dev);
  277. pci_disable_device(assigned_dev->dev);
  278. pci_dev_put(assigned_dev->dev);
  279. list_del(&assigned_dev->list);
  280. kfree(assigned_dev);
  281. }
  282. }
  283. unsigned long segment_base(u16 selector)
  284. {
  285. struct descriptor_table gdt;
  286. struct desc_struct *d;
  287. unsigned long table_base;
  288. unsigned long v;
  289. if (selector == 0)
  290. return 0;
  291. asm("sgdt %0" : "=m"(gdt));
  292. table_base = gdt.base;
  293. if (selector & 4) { /* from ldt */
  294. u16 ldt_selector;
  295. asm("sldt %0" : "=g"(ldt_selector));
  296. table_base = segment_base(ldt_selector);
  297. }
  298. d = (struct desc_struct *)(table_base + (selector & ~7));
  299. v = d->base0 | ((unsigned long)d->base1 << 16) |
  300. ((unsigned long)d->base2 << 24);
  301. #ifdef CONFIG_X86_64
  302. if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
  303. v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
  304. #endif
  305. return v;
  306. }
  307. EXPORT_SYMBOL_GPL(segment_base);
  308. u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
  309. {
  310. if (irqchip_in_kernel(vcpu->kvm))
  311. return vcpu->arch.apic_base;
  312. else
  313. return vcpu->arch.apic_base;
  314. }
  315. EXPORT_SYMBOL_GPL(kvm_get_apic_base);
  316. void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
  317. {
  318. /* TODO: reserve bits check */
  319. if (irqchip_in_kernel(vcpu->kvm))
  320. kvm_lapic_set_base(vcpu, data);
  321. else
  322. vcpu->arch.apic_base = data;
  323. }
  324. EXPORT_SYMBOL_GPL(kvm_set_apic_base);
  325. void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
  326. {
  327. WARN_ON(vcpu->arch.exception.pending);
  328. vcpu->arch.exception.pending = true;
  329. vcpu->arch.exception.has_error_code = false;
  330. vcpu->arch.exception.nr = nr;
  331. }
  332. EXPORT_SYMBOL_GPL(kvm_queue_exception);
  333. void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
  334. u32 error_code)
  335. {
  336. ++vcpu->stat.pf_guest;
  337. if (vcpu->arch.exception.pending) {
  338. if (vcpu->arch.exception.nr == PF_VECTOR) {
  339. printk(KERN_DEBUG "kvm: inject_page_fault:"
  340. " double fault 0x%lx\n", addr);
  341. vcpu->arch.exception.nr = DF_VECTOR;
  342. vcpu->arch.exception.error_code = 0;
  343. } else if (vcpu->arch.exception.nr == DF_VECTOR) {
  344. /* triple fault -> shutdown */
  345. set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
  346. }
  347. return;
  348. }
  349. vcpu->arch.cr2 = addr;
  350. kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
  351. }
  352. void kvm_inject_nmi(struct kvm_vcpu *vcpu)
  353. {
  354. vcpu->arch.nmi_pending = 1;
  355. }
  356. EXPORT_SYMBOL_GPL(kvm_inject_nmi);
  357. void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
  358. {
  359. WARN_ON(vcpu->arch.exception.pending);
  360. vcpu->arch.exception.pending = true;
  361. vcpu->arch.exception.has_error_code = true;
  362. vcpu->arch.exception.nr = nr;
  363. vcpu->arch.exception.error_code = error_code;
  364. }
  365. EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
  366. static void __queue_exception(struct kvm_vcpu *vcpu)
  367. {
  368. kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
  369. vcpu->arch.exception.has_error_code,
  370. vcpu->arch.exception.error_code);
  371. }
  372. /*
  373. * Load the pae pdptrs. Return true is they are all valid.
  374. */
  375. int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
  376. {
  377. gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
  378. unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
  379. int i;
  380. int ret;
  381. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  382. ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
  383. offset * sizeof(u64), sizeof(pdpte));
  384. if (ret < 0) {
  385. ret = 0;
  386. goto out;
  387. }
  388. for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
  389. if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
  390. ret = 0;
  391. goto out;
  392. }
  393. }
  394. ret = 1;
  395. memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
  396. out:
  397. return ret;
  398. }
  399. EXPORT_SYMBOL_GPL(load_pdptrs);
  400. static bool pdptrs_changed(struct kvm_vcpu *vcpu)
  401. {
  402. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  403. bool changed = true;
  404. int r;
  405. if (is_long_mode(vcpu) || !is_pae(vcpu))
  406. return false;
  407. r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
  408. if (r < 0)
  409. goto out;
  410. changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
  411. out:
  412. return changed;
  413. }
  414. void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
  415. {
  416. if (cr0 & CR0_RESERVED_BITS) {
  417. printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
  418. cr0, vcpu->arch.cr0);
  419. kvm_inject_gp(vcpu, 0);
  420. return;
  421. }
  422. if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
  423. printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
  424. kvm_inject_gp(vcpu, 0);
  425. return;
  426. }
  427. if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
  428. printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
  429. "and a clear PE flag\n");
  430. kvm_inject_gp(vcpu, 0);
  431. return;
  432. }
  433. if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
  434. #ifdef CONFIG_X86_64
  435. if ((vcpu->arch.shadow_efer & EFER_LME)) {
  436. int cs_db, cs_l;
  437. if (!is_pae(vcpu)) {
  438. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  439. "in long mode while PAE is disabled\n");
  440. kvm_inject_gp(vcpu, 0);
  441. return;
  442. }
  443. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  444. if (cs_l) {
  445. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  446. "in long mode while CS.L == 1\n");
  447. kvm_inject_gp(vcpu, 0);
  448. return;
  449. }
  450. } else
  451. #endif
  452. if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  453. printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
  454. "reserved bits\n");
  455. kvm_inject_gp(vcpu, 0);
  456. return;
  457. }
  458. }
  459. kvm_x86_ops->set_cr0(vcpu, cr0);
  460. vcpu->arch.cr0 = cr0;
  461. kvm_mmu_reset_context(vcpu);
  462. return;
  463. }
  464. EXPORT_SYMBOL_GPL(kvm_set_cr0);
  465. void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
  466. {
  467. kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
  468. KVMTRACE_1D(LMSW, vcpu,
  469. (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
  470. handler);
  471. }
  472. EXPORT_SYMBOL_GPL(kvm_lmsw);
  473. void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
  474. {
  475. if (cr4 & CR4_RESERVED_BITS) {
  476. printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
  477. kvm_inject_gp(vcpu, 0);
  478. return;
  479. }
  480. if (is_long_mode(vcpu)) {
  481. if (!(cr4 & X86_CR4_PAE)) {
  482. printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
  483. "in long mode\n");
  484. kvm_inject_gp(vcpu, 0);
  485. return;
  486. }
  487. } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
  488. && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  489. printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
  490. kvm_inject_gp(vcpu, 0);
  491. return;
  492. }
  493. if (cr4 & X86_CR4_VMXE) {
  494. printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
  495. kvm_inject_gp(vcpu, 0);
  496. return;
  497. }
  498. kvm_x86_ops->set_cr4(vcpu, cr4);
  499. vcpu->arch.cr4 = cr4;
  500. kvm_mmu_reset_context(vcpu);
  501. }
  502. EXPORT_SYMBOL_GPL(kvm_set_cr4);
  503. void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
  504. {
  505. if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
  506. kvm_mmu_flush_tlb(vcpu);
  507. return;
  508. }
  509. if (is_long_mode(vcpu)) {
  510. if (cr3 & CR3_L_MODE_RESERVED_BITS) {
  511. printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
  512. kvm_inject_gp(vcpu, 0);
  513. return;
  514. }
  515. } else {
  516. if (is_pae(vcpu)) {
  517. if (cr3 & CR3_PAE_RESERVED_BITS) {
  518. printk(KERN_DEBUG
  519. "set_cr3: #GP, reserved bits\n");
  520. kvm_inject_gp(vcpu, 0);
  521. return;
  522. }
  523. if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
  524. printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
  525. "reserved bits\n");
  526. kvm_inject_gp(vcpu, 0);
  527. return;
  528. }
  529. }
  530. /*
  531. * We don't check reserved bits in nonpae mode, because
  532. * this isn't enforced, and VMware depends on this.
  533. */
  534. }
  535. /*
  536. * Does the new cr3 value map to physical memory? (Note, we
  537. * catch an invalid cr3 even in real-mode, because it would
  538. * cause trouble later on when we turn on paging anyway.)
  539. *
  540. * A real CPU would silently accept an invalid cr3 and would
  541. * attempt to use it - with largely undefined (and often hard
  542. * to debug) behavior on the guest side.
  543. */
  544. if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
  545. kvm_inject_gp(vcpu, 0);
  546. else {
  547. vcpu->arch.cr3 = cr3;
  548. vcpu->arch.mmu.new_cr3(vcpu);
  549. }
  550. }
  551. EXPORT_SYMBOL_GPL(kvm_set_cr3);
  552. void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
  553. {
  554. if (cr8 & CR8_RESERVED_BITS) {
  555. printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
  556. kvm_inject_gp(vcpu, 0);
  557. return;
  558. }
  559. if (irqchip_in_kernel(vcpu->kvm))
  560. kvm_lapic_set_tpr(vcpu, cr8);
  561. else
  562. vcpu->arch.cr8 = cr8;
  563. }
  564. EXPORT_SYMBOL_GPL(kvm_set_cr8);
  565. unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
  566. {
  567. if (irqchip_in_kernel(vcpu->kvm))
  568. return kvm_lapic_get_cr8(vcpu);
  569. else
  570. return vcpu->arch.cr8;
  571. }
  572. EXPORT_SYMBOL_GPL(kvm_get_cr8);
  573. /*
  574. * List of msr numbers which we expose to userspace through KVM_GET_MSRS
  575. * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
  576. *
  577. * This list is modified at module load time to reflect the
  578. * capabilities of the host cpu.
  579. */
  580. static u32 msrs_to_save[] = {
  581. MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
  582. MSR_K6_STAR,
  583. #ifdef CONFIG_X86_64
  584. MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
  585. #endif
  586. MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
  587. MSR_IA32_PERF_STATUS,
  588. };
  589. static unsigned num_msrs_to_save;
  590. static u32 emulated_msrs[] = {
  591. MSR_IA32_MISC_ENABLE,
  592. };
  593. static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
  594. {
  595. if (efer & efer_reserved_bits) {
  596. printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
  597. efer);
  598. kvm_inject_gp(vcpu, 0);
  599. return;
  600. }
  601. if (is_paging(vcpu)
  602. && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
  603. printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
  604. kvm_inject_gp(vcpu, 0);
  605. return;
  606. }
  607. kvm_x86_ops->set_efer(vcpu, efer);
  608. efer &= ~EFER_LMA;
  609. efer |= vcpu->arch.shadow_efer & EFER_LMA;
  610. vcpu->arch.shadow_efer = efer;
  611. }
  612. void kvm_enable_efer_bits(u64 mask)
  613. {
  614. efer_reserved_bits &= ~mask;
  615. }
  616. EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
  617. /*
  618. * Writes msr value into into the appropriate "register".
  619. * Returns 0 on success, non-0 otherwise.
  620. * Assumes vcpu_load() was already called.
  621. */
  622. int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
  623. {
  624. return kvm_x86_ops->set_msr(vcpu, msr_index, data);
  625. }
  626. /*
  627. * Adapt set_msr() to msr_io()'s calling convention
  628. */
  629. static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
  630. {
  631. return kvm_set_msr(vcpu, index, *data);
  632. }
  633. static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
  634. {
  635. static int version;
  636. struct pvclock_wall_clock wc;
  637. struct timespec now, sys, boot;
  638. if (!wall_clock)
  639. return;
  640. version++;
  641. kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
  642. /*
  643. * The guest calculates current wall clock time by adding
  644. * system time (updated by kvm_write_guest_time below) to the
  645. * wall clock specified here. guest system time equals host
  646. * system time for us, thus we must fill in host boot time here.
  647. */
  648. now = current_kernel_time();
  649. ktime_get_ts(&sys);
  650. boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
  651. wc.sec = boot.tv_sec;
  652. wc.nsec = boot.tv_nsec;
  653. wc.version = version;
  654. kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
  655. version++;
  656. kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
  657. }
  658. static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
  659. {
  660. uint32_t quotient, remainder;
  661. /* Don't try to replace with do_div(), this one calculates
  662. * "(dividend << 32) / divisor" */
  663. __asm__ ( "divl %4"
  664. : "=a" (quotient), "=d" (remainder)
  665. : "0" (0), "1" (dividend), "r" (divisor) );
  666. return quotient;
  667. }
  668. static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
  669. {
  670. uint64_t nsecs = 1000000000LL;
  671. int32_t shift = 0;
  672. uint64_t tps64;
  673. uint32_t tps32;
  674. tps64 = tsc_khz * 1000LL;
  675. while (tps64 > nsecs*2) {
  676. tps64 >>= 1;
  677. shift--;
  678. }
  679. tps32 = (uint32_t)tps64;
  680. while (tps32 <= (uint32_t)nsecs) {
  681. tps32 <<= 1;
  682. shift++;
  683. }
  684. hv_clock->tsc_shift = shift;
  685. hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
  686. pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
  687. __FUNCTION__, tsc_khz, hv_clock->tsc_shift,
  688. hv_clock->tsc_to_system_mul);
  689. }
  690. static void kvm_write_guest_time(struct kvm_vcpu *v)
  691. {
  692. struct timespec ts;
  693. unsigned long flags;
  694. struct kvm_vcpu_arch *vcpu = &v->arch;
  695. void *shared_kaddr;
  696. if ((!vcpu->time_page))
  697. return;
  698. if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
  699. kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
  700. vcpu->hv_clock_tsc_khz = tsc_khz;
  701. }
  702. /* Keep irq disabled to prevent changes to the clock */
  703. local_irq_save(flags);
  704. kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
  705. &vcpu->hv_clock.tsc_timestamp);
  706. ktime_get_ts(&ts);
  707. local_irq_restore(flags);
  708. /* With all the info we got, fill in the values */
  709. vcpu->hv_clock.system_time = ts.tv_nsec +
  710. (NSEC_PER_SEC * (u64)ts.tv_sec);
  711. /*
  712. * The interface expects us to write an even number signaling that the
  713. * update is finished. Since the guest won't see the intermediate
  714. * state, we just increase by 2 at the end.
  715. */
  716. vcpu->hv_clock.version += 2;
  717. shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
  718. memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
  719. sizeof(vcpu->hv_clock));
  720. kunmap_atomic(shared_kaddr, KM_USER0);
  721. mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
  722. }
  723. static bool msr_mtrr_valid(unsigned msr)
  724. {
  725. switch (msr) {
  726. case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
  727. case MSR_MTRRfix64K_00000:
  728. case MSR_MTRRfix16K_80000:
  729. case MSR_MTRRfix16K_A0000:
  730. case MSR_MTRRfix4K_C0000:
  731. case MSR_MTRRfix4K_C8000:
  732. case MSR_MTRRfix4K_D0000:
  733. case MSR_MTRRfix4K_D8000:
  734. case MSR_MTRRfix4K_E0000:
  735. case MSR_MTRRfix4K_E8000:
  736. case MSR_MTRRfix4K_F0000:
  737. case MSR_MTRRfix4K_F8000:
  738. case MSR_MTRRdefType:
  739. case MSR_IA32_CR_PAT:
  740. return true;
  741. case 0x2f8:
  742. return true;
  743. }
  744. return false;
  745. }
  746. static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  747. {
  748. if (!msr_mtrr_valid(msr))
  749. return 1;
  750. vcpu->arch.mtrr[msr - 0x200] = data;
  751. return 0;
  752. }
  753. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  754. {
  755. switch (msr) {
  756. case MSR_EFER:
  757. set_efer(vcpu, data);
  758. break;
  759. case MSR_IA32_MC0_STATUS:
  760. pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
  761. __func__, data);
  762. break;
  763. case MSR_IA32_MCG_STATUS:
  764. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
  765. __func__, data);
  766. break;
  767. case MSR_IA32_MCG_CTL:
  768. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
  769. __func__, data);
  770. break;
  771. case MSR_IA32_DEBUGCTLMSR:
  772. if (!data) {
  773. /* We support the non-activated case already */
  774. break;
  775. } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
  776. /* Values other than LBR and BTF are vendor-specific,
  777. thus reserved and should throw a #GP */
  778. return 1;
  779. }
  780. pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
  781. __func__, data);
  782. break;
  783. case MSR_IA32_UCODE_REV:
  784. case MSR_IA32_UCODE_WRITE:
  785. break;
  786. case 0x200 ... 0x2ff:
  787. return set_msr_mtrr(vcpu, msr, data);
  788. case MSR_IA32_APICBASE:
  789. kvm_set_apic_base(vcpu, data);
  790. break;
  791. case MSR_IA32_MISC_ENABLE:
  792. vcpu->arch.ia32_misc_enable_msr = data;
  793. break;
  794. case MSR_KVM_WALL_CLOCK:
  795. vcpu->kvm->arch.wall_clock = data;
  796. kvm_write_wall_clock(vcpu->kvm, data);
  797. break;
  798. case MSR_KVM_SYSTEM_TIME: {
  799. if (vcpu->arch.time_page) {
  800. kvm_release_page_dirty(vcpu->arch.time_page);
  801. vcpu->arch.time_page = NULL;
  802. }
  803. vcpu->arch.time = data;
  804. /* we verify if the enable bit is set... */
  805. if (!(data & 1))
  806. break;
  807. /* ...but clean it before doing the actual write */
  808. vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
  809. down_read(&current->mm->mmap_sem);
  810. vcpu->arch.time_page =
  811. gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
  812. up_read(&current->mm->mmap_sem);
  813. if (is_error_page(vcpu->arch.time_page)) {
  814. kvm_release_page_clean(vcpu->arch.time_page);
  815. vcpu->arch.time_page = NULL;
  816. }
  817. kvm_write_guest_time(vcpu);
  818. break;
  819. }
  820. default:
  821. pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
  822. return 1;
  823. }
  824. return 0;
  825. }
  826. EXPORT_SYMBOL_GPL(kvm_set_msr_common);
  827. /*
  828. * Reads an msr value (of 'msr_index') into 'pdata'.
  829. * Returns 0 on success, non-0 otherwise.
  830. * Assumes vcpu_load() was already called.
  831. */
  832. int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
  833. {
  834. return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
  835. }
  836. static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  837. {
  838. if (!msr_mtrr_valid(msr))
  839. return 1;
  840. *pdata = vcpu->arch.mtrr[msr - 0x200];
  841. return 0;
  842. }
  843. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  844. {
  845. u64 data;
  846. switch (msr) {
  847. case 0xc0010010: /* SYSCFG */
  848. case 0xc0010015: /* HWCR */
  849. case MSR_IA32_PLATFORM_ID:
  850. case MSR_IA32_P5_MC_ADDR:
  851. case MSR_IA32_P5_MC_TYPE:
  852. case MSR_IA32_MC0_CTL:
  853. case MSR_IA32_MCG_STATUS:
  854. case MSR_IA32_MCG_CAP:
  855. case MSR_IA32_MCG_CTL:
  856. case MSR_IA32_MC0_MISC:
  857. case MSR_IA32_MC0_MISC+4:
  858. case MSR_IA32_MC0_MISC+8:
  859. case MSR_IA32_MC0_MISC+12:
  860. case MSR_IA32_MC0_MISC+16:
  861. case MSR_IA32_UCODE_REV:
  862. case MSR_IA32_EBL_CR_POWERON:
  863. case MSR_IA32_DEBUGCTLMSR:
  864. case MSR_IA32_LASTBRANCHFROMIP:
  865. case MSR_IA32_LASTBRANCHTOIP:
  866. case MSR_IA32_LASTINTFROMIP:
  867. case MSR_IA32_LASTINTTOIP:
  868. data = 0;
  869. break;
  870. case MSR_MTRRcap:
  871. data = 0x500 | KVM_NR_VAR_MTRR;
  872. break;
  873. case 0x200 ... 0x2ff:
  874. return get_msr_mtrr(vcpu, msr, pdata);
  875. case 0xcd: /* fsb frequency */
  876. data = 3;
  877. break;
  878. case MSR_IA32_APICBASE:
  879. data = kvm_get_apic_base(vcpu);
  880. break;
  881. case MSR_IA32_MISC_ENABLE:
  882. data = vcpu->arch.ia32_misc_enable_msr;
  883. break;
  884. case MSR_IA32_PERF_STATUS:
  885. /* TSC increment by tick */
  886. data = 1000ULL;
  887. /* CPU multiplier */
  888. data |= (((uint64_t)4ULL) << 40);
  889. break;
  890. case MSR_EFER:
  891. data = vcpu->arch.shadow_efer;
  892. break;
  893. case MSR_KVM_WALL_CLOCK:
  894. data = vcpu->kvm->arch.wall_clock;
  895. break;
  896. case MSR_KVM_SYSTEM_TIME:
  897. data = vcpu->arch.time;
  898. break;
  899. default:
  900. pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
  901. return 1;
  902. }
  903. *pdata = data;
  904. return 0;
  905. }
  906. EXPORT_SYMBOL_GPL(kvm_get_msr_common);
  907. /*
  908. * Read or write a bunch of msrs. All parameters are kernel addresses.
  909. *
  910. * @return number of msrs set successfully.
  911. */
  912. static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
  913. struct kvm_msr_entry *entries,
  914. int (*do_msr)(struct kvm_vcpu *vcpu,
  915. unsigned index, u64 *data))
  916. {
  917. int i;
  918. vcpu_load(vcpu);
  919. down_read(&vcpu->kvm->slots_lock);
  920. for (i = 0; i < msrs->nmsrs; ++i)
  921. if (do_msr(vcpu, entries[i].index, &entries[i].data))
  922. break;
  923. up_read(&vcpu->kvm->slots_lock);
  924. vcpu_put(vcpu);
  925. return i;
  926. }
  927. /*
  928. * Read or write a bunch of msrs. Parameters are user addresses.
  929. *
  930. * @return number of msrs set successfully.
  931. */
  932. static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
  933. int (*do_msr)(struct kvm_vcpu *vcpu,
  934. unsigned index, u64 *data),
  935. int writeback)
  936. {
  937. struct kvm_msrs msrs;
  938. struct kvm_msr_entry *entries;
  939. int r, n;
  940. unsigned size;
  941. r = -EFAULT;
  942. if (copy_from_user(&msrs, user_msrs, sizeof msrs))
  943. goto out;
  944. r = -E2BIG;
  945. if (msrs.nmsrs >= MAX_IO_MSRS)
  946. goto out;
  947. r = -ENOMEM;
  948. size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
  949. entries = vmalloc(size);
  950. if (!entries)
  951. goto out;
  952. r = -EFAULT;
  953. if (copy_from_user(entries, user_msrs->entries, size))
  954. goto out_free;
  955. r = n = __msr_io(vcpu, &msrs, entries, do_msr);
  956. if (r < 0)
  957. goto out_free;
  958. r = -EFAULT;
  959. if (writeback && copy_to_user(user_msrs->entries, entries, size))
  960. goto out_free;
  961. r = n;
  962. out_free:
  963. vfree(entries);
  964. out:
  965. return r;
  966. }
  967. int kvm_dev_ioctl_check_extension(long ext)
  968. {
  969. int r;
  970. switch (ext) {
  971. case KVM_CAP_IRQCHIP:
  972. case KVM_CAP_HLT:
  973. case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
  974. case KVM_CAP_USER_MEMORY:
  975. case KVM_CAP_SET_TSS_ADDR:
  976. case KVM_CAP_EXT_CPUID:
  977. case KVM_CAP_CLOCKSOURCE:
  978. case KVM_CAP_PIT:
  979. case KVM_CAP_NOP_IO_DELAY:
  980. case KVM_CAP_MP_STATE:
  981. case KVM_CAP_SYNC_MMU:
  982. r = 1;
  983. break;
  984. case KVM_CAP_COALESCED_MMIO:
  985. r = KVM_COALESCED_MMIO_PAGE_OFFSET;
  986. break;
  987. case KVM_CAP_VAPIC:
  988. r = !kvm_x86_ops->cpu_has_accelerated_tpr();
  989. break;
  990. case KVM_CAP_NR_VCPUS:
  991. r = KVM_MAX_VCPUS;
  992. break;
  993. case KVM_CAP_NR_MEMSLOTS:
  994. r = KVM_MEMORY_SLOTS;
  995. break;
  996. case KVM_CAP_PV_MMU:
  997. r = !tdp_enabled;
  998. break;
  999. default:
  1000. r = 0;
  1001. break;
  1002. }
  1003. return r;
  1004. }
  1005. long kvm_arch_dev_ioctl(struct file *filp,
  1006. unsigned int ioctl, unsigned long arg)
  1007. {
  1008. void __user *argp = (void __user *)arg;
  1009. long r;
  1010. switch (ioctl) {
  1011. case KVM_GET_MSR_INDEX_LIST: {
  1012. struct kvm_msr_list __user *user_msr_list = argp;
  1013. struct kvm_msr_list msr_list;
  1014. unsigned n;
  1015. r = -EFAULT;
  1016. if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
  1017. goto out;
  1018. n = msr_list.nmsrs;
  1019. msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
  1020. if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
  1021. goto out;
  1022. r = -E2BIG;
  1023. if (n < num_msrs_to_save)
  1024. goto out;
  1025. r = -EFAULT;
  1026. if (copy_to_user(user_msr_list->indices, &msrs_to_save,
  1027. num_msrs_to_save * sizeof(u32)))
  1028. goto out;
  1029. if (copy_to_user(user_msr_list->indices
  1030. + num_msrs_to_save * sizeof(u32),
  1031. &emulated_msrs,
  1032. ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
  1033. goto out;
  1034. r = 0;
  1035. break;
  1036. }
  1037. case KVM_GET_SUPPORTED_CPUID: {
  1038. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1039. struct kvm_cpuid2 cpuid;
  1040. r = -EFAULT;
  1041. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1042. goto out;
  1043. r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
  1044. cpuid_arg->entries);
  1045. if (r)
  1046. goto out;
  1047. r = -EFAULT;
  1048. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  1049. goto out;
  1050. r = 0;
  1051. break;
  1052. }
  1053. default:
  1054. r = -EINVAL;
  1055. }
  1056. out:
  1057. return r;
  1058. }
  1059. void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  1060. {
  1061. kvm_x86_ops->vcpu_load(vcpu, cpu);
  1062. kvm_write_guest_time(vcpu);
  1063. }
  1064. void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
  1065. {
  1066. kvm_x86_ops->vcpu_put(vcpu);
  1067. kvm_put_guest_fpu(vcpu);
  1068. }
  1069. static int is_efer_nx(void)
  1070. {
  1071. u64 efer;
  1072. rdmsrl(MSR_EFER, efer);
  1073. return efer & EFER_NX;
  1074. }
  1075. static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
  1076. {
  1077. int i;
  1078. struct kvm_cpuid_entry2 *e, *entry;
  1079. entry = NULL;
  1080. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  1081. e = &vcpu->arch.cpuid_entries[i];
  1082. if (e->function == 0x80000001) {
  1083. entry = e;
  1084. break;
  1085. }
  1086. }
  1087. if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
  1088. entry->edx &= ~(1 << 20);
  1089. printk(KERN_INFO "kvm: guest NX capability removed\n");
  1090. }
  1091. }
  1092. /* when an old userspace process fills a new kernel module */
  1093. static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
  1094. struct kvm_cpuid *cpuid,
  1095. struct kvm_cpuid_entry __user *entries)
  1096. {
  1097. int r, i;
  1098. struct kvm_cpuid_entry *cpuid_entries;
  1099. r = -E2BIG;
  1100. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  1101. goto out;
  1102. r = -ENOMEM;
  1103. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
  1104. if (!cpuid_entries)
  1105. goto out;
  1106. r = -EFAULT;
  1107. if (copy_from_user(cpuid_entries, entries,
  1108. cpuid->nent * sizeof(struct kvm_cpuid_entry)))
  1109. goto out_free;
  1110. for (i = 0; i < cpuid->nent; i++) {
  1111. vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
  1112. vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
  1113. vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
  1114. vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
  1115. vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
  1116. vcpu->arch.cpuid_entries[i].index = 0;
  1117. vcpu->arch.cpuid_entries[i].flags = 0;
  1118. vcpu->arch.cpuid_entries[i].padding[0] = 0;
  1119. vcpu->arch.cpuid_entries[i].padding[1] = 0;
  1120. vcpu->arch.cpuid_entries[i].padding[2] = 0;
  1121. }
  1122. vcpu->arch.cpuid_nent = cpuid->nent;
  1123. cpuid_fix_nx_cap(vcpu);
  1124. r = 0;
  1125. out_free:
  1126. vfree(cpuid_entries);
  1127. out:
  1128. return r;
  1129. }
  1130. static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
  1131. struct kvm_cpuid2 *cpuid,
  1132. struct kvm_cpuid_entry2 __user *entries)
  1133. {
  1134. int r;
  1135. r = -E2BIG;
  1136. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  1137. goto out;
  1138. r = -EFAULT;
  1139. if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
  1140. cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
  1141. goto out;
  1142. vcpu->arch.cpuid_nent = cpuid->nent;
  1143. return 0;
  1144. out:
  1145. return r;
  1146. }
  1147. static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
  1148. struct kvm_cpuid2 *cpuid,
  1149. struct kvm_cpuid_entry2 __user *entries)
  1150. {
  1151. int r;
  1152. r = -E2BIG;
  1153. if (cpuid->nent < vcpu->arch.cpuid_nent)
  1154. goto out;
  1155. r = -EFAULT;
  1156. if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
  1157. vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
  1158. goto out;
  1159. return 0;
  1160. out:
  1161. cpuid->nent = vcpu->arch.cpuid_nent;
  1162. return r;
  1163. }
  1164. static inline u32 bit(int bitno)
  1165. {
  1166. return 1 << (bitno & 31);
  1167. }
  1168. static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  1169. u32 index)
  1170. {
  1171. entry->function = function;
  1172. entry->index = index;
  1173. cpuid_count(entry->function, entry->index,
  1174. &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
  1175. entry->flags = 0;
  1176. }
  1177. static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  1178. u32 index, int *nent, int maxnent)
  1179. {
  1180. const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
  1181. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  1182. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  1183. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  1184. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  1185. bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
  1186. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  1187. bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
  1188. bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
  1189. bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
  1190. const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
  1191. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  1192. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  1193. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  1194. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  1195. bit(X86_FEATURE_PGE) |
  1196. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  1197. bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
  1198. bit(X86_FEATURE_SYSCALL) |
  1199. (bit(X86_FEATURE_NX) && is_efer_nx()) |
  1200. #ifdef CONFIG_X86_64
  1201. bit(X86_FEATURE_LM) |
  1202. #endif
  1203. bit(X86_FEATURE_MMXEXT) |
  1204. bit(X86_FEATURE_3DNOWEXT) |
  1205. bit(X86_FEATURE_3DNOW);
  1206. const u32 kvm_supported_word3_x86_features =
  1207. bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
  1208. const u32 kvm_supported_word6_x86_features =
  1209. bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
  1210. /* all func 2 cpuid_count() should be called on the same cpu */
  1211. get_cpu();
  1212. do_cpuid_1_ent(entry, function, index);
  1213. ++*nent;
  1214. switch (function) {
  1215. case 0:
  1216. entry->eax = min(entry->eax, (u32)0xb);
  1217. break;
  1218. case 1:
  1219. entry->edx &= kvm_supported_word0_x86_features;
  1220. entry->ecx &= kvm_supported_word3_x86_features;
  1221. break;
  1222. /* function 2 entries are STATEFUL. That is, repeated cpuid commands
  1223. * may return different values. This forces us to get_cpu() before
  1224. * issuing the first command, and also to emulate this annoying behavior
  1225. * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
  1226. case 2: {
  1227. int t, times = entry->eax & 0xff;
  1228. entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  1229. for (t = 1; t < times && *nent < maxnent; ++t) {
  1230. do_cpuid_1_ent(&entry[t], function, 0);
  1231. entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  1232. ++*nent;
  1233. }
  1234. break;
  1235. }
  1236. /* function 4 and 0xb have additional index. */
  1237. case 4: {
  1238. int i, cache_type;
  1239. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  1240. /* read more entries until cache_type is zero */
  1241. for (i = 1; *nent < maxnent; ++i) {
  1242. cache_type = entry[i - 1].eax & 0x1f;
  1243. if (!cache_type)
  1244. break;
  1245. do_cpuid_1_ent(&entry[i], function, i);
  1246. entry[i].flags |=
  1247. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  1248. ++*nent;
  1249. }
  1250. break;
  1251. }
  1252. case 0xb: {
  1253. int i, level_type;
  1254. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  1255. /* read more entries until level_type is zero */
  1256. for (i = 1; *nent < maxnent; ++i) {
  1257. level_type = entry[i - 1].ecx & 0xff;
  1258. if (!level_type)
  1259. break;
  1260. do_cpuid_1_ent(&entry[i], function, i);
  1261. entry[i].flags |=
  1262. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  1263. ++*nent;
  1264. }
  1265. break;
  1266. }
  1267. case 0x80000000:
  1268. entry->eax = min(entry->eax, 0x8000001a);
  1269. break;
  1270. case 0x80000001:
  1271. entry->edx &= kvm_supported_word1_x86_features;
  1272. entry->ecx &= kvm_supported_word6_x86_features;
  1273. break;
  1274. }
  1275. put_cpu();
  1276. }
  1277. static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  1278. struct kvm_cpuid_entry2 __user *entries)
  1279. {
  1280. struct kvm_cpuid_entry2 *cpuid_entries;
  1281. int limit, nent = 0, r = -E2BIG;
  1282. u32 func;
  1283. if (cpuid->nent < 1)
  1284. goto out;
  1285. r = -ENOMEM;
  1286. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
  1287. if (!cpuid_entries)
  1288. goto out;
  1289. do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
  1290. limit = cpuid_entries[0].eax;
  1291. for (func = 1; func <= limit && nent < cpuid->nent; ++func)
  1292. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  1293. &nent, cpuid->nent);
  1294. r = -E2BIG;
  1295. if (nent >= cpuid->nent)
  1296. goto out_free;
  1297. do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
  1298. limit = cpuid_entries[nent - 1].eax;
  1299. for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
  1300. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  1301. &nent, cpuid->nent);
  1302. r = -EFAULT;
  1303. if (copy_to_user(entries, cpuid_entries,
  1304. nent * sizeof(struct kvm_cpuid_entry2)))
  1305. goto out_free;
  1306. cpuid->nent = nent;
  1307. r = 0;
  1308. out_free:
  1309. vfree(cpuid_entries);
  1310. out:
  1311. return r;
  1312. }
  1313. static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
  1314. struct kvm_lapic_state *s)
  1315. {
  1316. vcpu_load(vcpu);
  1317. memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
  1318. vcpu_put(vcpu);
  1319. return 0;
  1320. }
  1321. static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
  1322. struct kvm_lapic_state *s)
  1323. {
  1324. vcpu_load(vcpu);
  1325. memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
  1326. kvm_apic_post_state_restore(vcpu);
  1327. vcpu_put(vcpu);
  1328. return 0;
  1329. }
  1330. static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
  1331. struct kvm_interrupt *irq)
  1332. {
  1333. if (irq->irq < 0 || irq->irq >= 256)
  1334. return -EINVAL;
  1335. if (irqchip_in_kernel(vcpu->kvm))
  1336. return -ENXIO;
  1337. vcpu_load(vcpu);
  1338. set_bit(irq->irq, vcpu->arch.irq_pending);
  1339. set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
  1340. vcpu_put(vcpu);
  1341. return 0;
  1342. }
  1343. static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
  1344. struct kvm_tpr_access_ctl *tac)
  1345. {
  1346. if (tac->flags)
  1347. return -EINVAL;
  1348. vcpu->arch.tpr_access_reporting = !!tac->enabled;
  1349. return 0;
  1350. }
  1351. long kvm_arch_vcpu_ioctl(struct file *filp,
  1352. unsigned int ioctl, unsigned long arg)
  1353. {
  1354. struct kvm_vcpu *vcpu = filp->private_data;
  1355. void __user *argp = (void __user *)arg;
  1356. int r;
  1357. struct kvm_lapic_state *lapic = NULL;
  1358. switch (ioctl) {
  1359. case KVM_GET_LAPIC: {
  1360. lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
  1361. r = -ENOMEM;
  1362. if (!lapic)
  1363. goto out;
  1364. r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
  1365. if (r)
  1366. goto out;
  1367. r = -EFAULT;
  1368. if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
  1369. goto out;
  1370. r = 0;
  1371. break;
  1372. }
  1373. case KVM_SET_LAPIC: {
  1374. lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
  1375. r = -ENOMEM;
  1376. if (!lapic)
  1377. goto out;
  1378. r = -EFAULT;
  1379. if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
  1380. goto out;
  1381. r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
  1382. if (r)
  1383. goto out;
  1384. r = 0;
  1385. break;
  1386. }
  1387. case KVM_INTERRUPT: {
  1388. struct kvm_interrupt irq;
  1389. r = -EFAULT;
  1390. if (copy_from_user(&irq, argp, sizeof irq))
  1391. goto out;
  1392. r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
  1393. if (r)
  1394. goto out;
  1395. r = 0;
  1396. break;
  1397. }
  1398. case KVM_SET_CPUID: {
  1399. struct kvm_cpuid __user *cpuid_arg = argp;
  1400. struct kvm_cpuid cpuid;
  1401. r = -EFAULT;
  1402. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1403. goto out;
  1404. r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
  1405. if (r)
  1406. goto out;
  1407. break;
  1408. }
  1409. case KVM_SET_CPUID2: {
  1410. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1411. struct kvm_cpuid2 cpuid;
  1412. r = -EFAULT;
  1413. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1414. goto out;
  1415. r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
  1416. cpuid_arg->entries);
  1417. if (r)
  1418. goto out;
  1419. break;
  1420. }
  1421. case KVM_GET_CPUID2: {
  1422. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1423. struct kvm_cpuid2 cpuid;
  1424. r = -EFAULT;
  1425. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1426. goto out;
  1427. r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
  1428. cpuid_arg->entries);
  1429. if (r)
  1430. goto out;
  1431. r = -EFAULT;
  1432. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  1433. goto out;
  1434. r = 0;
  1435. break;
  1436. }
  1437. case KVM_GET_MSRS:
  1438. r = msr_io(vcpu, argp, kvm_get_msr, 1);
  1439. break;
  1440. case KVM_SET_MSRS:
  1441. r = msr_io(vcpu, argp, do_set_msr, 0);
  1442. break;
  1443. case KVM_TPR_ACCESS_REPORTING: {
  1444. struct kvm_tpr_access_ctl tac;
  1445. r = -EFAULT;
  1446. if (copy_from_user(&tac, argp, sizeof tac))
  1447. goto out;
  1448. r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
  1449. if (r)
  1450. goto out;
  1451. r = -EFAULT;
  1452. if (copy_to_user(argp, &tac, sizeof tac))
  1453. goto out;
  1454. r = 0;
  1455. break;
  1456. };
  1457. case KVM_SET_VAPIC_ADDR: {
  1458. struct kvm_vapic_addr va;
  1459. r = -EINVAL;
  1460. if (!irqchip_in_kernel(vcpu->kvm))
  1461. goto out;
  1462. r = -EFAULT;
  1463. if (copy_from_user(&va, argp, sizeof va))
  1464. goto out;
  1465. r = 0;
  1466. kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
  1467. break;
  1468. }
  1469. default:
  1470. r = -EINVAL;
  1471. }
  1472. out:
  1473. if (lapic)
  1474. kfree(lapic);
  1475. return r;
  1476. }
  1477. static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
  1478. {
  1479. int ret;
  1480. if (addr > (unsigned int)(-3 * PAGE_SIZE))
  1481. return -1;
  1482. ret = kvm_x86_ops->set_tss_addr(kvm, addr);
  1483. return ret;
  1484. }
  1485. static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
  1486. u32 kvm_nr_mmu_pages)
  1487. {
  1488. if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
  1489. return -EINVAL;
  1490. down_write(&kvm->slots_lock);
  1491. kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
  1492. kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
  1493. up_write(&kvm->slots_lock);
  1494. return 0;
  1495. }
  1496. static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
  1497. {
  1498. return kvm->arch.n_alloc_mmu_pages;
  1499. }
  1500. gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
  1501. {
  1502. int i;
  1503. struct kvm_mem_alias *alias;
  1504. for (i = 0; i < kvm->arch.naliases; ++i) {
  1505. alias = &kvm->arch.aliases[i];
  1506. if (gfn >= alias->base_gfn
  1507. && gfn < alias->base_gfn + alias->npages)
  1508. return alias->target_gfn + gfn - alias->base_gfn;
  1509. }
  1510. return gfn;
  1511. }
  1512. /*
  1513. * Set a new alias region. Aliases map a portion of physical memory into
  1514. * another portion. This is useful for memory windows, for example the PC
  1515. * VGA region.
  1516. */
  1517. static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
  1518. struct kvm_memory_alias *alias)
  1519. {
  1520. int r, n;
  1521. struct kvm_mem_alias *p;
  1522. r = -EINVAL;
  1523. /* General sanity checks */
  1524. if (alias->memory_size & (PAGE_SIZE - 1))
  1525. goto out;
  1526. if (alias->guest_phys_addr & (PAGE_SIZE - 1))
  1527. goto out;
  1528. if (alias->slot >= KVM_ALIAS_SLOTS)
  1529. goto out;
  1530. if (alias->guest_phys_addr + alias->memory_size
  1531. < alias->guest_phys_addr)
  1532. goto out;
  1533. if (alias->target_phys_addr + alias->memory_size
  1534. < alias->target_phys_addr)
  1535. goto out;
  1536. down_write(&kvm->slots_lock);
  1537. spin_lock(&kvm->mmu_lock);
  1538. p = &kvm->arch.aliases[alias->slot];
  1539. p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
  1540. p->npages = alias->memory_size >> PAGE_SHIFT;
  1541. p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
  1542. for (n = KVM_ALIAS_SLOTS; n > 0; --n)
  1543. if (kvm->arch.aliases[n - 1].npages)
  1544. break;
  1545. kvm->arch.naliases = n;
  1546. spin_unlock(&kvm->mmu_lock);
  1547. kvm_mmu_zap_all(kvm);
  1548. up_write(&kvm->slots_lock);
  1549. return 0;
  1550. out:
  1551. return r;
  1552. }
  1553. static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1554. {
  1555. int r;
  1556. r = 0;
  1557. switch (chip->chip_id) {
  1558. case KVM_IRQCHIP_PIC_MASTER:
  1559. memcpy(&chip->chip.pic,
  1560. &pic_irqchip(kvm)->pics[0],
  1561. sizeof(struct kvm_pic_state));
  1562. break;
  1563. case KVM_IRQCHIP_PIC_SLAVE:
  1564. memcpy(&chip->chip.pic,
  1565. &pic_irqchip(kvm)->pics[1],
  1566. sizeof(struct kvm_pic_state));
  1567. break;
  1568. case KVM_IRQCHIP_IOAPIC:
  1569. memcpy(&chip->chip.ioapic,
  1570. ioapic_irqchip(kvm),
  1571. sizeof(struct kvm_ioapic_state));
  1572. break;
  1573. default:
  1574. r = -EINVAL;
  1575. break;
  1576. }
  1577. return r;
  1578. }
  1579. static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1580. {
  1581. int r;
  1582. r = 0;
  1583. switch (chip->chip_id) {
  1584. case KVM_IRQCHIP_PIC_MASTER:
  1585. memcpy(&pic_irqchip(kvm)->pics[0],
  1586. &chip->chip.pic,
  1587. sizeof(struct kvm_pic_state));
  1588. break;
  1589. case KVM_IRQCHIP_PIC_SLAVE:
  1590. memcpy(&pic_irqchip(kvm)->pics[1],
  1591. &chip->chip.pic,
  1592. sizeof(struct kvm_pic_state));
  1593. break;
  1594. case KVM_IRQCHIP_IOAPIC:
  1595. memcpy(ioapic_irqchip(kvm),
  1596. &chip->chip.ioapic,
  1597. sizeof(struct kvm_ioapic_state));
  1598. break;
  1599. default:
  1600. r = -EINVAL;
  1601. break;
  1602. }
  1603. kvm_pic_update_irq(pic_irqchip(kvm));
  1604. return r;
  1605. }
  1606. static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
  1607. {
  1608. int r = 0;
  1609. memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
  1610. return r;
  1611. }
  1612. static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
  1613. {
  1614. int r = 0;
  1615. memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
  1616. kvm_pit_load_count(kvm, 0, ps->channels[0].count);
  1617. return r;
  1618. }
  1619. /*
  1620. * Get (and clear) the dirty memory log for a memory slot.
  1621. */
  1622. int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
  1623. struct kvm_dirty_log *log)
  1624. {
  1625. int r;
  1626. int n;
  1627. struct kvm_memory_slot *memslot;
  1628. int is_dirty = 0;
  1629. down_write(&kvm->slots_lock);
  1630. r = kvm_get_dirty_log(kvm, log, &is_dirty);
  1631. if (r)
  1632. goto out;
  1633. /* If nothing is dirty, don't bother messing with page tables. */
  1634. if (is_dirty) {
  1635. kvm_mmu_slot_remove_write_access(kvm, log->slot);
  1636. kvm_flush_remote_tlbs(kvm);
  1637. memslot = &kvm->memslots[log->slot];
  1638. n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
  1639. memset(memslot->dirty_bitmap, 0, n);
  1640. }
  1641. r = 0;
  1642. out:
  1643. up_write(&kvm->slots_lock);
  1644. return r;
  1645. }
  1646. long kvm_arch_vm_ioctl(struct file *filp,
  1647. unsigned int ioctl, unsigned long arg)
  1648. {
  1649. struct kvm *kvm = filp->private_data;
  1650. void __user *argp = (void __user *)arg;
  1651. int r = -EINVAL;
  1652. /*
  1653. * This union makes it completely explicit to gcc-3.x
  1654. * that these two variables' stack usage should be
  1655. * combined, not added together.
  1656. */
  1657. union {
  1658. struct kvm_pit_state ps;
  1659. struct kvm_memory_alias alias;
  1660. } u;
  1661. switch (ioctl) {
  1662. case KVM_SET_TSS_ADDR:
  1663. r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
  1664. if (r < 0)
  1665. goto out;
  1666. break;
  1667. case KVM_SET_MEMORY_REGION: {
  1668. struct kvm_memory_region kvm_mem;
  1669. struct kvm_userspace_memory_region kvm_userspace_mem;
  1670. r = -EFAULT;
  1671. if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
  1672. goto out;
  1673. kvm_userspace_mem.slot = kvm_mem.slot;
  1674. kvm_userspace_mem.flags = kvm_mem.flags;
  1675. kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
  1676. kvm_userspace_mem.memory_size = kvm_mem.memory_size;
  1677. r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
  1678. if (r)
  1679. goto out;
  1680. break;
  1681. }
  1682. case KVM_SET_NR_MMU_PAGES:
  1683. r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
  1684. if (r)
  1685. goto out;
  1686. break;
  1687. case KVM_GET_NR_MMU_PAGES:
  1688. r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
  1689. break;
  1690. case KVM_SET_MEMORY_ALIAS:
  1691. r = -EFAULT;
  1692. if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
  1693. goto out;
  1694. r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
  1695. if (r)
  1696. goto out;
  1697. break;
  1698. case KVM_CREATE_IRQCHIP:
  1699. r = -ENOMEM;
  1700. kvm->arch.vpic = kvm_create_pic(kvm);
  1701. if (kvm->arch.vpic) {
  1702. r = kvm_ioapic_init(kvm);
  1703. if (r) {
  1704. kfree(kvm->arch.vpic);
  1705. kvm->arch.vpic = NULL;
  1706. goto out;
  1707. }
  1708. } else
  1709. goto out;
  1710. break;
  1711. case KVM_CREATE_PIT:
  1712. r = -ENOMEM;
  1713. kvm->arch.vpit = kvm_create_pit(kvm);
  1714. if (kvm->arch.vpit)
  1715. r = 0;
  1716. break;
  1717. case KVM_IRQ_LINE: {
  1718. struct kvm_irq_level irq_event;
  1719. r = -EFAULT;
  1720. if (copy_from_user(&irq_event, argp, sizeof irq_event))
  1721. goto out;
  1722. if (irqchip_in_kernel(kvm)) {
  1723. mutex_lock(&kvm->lock);
  1724. kvm_set_irq(kvm, irq_event.irq, irq_event.level);
  1725. mutex_unlock(&kvm->lock);
  1726. r = 0;
  1727. }
  1728. break;
  1729. }
  1730. case KVM_GET_IRQCHIP: {
  1731. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1732. struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
  1733. r = -ENOMEM;
  1734. if (!chip)
  1735. goto out;
  1736. r = -EFAULT;
  1737. if (copy_from_user(chip, argp, sizeof *chip))
  1738. goto get_irqchip_out;
  1739. r = -ENXIO;
  1740. if (!irqchip_in_kernel(kvm))
  1741. goto get_irqchip_out;
  1742. r = kvm_vm_ioctl_get_irqchip(kvm, chip);
  1743. if (r)
  1744. goto get_irqchip_out;
  1745. r = -EFAULT;
  1746. if (copy_to_user(argp, chip, sizeof *chip))
  1747. goto get_irqchip_out;
  1748. r = 0;
  1749. get_irqchip_out:
  1750. kfree(chip);
  1751. if (r)
  1752. goto out;
  1753. break;
  1754. }
  1755. case KVM_SET_IRQCHIP: {
  1756. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1757. struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
  1758. r = -ENOMEM;
  1759. if (!chip)
  1760. goto out;
  1761. r = -EFAULT;
  1762. if (copy_from_user(chip, argp, sizeof *chip))
  1763. goto set_irqchip_out;
  1764. r = -ENXIO;
  1765. if (!irqchip_in_kernel(kvm))
  1766. goto set_irqchip_out;
  1767. r = kvm_vm_ioctl_set_irqchip(kvm, chip);
  1768. if (r)
  1769. goto set_irqchip_out;
  1770. r = 0;
  1771. set_irqchip_out:
  1772. kfree(chip);
  1773. if (r)
  1774. goto out;
  1775. break;
  1776. }
  1777. case KVM_ASSIGN_PCI_DEVICE: {
  1778. struct kvm_assigned_pci_dev assigned_dev;
  1779. r = -EFAULT;
  1780. if (copy_from_user(&assigned_dev, argp, sizeof assigned_dev))
  1781. goto out;
  1782. r = kvm_vm_ioctl_assign_device(kvm, &assigned_dev);
  1783. if (r)
  1784. goto out;
  1785. break;
  1786. }
  1787. case KVM_ASSIGN_IRQ: {
  1788. struct kvm_assigned_irq assigned_irq;
  1789. r = -EFAULT;
  1790. if (copy_from_user(&assigned_irq, argp, sizeof assigned_irq))
  1791. goto out;
  1792. r = kvm_vm_ioctl_assign_irq(kvm, &assigned_irq);
  1793. if (r)
  1794. goto out;
  1795. break;
  1796. }
  1797. case KVM_GET_PIT: {
  1798. r = -EFAULT;
  1799. if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
  1800. goto out;
  1801. r = -ENXIO;
  1802. if (!kvm->arch.vpit)
  1803. goto out;
  1804. r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
  1805. if (r)
  1806. goto out;
  1807. r = -EFAULT;
  1808. if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
  1809. goto out;
  1810. r = 0;
  1811. break;
  1812. }
  1813. case KVM_SET_PIT: {
  1814. r = -EFAULT;
  1815. if (copy_from_user(&u.ps, argp, sizeof u.ps))
  1816. goto out;
  1817. r = -ENXIO;
  1818. if (!kvm->arch.vpit)
  1819. goto out;
  1820. r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
  1821. if (r)
  1822. goto out;
  1823. r = 0;
  1824. break;
  1825. }
  1826. default:
  1827. ;
  1828. }
  1829. out:
  1830. return r;
  1831. }
  1832. static void kvm_init_msr_list(void)
  1833. {
  1834. u32 dummy[2];
  1835. unsigned i, j;
  1836. for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
  1837. if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
  1838. continue;
  1839. if (j < i)
  1840. msrs_to_save[j] = msrs_to_save[i];
  1841. j++;
  1842. }
  1843. num_msrs_to_save = j;
  1844. }
  1845. /*
  1846. * Only apic need an MMIO device hook, so shortcut now..
  1847. */
  1848. static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
  1849. gpa_t addr, int len,
  1850. int is_write)
  1851. {
  1852. struct kvm_io_device *dev;
  1853. if (vcpu->arch.apic) {
  1854. dev = &vcpu->arch.apic->dev;
  1855. if (dev->in_range(dev, addr, len, is_write))
  1856. return dev;
  1857. }
  1858. return NULL;
  1859. }
  1860. static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
  1861. gpa_t addr, int len,
  1862. int is_write)
  1863. {
  1864. struct kvm_io_device *dev;
  1865. dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
  1866. if (dev == NULL)
  1867. dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
  1868. is_write);
  1869. return dev;
  1870. }
  1871. int emulator_read_std(unsigned long addr,
  1872. void *val,
  1873. unsigned int bytes,
  1874. struct kvm_vcpu *vcpu)
  1875. {
  1876. void *data = val;
  1877. int r = X86EMUL_CONTINUE;
  1878. while (bytes) {
  1879. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1880. unsigned offset = addr & (PAGE_SIZE-1);
  1881. unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
  1882. int ret;
  1883. if (gpa == UNMAPPED_GVA) {
  1884. r = X86EMUL_PROPAGATE_FAULT;
  1885. goto out;
  1886. }
  1887. ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
  1888. if (ret < 0) {
  1889. r = X86EMUL_UNHANDLEABLE;
  1890. goto out;
  1891. }
  1892. bytes -= tocopy;
  1893. data += tocopy;
  1894. addr += tocopy;
  1895. }
  1896. out:
  1897. return r;
  1898. }
  1899. EXPORT_SYMBOL_GPL(emulator_read_std);
  1900. static int emulator_read_emulated(unsigned long addr,
  1901. void *val,
  1902. unsigned int bytes,
  1903. struct kvm_vcpu *vcpu)
  1904. {
  1905. struct kvm_io_device *mmio_dev;
  1906. gpa_t gpa;
  1907. if (vcpu->mmio_read_completed) {
  1908. memcpy(val, vcpu->mmio_data, bytes);
  1909. vcpu->mmio_read_completed = 0;
  1910. return X86EMUL_CONTINUE;
  1911. }
  1912. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1913. /* For APIC access vmexit */
  1914. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1915. goto mmio;
  1916. if (emulator_read_std(addr, val, bytes, vcpu)
  1917. == X86EMUL_CONTINUE)
  1918. return X86EMUL_CONTINUE;
  1919. if (gpa == UNMAPPED_GVA)
  1920. return X86EMUL_PROPAGATE_FAULT;
  1921. mmio:
  1922. /*
  1923. * Is this MMIO handled locally?
  1924. */
  1925. mutex_lock(&vcpu->kvm->lock);
  1926. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
  1927. if (mmio_dev) {
  1928. kvm_iodevice_read(mmio_dev, gpa, bytes, val);
  1929. mutex_unlock(&vcpu->kvm->lock);
  1930. return X86EMUL_CONTINUE;
  1931. }
  1932. mutex_unlock(&vcpu->kvm->lock);
  1933. vcpu->mmio_needed = 1;
  1934. vcpu->mmio_phys_addr = gpa;
  1935. vcpu->mmio_size = bytes;
  1936. vcpu->mmio_is_write = 0;
  1937. return X86EMUL_UNHANDLEABLE;
  1938. }
  1939. int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
  1940. const void *val, int bytes)
  1941. {
  1942. int ret;
  1943. ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
  1944. if (ret < 0)
  1945. return 0;
  1946. kvm_mmu_pte_write(vcpu, gpa, val, bytes);
  1947. return 1;
  1948. }
  1949. static int emulator_write_emulated_onepage(unsigned long addr,
  1950. const void *val,
  1951. unsigned int bytes,
  1952. struct kvm_vcpu *vcpu)
  1953. {
  1954. struct kvm_io_device *mmio_dev;
  1955. gpa_t gpa;
  1956. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1957. if (gpa == UNMAPPED_GVA) {
  1958. kvm_inject_page_fault(vcpu, addr, 2);
  1959. return X86EMUL_PROPAGATE_FAULT;
  1960. }
  1961. /* For APIC access vmexit */
  1962. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1963. goto mmio;
  1964. if (emulator_write_phys(vcpu, gpa, val, bytes))
  1965. return X86EMUL_CONTINUE;
  1966. mmio:
  1967. /*
  1968. * Is this MMIO handled locally?
  1969. */
  1970. mutex_lock(&vcpu->kvm->lock);
  1971. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
  1972. if (mmio_dev) {
  1973. kvm_iodevice_write(mmio_dev, gpa, bytes, val);
  1974. mutex_unlock(&vcpu->kvm->lock);
  1975. return X86EMUL_CONTINUE;
  1976. }
  1977. mutex_unlock(&vcpu->kvm->lock);
  1978. vcpu->mmio_needed = 1;
  1979. vcpu->mmio_phys_addr = gpa;
  1980. vcpu->mmio_size = bytes;
  1981. vcpu->mmio_is_write = 1;
  1982. memcpy(vcpu->mmio_data, val, bytes);
  1983. return X86EMUL_CONTINUE;
  1984. }
  1985. int emulator_write_emulated(unsigned long addr,
  1986. const void *val,
  1987. unsigned int bytes,
  1988. struct kvm_vcpu *vcpu)
  1989. {
  1990. /* Crossing a page boundary? */
  1991. if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
  1992. int rc, now;
  1993. now = -addr & ~PAGE_MASK;
  1994. rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
  1995. if (rc != X86EMUL_CONTINUE)
  1996. return rc;
  1997. addr += now;
  1998. val += now;
  1999. bytes -= now;
  2000. }
  2001. return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
  2002. }
  2003. EXPORT_SYMBOL_GPL(emulator_write_emulated);
  2004. static int emulator_cmpxchg_emulated(unsigned long addr,
  2005. const void *old,
  2006. const void *new,
  2007. unsigned int bytes,
  2008. struct kvm_vcpu *vcpu)
  2009. {
  2010. static int reported;
  2011. if (!reported) {
  2012. reported = 1;
  2013. printk(KERN_WARNING "kvm: emulating exchange as write\n");
  2014. }
  2015. #ifndef CONFIG_X86_64
  2016. /* guests cmpxchg8b have to be emulated atomically */
  2017. if (bytes == 8) {
  2018. gpa_t gpa;
  2019. struct page *page;
  2020. char *kaddr;
  2021. u64 val;
  2022. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  2023. if (gpa == UNMAPPED_GVA ||
  2024. (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  2025. goto emul_write;
  2026. if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
  2027. goto emul_write;
  2028. val = *(u64 *)new;
  2029. down_read(&current->mm->mmap_sem);
  2030. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  2031. up_read(&current->mm->mmap_sem);
  2032. kaddr = kmap_atomic(page, KM_USER0);
  2033. set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
  2034. kunmap_atomic(kaddr, KM_USER0);
  2035. kvm_release_page_dirty(page);
  2036. }
  2037. emul_write:
  2038. #endif
  2039. return emulator_write_emulated(addr, new, bytes, vcpu);
  2040. }
  2041. static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
  2042. {
  2043. return kvm_x86_ops->get_segment_base(vcpu, seg);
  2044. }
  2045. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
  2046. {
  2047. return X86EMUL_CONTINUE;
  2048. }
  2049. int emulate_clts(struct kvm_vcpu *vcpu)
  2050. {
  2051. KVMTRACE_0D(CLTS, vcpu, handler);
  2052. kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
  2053. return X86EMUL_CONTINUE;
  2054. }
  2055. int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
  2056. {
  2057. struct kvm_vcpu *vcpu = ctxt->vcpu;
  2058. switch (dr) {
  2059. case 0 ... 3:
  2060. *dest = kvm_x86_ops->get_dr(vcpu, dr);
  2061. return X86EMUL_CONTINUE;
  2062. default:
  2063. pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
  2064. return X86EMUL_UNHANDLEABLE;
  2065. }
  2066. }
  2067. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
  2068. {
  2069. unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
  2070. int exception;
  2071. kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
  2072. if (exception) {
  2073. /* FIXME: better handling */
  2074. return X86EMUL_UNHANDLEABLE;
  2075. }
  2076. return X86EMUL_CONTINUE;
  2077. }
  2078. void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
  2079. {
  2080. u8 opcodes[4];
  2081. unsigned long rip = kvm_rip_read(vcpu);
  2082. unsigned long rip_linear;
  2083. if (!printk_ratelimit())
  2084. return;
  2085. rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
  2086. emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
  2087. printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
  2088. context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
  2089. }
  2090. EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
  2091. static struct x86_emulate_ops emulate_ops = {
  2092. .read_std = emulator_read_std,
  2093. .read_emulated = emulator_read_emulated,
  2094. .write_emulated = emulator_write_emulated,
  2095. .cmpxchg_emulated = emulator_cmpxchg_emulated,
  2096. };
  2097. static void cache_all_regs(struct kvm_vcpu *vcpu)
  2098. {
  2099. kvm_register_read(vcpu, VCPU_REGS_RAX);
  2100. kvm_register_read(vcpu, VCPU_REGS_RSP);
  2101. kvm_register_read(vcpu, VCPU_REGS_RIP);
  2102. vcpu->arch.regs_dirty = ~0;
  2103. }
  2104. int emulate_instruction(struct kvm_vcpu *vcpu,
  2105. struct kvm_run *run,
  2106. unsigned long cr2,
  2107. u16 error_code,
  2108. int emulation_type)
  2109. {
  2110. int r;
  2111. struct decode_cache *c;
  2112. kvm_clear_exception_queue(vcpu);
  2113. vcpu->arch.mmio_fault_cr2 = cr2;
  2114. /*
  2115. * TODO: fix x86_emulate.c to use guest_read/write_register
  2116. * instead of direct ->regs accesses, can save hundred cycles
  2117. * on Intel for instructions that don't read/change RSP, for
  2118. * for example.
  2119. */
  2120. cache_all_regs(vcpu);
  2121. vcpu->mmio_is_write = 0;
  2122. vcpu->arch.pio.string = 0;
  2123. if (!(emulation_type & EMULTYPE_NO_DECODE)) {
  2124. int cs_db, cs_l;
  2125. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  2126. vcpu->arch.emulate_ctxt.vcpu = vcpu;
  2127. vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
  2128. vcpu->arch.emulate_ctxt.mode =
  2129. (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
  2130. ? X86EMUL_MODE_REAL : cs_l
  2131. ? X86EMUL_MODE_PROT64 : cs_db
  2132. ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
  2133. r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  2134. /* Reject the instructions other than VMCALL/VMMCALL when
  2135. * try to emulate invalid opcode */
  2136. c = &vcpu->arch.emulate_ctxt.decode;
  2137. if ((emulation_type & EMULTYPE_TRAP_UD) &&
  2138. (!(c->twobyte && c->b == 0x01 &&
  2139. (c->modrm_reg == 0 || c->modrm_reg == 3) &&
  2140. c->modrm_mod == 3 && c->modrm_rm == 1)))
  2141. return EMULATE_FAIL;
  2142. ++vcpu->stat.insn_emulation;
  2143. if (r) {
  2144. ++vcpu->stat.insn_emulation_fail;
  2145. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  2146. return EMULATE_DONE;
  2147. return EMULATE_FAIL;
  2148. }
  2149. }
  2150. r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  2151. if (vcpu->arch.pio.string)
  2152. return EMULATE_DO_MMIO;
  2153. if ((r || vcpu->mmio_is_write) && run) {
  2154. run->exit_reason = KVM_EXIT_MMIO;
  2155. run->mmio.phys_addr = vcpu->mmio_phys_addr;
  2156. memcpy(run->mmio.data, vcpu->mmio_data, 8);
  2157. run->mmio.len = vcpu->mmio_size;
  2158. run->mmio.is_write = vcpu->mmio_is_write;
  2159. }
  2160. if (r) {
  2161. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  2162. return EMULATE_DONE;
  2163. if (!vcpu->mmio_needed) {
  2164. kvm_report_emulation_failure(vcpu, "mmio");
  2165. return EMULATE_FAIL;
  2166. }
  2167. return EMULATE_DO_MMIO;
  2168. }
  2169. kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
  2170. if (vcpu->mmio_is_write) {
  2171. vcpu->mmio_needed = 0;
  2172. return EMULATE_DO_MMIO;
  2173. }
  2174. return EMULATE_DONE;
  2175. }
  2176. EXPORT_SYMBOL_GPL(emulate_instruction);
  2177. static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
  2178. {
  2179. int i;
  2180. for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
  2181. if (vcpu->arch.pio.guest_pages[i]) {
  2182. kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
  2183. vcpu->arch.pio.guest_pages[i] = NULL;
  2184. }
  2185. }
  2186. static int pio_copy_data(struct kvm_vcpu *vcpu)
  2187. {
  2188. void *p = vcpu->arch.pio_data;
  2189. void *q;
  2190. unsigned bytes;
  2191. int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
  2192. q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
  2193. PAGE_KERNEL);
  2194. if (!q) {
  2195. free_pio_guest_pages(vcpu);
  2196. return -ENOMEM;
  2197. }
  2198. q += vcpu->arch.pio.guest_page_offset;
  2199. bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
  2200. if (vcpu->arch.pio.in)
  2201. memcpy(q, p, bytes);
  2202. else
  2203. memcpy(p, q, bytes);
  2204. q -= vcpu->arch.pio.guest_page_offset;
  2205. vunmap(q);
  2206. free_pio_guest_pages(vcpu);
  2207. return 0;
  2208. }
  2209. int complete_pio(struct kvm_vcpu *vcpu)
  2210. {
  2211. struct kvm_pio_request *io = &vcpu->arch.pio;
  2212. long delta;
  2213. int r;
  2214. unsigned long val;
  2215. if (!io->string) {
  2216. if (io->in) {
  2217. val = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2218. memcpy(&val, vcpu->arch.pio_data, io->size);
  2219. kvm_register_write(vcpu, VCPU_REGS_RAX, val);
  2220. }
  2221. } else {
  2222. if (io->in) {
  2223. r = pio_copy_data(vcpu);
  2224. if (r)
  2225. return r;
  2226. }
  2227. delta = 1;
  2228. if (io->rep) {
  2229. delta *= io->cur_count;
  2230. /*
  2231. * The size of the register should really depend on
  2232. * current address size.
  2233. */
  2234. val = kvm_register_read(vcpu, VCPU_REGS_RCX);
  2235. val -= delta;
  2236. kvm_register_write(vcpu, VCPU_REGS_RCX, val);
  2237. }
  2238. if (io->down)
  2239. delta = -delta;
  2240. delta *= io->size;
  2241. if (io->in) {
  2242. val = kvm_register_read(vcpu, VCPU_REGS_RDI);
  2243. val += delta;
  2244. kvm_register_write(vcpu, VCPU_REGS_RDI, val);
  2245. } else {
  2246. val = kvm_register_read(vcpu, VCPU_REGS_RSI);
  2247. val += delta;
  2248. kvm_register_write(vcpu, VCPU_REGS_RSI, val);
  2249. }
  2250. }
  2251. io->count -= io->cur_count;
  2252. io->cur_count = 0;
  2253. return 0;
  2254. }
  2255. static void kernel_pio(struct kvm_io_device *pio_dev,
  2256. struct kvm_vcpu *vcpu,
  2257. void *pd)
  2258. {
  2259. /* TODO: String I/O for in kernel device */
  2260. mutex_lock(&vcpu->kvm->lock);
  2261. if (vcpu->arch.pio.in)
  2262. kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
  2263. vcpu->arch.pio.size,
  2264. pd);
  2265. else
  2266. kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
  2267. vcpu->arch.pio.size,
  2268. pd);
  2269. mutex_unlock(&vcpu->kvm->lock);
  2270. }
  2271. static void pio_string_write(struct kvm_io_device *pio_dev,
  2272. struct kvm_vcpu *vcpu)
  2273. {
  2274. struct kvm_pio_request *io = &vcpu->arch.pio;
  2275. void *pd = vcpu->arch.pio_data;
  2276. int i;
  2277. mutex_lock(&vcpu->kvm->lock);
  2278. for (i = 0; i < io->cur_count; i++) {
  2279. kvm_iodevice_write(pio_dev, io->port,
  2280. io->size,
  2281. pd);
  2282. pd += io->size;
  2283. }
  2284. mutex_unlock(&vcpu->kvm->lock);
  2285. }
  2286. static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
  2287. gpa_t addr, int len,
  2288. int is_write)
  2289. {
  2290. return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
  2291. }
  2292. int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  2293. int size, unsigned port)
  2294. {
  2295. struct kvm_io_device *pio_dev;
  2296. unsigned long val;
  2297. vcpu->run->exit_reason = KVM_EXIT_IO;
  2298. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  2299. vcpu->run->io.size = vcpu->arch.pio.size = size;
  2300. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  2301. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
  2302. vcpu->run->io.port = vcpu->arch.pio.port = port;
  2303. vcpu->arch.pio.in = in;
  2304. vcpu->arch.pio.string = 0;
  2305. vcpu->arch.pio.down = 0;
  2306. vcpu->arch.pio.guest_page_offset = 0;
  2307. vcpu->arch.pio.rep = 0;
  2308. if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
  2309. KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
  2310. handler);
  2311. else
  2312. KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
  2313. handler);
  2314. val = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2315. memcpy(vcpu->arch.pio_data, &val, 4);
  2316. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2317. pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
  2318. if (pio_dev) {
  2319. kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
  2320. complete_pio(vcpu);
  2321. return 1;
  2322. }
  2323. return 0;
  2324. }
  2325. EXPORT_SYMBOL_GPL(kvm_emulate_pio);
  2326. int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  2327. int size, unsigned long count, int down,
  2328. gva_t address, int rep, unsigned port)
  2329. {
  2330. unsigned now, in_page;
  2331. int i, ret = 0;
  2332. int nr_pages = 1;
  2333. struct page *page;
  2334. struct kvm_io_device *pio_dev;
  2335. vcpu->run->exit_reason = KVM_EXIT_IO;
  2336. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  2337. vcpu->run->io.size = vcpu->arch.pio.size = size;
  2338. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  2339. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
  2340. vcpu->run->io.port = vcpu->arch.pio.port = port;
  2341. vcpu->arch.pio.in = in;
  2342. vcpu->arch.pio.string = 1;
  2343. vcpu->arch.pio.down = down;
  2344. vcpu->arch.pio.guest_page_offset = offset_in_page(address);
  2345. vcpu->arch.pio.rep = rep;
  2346. if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
  2347. KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
  2348. handler);
  2349. else
  2350. KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
  2351. handler);
  2352. if (!count) {
  2353. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2354. return 1;
  2355. }
  2356. if (!down)
  2357. in_page = PAGE_SIZE - offset_in_page(address);
  2358. else
  2359. in_page = offset_in_page(address) + size;
  2360. now = min(count, (unsigned long)in_page / size);
  2361. if (!now) {
  2362. /*
  2363. * String I/O straddles page boundary. Pin two guest pages
  2364. * so that we satisfy atomicity constraints. Do just one
  2365. * transaction to avoid complexity.
  2366. */
  2367. nr_pages = 2;
  2368. now = 1;
  2369. }
  2370. if (down) {
  2371. /*
  2372. * String I/O in reverse. Yuck. Kill the guest, fix later.
  2373. */
  2374. pr_unimpl(vcpu, "guest string pio down\n");
  2375. kvm_inject_gp(vcpu, 0);
  2376. return 1;
  2377. }
  2378. vcpu->run->io.count = now;
  2379. vcpu->arch.pio.cur_count = now;
  2380. if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
  2381. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2382. for (i = 0; i < nr_pages; ++i) {
  2383. page = gva_to_page(vcpu, address + i * PAGE_SIZE);
  2384. vcpu->arch.pio.guest_pages[i] = page;
  2385. if (!page) {
  2386. kvm_inject_gp(vcpu, 0);
  2387. free_pio_guest_pages(vcpu);
  2388. return 1;
  2389. }
  2390. }
  2391. pio_dev = vcpu_find_pio_dev(vcpu, port,
  2392. vcpu->arch.pio.cur_count,
  2393. !vcpu->arch.pio.in);
  2394. if (!vcpu->arch.pio.in) {
  2395. /* string PIO write */
  2396. ret = pio_copy_data(vcpu);
  2397. if (ret >= 0 && pio_dev) {
  2398. pio_string_write(pio_dev, vcpu);
  2399. complete_pio(vcpu);
  2400. if (vcpu->arch.pio.count == 0)
  2401. ret = 1;
  2402. }
  2403. } else if (pio_dev)
  2404. pr_unimpl(vcpu, "no string pio read support yet, "
  2405. "port %x size %d count %ld\n",
  2406. port, size, count);
  2407. return ret;
  2408. }
  2409. EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
  2410. int kvm_arch_init(void *opaque)
  2411. {
  2412. int r;
  2413. struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
  2414. if (kvm_x86_ops) {
  2415. printk(KERN_ERR "kvm: already loaded the other module\n");
  2416. r = -EEXIST;
  2417. goto out;
  2418. }
  2419. if (!ops->cpu_has_kvm_support()) {
  2420. printk(KERN_ERR "kvm: no hardware support\n");
  2421. r = -EOPNOTSUPP;
  2422. goto out;
  2423. }
  2424. if (ops->disabled_by_bios()) {
  2425. printk(KERN_ERR "kvm: disabled by bios\n");
  2426. r = -EOPNOTSUPP;
  2427. goto out;
  2428. }
  2429. r = kvm_mmu_module_init();
  2430. if (r)
  2431. goto out;
  2432. kvm_init_msr_list();
  2433. kvm_x86_ops = ops;
  2434. kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
  2435. kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
  2436. kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
  2437. PT_DIRTY_MASK, PT64_NX_MASK, 0);
  2438. return 0;
  2439. out:
  2440. return r;
  2441. }
  2442. void kvm_arch_exit(void)
  2443. {
  2444. kvm_x86_ops = NULL;
  2445. kvm_mmu_module_exit();
  2446. }
  2447. int kvm_emulate_halt(struct kvm_vcpu *vcpu)
  2448. {
  2449. ++vcpu->stat.halt_exits;
  2450. KVMTRACE_0D(HLT, vcpu, handler);
  2451. if (irqchip_in_kernel(vcpu->kvm)) {
  2452. vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
  2453. up_read(&vcpu->kvm->slots_lock);
  2454. kvm_vcpu_block(vcpu);
  2455. down_read(&vcpu->kvm->slots_lock);
  2456. if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
  2457. return -EINTR;
  2458. return 1;
  2459. } else {
  2460. vcpu->run->exit_reason = KVM_EXIT_HLT;
  2461. return 0;
  2462. }
  2463. }
  2464. EXPORT_SYMBOL_GPL(kvm_emulate_halt);
  2465. static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
  2466. unsigned long a1)
  2467. {
  2468. if (is_long_mode(vcpu))
  2469. return a0;
  2470. else
  2471. return a0 | ((gpa_t)a1 << 32);
  2472. }
  2473. int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
  2474. {
  2475. unsigned long nr, a0, a1, a2, a3, ret;
  2476. int r = 1;
  2477. nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2478. a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
  2479. a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
  2480. a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
  2481. a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
  2482. KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
  2483. if (!is_long_mode(vcpu)) {
  2484. nr &= 0xFFFFFFFF;
  2485. a0 &= 0xFFFFFFFF;
  2486. a1 &= 0xFFFFFFFF;
  2487. a2 &= 0xFFFFFFFF;
  2488. a3 &= 0xFFFFFFFF;
  2489. }
  2490. switch (nr) {
  2491. case KVM_HC_VAPIC_POLL_IRQ:
  2492. ret = 0;
  2493. break;
  2494. case KVM_HC_MMU_OP:
  2495. r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
  2496. break;
  2497. default:
  2498. ret = -KVM_ENOSYS;
  2499. break;
  2500. }
  2501. kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
  2502. ++vcpu->stat.hypercalls;
  2503. return r;
  2504. }
  2505. EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
  2506. int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
  2507. {
  2508. char instruction[3];
  2509. int ret = 0;
  2510. unsigned long rip = kvm_rip_read(vcpu);
  2511. /*
  2512. * Blow out the MMU to ensure that no other VCPU has an active mapping
  2513. * to ensure that the updated hypercall appears atomically across all
  2514. * VCPUs.
  2515. */
  2516. kvm_mmu_zap_all(vcpu->kvm);
  2517. kvm_x86_ops->patch_hypercall(vcpu, instruction);
  2518. if (emulator_write_emulated(rip, instruction, 3, vcpu)
  2519. != X86EMUL_CONTINUE)
  2520. ret = -EFAULT;
  2521. return ret;
  2522. }
  2523. static u64 mk_cr_64(u64 curr_cr, u32 new_val)
  2524. {
  2525. return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
  2526. }
  2527. void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  2528. {
  2529. struct descriptor_table dt = { limit, base };
  2530. kvm_x86_ops->set_gdt(vcpu, &dt);
  2531. }
  2532. void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  2533. {
  2534. struct descriptor_table dt = { limit, base };
  2535. kvm_x86_ops->set_idt(vcpu, &dt);
  2536. }
  2537. void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
  2538. unsigned long *rflags)
  2539. {
  2540. kvm_lmsw(vcpu, msw);
  2541. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2542. }
  2543. unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
  2544. {
  2545. unsigned long value;
  2546. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2547. switch (cr) {
  2548. case 0:
  2549. value = vcpu->arch.cr0;
  2550. break;
  2551. case 2:
  2552. value = vcpu->arch.cr2;
  2553. break;
  2554. case 3:
  2555. value = vcpu->arch.cr3;
  2556. break;
  2557. case 4:
  2558. value = vcpu->arch.cr4;
  2559. break;
  2560. case 8:
  2561. value = kvm_get_cr8(vcpu);
  2562. break;
  2563. default:
  2564. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
  2565. return 0;
  2566. }
  2567. KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
  2568. (u32)((u64)value >> 32), handler);
  2569. return value;
  2570. }
  2571. void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
  2572. unsigned long *rflags)
  2573. {
  2574. KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
  2575. (u32)((u64)val >> 32), handler);
  2576. switch (cr) {
  2577. case 0:
  2578. kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
  2579. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2580. break;
  2581. case 2:
  2582. vcpu->arch.cr2 = val;
  2583. break;
  2584. case 3:
  2585. kvm_set_cr3(vcpu, val);
  2586. break;
  2587. case 4:
  2588. kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
  2589. break;
  2590. case 8:
  2591. kvm_set_cr8(vcpu, val & 0xfUL);
  2592. break;
  2593. default:
  2594. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
  2595. }
  2596. }
  2597. static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
  2598. {
  2599. struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
  2600. int j, nent = vcpu->arch.cpuid_nent;
  2601. e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
  2602. /* when no next entry is found, the current entry[i] is reselected */
  2603. for (j = i + 1; j == i; j = (j + 1) % nent) {
  2604. struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
  2605. if (ej->function == e->function) {
  2606. ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
  2607. return j;
  2608. }
  2609. }
  2610. return 0; /* silence gcc, even though control never reaches here */
  2611. }
  2612. /* find an entry with matching function, matching index (if needed), and that
  2613. * should be read next (if it's stateful) */
  2614. static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
  2615. u32 function, u32 index)
  2616. {
  2617. if (e->function != function)
  2618. return 0;
  2619. if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
  2620. return 0;
  2621. if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
  2622. !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
  2623. return 0;
  2624. return 1;
  2625. }
  2626. void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
  2627. {
  2628. int i;
  2629. u32 function, index;
  2630. struct kvm_cpuid_entry2 *e, *best;
  2631. function = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2632. index = kvm_register_read(vcpu, VCPU_REGS_RCX);
  2633. kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
  2634. kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
  2635. kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
  2636. kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
  2637. best = NULL;
  2638. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  2639. e = &vcpu->arch.cpuid_entries[i];
  2640. if (is_matching_cpuid_entry(e, function, index)) {
  2641. if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
  2642. move_to_next_stateful_cpuid_entry(vcpu, i);
  2643. best = e;
  2644. break;
  2645. }
  2646. /*
  2647. * Both basic or both extended?
  2648. */
  2649. if (((e->function ^ function) & 0x80000000) == 0)
  2650. if (!best || e->function > best->function)
  2651. best = e;
  2652. }
  2653. if (best) {
  2654. kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
  2655. kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
  2656. kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
  2657. kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
  2658. }
  2659. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2660. KVMTRACE_5D(CPUID, vcpu, function,
  2661. (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
  2662. (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
  2663. (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
  2664. (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
  2665. }
  2666. EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
  2667. /*
  2668. * Check if userspace requested an interrupt window, and that the
  2669. * interrupt window is open.
  2670. *
  2671. * No need to exit to userspace if we already have an interrupt queued.
  2672. */
  2673. static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
  2674. struct kvm_run *kvm_run)
  2675. {
  2676. return (!vcpu->arch.irq_summary &&
  2677. kvm_run->request_interrupt_window &&
  2678. vcpu->arch.interrupt_window_open &&
  2679. (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
  2680. }
  2681. static void post_kvm_run_save(struct kvm_vcpu *vcpu,
  2682. struct kvm_run *kvm_run)
  2683. {
  2684. kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
  2685. kvm_run->cr8 = kvm_get_cr8(vcpu);
  2686. kvm_run->apic_base = kvm_get_apic_base(vcpu);
  2687. if (irqchip_in_kernel(vcpu->kvm))
  2688. kvm_run->ready_for_interrupt_injection = 1;
  2689. else
  2690. kvm_run->ready_for_interrupt_injection =
  2691. (vcpu->arch.interrupt_window_open &&
  2692. vcpu->arch.irq_summary == 0);
  2693. }
  2694. static void vapic_enter(struct kvm_vcpu *vcpu)
  2695. {
  2696. struct kvm_lapic *apic = vcpu->arch.apic;
  2697. struct page *page;
  2698. if (!apic || !apic->vapic_addr)
  2699. return;
  2700. down_read(&current->mm->mmap_sem);
  2701. page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
  2702. up_read(&current->mm->mmap_sem);
  2703. vcpu->arch.apic->vapic_page = page;
  2704. }
  2705. static void vapic_exit(struct kvm_vcpu *vcpu)
  2706. {
  2707. struct kvm_lapic *apic = vcpu->arch.apic;
  2708. if (!apic || !apic->vapic_addr)
  2709. return;
  2710. down_read(&vcpu->kvm->slots_lock);
  2711. kvm_release_page_dirty(apic->vapic_page);
  2712. mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
  2713. up_read(&vcpu->kvm->slots_lock);
  2714. }
  2715. static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2716. {
  2717. int r;
  2718. if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
  2719. pr_debug("vcpu %d received sipi with vector # %x\n",
  2720. vcpu->vcpu_id, vcpu->arch.sipi_vector);
  2721. kvm_lapic_reset(vcpu);
  2722. r = kvm_x86_ops->vcpu_reset(vcpu);
  2723. if (r)
  2724. return r;
  2725. vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
  2726. }
  2727. down_read(&vcpu->kvm->slots_lock);
  2728. vapic_enter(vcpu);
  2729. again:
  2730. if (vcpu->requests)
  2731. if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
  2732. kvm_mmu_unload(vcpu);
  2733. r = kvm_mmu_reload(vcpu);
  2734. if (unlikely(r))
  2735. goto out;
  2736. if (vcpu->requests) {
  2737. if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
  2738. __kvm_migrate_timers(vcpu);
  2739. if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
  2740. kvm_x86_ops->tlb_flush(vcpu);
  2741. if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
  2742. &vcpu->requests)) {
  2743. kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
  2744. r = 0;
  2745. goto out;
  2746. }
  2747. if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
  2748. kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
  2749. r = 0;
  2750. goto out;
  2751. }
  2752. }
  2753. clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
  2754. kvm_inject_pending_timer_irqs(vcpu);
  2755. preempt_disable();
  2756. kvm_x86_ops->prepare_guest_switch(vcpu);
  2757. kvm_load_guest_fpu(vcpu);
  2758. local_irq_disable();
  2759. if (vcpu->requests || need_resched()) {
  2760. local_irq_enable();
  2761. preempt_enable();
  2762. r = 1;
  2763. goto out;
  2764. }
  2765. if (signal_pending(current)) {
  2766. local_irq_enable();
  2767. preempt_enable();
  2768. r = -EINTR;
  2769. kvm_run->exit_reason = KVM_EXIT_INTR;
  2770. ++vcpu->stat.signal_exits;
  2771. goto out;
  2772. }
  2773. if (vcpu->guest_debug.enabled)
  2774. kvm_x86_ops->guest_debug_pre(vcpu);
  2775. vcpu->guest_mode = 1;
  2776. /*
  2777. * Make sure that guest_mode assignment won't happen after
  2778. * testing the pending IRQ vector bitmap.
  2779. */
  2780. smp_wmb();
  2781. if (vcpu->arch.exception.pending)
  2782. __queue_exception(vcpu);
  2783. else if (irqchip_in_kernel(vcpu->kvm))
  2784. kvm_x86_ops->inject_pending_irq(vcpu);
  2785. else
  2786. kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
  2787. kvm_lapic_sync_to_vapic(vcpu);
  2788. up_read(&vcpu->kvm->slots_lock);
  2789. kvm_guest_enter();
  2790. KVMTRACE_0D(VMENTRY, vcpu, entryexit);
  2791. kvm_x86_ops->run(vcpu, kvm_run);
  2792. vcpu->guest_mode = 0;
  2793. local_irq_enable();
  2794. ++vcpu->stat.exits;
  2795. /*
  2796. * We must have an instruction between local_irq_enable() and
  2797. * kvm_guest_exit(), so the timer interrupt isn't delayed by
  2798. * the interrupt shadow. The stat.exits increment will do nicely.
  2799. * But we need to prevent reordering, hence this barrier():
  2800. */
  2801. barrier();
  2802. kvm_guest_exit();
  2803. preempt_enable();
  2804. down_read(&vcpu->kvm->slots_lock);
  2805. /*
  2806. * Profile KVM exit RIPs:
  2807. */
  2808. if (unlikely(prof_on == KVM_PROFILING)) {
  2809. unsigned long rip = kvm_rip_read(vcpu);
  2810. profile_hit(KVM_PROFILING, (void *)rip);
  2811. }
  2812. if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
  2813. vcpu->arch.exception.pending = false;
  2814. kvm_lapic_sync_from_vapic(vcpu);
  2815. r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
  2816. if (r > 0) {
  2817. if (dm_request_for_irq_injection(vcpu, kvm_run)) {
  2818. r = -EINTR;
  2819. kvm_run->exit_reason = KVM_EXIT_INTR;
  2820. ++vcpu->stat.request_irq_exits;
  2821. goto out;
  2822. }
  2823. if (!need_resched())
  2824. goto again;
  2825. }
  2826. out:
  2827. up_read(&vcpu->kvm->slots_lock);
  2828. if (r > 0) {
  2829. kvm_resched(vcpu);
  2830. down_read(&vcpu->kvm->slots_lock);
  2831. goto again;
  2832. }
  2833. post_kvm_run_save(vcpu, kvm_run);
  2834. vapic_exit(vcpu);
  2835. return r;
  2836. }
  2837. int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2838. {
  2839. int r;
  2840. sigset_t sigsaved;
  2841. vcpu_load(vcpu);
  2842. if (vcpu->sigset_active)
  2843. sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
  2844. if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
  2845. kvm_vcpu_block(vcpu);
  2846. r = -EAGAIN;
  2847. goto out;
  2848. }
  2849. /* re-sync apic's tpr */
  2850. if (!irqchip_in_kernel(vcpu->kvm))
  2851. kvm_set_cr8(vcpu, kvm_run->cr8);
  2852. if (vcpu->arch.pio.cur_count) {
  2853. r = complete_pio(vcpu);
  2854. if (r)
  2855. goto out;
  2856. }
  2857. #if CONFIG_HAS_IOMEM
  2858. if (vcpu->mmio_needed) {
  2859. memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
  2860. vcpu->mmio_read_completed = 1;
  2861. vcpu->mmio_needed = 0;
  2862. down_read(&vcpu->kvm->slots_lock);
  2863. r = emulate_instruction(vcpu, kvm_run,
  2864. vcpu->arch.mmio_fault_cr2, 0,
  2865. EMULTYPE_NO_DECODE);
  2866. up_read(&vcpu->kvm->slots_lock);
  2867. if (r == EMULATE_DO_MMIO) {
  2868. /*
  2869. * Read-modify-write. Back to userspace.
  2870. */
  2871. r = 0;
  2872. goto out;
  2873. }
  2874. }
  2875. #endif
  2876. if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
  2877. kvm_register_write(vcpu, VCPU_REGS_RAX,
  2878. kvm_run->hypercall.ret);
  2879. r = __vcpu_run(vcpu, kvm_run);
  2880. out:
  2881. if (vcpu->sigset_active)
  2882. sigprocmask(SIG_SETMASK, &sigsaved, NULL);
  2883. vcpu_put(vcpu);
  2884. return r;
  2885. }
  2886. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2887. {
  2888. vcpu_load(vcpu);
  2889. regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2890. regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
  2891. regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
  2892. regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
  2893. regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
  2894. regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
  2895. regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
  2896. regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
  2897. #ifdef CONFIG_X86_64
  2898. regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
  2899. regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
  2900. regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
  2901. regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
  2902. regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
  2903. regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
  2904. regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
  2905. regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
  2906. #endif
  2907. regs->rip = kvm_rip_read(vcpu);
  2908. regs->rflags = kvm_x86_ops->get_rflags(vcpu);
  2909. /*
  2910. * Don't leak debug flags in case they were set for guest debugging
  2911. */
  2912. if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
  2913. regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
  2914. vcpu_put(vcpu);
  2915. return 0;
  2916. }
  2917. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2918. {
  2919. vcpu_load(vcpu);
  2920. kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
  2921. kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
  2922. kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
  2923. kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
  2924. kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
  2925. kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
  2926. kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
  2927. kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
  2928. #ifdef CONFIG_X86_64
  2929. kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
  2930. kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
  2931. kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
  2932. kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
  2933. kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
  2934. kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
  2935. kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
  2936. kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
  2937. #endif
  2938. kvm_rip_write(vcpu, regs->rip);
  2939. kvm_x86_ops->set_rflags(vcpu, regs->rflags);
  2940. vcpu->arch.exception.pending = false;
  2941. vcpu_put(vcpu);
  2942. return 0;
  2943. }
  2944. void kvm_get_segment(struct kvm_vcpu *vcpu,
  2945. struct kvm_segment *var, int seg)
  2946. {
  2947. kvm_x86_ops->get_segment(vcpu, var, seg);
  2948. }
  2949. void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
  2950. {
  2951. struct kvm_segment cs;
  2952. kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
  2953. *db = cs.db;
  2954. *l = cs.l;
  2955. }
  2956. EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
  2957. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  2958. struct kvm_sregs *sregs)
  2959. {
  2960. struct descriptor_table dt;
  2961. int pending_vec;
  2962. vcpu_load(vcpu);
  2963. kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  2964. kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  2965. kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  2966. kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  2967. kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  2968. kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  2969. kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  2970. kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  2971. kvm_x86_ops->get_idt(vcpu, &dt);
  2972. sregs->idt.limit = dt.limit;
  2973. sregs->idt.base = dt.base;
  2974. kvm_x86_ops->get_gdt(vcpu, &dt);
  2975. sregs->gdt.limit = dt.limit;
  2976. sregs->gdt.base = dt.base;
  2977. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2978. sregs->cr0 = vcpu->arch.cr0;
  2979. sregs->cr2 = vcpu->arch.cr2;
  2980. sregs->cr3 = vcpu->arch.cr3;
  2981. sregs->cr4 = vcpu->arch.cr4;
  2982. sregs->cr8 = kvm_get_cr8(vcpu);
  2983. sregs->efer = vcpu->arch.shadow_efer;
  2984. sregs->apic_base = kvm_get_apic_base(vcpu);
  2985. if (irqchip_in_kernel(vcpu->kvm)) {
  2986. memset(sregs->interrupt_bitmap, 0,
  2987. sizeof sregs->interrupt_bitmap);
  2988. pending_vec = kvm_x86_ops->get_irq(vcpu);
  2989. if (pending_vec >= 0)
  2990. set_bit(pending_vec,
  2991. (unsigned long *)sregs->interrupt_bitmap);
  2992. } else
  2993. memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
  2994. sizeof sregs->interrupt_bitmap);
  2995. vcpu_put(vcpu);
  2996. return 0;
  2997. }
  2998. int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
  2999. struct kvm_mp_state *mp_state)
  3000. {
  3001. vcpu_load(vcpu);
  3002. mp_state->mp_state = vcpu->arch.mp_state;
  3003. vcpu_put(vcpu);
  3004. return 0;
  3005. }
  3006. int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
  3007. struct kvm_mp_state *mp_state)
  3008. {
  3009. vcpu_load(vcpu);
  3010. vcpu->arch.mp_state = mp_state->mp_state;
  3011. vcpu_put(vcpu);
  3012. return 0;
  3013. }
  3014. static void kvm_set_segment(struct kvm_vcpu *vcpu,
  3015. struct kvm_segment *var, int seg)
  3016. {
  3017. kvm_x86_ops->set_segment(vcpu, var, seg);
  3018. }
  3019. static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
  3020. struct kvm_segment *kvm_desct)
  3021. {
  3022. kvm_desct->base = seg_desc->base0;
  3023. kvm_desct->base |= seg_desc->base1 << 16;
  3024. kvm_desct->base |= seg_desc->base2 << 24;
  3025. kvm_desct->limit = seg_desc->limit0;
  3026. kvm_desct->limit |= seg_desc->limit << 16;
  3027. if (seg_desc->g) {
  3028. kvm_desct->limit <<= 12;
  3029. kvm_desct->limit |= 0xfff;
  3030. }
  3031. kvm_desct->selector = selector;
  3032. kvm_desct->type = seg_desc->type;
  3033. kvm_desct->present = seg_desc->p;
  3034. kvm_desct->dpl = seg_desc->dpl;
  3035. kvm_desct->db = seg_desc->d;
  3036. kvm_desct->s = seg_desc->s;
  3037. kvm_desct->l = seg_desc->l;
  3038. kvm_desct->g = seg_desc->g;
  3039. kvm_desct->avl = seg_desc->avl;
  3040. if (!selector)
  3041. kvm_desct->unusable = 1;
  3042. else
  3043. kvm_desct->unusable = 0;
  3044. kvm_desct->padding = 0;
  3045. }
  3046. static void get_segment_descritptor_dtable(struct kvm_vcpu *vcpu,
  3047. u16 selector,
  3048. struct descriptor_table *dtable)
  3049. {
  3050. if (selector & 1 << 2) {
  3051. struct kvm_segment kvm_seg;
  3052. kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
  3053. if (kvm_seg.unusable)
  3054. dtable->limit = 0;
  3055. else
  3056. dtable->limit = kvm_seg.limit;
  3057. dtable->base = kvm_seg.base;
  3058. }
  3059. else
  3060. kvm_x86_ops->get_gdt(vcpu, dtable);
  3061. }
  3062. /* allowed just for 8 bytes segments */
  3063. static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
  3064. struct desc_struct *seg_desc)
  3065. {
  3066. gpa_t gpa;
  3067. struct descriptor_table dtable;
  3068. u16 index = selector >> 3;
  3069. get_segment_descritptor_dtable(vcpu, selector, &dtable);
  3070. if (dtable.limit < index * 8 + 7) {
  3071. kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
  3072. return 1;
  3073. }
  3074. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
  3075. gpa += index * 8;
  3076. return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
  3077. }
  3078. /* allowed just for 8 bytes segments */
  3079. static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
  3080. struct desc_struct *seg_desc)
  3081. {
  3082. gpa_t gpa;
  3083. struct descriptor_table dtable;
  3084. u16 index = selector >> 3;
  3085. get_segment_descritptor_dtable(vcpu, selector, &dtable);
  3086. if (dtable.limit < index * 8 + 7)
  3087. return 1;
  3088. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
  3089. gpa += index * 8;
  3090. return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
  3091. }
  3092. static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
  3093. struct desc_struct *seg_desc)
  3094. {
  3095. u32 base_addr;
  3096. base_addr = seg_desc->base0;
  3097. base_addr |= (seg_desc->base1 << 16);
  3098. base_addr |= (seg_desc->base2 << 24);
  3099. return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
  3100. }
  3101. static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
  3102. {
  3103. struct kvm_segment kvm_seg;
  3104. kvm_get_segment(vcpu, &kvm_seg, seg);
  3105. return kvm_seg.selector;
  3106. }
  3107. static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
  3108. u16 selector,
  3109. struct kvm_segment *kvm_seg)
  3110. {
  3111. struct desc_struct seg_desc;
  3112. if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
  3113. return 1;
  3114. seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
  3115. return 0;
  3116. }
  3117. int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
  3118. {
  3119. struct kvm_segment segvar = {
  3120. .base = selector << 4,
  3121. .limit = 0xffff,
  3122. .selector = selector,
  3123. .type = 3,
  3124. .present = 1,
  3125. .dpl = 3,
  3126. .db = 0,
  3127. .s = 1,
  3128. .l = 0,
  3129. .g = 0,
  3130. .avl = 0,
  3131. .unusable = 0,
  3132. };
  3133. kvm_x86_ops->set_segment(vcpu, &segvar, seg);
  3134. return 0;
  3135. }
  3136. int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
  3137. int type_bits, int seg)
  3138. {
  3139. struct kvm_segment kvm_seg;
  3140. if (!(vcpu->arch.cr0 & X86_CR0_PE))
  3141. return kvm_load_realmode_segment(vcpu, selector, seg);
  3142. if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
  3143. return 1;
  3144. kvm_seg.type |= type_bits;
  3145. if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
  3146. seg != VCPU_SREG_LDTR)
  3147. if (!kvm_seg.s)
  3148. kvm_seg.unusable = 1;
  3149. kvm_set_segment(vcpu, &kvm_seg, seg);
  3150. return 0;
  3151. }
  3152. static void save_state_to_tss32(struct kvm_vcpu *vcpu,
  3153. struct tss_segment_32 *tss)
  3154. {
  3155. tss->cr3 = vcpu->arch.cr3;
  3156. tss->eip = kvm_rip_read(vcpu);
  3157. tss->eflags = kvm_x86_ops->get_rflags(vcpu);
  3158. tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
  3159. tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
  3160. tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
  3161. tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
  3162. tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
  3163. tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
  3164. tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
  3165. tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
  3166. tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
  3167. tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
  3168. tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
  3169. tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
  3170. tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
  3171. tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
  3172. tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
  3173. tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
  3174. }
  3175. static int load_state_from_tss32(struct kvm_vcpu *vcpu,
  3176. struct tss_segment_32 *tss)
  3177. {
  3178. kvm_set_cr3(vcpu, tss->cr3);
  3179. kvm_rip_write(vcpu, tss->eip);
  3180. kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
  3181. kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
  3182. kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
  3183. kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
  3184. kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
  3185. kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
  3186. kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
  3187. kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
  3188. kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
  3189. if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
  3190. return 1;
  3191. if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
  3192. return 1;
  3193. if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
  3194. return 1;
  3195. if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
  3196. return 1;
  3197. if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
  3198. return 1;
  3199. if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
  3200. return 1;
  3201. if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
  3202. return 1;
  3203. return 0;
  3204. }
  3205. static void save_state_to_tss16(struct kvm_vcpu *vcpu,
  3206. struct tss_segment_16 *tss)
  3207. {
  3208. tss->ip = kvm_rip_read(vcpu);
  3209. tss->flag = kvm_x86_ops->get_rflags(vcpu);
  3210. tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
  3211. tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
  3212. tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
  3213. tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
  3214. tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
  3215. tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
  3216. tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
  3217. tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
  3218. tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
  3219. tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
  3220. tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
  3221. tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
  3222. tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
  3223. tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
  3224. }
  3225. static int load_state_from_tss16(struct kvm_vcpu *vcpu,
  3226. struct tss_segment_16 *tss)
  3227. {
  3228. kvm_rip_write(vcpu, tss->ip);
  3229. kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
  3230. kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
  3231. kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
  3232. kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
  3233. kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
  3234. kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
  3235. kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
  3236. kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
  3237. kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
  3238. if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
  3239. return 1;
  3240. if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
  3241. return 1;
  3242. if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
  3243. return 1;
  3244. if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
  3245. return 1;
  3246. if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
  3247. return 1;
  3248. return 0;
  3249. }
  3250. static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
  3251. u32 old_tss_base,
  3252. struct desc_struct *nseg_desc)
  3253. {
  3254. struct tss_segment_16 tss_segment_16;
  3255. int ret = 0;
  3256. if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
  3257. sizeof tss_segment_16))
  3258. goto out;
  3259. save_state_to_tss16(vcpu, &tss_segment_16);
  3260. if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
  3261. sizeof tss_segment_16))
  3262. goto out;
  3263. if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
  3264. &tss_segment_16, sizeof tss_segment_16))
  3265. goto out;
  3266. if (load_state_from_tss16(vcpu, &tss_segment_16))
  3267. goto out;
  3268. ret = 1;
  3269. out:
  3270. return ret;
  3271. }
  3272. static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
  3273. u32 old_tss_base,
  3274. struct desc_struct *nseg_desc)
  3275. {
  3276. struct tss_segment_32 tss_segment_32;
  3277. int ret = 0;
  3278. if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
  3279. sizeof tss_segment_32))
  3280. goto out;
  3281. save_state_to_tss32(vcpu, &tss_segment_32);
  3282. if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
  3283. sizeof tss_segment_32))
  3284. goto out;
  3285. if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
  3286. &tss_segment_32, sizeof tss_segment_32))
  3287. goto out;
  3288. if (load_state_from_tss32(vcpu, &tss_segment_32))
  3289. goto out;
  3290. ret = 1;
  3291. out:
  3292. return ret;
  3293. }
  3294. int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
  3295. {
  3296. struct kvm_segment tr_seg;
  3297. struct desc_struct cseg_desc;
  3298. struct desc_struct nseg_desc;
  3299. int ret = 0;
  3300. u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
  3301. u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
  3302. old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
  3303. /* FIXME: Handle errors. Failure to read either TSS or their
  3304. * descriptors should generate a pagefault.
  3305. */
  3306. if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
  3307. goto out;
  3308. if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
  3309. goto out;
  3310. if (reason != TASK_SWITCH_IRET) {
  3311. int cpl;
  3312. cpl = kvm_x86_ops->get_cpl(vcpu);
  3313. if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
  3314. kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
  3315. return 1;
  3316. }
  3317. }
  3318. if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
  3319. kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
  3320. return 1;
  3321. }
  3322. if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
  3323. cseg_desc.type &= ~(1 << 1); //clear the B flag
  3324. save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
  3325. }
  3326. if (reason == TASK_SWITCH_IRET) {
  3327. u32 eflags = kvm_x86_ops->get_rflags(vcpu);
  3328. kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
  3329. }
  3330. kvm_x86_ops->skip_emulated_instruction(vcpu);
  3331. if (nseg_desc.type & 8)
  3332. ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
  3333. &nseg_desc);
  3334. else
  3335. ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
  3336. &nseg_desc);
  3337. if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
  3338. u32 eflags = kvm_x86_ops->get_rflags(vcpu);
  3339. kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
  3340. }
  3341. if (reason != TASK_SWITCH_IRET) {
  3342. nseg_desc.type |= (1 << 1);
  3343. save_guest_segment_descriptor(vcpu, tss_selector,
  3344. &nseg_desc);
  3345. }
  3346. kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
  3347. seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
  3348. tr_seg.type = 11;
  3349. kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
  3350. out:
  3351. return ret;
  3352. }
  3353. EXPORT_SYMBOL_GPL(kvm_task_switch);
  3354. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  3355. struct kvm_sregs *sregs)
  3356. {
  3357. int mmu_reset_needed = 0;
  3358. int i, pending_vec, max_bits;
  3359. struct descriptor_table dt;
  3360. vcpu_load(vcpu);
  3361. dt.limit = sregs->idt.limit;
  3362. dt.base = sregs->idt.base;
  3363. kvm_x86_ops->set_idt(vcpu, &dt);
  3364. dt.limit = sregs->gdt.limit;
  3365. dt.base = sregs->gdt.base;
  3366. kvm_x86_ops->set_gdt(vcpu, &dt);
  3367. vcpu->arch.cr2 = sregs->cr2;
  3368. mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
  3369. vcpu->arch.cr3 = sregs->cr3;
  3370. kvm_set_cr8(vcpu, sregs->cr8);
  3371. mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
  3372. kvm_x86_ops->set_efer(vcpu, sregs->efer);
  3373. kvm_set_apic_base(vcpu, sregs->apic_base);
  3374. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  3375. mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
  3376. kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
  3377. vcpu->arch.cr0 = sregs->cr0;
  3378. mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
  3379. kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
  3380. if (!is_long_mode(vcpu) && is_pae(vcpu))
  3381. load_pdptrs(vcpu, vcpu->arch.cr3);
  3382. if (mmu_reset_needed)
  3383. kvm_mmu_reset_context(vcpu);
  3384. if (!irqchip_in_kernel(vcpu->kvm)) {
  3385. memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
  3386. sizeof vcpu->arch.irq_pending);
  3387. vcpu->arch.irq_summary = 0;
  3388. for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
  3389. if (vcpu->arch.irq_pending[i])
  3390. __set_bit(i, &vcpu->arch.irq_summary);
  3391. } else {
  3392. max_bits = (sizeof sregs->interrupt_bitmap) << 3;
  3393. pending_vec = find_first_bit(
  3394. (const unsigned long *)sregs->interrupt_bitmap,
  3395. max_bits);
  3396. /* Only pending external irq is handled here */
  3397. if (pending_vec < max_bits) {
  3398. kvm_x86_ops->set_irq(vcpu, pending_vec);
  3399. pr_debug("Set back pending irq %d\n",
  3400. pending_vec);
  3401. }
  3402. }
  3403. kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  3404. kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  3405. kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  3406. kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  3407. kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  3408. kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  3409. kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  3410. kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  3411. vcpu_put(vcpu);
  3412. return 0;
  3413. }
  3414. int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
  3415. struct kvm_debug_guest *dbg)
  3416. {
  3417. int r;
  3418. vcpu_load(vcpu);
  3419. r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
  3420. vcpu_put(vcpu);
  3421. return r;
  3422. }
  3423. /*
  3424. * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
  3425. * we have asm/x86/processor.h
  3426. */
  3427. struct fxsave {
  3428. u16 cwd;
  3429. u16 swd;
  3430. u16 twd;
  3431. u16 fop;
  3432. u64 rip;
  3433. u64 rdp;
  3434. u32 mxcsr;
  3435. u32 mxcsr_mask;
  3436. u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
  3437. #ifdef CONFIG_X86_64
  3438. u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
  3439. #else
  3440. u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
  3441. #endif
  3442. };
  3443. /*
  3444. * Translate a guest virtual address to a guest physical address.
  3445. */
  3446. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  3447. struct kvm_translation *tr)
  3448. {
  3449. unsigned long vaddr = tr->linear_address;
  3450. gpa_t gpa;
  3451. vcpu_load(vcpu);
  3452. down_read(&vcpu->kvm->slots_lock);
  3453. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
  3454. up_read(&vcpu->kvm->slots_lock);
  3455. tr->physical_address = gpa;
  3456. tr->valid = gpa != UNMAPPED_GVA;
  3457. tr->writeable = 1;
  3458. tr->usermode = 0;
  3459. vcpu_put(vcpu);
  3460. return 0;
  3461. }
  3462. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  3463. {
  3464. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  3465. vcpu_load(vcpu);
  3466. memcpy(fpu->fpr, fxsave->st_space, 128);
  3467. fpu->fcw = fxsave->cwd;
  3468. fpu->fsw = fxsave->swd;
  3469. fpu->ftwx = fxsave->twd;
  3470. fpu->last_opcode = fxsave->fop;
  3471. fpu->last_ip = fxsave->rip;
  3472. fpu->last_dp = fxsave->rdp;
  3473. memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
  3474. vcpu_put(vcpu);
  3475. return 0;
  3476. }
  3477. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  3478. {
  3479. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  3480. vcpu_load(vcpu);
  3481. memcpy(fxsave->st_space, fpu->fpr, 128);
  3482. fxsave->cwd = fpu->fcw;
  3483. fxsave->swd = fpu->fsw;
  3484. fxsave->twd = fpu->ftwx;
  3485. fxsave->fop = fpu->last_opcode;
  3486. fxsave->rip = fpu->last_ip;
  3487. fxsave->rdp = fpu->last_dp;
  3488. memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
  3489. vcpu_put(vcpu);
  3490. return 0;
  3491. }
  3492. void fx_init(struct kvm_vcpu *vcpu)
  3493. {
  3494. unsigned after_mxcsr_mask;
  3495. /*
  3496. * Touch the fpu the first time in non atomic context as if
  3497. * this is the first fpu instruction the exception handler
  3498. * will fire before the instruction returns and it'll have to
  3499. * allocate ram with GFP_KERNEL.
  3500. */
  3501. if (!used_math())
  3502. kvm_fx_save(&vcpu->arch.host_fx_image);
  3503. /* Initialize guest FPU by resetting ours and saving into guest's */
  3504. preempt_disable();
  3505. kvm_fx_save(&vcpu->arch.host_fx_image);
  3506. kvm_fx_finit();
  3507. kvm_fx_save(&vcpu->arch.guest_fx_image);
  3508. kvm_fx_restore(&vcpu->arch.host_fx_image);
  3509. preempt_enable();
  3510. vcpu->arch.cr0 |= X86_CR0_ET;
  3511. after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
  3512. vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
  3513. memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
  3514. 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
  3515. }
  3516. EXPORT_SYMBOL_GPL(fx_init);
  3517. void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
  3518. {
  3519. if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
  3520. return;
  3521. vcpu->guest_fpu_loaded = 1;
  3522. kvm_fx_save(&vcpu->arch.host_fx_image);
  3523. kvm_fx_restore(&vcpu->arch.guest_fx_image);
  3524. }
  3525. EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
  3526. void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
  3527. {
  3528. if (!vcpu->guest_fpu_loaded)
  3529. return;
  3530. vcpu->guest_fpu_loaded = 0;
  3531. kvm_fx_save(&vcpu->arch.guest_fx_image);
  3532. kvm_fx_restore(&vcpu->arch.host_fx_image);
  3533. ++vcpu->stat.fpu_reload;
  3534. }
  3535. EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
  3536. void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
  3537. {
  3538. kvm_x86_ops->vcpu_free(vcpu);
  3539. }
  3540. struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
  3541. unsigned int id)
  3542. {
  3543. return kvm_x86_ops->vcpu_create(kvm, id);
  3544. }
  3545. int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
  3546. {
  3547. int r;
  3548. /* We do fxsave: this must be aligned. */
  3549. BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
  3550. vcpu_load(vcpu);
  3551. r = kvm_arch_vcpu_reset(vcpu);
  3552. if (r == 0)
  3553. r = kvm_mmu_setup(vcpu);
  3554. vcpu_put(vcpu);
  3555. if (r < 0)
  3556. goto free_vcpu;
  3557. return 0;
  3558. free_vcpu:
  3559. kvm_x86_ops->vcpu_free(vcpu);
  3560. return r;
  3561. }
  3562. void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
  3563. {
  3564. vcpu_load(vcpu);
  3565. kvm_mmu_unload(vcpu);
  3566. vcpu_put(vcpu);
  3567. kvm_x86_ops->vcpu_free(vcpu);
  3568. }
  3569. int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
  3570. {
  3571. return kvm_x86_ops->vcpu_reset(vcpu);
  3572. }
  3573. void kvm_arch_hardware_enable(void *garbage)
  3574. {
  3575. kvm_x86_ops->hardware_enable(garbage);
  3576. }
  3577. void kvm_arch_hardware_disable(void *garbage)
  3578. {
  3579. kvm_x86_ops->hardware_disable(garbage);
  3580. }
  3581. int kvm_arch_hardware_setup(void)
  3582. {
  3583. return kvm_x86_ops->hardware_setup();
  3584. }
  3585. void kvm_arch_hardware_unsetup(void)
  3586. {
  3587. kvm_x86_ops->hardware_unsetup();
  3588. }
  3589. void kvm_arch_check_processor_compat(void *rtn)
  3590. {
  3591. kvm_x86_ops->check_processor_compatibility(rtn);
  3592. }
  3593. int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
  3594. {
  3595. struct page *page;
  3596. struct kvm *kvm;
  3597. int r;
  3598. BUG_ON(vcpu->kvm == NULL);
  3599. kvm = vcpu->kvm;
  3600. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  3601. if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
  3602. vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
  3603. else
  3604. vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
  3605. page = alloc_page(GFP_KERNEL | __GFP_ZERO);
  3606. if (!page) {
  3607. r = -ENOMEM;
  3608. goto fail;
  3609. }
  3610. vcpu->arch.pio_data = page_address(page);
  3611. r = kvm_mmu_create(vcpu);
  3612. if (r < 0)
  3613. goto fail_free_pio_data;
  3614. if (irqchip_in_kernel(kvm)) {
  3615. r = kvm_create_lapic(vcpu);
  3616. if (r < 0)
  3617. goto fail_mmu_destroy;
  3618. }
  3619. return 0;
  3620. fail_mmu_destroy:
  3621. kvm_mmu_destroy(vcpu);
  3622. fail_free_pio_data:
  3623. free_page((unsigned long)vcpu->arch.pio_data);
  3624. fail:
  3625. return r;
  3626. }
  3627. void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
  3628. {
  3629. kvm_free_lapic(vcpu);
  3630. down_read(&vcpu->kvm->slots_lock);
  3631. kvm_mmu_destroy(vcpu);
  3632. up_read(&vcpu->kvm->slots_lock);
  3633. free_page((unsigned long)vcpu->arch.pio_data);
  3634. }
  3635. struct kvm *kvm_arch_create_vm(void)
  3636. {
  3637. struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
  3638. if (!kvm)
  3639. return ERR_PTR(-ENOMEM);
  3640. INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
  3641. INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
  3642. return kvm;
  3643. }
  3644. static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
  3645. {
  3646. vcpu_load(vcpu);
  3647. kvm_mmu_unload(vcpu);
  3648. vcpu_put(vcpu);
  3649. }
  3650. static void kvm_free_vcpus(struct kvm *kvm)
  3651. {
  3652. unsigned int i;
  3653. /*
  3654. * Unpin any mmu pages first.
  3655. */
  3656. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  3657. if (kvm->vcpus[i])
  3658. kvm_unload_vcpu_mmu(kvm->vcpus[i]);
  3659. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  3660. if (kvm->vcpus[i]) {
  3661. kvm_arch_vcpu_free(kvm->vcpus[i]);
  3662. kvm->vcpus[i] = NULL;
  3663. }
  3664. }
  3665. }
  3666. void kvm_arch_destroy_vm(struct kvm *kvm)
  3667. {
  3668. kvm_free_assigned_devices(kvm);
  3669. kvm_free_pit(kvm);
  3670. kfree(kvm->arch.vpic);
  3671. kfree(kvm->arch.vioapic);
  3672. kvm_free_vcpus(kvm);
  3673. kvm_free_physmem(kvm);
  3674. if (kvm->arch.apic_access_page)
  3675. put_page(kvm->arch.apic_access_page);
  3676. if (kvm->arch.ept_identity_pagetable)
  3677. put_page(kvm->arch.ept_identity_pagetable);
  3678. kfree(kvm);
  3679. }
  3680. int kvm_arch_set_memory_region(struct kvm *kvm,
  3681. struct kvm_userspace_memory_region *mem,
  3682. struct kvm_memory_slot old,
  3683. int user_alloc)
  3684. {
  3685. int npages = mem->memory_size >> PAGE_SHIFT;
  3686. struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
  3687. /*To keep backward compatibility with older userspace,
  3688. *x86 needs to hanlde !user_alloc case.
  3689. */
  3690. if (!user_alloc) {
  3691. if (npages && !old.rmap) {
  3692. unsigned long userspace_addr;
  3693. down_write(&current->mm->mmap_sem);
  3694. userspace_addr = do_mmap(NULL, 0,
  3695. npages * PAGE_SIZE,
  3696. PROT_READ | PROT_WRITE,
  3697. MAP_PRIVATE | MAP_ANONYMOUS,
  3698. 0);
  3699. up_write(&current->mm->mmap_sem);
  3700. if (IS_ERR((void *)userspace_addr))
  3701. return PTR_ERR((void *)userspace_addr);
  3702. /* set userspace_addr atomically for kvm_hva_to_rmapp */
  3703. spin_lock(&kvm->mmu_lock);
  3704. memslot->userspace_addr = userspace_addr;
  3705. spin_unlock(&kvm->mmu_lock);
  3706. } else {
  3707. if (!old.user_alloc && old.rmap) {
  3708. int ret;
  3709. down_write(&current->mm->mmap_sem);
  3710. ret = do_munmap(current->mm, old.userspace_addr,
  3711. old.npages * PAGE_SIZE);
  3712. up_write(&current->mm->mmap_sem);
  3713. if (ret < 0)
  3714. printk(KERN_WARNING
  3715. "kvm_vm_ioctl_set_memory_region: "
  3716. "failed to munmap memory\n");
  3717. }
  3718. }
  3719. }
  3720. if (!kvm->arch.n_requested_mmu_pages) {
  3721. unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
  3722. kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
  3723. }
  3724. kvm_mmu_slot_remove_write_access(kvm, mem->slot);
  3725. kvm_flush_remote_tlbs(kvm);
  3726. return 0;
  3727. }
  3728. void kvm_arch_flush_shadow(struct kvm *kvm)
  3729. {
  3730. kvm_mmu_zap_all(kvm);
  3731. }
  3732. int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
  3733. {
  3734. return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
  3735. || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED;
  3736. }
  3737. static void vcpu_kick_intr(void *info)
  3738. {
  3739. #ifdef DEBUG
  3740. struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
  3741. printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
  3742. #endif
  3743. }
  3744. void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
  3745. {
  3746. int ipi_pcpu = vcpu->cpu;
  3747. int cpu = get_cpu();
  3748. if (waitqueue_active(&vcpu->wq)) {
  3749. wake_up_interruptible(&vcpu->wq);
  3750. ++vcpu->stat.halt_wakeup;
  3751. }
  3752. /*
  3753. * We may be called synchronously with irqs disabled in guest mode,
  3754. * So need not to call smp_call_function_single() in that case.
  3755. */
  3756. if (vcpu->guest_mode && vcpu->cpu != cpu)
  3757. smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
  3758. put_cpu();
  3759. }