acpi-cpufreq.c 20 KB

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  1. /*
  2. * acpi-cpufreq.c - ACPI Processor P-States Driver
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
  8. *
  9. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along
  22. * with this program; if not, write to the Free Software Foundation, Inc.,
  23. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  24. *
  25. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  26. */
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/sched.h>
  32. #include <linux/cpufreq.h>
  33. #include <linux/compiler.h>
  34. #include <linux/dmi.h>
  35. #include <linux/slab.h>
  36. #include <linux/acpi.h>
  37. #include <linux/io.h>
  38. #include <linux/delay.h>
  39. #include <linux/uaccess.h>
  40. #include <acpi/processor.h>
  41. #include <asm/msr.h>
  42. #include <asm/processor.h>
  43. #include <asm/cpufeature.h>
  44. #include "mperf.h"
  45. MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
  46. MODULE_DESCRIPTION("ACPI Processor P-States Driver");
  47. MODULE_LICENSE("GPL");
  48. #define PFX "acpi-cpufreq: "
  49. enum {
  50. UNDEFINED_CAPABLE = 0,
  51. SYSTEM_INTEL_MSR_CAPABLE,
  52. SYSTEM_AMD_MSR_CAPABLE,
  53. SYSTEM_IO_CAPABLE,
  54. };
  55. #define INTEL_MSR_RANGE (0xffff)
  56. #define AMD_MSR_RANGE (0x7)
  57. struct acpi_cpufreq_data {
  58. struct acpi_processor_performance *acpi_data;
  59. struct cpufreq_frequency_table *freq_table;
  60. unsigned int resume;
  61. unsigned int cpu_feature;
  62. };
  63. static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data);
  64. /* acpi_perf_data is a pointer to percpu data. */
  65. static struct acpi_processor_performance __percpu *acpi_perf_data;
  66. static struct cpufreq_driver acpi_cpufreq_driver;
  67. static unsigned int acpi_pstate_strict;
  68. static int check_est_cpu(unsigned int cpuid)
  69. {
  70. struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
  71. return cpu_has(cpu, X86_FEATURE_EST);
  72. }
  73. static int check_amd_hwpstate_cpu(unsigned int cpuid)
  74. {
  75. struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
  76. return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
  77. }
  78. static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
  79. {
  80. struct acpi_processor_performance *perf;
  81. int i;
  82. perf = data->acpi_data;
  83. for (i = 0; i < perf->state_count; i++) {
  84. if (value == perf->states[i].status)
  85. return data->freq_table[i].frequency;
  86. }
  87. return 0;
  88. }
  89. static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
  90. {
  91. int i;
  92. struct acpi_processor_performance *perf;
  93. if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
  94. msr &= AMD_MSR_RANGE;
  95. else
  96. msr &= INTEL_MSR_RANGE;
  97. perf = data->acpi_data;
  98. for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
  99. if (msr == perf->states[data->freq_table[i].index].status)
  100. return data->freq_table[i].frequency;
  101. }
  102. return data->freq_table[0].frequency;
  103. }
  104. static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
  105. {
  106. switch (data->cpu_feature) {
  107. case SYSTEM_INTEL_MSR_CAPABLE:
  108. case SYSTEM_AMD_MSR_CAPABLE:
  109. return extract_msr(val, data);
  110. case SYSTEM_IO_CAPABLE:
  111. return extract_io(val, data);
  112. default:
  113. return 0;
  114. }
  115. }
  116. struct msr_addr {
  117. u32 reg;
  118. };
  119. struct io_addr {
  120. u16 port;
  121. u8 bit_width;
  122. };
  123. struct drv_cmd {
  124. unsigned int type;
  125. const struct cpumask *mask;
  126. union {
  127. struct msr_addr msr;
  128. struct io_addr io;
  129. } addr;
  130. u32 val;
  131. };
  132. /* Called via smp_call_function_single(), on the target CPU */
  133. static void do_drv_read(void *_cmd)
  134. {
  135. struct drv_cmd *cmd = _cmd;
  136. u32 h;
  137. switch (cmd->type) {
  138. case SYSTEM_INTEL_MSR_CAPABLE:
  139. case SYSTEM_AMD_MSR_CAPABLE:
  140. rdmsr(cmd->addr.msr.reg, cmd->val, h);
  141. break;
  142. case SYSTEM_IO_CAPABLE:
  143. acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
  144. &cmd->val,
  145. (u32)cmd->addr.io.bit_width);
  146. break;
  147. default:
  148. break;
  149. }
  150. }
  151. /* Called via smp_call_function_many(), on the target CPUs */
  152. static void do_drv_write(void *_cmd)
  153. {
  154. struct drv_cmd *cmd = _cmd;
  155. u32 lo, hi;
  156. switch (cmd->type) {
  157. case SYSTEM_INTEL_MSR_CAPABLE:
  158. rdmsr(cmd->addr.msr.reg, lo, hi);
  159. lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
  160. wrmsr(cmd->addr.msr.reg, lo, hi);
  161. break;
  162. case SYSTEM_AMD_MSR_CAPABLE:
  163. wrmsr(cmd->addr.msr.reg, cmd->val, 0);
  164. break;
  165. case SYSTEM_IO_CAPABLE:
  166. acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
  167. cmd->val,
  168. (u32)cmd->addr.io.bit_width);
  169. break;
  170. default:
  171. break;
  172. }
  173. }
  174. static void drv_read(struct drv_cmd *cmd)
  175. {
  176. int err;
  177. cmd->val = 0;
  178. err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1);
  179. WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
  180. }
  181. static void drv_write(struct drv_cmd *cmd)
  182. {
  183. int this_cpu;
  184. this_cpu = get_cpu();
  185. if (cpumask_test_cpu(this_cpu, cmd->mask))
  186. do_drv_write(cmd);
  187. smp_call_function_many(cmd->mask, do_drv_write, cmd, 1);
  188. put_cpu();
  189. }
  190. static u32 get_cur_val(const struct cpumask *mask)
  191. {
  192. struct acpi_processor_performance *perf;
  193. struct drv_cmd cmd;
  194. if (unlikely(cpumask_empty(mask)))
  195. return 0;
  196. switch (per_cpu(acfreq_data, cpumask_first(mask))->cpu_feature) {
  197. case SYSTEM_INTEL_MSR_CAPABLE:
  198. cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
  199. cmd.addr.msr.reg = MSR_IA32_PERF_STATUS;
  200. break;
  201. case SYSTEM_AMD_MSR_CAPABLE:
  202. cmd.type = SYSTEM_AMD_MSR_CAPABLE;
  203. cmd.addr.msr.reg = MSR_AMD_PERF_STATUS;
  204. break;
  205. case SYSTEM_IO_CAPABLE:
  206. cmd.type = SYSTEM_IO_CAPABLE;
  207. perf = per_cpu(acfreq_data, cpumask_first(mask))->acpi_data;
  208. cmd.addr.io.port = perf->control_register.address;
  209. cmd.addr.io.bit_width = perf->control_register.bit_width;
  210. break;
  211. default:
  212. return 0;
  213. }
  214. cmd.mask = mask;
  215. drv_read(&cmd);
  216. pr_debug("get_cur_val = %u\n", cmd.val);
  217. return cmd.val;
  218. }
  219. static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
  220. {
  221. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu);
  222. unsigned int freq;
  223. unsigned int cached_freq;
  224. pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
  225. if (unlikely(data == NULL ||
  226. data->acpi_data == NULL || data->freq_table == NULL)) {
  227. return 0;
  228. }
  229. cached_freq = data->freq_table[data->acpi_data->state].frequency;
  230. freq = extract_freq(get_cur_val(cpumask_of(cpu)), data);
  231. if (freq != cached_freq) {
  232. /*
  233. * The dreaded BIOS frequency change behind our back.
  234. * Force set the frequency on next target call.
  235. */
  236. data->resume = 1;
  237. }
  238. pr_debug("cur freq = %u\n", freq);
  239. return freq;
  240. }
  241. static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq,
  242. struct acpi_cpufreq_data *data)
  243. {
  244. unsigned int cur_freq;
  245. unsigned int i;
  246. for (i = 0; i < 100; i++) {
  247. cur_freq = extract_freq(get_cur_val(mask), data);
  248. if (cur_freq == freq)
  249. return 1;
  250. udelay(10);
  251. }
  252. return 0;
  253. }
  254. static int acpi_cpufreq_target(struct cpufreq_policy *policy,
  255. unsigned int target_freq, unsigned int relation)
  256. {
  257. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  258. struct acpi_processor_performance *perf;
  259. struct cpufreq_freqs freqs;
  260. struct drv_cmd cmd;
  261. unsigned int next_state = 0; /* Index into freq_table */
  262. unsigned int next_perf_state = 0; /* Index into perf table */
  263. unsigned int i;
  264. int result = 0;
  265. pr_debug("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
  266. if (unlikely(data == NULL ||
  267. data->acpi_data == NULL || data->freq_table == NULL)) {
  268. return -ENODEV;
  269. }
  270. perf = data->acpi_data;
  271. result = cpufreq_frequency_table_target(policy,
  272. data->freq_table,
  273. target_freq,
  274. relation, &next_state);
  275. if (unlikely(result)) {
  276. result = -ENODEV;
  277. goto out;
  278. }
  279. next_perf_state = data->freq_table[next_state].index;
  280. if (perf->state == next_perf_state) {
  281. if (unlikely(data->resume)) {
  282. pr_debug("Called after resume, resetting to P%d\n",
  283. next_perf_state);
  284. data->resume = 0;
  285. } else {
  286. pr_debug("Already at target state (P%d)\n",
  287. next_perf_state);
  288. goto out;
  289. }
  290. }
  291. switch (data->cpu_feature) {
  292. case SYSTEM_INTEL_MSR_CAPABLE:
  293. cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
  294. cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
  295. cmd.val = (u32) perf->states[next_perf_state].control;
  296. break;
  297. case SYSTEM_AMD_MSR_CAPABLE:
  298. cmd.type = SYSTEM_AMD_MSR_CAPABLE;
  299. cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
  300. cmd.val = (u32) perf->states[next_perf_state].control;
  301. break;
  302. case SYSTEM_IO_CAPABLE:
  303. cmd.type = SYSTEM_IO_CAPABLE;
  304. cmd.addr.io.port = perf->control_register.address;
  305. cmd.addr.io.bit_width = perf->control_register.bit_width;
  306. cmd.val = (u32) perf->states[next_perf_state].control;
  307. break;
  308. default:
  309. result = -ENODEV;
  310. goto out;
  311. }
  312. /* cpufreq holds the hotplug lock, so we are safe from here on */
  313. if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
  314. cmd.mask = policy->cpus;
  315. else
  316. cmd.mask = cpumask_of(policy->cpu);
  317. freqs.old = perf->states[perf->state].core_frequency * 1000;
  318. freqs.new = data->freq_table[next_state].frequency;
  319. for_each_cpu(i, policy->cpus) {
  320. freqs.cpu = i;
  321. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  322. }
  323. drv_write(&cmd);
  324. if (acpi_pstate_strict) {
  325. if (!check_freqs(cmd.mask, freqs.new, data)) {
  326. pr_debug("acpi_cpufreq_target failed (%d)\n",
  327. policy->cpu);
  328. result = -EAGAIN;
  329. goto out;
  330. }
  331. }
  332. for_each_cpu(i, policy->cpus) {
  333. freqs.cpu = i;
  334. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  335. }
  336. perf->state = next_perf_state;
  337. out:
  338. return result;
  339. }
  340. static int acpi_cpufreq_verify(struct cpufreq_policy *policy)
  341. {
  342. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  343. pr_debug("acpi_cpufreq_verify\n");
  344. return cpufreq_frequency_table_verify(policy, data->freq_table);
  345. }
  346. static unsigned long
  347. acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
  348. {
  349. struct acpi_processor_performance *perf = data->acpi_data;
  350. if (cpu_khz) {
  351. /* search the closest match to cpu_khz */
  352. unsigned int i;
  353. unsigned long freq;
  354. unsigned long freqn = perf->states[0].core_frequency * 1000;
  355. for (i = 0; i < (perf->state_count-1); i++) {
  356. freq = freqn;
  357. freqn = perf->states[i+1].core_frequency * 1000;
  358. if ((2 * cpu_khz) > (freqn + freq)) {
  359. perf->state = i;
  360. return freq;
  361. }
  362. }
  363. perf->state = perf->state_count-1;
  364. return freqn;
  365. } else {
  366. /* assume CPU is at P0... */
  367. perf->state = 0;
  368. return perf->states[0].core_frequency * 1000;
  369. }
  370. }
  371. static void free_acpi_perf_data(void)
  372. {
  373. unsigned int i;
  374. /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
  375. for_each_possible_cpu(i)
  376. free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
  377. ->shared_cpu_map);
  378. free_percpu(acpi_perf_data);
  379. }
  380. /*
  381. * acpi_cpufreq_early_init - initialize ACPI P-States library
  382. *
  383. * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
  384. * in order to determine correct frequency and voltage pairings. We can
  385. * do _PDC and _PSD and find out the processor dependency for the
  386. * actual init that will happen later...
  387. */
  388. static int __init acpi_cpufreq_early_init(void)
  389. {
  390. unsigned int i;
  391. pr_debug("acpi_cpufreq_early_init\n");
  392. acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
  393. if (!acpi_perf_data) {
  394. pr_debug("Memory allocation error for acpi_perf_data.\n");
  395. return -ENOMEM;
  396. }
  397. for_each_possible_cpu(i) {
  398. if (!zalloc_cpumask_var_node(
  399. &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
  400. GFP_KERNEL, cpu_to_node(i))) {
  401. /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
  402. free_acpi_perf_data();
  403. return -ENOMEM;
  404. }
  405. }
  406. /* Do initialization in ACPI core */
  407. acpi_processor_preregister_performance(acpi_perf_data);
  408. return 0;
  409. }
  410. #ifdef CONFIG_SMP
  411. /*
  412. * Some BIOSes do SW_ANY coordination internally, either set it up in hw
  413. * or do it in BIOS firmware and won't inform about it to OS. If not
  414. * detected, this has a side effect of making CPU run at a different speed
  415. * than OS intended it to run at. Detect it and handle it cleanly.
  416. */
  417. static int bios_with_sw_any_bug;
  418. static int sw_any_bug_found(const struct dmi_system_id *d)
  419. {
  420. bios_with_sw_any_bug = 1;
  421. return 0;
  422. }
  423. static const struct dmi_system_id sw_any_bug_dmi_table[] = {
  424. {
  425. .callback = sw_any_bug_found,
  426. .ident = "Supermicro Server X6DLP",
  427. .matches = {
  428. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  429. DMI_MATCH(DMI_BIOS_VERSION, "080010"),
  430. DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
  431. },
  432. },
  433. { }
  434. };
  435. static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
  436. {
  437. /* Intel Xeon Processor 7100 Series Specification Update
  438. * http://www.intel.com/Assets/PDF/specupdate/314554.pdf
  439. * AL30: A Machine Check Exception (MCE) Occurring during an
  440. * Enhanced Intel SpeedStep Technology Ratio Change May Cause
  441. * Both Processor Cores to Lock Up. */
  442. if (c->x86_vendor == X86_VENDOR_INTEL) {
  443. if ((c->x86 == 15) &&
  444. (c->x86_model == 6) &&
  445. (c->x86_mask == 8)) {
  446. printk(KERN_INFO "acpi-cpufreq: Intel(R) "
  447. "Xeon(R) 7100 Errata AL30, processors may "
  448. "lock up on frequency changes: disabling "
  449. "acpi-cpufreq.\n");
  450. return -ENODEV;
  451. }
  452. }
  453. return 0;
  454. }
  455. #endif
  456. static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
  457. {
  458. unsigned int i;
  459. unsigned int valid_states = 0;
  460. unsigned int cpu = policy->cpu;
  461. struct acpi_cpufreq_data *data;
  462. unsigned int result = 0;
  463. struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
  464. struct acpi_processor_performance *perf;
  465. #ifdef CONFIG_SMP
  466. static int blacklisted;
  467. #endif
  468. pr_debug("acpi_cpufreq_cpu_init\n");
  469. #ifdef CONFIG_SMP
  470. if (blacklisted)
  471. return blacklisted;
  472. blacklisted = acpi_cpufreq_blacklist(c);
  473. if (blacklisted)
  474. return blacklisted;
  475. #endif
  476. data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
  477. if (!data)
  478. return -ENOMEM;
  479. data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu);
  480. per_cpu(acfreq_data, cpu) = data;
  481. if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
  482. acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
  483. result = acpi_processor_register_performance(data->acpi_data, cpu);
  484. if (result)
  485. goto err_free;
  486. perf = data->acpi_data;
  487. policy->shared_type = perf->shared_type;
  488. /*
  489. * Will let policy->cpus know about dependency only when software
  490. * coordination is required.
  491. */
  492. if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
  493. policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
  494. cpumask_copy(policy->cpus, perf->shared_cpu_map);
  495. }
  496. cpumask_copy(policy->related_cpus, perf->shared_cpu_map);
  497. #ifdef CONFIG_SMP
  498. dmi_check_system(sw_any_bug_dmi_table);
  499. if (bios_with_sw_any_bug && cpumask_weight(policy->cpus) == 1) {
  500. policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
  501. cpumask_copy(policy->cpus, cpu_core_mask(cpu));
  502. }
  503. if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
  504. cpumask_clear(policy->cpus);
  505. cpumask_set_cpu(cpu, policy->cpus);
  506. cpumask_copy(policy->related_cpus, cpu_sibling_mask(cpu));
  507. policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
  508. pr_info_once(PFX "overriding BIOS provided _PSD data\n");
  509. }
  510. #endif
  511. /* capability check */
  512. if (perf->state_count <= 1) {
  513. pr_debug("No P-States\n");
  514. result = -ENODEV;
  515. goto err_unreg;
  516. }
  517. if (perf->control_register.space_id != perf->status_register.space_id) {
  518. result = -ENODEV;
  519. goto err_unreg;
  520. }
  521. switch (perf->control_register.space_id) {
  522. case ACPI_ADR_SPACE_SYSTEM_IO:
  523. pr_debug("SYSTEM IO addr space\n");
  524. data->cpu_feature = SYSTEM_IO_CAPABLE;
  525. break;
  526. case ACPI_ADR_SPACE_FIXED_HARDWARE:
  527. pr_debug("HARDWARE addr space\n");
  528. if (check_est_cpu(cpu)) {
  529. data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
  530. break;
  531. }
  532. if (check_amd_hwpstate_cpu(cpu)) {
  533. data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
  534. break;
  535. }
  536. result = -ENODEV;
  537. goto err_unreg;
  538. default:
  539. pr_debug("Unknown addr space %d\n",
  540. (u32) (perf->control_register.space_id));
  541. result = -ENODEV;
  542. goto err_unreg;
  543. }
  544. data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
  545. (perf->state_count+1), GFP_KERNEL);
  546. if (!data->freq_table) {
  547. result = -ENOMEM;
  548. goto err_unreg;
  549. }
  550. /* detect transition latency */
  551. policy->cpuinfo.transition_latency = 0;
  552. for (i = 0; i < perf->state_count; i++) {
  553. if ((perf->states[i].transition_latency * 1000) >
  554. policy->cpuinfo.transition_latency)
  555. policy->cpuinfo.transition_latency =
  556. perf->states[i].transition_latency * 1000;
  557. }
  558. /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
  559. if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
  560. policy->cpuinfo.transition_latency > 20 * 1000) {
  561. policy->cpuinfo.transition_latency = 20 * 1000;
  562. printk_once(KERN_INFO
  563. "P-state transition latency capped at 20 uS\n");
  564. }
  565. /* table init */
  566. for (i = 0; i < perf->state_count; i++) {
  567. if (i > 0 && perf->states[i].core_frequency >=
  568. data->freq_table[valid_states-1].frequency / 1000)
  569. continue;
  570. data->freq_table[valid_states].index = i;
  571. data->freq_table[valid_states].frequency =
  572. perf->states[i].core_frequency * 1000;
  573. valid_states++;
  574. }
  575. data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
  576. perf->state = 0;
  577. result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
  578. if (result)
  579. goto err_freqfree;
  580. if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
  581. printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n");
  582. switch (perf->control_register.space_id) {
  583. case ACPI_ADR_SPACE_SYSTEM_IO:
  584. /* Current speed is unknown and not detectable by IO port */
  585. policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
  586. break;
  587. case ACPI_ADR_SPACE_FIXED_HARDWARE:
  588. acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
  589. policy->cur = get_cur_freq_on_cpu(cpu);
  590. break;
  591. default:
  592. break;
  593. }
  594. /* notify BIOS that we exist */
  595. acpi_processor_notify_smm(THIS_MODULE);
  596. /* Check for APERF/MPERF support in hardware */
  597. if (boot_cpu_has(X86_FEATURE_APERFMPERF))
  598. acpi_cpufreq_driver.getavg = cpufreq_get_measured_perf;
  599. pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
  600. for (i = 0; i < perf->state_count; i++)
  601. pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
  602. (i == perf->state ? '*' : ' '), i,
  603. (u32) perf->states[i].core_frequency,
  604. (u32) perf->states[i].power,
  605. (u32) perf->states[i].transition_latency);
  606. cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
  607. /*
  608. * the first call to ->target() should result in us actually
  609. * writing something to the appropriate registers.
  610. */
  611. data->resume = 1;
  612. return result;
  613. err_freqfree:
  614. kfree(data->freq_table);
  615. err_unreg:
  616. acpi_processor_unregister_performance(perf, cpu);
  617. err_free:
  618. kfree(data);
  619. per_cpu(acfreq_data, cpu) = NULL;
  620. return result;
  621. }
  622. static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  623. {
  624. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  625. pr_debug("acpi_cpufreq_cpu_exit\n");
  626. if (data) {
  627. cpufreq_frequency_table_put_attr(policy->cpu);
  628. per_cpu(acfreq_data, policy->cpu) = NULL;
  629. acpi_processor_unregister_performance(data->acpi_data,
  630. policy->cpu);
  631. kfree(data->freq_table);
  632. kfree(data);
  633. }
  634. return 0;
  635. }
  636. static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
  637. {
  638. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  639. pr_debug("acpi_cpufreq_resume\n");
  640. data->resume = 1;
  641. return 0;
  642. }
  643. static struct freq_attr *acpi_cpufreq_attr[] = {
  644. &cpufreq_freq_attr_scaling_available_freqs,
  645. NULL,
  646. };
  647. static struct cpufreq_driver acpi_cpufreq_driver = {
  648. .verify = acpi_cpufreq_verify,
  649. .target = acpi_cpufreq_target,
  650. .bios_limit = acpi_processor_get_bios_limit,
  651. .init = acpi_cpufreq_cpu_init,
  652. .exit = acpi_cpufreq_cpu_exit,
  653. .resume = acpi_cpufreq_resume,
  654. .name = "acpi-cpufreq",
  655. .owner = THIS_MODULE,
  656. .attr = acpi_cpufreq_attr,
  657. };
  658. static int __init acpi_cpufreq_init(void)
  659. {
  660. int ret;
  661. if (acpi_disabled)
  662. return 0;
  663. pr_debug("acpi_cpufreq_init\n");
  664. ret = acpi_cpufreq_early_init();
  665. if (ret)
  666. return ret;
  667. ret = cpufreq_register_driver(&acpi_cpufreq_driver);
  668. if (ret)
  669. free_acpi_perf_data();
  670. return ret;
  671. }
  672. static void __exit acpi_cpufreq_exit(void)
  673. {
  674. pr_debug("acpi_cpufreq_exit\n");
  675. cpufreq_unregister_driver(&acpi_cpufreq_driver);
  676. free_acpi_perf_data();
  677. }
  678. module_param(acpi_pstate_strict, uint, 0644);
  679. MODULE_PARM_DESC(acpi_pstate_strict,
  680. "value 0 or non-zero. non-zero -> strict ACPI checks are "
  681. "performed during frequency changes.");
  682. late_initcall(acpi_cpufreq_init);
  683. module_exit(acpi_cpufreq_exit);
  684. MODULE_ALIAS("acpi");