cm4000_cs.c 49 KB

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  1. /*
  2. * A driver for the PCMCIA Smartcard Reader "Omnikey CardMan Mobile 4000"
  3. *
  4. * cm4000_cs.c support.linux@omnikey.com
  5. *
  6. * Tue Oct 23 11:32:43 GMT 2001 herp - cleaned up header files
  7. * Sun Jan 20 10:11:15 MET 2002 herp - added modversion header files
  8. * Thu Nov 14 16:34:11 GMT 2002 mh - added PPS functionality
  9. * Tue Nov 19 16:36:27 GMT 2002 mh - added SUSPEND/RESUME functionailty
  10. * Wed Jul 28 12:55:01 CEST 2004 mh - kernel 2.6 adjustments
  11. *
  12. * current version: 2.4.0gm4
  13. *
  14. * (C) 2000,2001,2002,2003,2004 Omnikey AG
  15. *
  16. * (C) 2005-2006 Harald Welte <laforge@gnumonks.org>
  17. * - Adhere to Kernel CodingStyle
  18. * - Port to 2.6.13 "new" style PCMCIA
  19. * - Check for copy_{from,to}_user return values
  20. * - Use nonseekable_open()
  21. * - add class interface for udev device creation
  22. *
  23. * All rights reserved. Licensed under dual BSD/GPL license.
  24. */
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/slab.h>
  28. #include <linux/init.h>
  29. #include <linux/fs.h>
  30. #include <linux/delay.h>
  31. #include <linux/bitrev.h>
  32. #include <linux/smp_lock.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/io.h>
  35. #include <pcmcia/cs.h>
  36. #include <pcmcia/cistpl.h>
  37. #include <pcmcia/cisreg.h>
  38. #include <pcmcia/ciscode.h>
  39. #include <pcmcia/ds.h>
  40. #include <linux/cm4000_cs.h>
  41. /* #define ATR_CSUM */
  42. #define reader_to_dev(x) (&x->p_dev->dev)
  43. /* n (debug level) is ignored */
  44. /* additional debug output may be enabled by re-compiling with
  45. * CM4000_DEBUG set */
  46. /* #define CM4000_DEBUG */
  47. #define DEBUGP(n, rdr, x, args...) do { \
  48. dev_dbg(reader_to_dev(rdr), "%s:" x, \
  49. __func__ , ## args); \
  50. } while (0)
  51. static char *version = "cm4000_cs.c v2.4.0gm6 - All bugs added by Harald Welte";
  52. #define T_1SEC (HZ)
  53. #define T_10MSEC msecs_to_jiffies(10)
  54. #define T_20MSEC msecs_to_jiffies(20)
  55. #define T_40MSEC msecs_to_jiffies(40)
  56. #define T_50MSEC msecs_to_jiffies(50)
  57. #define T_100MSEC msecs_to_jiffies(100)
  58. #define T_500MSEC msecs_to_jiffies(500)
  59. static void cm4000_release(struct pcmcia_device *link);
  60. static int major; /* major number we get from the kernel */
  61. /* note: the first state has to have number 0 always */
  62. #define M_FETCH_ATR 0
  63. #define M_TIMEOUT_WAIT 1
  64. #define M_READ_ATR_LEN 2
  65. #define M_READ_ATR 3
  66. #define M_ATR_PRESENT 4
  67. #define M_BAD_CARD 5
  68. #define M_CARDOFF 6
  69. #define LOCK_IO 0
  70. #define LOCK_MONITOR 1
  71. #define IS_AUTOPPS_ACT 6
  72. #define IS_PROCBYTE_PRESENT 7
  73. #define IS_INVREV 8
  74. #define IS_ANY_T0 9
  75. #define IS_ANY_T1 10
  76. #define IS_ATR_PRESENT 11
  77. #define IS_ATR_VALID 12
  78. #define IS_CMM_ABSENT 13
  79. #define IS_BAD_LENGTH 14
  80. #define IS_BAD_CSUM 15
  81. #define IS_BAD_CARD 16
  82. #define REG_FLAGS0(x) (x + 0)
  83. #define REG_FLAGS1(x) (x + 1)
  84. #define REG_NUM_BYTES(x) (x + 2)
  85. #define REG_BUF_ADDR(x) (x + 3)
  86. #define REG_BUF_DATA(x) (x + 4)
  87. #define REG_NUM_SEND(x) (x + 5)
  88. #define REG_BAUDRATE(x) (x + 6)
  89. #define REG_STOPBITS(x) (x + 7)
  90. struct cm4000_dev {
  91. struct pcmcia_device *p_dev;
  92. unsigned char atr[MAX_ATR];
  93. unsigned char rbuf[512];
  94. unsigned char sbuf[512];
  95. wait_queue_head_t devq; /* when removing cardman must not be
  96. zeroed! */
  97. wait_queue_head_t ioq; /* if IO is locked, wait on this Q */
  98. wait_queue_head_t atrq; /* wait for ATR valid */
  99. wait_queue_head_t readq; /* used by write to wake blk.read */
  100. /* warning: do not move this fields.
  101. * initialising to zero depends on it - see ZERO_DEV below. */
  102. unsigned char atr_csum;
  103. unsigned char atr_len_retry;
  104. unsigned short atr_len;
  105. unsigned short rlen; /* bytes avail. after write */
  106. unsigned short rpos; /* latest read pos. write zeroes */
  107. unsigned char procbyte; /* T=0 procedure byte */
  108. unsigned char mstate; /* state of card monitor */
  109. unsigned char cwarn; /* slow down warning */
  110. unsigned char flags0; /* cardman IO-flags 0 */
  111. unsigned char flags1; /* cardman IO-flags 1 */
  112. unsigned int mdelay; /* variable monitor speeds, in jiffies */
  113. unsigned int baudv; /* baud value for speed */
  114. unsigned char ta1;
  115. unsigned char proto; /* T=0, T=1, ... */
  116. unsigned long flags; /* lock+flags (MONITOR,IO,ATR) * for concurrent
  117. access */
  118. unsigned char pts[4];
  119. struct timer_list timer; /* used to keep monitor running */
  120. int monitor_running;
  121. };
  122. #define ZERO_DEV(dev) \
  123. memset(&dev->atr_csum,0, \
  124. sizeof(struct cm4000_dev) - \
  125. offsetof(struct cm4000_dev, atr_csum))
  126. static struct pcmcia_device *dev_table[CM4000_MAX_DEV];
  127. static struct class *cmm_class;
  128. /* This table doesn't use spaces after the comma between fields and thus
  129. * violates CodingStyle. However, I don't really think wrapping it around will
  130. * make it any clearer to read -HW */
  131. static unsigned char fi_di_table[10][14] = {
  132. /*FI 00 01 02 03 04 05 06 07 08 09 10 11 12 13 */
  133. /*DI */
  134. /* 0 */ {0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11},
  135. /* 1 */ {0x01,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x91,0x11,0x11,0x11,0x11},
  136. /* 2 */ {0x02,0x12,0x22,0x32,0x11,0x11,0x11,0x11,0x11,0x92,0xA2,0xB2,0x11,0x11},
  137. /* 3 */ {0x03,0x13,0x23,0x33,0x43,0x53,0x63,0x11,0x11,0x93,0xA3,0xB3,0xC3,0xD3},
  138. /* 4 */ {0x04,0x14,0x24,0x34,0x44,0x54,0x64,0x11,0x11,0x94,0xA4,0xB4,0xC4,0xD4},
  139. /* 5 */ {0x00,0x15,0x25,0x35,0x45,0x55,0x65,0x11,0x11,0x95,0xA5,0xB5,0xC5,0xD5},
  140. /* 6 */ {0x06,0x16,0x26,0x36,0x46,0x56,0x66,0x11,0x11,0x96,0xA6,0xB6,0xC6,0xD6},
  141. /* 7 */ {0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11},
  142. /* 8 */ {0x08,0x11,0x28,0x38,0x48,0x58,0x68,0x11,0x11,0x98,0xA8,0xB8,0xC8,0xD8},
  143. /* 9 */ {0x09,0x19,0x29,0x39,0x49,0x59,0x69,0x11,0x11,0x99,0xA9,0xB9,0xC9,0xD9}
  144. };
  145. #ifndef CM4000_DEBUG
  146. #define xoutb outb
  147. #define xinb inb
  148. #else
  149. static inline void xoutb(unsigned char val, unsigned short port)
  150. {
  151. pr_debug("outb(val=%.2x,port=%.4x)\n", val, port);
  152. outb(val, port);
  153. }
  154. static inline unsigned char xinb(unsigned short port)
  155. {
  156. unsigned char val;
  157. val = inb(port);
  158. pr_debug("%.2x=inb(%.4x)\n", val, port);
  159. return val;
  160. }
  161. #endif
  162. static inline unsigned char invert_revert(unsigned char ch)
  163. {
  164. return bitrev8(~ch);
  165. }
  166. static void str_invert_revert(unsigned char *b, int len)
  167. {
  168. int i;
  169. for (i = 0; i < len; i++)
  170. b[i] = invert_revert(b[i]);
  171. }
  172. #define ATRLENCK(dev,pos) \
  173. if (pos>=dev->atr_len || pos>=MAX_ATR) \
  174. goto return_0;
  175. static unsigned int calc_baudv(unsigned char fidi)
  176. {
  177. unsigned int wcrcf, wbrcf, fi_rfu, di_rfu;
  178. fi_rfu = 372;
  179. di_rfu = 1;
  180. /* FI */
  181. switch ((fidi >> 4) & 0x0F) {
  182. case 0x00:
  183. wcrcf = 372;
  184. break;
  185. case 0x01:
  186. wcrcf = 372;
  187. break;
  188. case 0x02:
  189. wcrcf = 558;
  190. break;
  191. case 0x03:
  192. wcrcf = 744;
  193. break;
  194. case 0x04:
  195. wcrcf = 1116;
  196. break;
  197. case 0x05:
  198. wcrcf = 1488;
  199. break;
  200. case 0x06:
  201. wcrcf = 1860;
  202. break;
  203. case 0x07:
  204. wcrcf = fi_rfu;
  205. break;
  206. case 0x08:
  207. wcrcf = fi_rfu;
  208. break;
  209. case 0x09:
  210. wcrcf = 512;
  211. break;
  212. case 0x0A:
  213. wcrcf = 768;
  214. break;
  215. case 0x0B:
  216. wcrcf = 1024;
  217. break;
  218. case 0x0C:
  219. wcrcf = 1536;
  220. break;
  221. case 0x0D:
  222. wcrcf = 2048;
  223. break;
  224. default:
  225. wcrcf = fi_rfu;
  226. break;
  227. }
  228. /* DI */
  229. switch (fidi & 0x0F) {
  230. case 0x00:
  231. wbrcf = di_rfu;
  232. break;
  233. case 0x01:
  234. wbrcf = 1;
  235. break;
  236. case 0x02:
  237. wbrcf = 2;
  238. break;
  239. case 0x03:
  240. wbrcf = 4;
  241. break;
  242. case 0x04:
  243. wbrcf = 8;
  244. break;
  245. case 0x05:
  246. wbrcf = 16;
  247. break;
  248. case 0x06:
  249. wbrcf = 32;
  250. break;
  251. case 0x07:
  252. wbrcf = di_rfu;
  253. break;
  254. case 0x08:
  255. wbrcf = 12;
  256. break;
  257. case 0x09:
  258. wbrcf = 20;
  259. break;
  260. default:
  261. wbrcf = di_rfu;
  262. break;
  263. }
  264. return (wcrcf / wbrcf);
  265. }
  266. static unsigned short io_read_num_rec_bytes(unsigned int iobase,
  267. unsigned short *s)
  268. {
  269. unsigned short tmp;
  270. tmp = *s = 0;
  271. do {
  272. *s = tmp;
  273. tmp = inb(REG_NUM_BYTES(iobase)) |
  274. (inb(REG_FLAGS0(iobase)) & 4 ? 0x100 : 0);
  275. } while (tmp != *s);
  276. return *s;
  277. }
  278. static int parse_atr(struct cm4000_dev *dev)
  279. {
  280. unsigned char any_t1, any_t0;
  281. unsigned char ch, ifno;
  282. int ix, done;
  283. DEBUGP(3, dev, "-> parse_atr: dev->atr_len = %i\n", dev->atr_len);
  284. if (dev->atr_len < 3) {
  285. DEBUGP(5, dev, "parse_atr: atr_len < 3\n");
  286. return 0;
  287. }
  288. if (dev->atr[0] == 0x3f)
  289. set_bit(IS_INVREV, &dev->flags);
  290. else
  291. clear_bit(IS_INVREV, &dev->flags);
  292. ix = 1;
  293. ifno = 1;
  294. ch = dev->atr[1];
  295. dev->proto = 0; /* XXX PROTO */
  296. any_t1 = any_t0 = done = 0;
  297. dev->ta1 = 0x11; /* defaults to 9600 baud */
  298. do {
  299. if (ifno == 1 && (ch & 0x10)) {
  300. /* read first interface byte and TA1 is present */
  301. dev->ta1 = dev->atr[2];
  302. DEBUGP(5, dev, "Card says FiDi is 0x%.2x\n", dev->ta1);
  303. ifno++;
  304. } else if ((ifno == 2) && (ch & 0x10)) { /* TA(2) */
  305. dev->ta1 = 0x11;
  306. ifno++;
  307. }
  308. DEBUGP(5, dev, "Yi=%.2x\n", ch & 0xf0);
  309. ix += ((ch & 0x10) >> 4) /* no of int.face chars */
  310. +((ch & 0x20) >> 5)
  311. + ((ch & 0x40) >> 6)
  312. + ((ch & 0x80) >> 7);
  313. /* ATRLENCK(dev,ix); */
  314. if (ch & 0x80) { /* TDi */
  315. ch = dev->atr[ix];
  316. if ((ch & 0x0f)) {
  317. any_t1 = 1;
  318. DEBUGP(5, dev, "card is capable of T=1\n");
  319. } else {
  320. any_t0 = 1;
  321. DEBUGP(5, dev, "card is capable of T=0\n");
  322. }
  323. } else
  324. done = 1;
  325. } while (!done);
  326. DEBUGP(5, dev, "ix=%d noHist=%d any_t1=%d\n",
  327. ix, dev->atr[1] & 15, any_t1);
  328. if (ix + 1 + (dev->atr[1] & 0x0f) + any_t1 != dev->atr_len) {
  329. DEBUGP(5, dev, "length error\n");
  330. return 0;
  331. }
  332. if (any_t0)
  333. set_bit(IS_ANY_T0, &dev->flags);
  334. if (any_t1) { /* compute csum */
  335. dev->atr_csum = 0;
  336. #ifdef ATR_CSUM
  337. for (i = 1; i < dev->atr_len; i++)
  338. dev->atr_csum ^= dev->atr[i];
  339. if (dev->atr_csum) {
  340. set_bit(IS_BAD_CSUM, &dev->flags);
  341. DEBUGP(5, dev, "bad checksum\n");
  342. goto return_0;
  343. }
  344. #endif
  345. if (any_t0 == 0)
  346. dev->proto = 1; /* XXX PROTO */
  347. set_bit(IS_ANY_T1, &dev->flags);
  348. }
  349. return 1;
  350. }
  351. struct card_fixup {
  352. char atr[12];
  353. u_int8_t atr_len;
  354. u_int8_t stopbits;
  355. };
  356. static struct card_fixup card_fixups[] = {
  357. { /* ACOS */
  358. .atr = { 0x3b, 0xb3, 0x11, 0x00, 0x00, 0x41, 0x01 },
  359. .atr_len = 7,
  360. .stopbits = 0x03,
  361. },
  362. { /* Motorola */
  363. .atr = {0x3b, 0x76, 0x13, 0x00, 0x00, 0x80, 0x62, 0x07,
  364. 0x41, 0x81, 0x81 },
  365. .atr_len = 11,
  366. .stopbits = 0x04,
  367. },
  368. };
  369. static void set_cardparameter(struct cm4000_dev *dev)
  370. {
  371. int i;
  372. unsigned int iobase = dev->p_dev->io.BasePort1;
  373. u_int8_t stopbits = 0x02; /* ISO default */
  374. DEBUGP(3, dev, "-> set_cardparameter\n");
  375. dev->flags1 = dev->flags1 | (((dev->baudv - 1) & 0x0100) >> 8);
  376. xoutb(dev->flags1, REG_FLAGS1(iobase));
  377. DEBUGP(5, dev, "flags1 = 0x%02x\n", dev->flags1);
  378. /* set baudrate */
  379. xoutb((unsigned char)((dev->baudv - 1) & 0xFF), REG_BAUDRATE(iobase));
  380. DEBUGP(5, dev, "baudv = %i -> write 0x%02x\n", dev->baudv,
  381. ((dev->baudv - 1) & 0xFF));
  382. /* set stopbits */
  383. for (i = 0; i < ARRAY_SIZE(card_fixups); i++) {
  384. if (!memcmp(dev->atr, card_fixups[i].atr,
  385. card_fixups[i].atr_len))
  386. stopbits = card_fixups[i].stopbits;
  387. }
  388. xoutb(stopbits, REG_STOPBITS(iobase));
  389. DEBUGP(3, dev, "<- set_cardparameter\n");
  390. }
  391. static int set_protocol(struct cm4000_dev *dev, struct ptsreq *ptsreq)
  392. {
  393. unsigned long tmp, i;
  394. unsigned short num_bytes_read;
  395. unsigned char pts_reply[4];
  396. ssize_t rc;
  397. unsigned int iobase = dev->p_dev->io.BasePort1;
  398. rc = 0;
  399. DEBUGP(3, dev, "-> set_protocol\n");
  400. DEBUGP(5, dev, "ptsreq->Protocol = 0x%.8x, ptsreq->Flags=0x%.8x, "
  401. "ptsreq->pts1=0x%.2x, ptsreq->pts2=0x%.2x, "
  402. "ptsreq->pts3=0x%.2x\n", (unsigned int)ptsreq->protocol,
  403. (unsigned int)ptsreq->flags, ptsreq->pts1, ptsreq->pts2,
  404. ptsreq->pts3);
  405. /* Fill PTS structure */
  406. dev->pts[0] = 0xff;
  407. dev->pts[1] = 0x00;
  408. tmp = ptsreq->protocol;
  409. while ((tmp = (tmp >> 1)) > 0)
  410. dev->pts[1]++;
  411. dev->proto = dev->pts[1]; /* Set new protocol */
  412. dev->pts[1] = (0x01 << 4) | (dev->pts[1]);
  413. /* Correct Fi/Di according to CM4000 Fi/Di table */
  414. DEBUGP(5, dev, "Ta(1) from ATR is 0x%.2x\n", dev->ta1);
  415. /* set Fi/Di according to ATR TA(1) */
  416. dev->pts[2] = fi_di_table[dev->ta1 & 0x0F][(dev->ta1 >> 4) & 0x0F];
  417. /* Calculate PCK character */
  418. dev->pts[3] = dev->pts[0] ^ dev->pts[1] ^ dev->pts[2];
  419. DEBUGP(5, dev, "pts0=%.2x, pts1=%.2x, pts2=%.2x, pts3=%.2x\n",
  420. dev->pts[0], dev->pts[1], dev->pts[2], dev->pts[3]);
  421. /* check card convention */
  422. if (test_bit(IS_INVREV, &dev->flags))
  423. str_invert_revert(dev->pts, 4);
  424. /* reset SM */
  425. xoutb(0x80, REG_FLAGS0(iobase));
  426. /* Enable access to the message buffer */
  427. DEBUGP(5, dev, "Enable access to the messages buffer\n");
  428. dev->flags1 = 0x20 /* T_Active */
  429. | (test_bit(IS_INVREV, &dev->flags) ? 0x02 : 0x00) /* inv parity */
  430. | ((dev->baudv >> 8) & 0x01); /* MSB-baud */
  431. xoutb(dev->flags1, REG_FLAGS1(iobase));
  432. DEBUGP(5, dev, "Enable message buffer -> flags1 = 0x%.2x\n",
  433. dev->flags1);
  434. /* write challenge to the buffer */
  435. DEBUGP(5, dev, "Write challenge to buffer: ");
  436. for (i = 0; i < 4; i++) {
  437. xoutb(i, REG_BUF_ADDR(iobase));
  438. xoutb(dev->pts[i], REG_BUF_DATA(iobase)); /* buf data */
  439. #ifdef CM4000_DEBUG
  440. pr_debug("0x%.2x ", dev->pts[i]);
  441. }
  442. pr_debug("\n");
  443. #else
  444. }
  445. #endif
  446. /* set number of bytes to write */
  447. DEBUGP(5, dev, "Set number of bytes to write\n");
  448. xoutb(0x04, REG_NUM_SEND(iobase));
  449. /* Trigger CARDMAN CONTROLLER */
  450. xoutb(0x50, REG_FLAGS0(iobase));
  451. /* Monitor progress */
  452. /* wait for xmit done */
  453. DEBUGP(5, dev, "Waiting for NumRecBytes getting valid\n");
  454. for (i = 0; i < 100; i++) {
  455. if (inb(REG_FLAGS0(iobase)) & 0x08) {
  456. DEBUGP(5, dev, "NumRecBytes is valid\n");
  457. break;
  458. }
  459. mdelay(10);
  460. }
  461. if (i == 100) {
  462. DEBUGP(5, dev, "Timeout waiting for NumRecBytes getting "
  463. "valid\n");
  464. rc = -EIO;
  465. goto exit_setprotocol;
  466. }
  467. DEBUGP(5, dev, "Reading NumRecBytes\n");
  468. for (i = 0; i < 100; i++) {
  469. io_read_num_rec_bytes(iobase, &num_bytes_read);
  470. if (num_bytes_read >= 4) {
  471. DEBUGP(2, dev, "NumRecBytes = %i\n", num_bytes_read);
  472. break;
  473. }
  474. mdelay(10);
  475. }
  476. /* check whether it is a short PTS reply? */
  477. if (num_bytes_read == 3)
  478. i = 0;
  479. if (i == 100) {
  480. DEBUGP(5, dev, "Timeout reading num_bytes_read\n");
  481. rc = -EIO;
  482. goto exit_setprotocol;
  483. }
  484. DEBUGP(5, dev, "Reset the CARDMAN CONTROLLER\n");
  485. xoutb(0x80, REG_FLAGS0(iobase));
  486. /* Read PPS reply */
  487. DEBUGP(5, dev, "Read PPS reply\n");
  488. for (i = 0; i < num_bytes_read; i++) {
  489. xoutb(i, REG_BUF_ADDR(iobase));
  490. pts_reply[i] = inb(REG_BUF_DATA(iobase));
  491. }
  492. #ifdef CM4000_DEBUG
  493. DEBUGP(2, dev, "PTSreply: ");
  494. for (i = 0; i < num_bytes_read; i++) {
  495. pr_debug("0x%.2x ", pts_reply[i]);
  496. }
  497. pr_debug("\n");
  498. #endif /* CM4000_DEBUG */
  499. DEBUGP(5, dev, "Clear Tactive in Flags1\n");
  500. xoutb(0x20, REG_FLAGS1(iobase));
  501. /* Compare ptsreq and ptsreply */
  502. if ((dev->pts[0] == pts_reply[0]) &&
  503. (dev->pts[1] == pts_reply[1]) &&
  504. (dev->pts[2] == pts_reply[2]) && (dev->pts[3] == pts_reply[3])) {
  505. /* setcardparameter according to PPS */
  506. dev->baudv = calc_baudv(dev->pts[2]);
  507. set_cardparameter(dev);
  508. } else if ((dev->pts[0] == pts_reply[0]) &&
  509. ((dev->pts[1] & 0xef) == pts_reply[1]) &&
  510. ((pts_reply[0] ^ pts_reply[1]) == pts_reply[2])) {
  511. /* short PTS reply, set card parameter to default values */
  512. dev->baudv = calc_baudv(0x11);
  513. set_cardparameter(dev);
  514. } else
  515. rc = -EIO;
  516. exit_setprotocol:
  517. DEBUGP(3, dev, "<- set_protocol\n");
  518. return rc;
  519. }
  520. static int io_detect_cm4000(unsigned int iobase, struct cm4000_dev *dev)
  521. {
  522. /* note: statemachine is assumed to be reset */
  523. if (inb(REG_FLAGS0(iobase)) & 8) {
  524. clear_bit(IS_ATR_VALID, &dev->flags);
  525. set_bit(IS_CMM_ABSENT, &dev->flags);
  526. return 0; /* detect CMM = 1 -> failure */
  527. }
  528. /* xoutb(0x40, REG_FLAGS1(iobase)); detectCMM */
  529. xoutb(dev->flags1 | 0x40, REG_FLAGS1(iobase));
  530. if ((inb(REG_FLAGS0(iobase)) & 8) == 0) {
  531. clear_bit(IS_ATR_VALID, &dev->flags);
  532. set_bit(IS_CMM_ABSENT, &dev->flags);
  533. return 0; /* detect CMM=0 -> failure */
  534. }
  535. /* clear detectCMM again by restoring original flags1 */
  536. xoutb(dev->flags1, REG_FLAGS1(iobase));
  537. return 1;
  538. }
  539. static void terminate_monitor(struct cm4000_dev *dev)
  540. {
  541. /* tell the monitor to stop and wait until
  542. * it terminates.
  543. */
  544. DEBUGP(3, dev, "-> terminate_monitor\n");
  545. wait_event_interruptible(dev->devq,
  546. test_and_set_bit(LOCK_MONITOR,
  547. (void *)&dev->flags));
  548. /* now, LOCK_MONITOR has been set.
  549. * allow a last cycle in the monitor.
  550. * the monitor will indicate that it has
  551. * finished by clearing this bit.
  552. */
  553. DEBUGP(5, dev, "Now allow last cycle of monitor!\n");
  554. while (test_bit(LOCK_MONITOR, (void *)&dev->flags))
  555. msleep(25);
  556. DEBUGP(5, dev, "Delete timer\n");
  557. del_timer_sync(&dev->timer);
  558. #ifdef CM4000_DEBUG
  559. dev->monitor_running = 0;
  560. #endif
  561. DEBUGP(3, dev, "<- terminate_monitor\n");
  562. }
  563. /*
  564. * monitor the card every 50msec. as a side-effect, retrieve the
  565. * atr once a card is inserted. another side-effect of retrieving the
  566. * atr is that the card will be powered on, so there is no need to
  567. * power on the card explictely from the application: the driver
  568. * is already doing that for you.
  569. */
  570. static void monitor_card(unsigned long p)
  571. {
  572. struct cm4000_dev *dev = (struct cm4000_dev *) p;
  573. unsigned int iobase = dev->p_dev->io.BasePort1;
  574. unsigned short s;
  575. struct ptsreq ptsreq;
  576. int i, atrc;
  577. DEBUGP(7, dev, "-> monitor_card\n");
  578. /* if someone has set the lock for us: we're done! */
  579. if (test_and_set_bit(LOCK_MONITOR, &dev->flags)) {
  580. DEBUGP(4, dev, "About to stop monitor\n");
  581. /* no */
  582. dev->rlen =
  583. dev->rpos =
  584. dev->atr_csum = dev->atr_len_retry = dev->cwarn = 0;
  585. dev->mstate = M_FETCH_ATR;
  586. clear_bit(LOCK_MONITOR, &dev->flags);
  587. /* close et al. are sleeping on devq, so wake it */
  588. wake_up_interruptible(&dev->devq);
  589. DEBUGP(2, dev, "<- monitor_card (we are done now)\n");
  590. return;
  591. }
  592. /* try to lock io: if it is already locked, just add another timer */
  593. if (test_and_set_bit(LOCK_IO, (void *)&dev->flags)) {
  594. DEBUGP(4, dev, "Couldn't get IO lock\n");
  595. goto return_with_timer;
  596. }
  597. /* is a card/a reader inserted at all ? */
  598. dev->flags0 = xinb(REG_FLAGS0(iobase));
  599. DEBUGP(7, dev, "dev->flags0 = 0x%2x\n", dev->flags0);
  600. DEBUGP(7, dev, "smartcard present: %s\n",
  601. dev->flags0 & 1 ? "yes" : "no");
  602. DEBUGP(7, dev, "cardman present: %s\n",
  603. dev->flags0 == 0xff ? "no" : "yes");
  604. if ((dev->flags0 & 1) == 0 /* no smartcard inserted */
  605. || dev->flags0 == 0xff) { /* no cardman inserted */
  606. /* no */
  607. dev->rlen =
  608. dev->rpos =
  609. dev->atr_csum = dev->atr_len_retry = dev->cwarn = 0;
  610. dev->mstate = M_FETCH_ATR;
  611. dev->flags &= 0x000000ff; /* only keep IO and MONITOR locks */
  612. if (dev->flags0 == 0xff) {
  613. DEBUGP(4, dev, "set IS_CMM_ABSENT bit\n");
  614. set_bit(IS_CMM_ABSENT, &dev->flags);
  615. } else if (test_bit(IS_CMM_ABSENT, &dev->flags)) {
  616. DEBUGP(4, dev, "clear IS_CMM_ABSENT bit "
  617. "(card is removed)\n");
  618. clear_bit(IS_CMM_ABSENT, &dev->flags);
  619. }
  620. goto release_io;
  621. } else if ((dev->flags0 & 1) && test_bit(IS_CMM_ABSENT, &dev->flags)) {
  622. /* cardman and card present but cardman was absent before
  623. * (after suspend with inserted card) */
  624. DEBUGP(4, dev, "clear IS_CMM_ABSENT bit (card is inserted)\n");
  625. clear_bit(IS_CMM_ABSENT, &dev->flags);
  626. }
  627. if (test_bit(IS_ATR_VALID, &dev->flags) == 1) {
  628. DEBUGP(7, dev, "believe ATR is already valid (do nothing)\n");
  629. goto release_io;
  630. }
  631. switch (dev->mstate) {
  632. unsigned char flags0;
  633. case M_CARDOFF:
  634. DEBUGP(4, dev, "M_CARDOFF\n");
  635. flags0 = inb(REG_FLAGS0(iobase));
  636. if (flags0 & 0x02) {
  637. /* wait until Flags0 indicate power is off */
  638. dev->mdelay = T_10MSEC;
  639. } else {
  640. /* Flags0 indicate power off and no card inserted now;
  641. * Reset CARDMAN CONTROLLER */
  642. xoutb(0x80, REG_FLAGS0(iobase));
  643. /* prepare for fetching ATR again: after card off ATR
  644. * is read again automatically */
  645. dev->rlen =
  646. dev->rpos =
  647. dev->atr_csum =
  648. dev->atr_len_retry = dev->cwarn = 0;
  649. dev->mstate = M_FETCH_ATR;
  650. /* minimal gap between CARDOFF and read ATR is 50msec */
  651. dev->mdelay = T_50MSEC;
  652. }
  653. break;
  654. case M_FETCH_ATR:
  655. DEBUGP(4, dev, "M_FETCH_ATR\n");
  656. xoutb(0x80, REG_FLAGS0(iobase));
  657. DEBUGP(4, dev, "Reset BAUDV to 9600\n");
  658. dev->baudv = 0x173; /* 9600 */
  659. xoutb(0x02, REG_STOPBITS(iobase)); /* stopbits=2 */
  660. xoutb(0x73, REG_BAUDRATE(iobase)); /* baud value */
  661. xoutb(0x21, REG_FLAGS1(iobase)); /* T_Active=1, baud
  662. value */
  663. /* warm start vs. power on: */
  664. xoutb(dev->flags0 & 2 ? 0x46 : 0x44, REG_FLAGS0(iobase));
  665. dev->mdelay = T_40MSEC;
  666. dev->mstate = M_TIMEOUT_WAIT;
  667. break;
  668. case M_TIMEOUT_WAIT:
  669. DEBUGP(4, dev, "M_TIMEOUT_WAIT\n");
  670. /* numRecBytes */
  671. io_read_num_rec_bytes(iobase, &dev->atr_len);
  672. dev->mdelay = T_10MSEC;
  673. dev->mstate = M_READ_ATR_LEN;
  674. break;
  675. case M_READ_ATR_LEN:
  676. DEBUGP(4, dev, "M_READ_ATR_LEN\n");
  677. /* infinite loop possible, since there is no timeout */
  678. #define MAX_ATR_LEN_RETRY 100
  679. if (dev->atr_len == io_read_num_rec_bytes(iobase, &s)) {
  680. if (dev->atr_len_retry++ >= MAX_ATR_LEN_RETRY) { /* + XX msec */
  681. dev->mdelay = T_10MSEC;
  682. dev->mstate = M_READ_ATR;
  683. }
  684. } else {
  685. dev->atr_len = s;
  686. dev->atr_len_retry = 0; /* set new timeout */
  687. }
  688. DEBUGP(4, dev, "Current ATR_LEN = %i\n", dev->atr_len);
  689. break;
  690. case M_READ_ATR:
  691. DEBUGP(4, dev, "M_READ_ATR\n");
  692. xoutb(0x80, REG_FLAGS0(iobase)); /* reset SM */
  693. for (i = 0; i < dev->atr_len; i++) {
  694. xoutb(i, REG_BUF_ADDR(iobase));
  695. dev->atr[i] = inb(REG_BUF_DATA(iobase));
  696. }
  697. /* Deactivate T_Active flags */
  698. DEBUGP(4, dev, "Deactivate T_Active flags\n");
  699. dev->flags1 = 0x01;
  700. xoutb(dev->flags1, REG_FLAGS1(iobase));
  701. /* atr is present (which doesnt mean it's valid) */
  702. set_bit(IS_ATR_PRESENT, &dev->flags);
  703. if (dev->atr[0] == 0x03)
  704. str_invert_revert(dev->atr, dev->atr_len);
  705. atrc = parse_atr(dev);
  706. if (atrc == 0) { /* atr invalid */
  707. dev->mdelay = 0;
  708. dev->mstate = M_BAD_CARD;
  709. } else {
  710. dev->mdelay = T_50MSEC;
  711. dev->mstate = M_ATR_PRESENT;
  712. set_bit(IS_ATR_VALID, &dev->flags);
  713. }
  714. if (test_bit(IS_ATR_VALID, &dev->flags) == 1) {
  715. DEBUGP(4, dev, "monitor_card: ATR valid\n");
  716. /* if ta1 == 0x11, no PPS necessary (default values) */
  717. /* do not do PPS with multi protocol cards */
  718. if ((test_bit(IS_AUTOPPS_ACT, &dev->flags) == 0) &&
  719. (dev->ta1 != 0x11) &&
  720. !(test_bit(IS_ANY_T0, &dev->flags) &&
  721. test_bit(IS_ANY_T1, &dev->flags))) {
  722. DEBUGP(4, dev, "Perform AUTOPPS\n");
  723. set_bit(IS_AUTOPPS_ACT, &dev->flags);
  724. ptsreq.protocol = ptsreq.protocol =
  725. (0x01 << dev->proto);
  726. ptsreq.flags = 0x01;
  727. ptsreq.pts1 = 0x00;
  728. ptsreq.pts2 = 0x00;
  729. ptsreq.pts3 = 0x00;
  730. if (set_protocol(dev, &ptsreq) == 0) {
  731. DEBUGP(4, dev, "AUTOPPS ret SUCC\n");
  732. clear_bit(IS_AUTOPPS_ACT, &dev->flags);
  733. wake_up_interruptible(&dev->atrq);
  734. } else {
  735. DEBUGP(4, dev, "AUTOPPS failed: "
  736. "repower using defaults\n");
  737. /* prepare for repowering */
  738. clear_bit(IS_ATR_PRESENT, &dev->flags);
  739. clear_bit(IS_ATR_VALID, &dev->flags);
  740. dev->rlen =
  741. dev->rpos =
  742. dev->atr_csum =
  743. dev->atr_len_retry = dev->cwarn = 0;
  744. dev->mstate = M_FETCH_ATR;
  745. dev->mdelay = T_50MSEC;
  746. }
  747. } else {
  748. /* for cards which use slightly different
  749. * params (extra guard time) */
  750. set_cardparameter(dev);
  751. if (test_bit(IS_AUTOPPS_ACT, &dev->flags) == 1)
  752. DEBUGP(4, dev, "AUTOPPS already active "
  753. "2nd try:use default values\n");
  754. if (dev->ta1 == 0x11)
  755. DEBUGP(4, dev, "No AUTOPPS necessary "
  756. "TA(1)==0x11\n");
  757. if (test_bit(IS_ANY_T0, &dev->flags)
  758. && test_bit(IS_ANY_T1, &dev->flags))
  759. DEBUGP(4, dev, "Do NOT perform AUTOPPS "
  760. "with multiprotocol cards\n");
  761. clear_bit(IS_AUTOPPS_ACT, &dev->flags);
  762. wake_up_interruptible(&dev->atrq);
  763. }
  764. } else {
  765. DEBUGP(4, dev, "ATR invalid\n");
  766. wake_up_interruptible(&dev->atrq);
  767. }
  768. break;
  769. case M_BAD_CARD:
  770. DEBUGP(4, dev, "M_BAD_CARD\n");
  771. /* slow down warning, but prompt immediately after insertion */
  772. if (dev->cwarn == 0 || dev->cwarn == 10) {
  773. set_bit(IS_BAD_CARD, &dev->flags);
  774. dev_warn(&dev->p_dev->dev, MODULE_NAME ": ");
  775. if (test_bit(IS_BAD_CSUM, &dev->flags)) {
  776. DEBUGP(4, dev, "ATR checksum (0x%.2x, should "
  777. "be zero) failed\n", dev->atr_csum);
  778. }
  779. #ifdef CM4000_DEBUG
  780. else if (test_bit(IS_BAD_LENGTH, &dev->flags)) {
  781. DEBUGP(4, dev, "ATR length error\n");
  782. } else {
  783. DEBUGP(4, dev, "card damaged or wrong way "
  784. "inserted\n");
  785. }
  786. #endif
  787. dev->cwarn = 0;
  788. wake_up_interruptible(&dev->atrq); /* wake open */
  789. }
  790. dev->cwarn++;
  791. dev->mdelay = T_100MSEC;
  792. dev->mstate = M_FETCH_ATR;
  793. break;
  794. default:
  795. DEBUGP(7, dev, "Unknown action\n");
  796. break; /* nothing */
  797. }
  798. release_io:
  799. DEBUGP(7, dev, "release_io\n");
  800. clear_bit(LOCK_IO, &dev->flags);
  801. wake_up_interruptible(&dev->ioq); /* whoever needs IO */
  802. return_with_timer:
  803. DEBUGP(7, dev, "<- monitor_card (returns with timer)\n");
  804. mod_timer(&dev->timer, jiffies + dev->mdelay);
  805. clear_bit(LOCK_MONITOR, &dev->flags);
  806. }
  807. /* Interface to userland (file_operations) */
  808. static ssize_t cmm_read(struct file *filp, __user char *buf, size_t count,
  809. loff_t *ppos)
  810. {
  811. struct cm4000_dev *dev = filp->private_data;
  812. unsigned int iobase = dev->p_dev->io.BasePort1;
  813. ssize_t rc;
  814. int i, j, k;
  815. DEBUGP(2, dev, "-> cmm_read(%s,%d)\n", current->comm, current->pid);
  816. if (count == 0) /* according to manpage */
  817. return 0;
  818. if (!pcmcia_dev_present(dev->p_dev) || /* device removed */
  819. test_bit(IS_CMM_ABSENT, &dev->flags))
  820. return -ENODEV;
  821. if (test_bit(IS_BAD_CSUM, &dev->flags))
  822. return -EIO;
  823. /* also see the note about this in cmm_write */
  824. if (wait_event_interruptible
  825. (dev->atrq,
  826. ((filp->f_flags & O_NONBLOCK)
  827. || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags) != 0)))) {
  828. if (filp->f_flags & O_NONBLOCK)
  829. return -EAGAIN;
  830. return -ERESTARTSYS;
  831. }
  832. if (test_bit(IS_ATR_VALID, &dev->flags) == 0)
  833. return -EIO;
  834. /* this one implements blocking IO */
  835. if (wait_event_interruptible
  836. (dev->readq,
  837. ((filp->f_flags & O_NONBLOCK) || (dev->rpos < dev->rlen)))) {
  838. if (filp->f_flags & O_NONBLOCK)
  839. return -EAGAIN;
  840. return -ERESTARTSYS;
  841. }
  842. /* lock io */
  843. if (wait_event_interruptible
  844. (dev->ioq,
  845. ((filp->f_flags & O_NONBLOCK)
  846. || (test_and_set_bit(LOCK_IO, (void *)&dev->flags) == 0)))) {
  847. if (filp->f_flags & O_NONBLOCK)
  848. return -EAGAIN;
  849. return -ERESTARTSYS;
  850. }
  851. rc = 0;
  852. dev->flags0 = inb(REG_FLAGS0(iobase));
  853. if ((dev->flags0 & 1) == 0 /* no smartcard inserted */
  854. || dev->flags0 == 0xff) { /* no cardman inserted */
  855. clear_bit(IS_ATR_VALID, &dev->flags);
  856. if (dev->flags0 & 1) {
  857. set_bit(IS_CMM_ABSENT, &dev->flags);
  858. rc = -ENODEV;
  859. }
  860. rc = -EIO;
  861. goto release_io;
  862. }
  863. DEBUGP(4, dev, "begin read answer\n");
  864. j = min(count, (size_t)(dev->rlen - dev->rpos));
  865. k = dev->rpos;
  866. if (k + j > 255)
  867. j = 256 - k;
  868. DEBUGP(4, dev, "read1 j=%d\n", j);
  869. for (i = 0; i < j; i++) {
  870. xoutb(k++, REG_BUF_ADDR(iobase));
  871. dev->rbuf[i] = xinb(REG_BUF_DATA(iobase));
  872. }
  873. j = min(count, (size_t)(dev->rlen - dev->rpos));
  874. if (k + j > 255) {
  875. DEBUGP(4, dev, "read2 j=%d\n", j);
  876. dev->flags1 |= 0x10; /* MSB buf addr set */
  877. xoutb(dev->flags1, REG_FLAGS1(iobase));
  878. for (; i < j; i++) {
  879. xoutb(k++, REG_BUF_ADDR(iobase));
  880. dev->rbuf[i] = xinb(REG_BUF_DATA(iobase));
  881. }
  882. }
  883. if (dev->proto == 0 && count > dev->rlen - dev->rpos && i) {
  884. DEBUGP(4, dev, "T=0 and count > buffer\n");
  885. dev->rbuf[i] = dev->rbuf[i - 1];
  886. dev->rbuf[i - 1] = dev->procbyte;
  887. j++;
  888. }
  889. count = j;
  890. dev->rpos = dev->rlen + 1;
  891. /* Clear T1Active */
  892. DEBUGP(4, dev, "Clear T1Active\n");
  893. dev->flags1 &= 0xdf;
  894. xoutb(dev->flags1, REG_FLAGS1(iobase));
  895. xoutb(0, REG_FLAGS1(iobase)); /* clear detectCMM */
  896. /* last check before exit */
  897. if (!io_detect_cm4000(iobase, dev)) {
  898. rc = -ENODEV;
  899. goto release_io;
  900. }
  901. if (test_bit(IS_INVREV, &dev->flags) && count > 0)
  902. str_invert_revert(dev->rbuf, count);
  903. if (copy_to_user(buf, dev->rbuf, count))
  904. rc = -EFAULT;
  905. release_io:
  906. clear_bit(LOCK_IO, &dev->flags);
  907. wake_up_interruptible(&dev->ioq);
  908. DEBUGP(2, dev, "<- cmm_read returns: rc = %Zi\n",
  909. (rc < 0 ? rc : count));
  910. return rc < 0 ? rc : count;
  911. }
  912. static ssize_t cmm_write(struct file *filp, const char __user *buf,
  913. size_t count, loff_t *ppos)
  914. {
  915. struct cm4000_dev *dev = filp->private_data;
  916. unsigned int iobase = dev->p_dev->io.BasePort1;
  917. unsigned short s;
  918. unsigned char tmp;
  919. unsigned char infolen;
  920. unsigned char sendT0;
  921. unsigned short nsend;
  922. unsigned short nr;
  923. ssize_t rc;
  924. int i;
  925. DEBUGP(2, dev, "-> cmm_write(%s,%d)\n", current->comm, current->pid);
  926. if (count == 0) /* according to manpage */
  927. return 0;
  928. if (dev->proto == 0 && count < 4) {
  929. /* T0 must have at least 4 bytes */
  930. DEBUGP(4, dev, "T0 short write\n");
  931. return -EIO;
  932. }
  933. nr = count & 0x1ff; /* max bytes to write */
  934. sendT0 = dev->proto ? 0 : nr > 5 ? 0x08 : 0;
  935. if (!pcmcia_dev_present(dev->p_dev) || /* device removed */
  936. test_bit(IS_CMM_ABSENT, &dev->flags))
  937. return -ENODEV;
  938. if (test_bit(IS_BAD_CSUM, &dev->flags)) {
  939. DEBUGP(4, dev, "bad csum\n");
  940. return -EIO;
  941. }
  942. /*
  943. * wait for atr to become valid.
  944. * note: it is important to lock this code. if we dont, the monitor
  945. * could be run between test_bit and the call to sleep on the
  946. * atr-queue. if *then* the monitor detects atr valid, it will wake up
  947. * any process on the atr-queue, *but* since we have been interrupted,
  948. * we do not yet sleep on this queue. this would result in a missed
  949. * wake_up and the calling process would sleep forever (until
  950. * interrupted). also, do *not* restore_flags before sleep_on, because
  951. * this could result in the same situation!
  952. */
  953. if (wait_event_interruptible
  954. (dev->atrq,
  955. ((filp->f_flags & O_NONBLOCK)
  956. || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags) != 0)))) {
  957. if (filp->f_flags & O_NONBLOCK)
  958. return -EAGAIN;
  959. return -ERESTARTSYS;
  960. }
  961. if (test_bit(IS_ATR_VALID, &dev->flags) == 0) { /* invalid atr */
  962. DEBUGP(4, dev, "invalid ATR\n");
  963. return -EIO;
  964. }
  965. /* lock io */
  966. if (wait_event_interruptible
  967. (dev->ioq,
  968. ((filp->f_flags & O_NONBLOCK)
  969. || (test_and_set_bit(LOCK_IO, (void *)&dev->flags) == 0)))) {
  970. if (filp->f_flags & O_NONBLOCK)
  971. return -EAGAIN;
  972. return -ERESTARTSYS;
  973. }
  974. if (copy_from_user(dev->sbuf, buf, ((count > 512) ? 512 : count)))
  975. return -EFAULT;
  976. rc = 0;
  977. dev->flags0 = inb(REG_FLAGS0(iobase));
  978. if ((dev->flags0 & 1) == 0 /* no smartcard inserted */
  979. || dev->flags0 == 0xff) { /* no cardman inserted */
  980. clear_bit(IS_ATR_VALID, &dev->flags);
  981. if (dev->flags0 & 1) {
  982. set_bit(IS_CMM_ABSENT, &dev->flags);
  983. rc = -ENODEV;
  984. } else {
  985. DEBUGP(4, dev, "IO error\n");
  986. rc = -EIO;
  987. }
  988. goto release_io;
  989. }
  990. xoutb(0x80, REG_FLAGS0(iobase)); /* reset SM */
  991. if (!io_detect_cm4000(iobase, dev)) {
  992. rc = -ENODEV;
  993. goto release_io;
  994. }
  995. /* reflect T=0 send/read mode in flags1 */
  996. dev->flags1 |= (sendT0);
  997. set_cardparameter(dev);
  998. /* dummy read, reset flag procedure received */
  999. tmp = inb(REG_FLAGS1(iobase));
  1000. dev->flags1 = 0x20 /* T_Active */
  1001. | (sendT0)
  1002. | (test_bit(IS_INVREV, &dev->flags) ? 2 : 0)/* inverse parity */
  1003. | (((dev->baudv - 1) & 0x0100) >> 8); /* MSB-Baud */
  1004. DEBUGP(1, dev, "set dev->flags1 = 0x%.2x\n", dev->flags1);
  1005. xoutb(dev->flags1, REG_FLAGS1(iobase));
  1006. /* xmit data */
  1007. DEBUGP(4, dev, "Xmit data\n");
  1008. for (i = 0; i < nr; i++) {
  1009. if (i >= 256) {
  1010. dev->flags1 = 0x20 /* T_Active */
  1011. | (sendT0) /* SendT0 */
  1012. /* inverse parity: */
  1013. | (test_bit(IS_INVREV, &dev->flags) ? 2 : 0)
  1014. | (((dev->baudv - 1) & 0x0100) >> 8) /* MSB-Baud */
  1015. | 0x10; /* set address high */
  1016. DEBUGP(4, dev, "dev->flags = 0x%.2x - set address "
  1017. "high\n", dev->flags1);
  1018. xoutb(dev->flags1, REG_FLAGS1(iobase));
  1019. }
  1020. if (test_bit(IS_INVREV, &dev->flags)) {
  1021. DEBUGP(4, dev, "Apply inverse convention for 0x%.2x "
  1022. "-> 0x%.2x\n", (unsigned char)dev->sbuf[i],
  1023. invert_revert(dev->sbuf[i]));
  1024. xoutb(i, REG_BUF_ADDR(iobase));
  1025. xoutb(invert_revert(dev->sbuf[i]),
  1026. REG_BUF_DATA(iobase));
  1027. } else {
  1028. xoutb(i, REG_BUF_ADDR(iobase));
  1029. xoutb(dev->sbuf[i], REG_BUF_DATA(iobase));
  1030. }
  1031. }
  1032. DEBUGP(4, dev, "Xmit done\n");
  1033. if (dev->proto == 0) {
  1034. /* T=0 proto: 0 byte reply */
  1035. if (nr == 4) {
  1036. DEBUGP(4, dev, "T=0 assumes 0 byte reply\n");
  1037. xoutb(i, REG_BUF_ADDR(iobase));
  1038. if (test_bit(IS_INVREV, &dev->flags))
  1039. xoutb(0xff, REG_BUF_DATA(iobase));
  1040. else
  1041. xoutb(0x00, REG_BUF_DATA(iobase));
  1042. }
  1043. /* numSendBytes */
  1044. if (sendT0)
  1045. nsend = nr;
  1046. else {
  1047. if (nr == 4)
  1048. nsend = 5;
  1049. else {
  1050. nsend = 5 + (unsigned char)dev->sbuf[4];
  1051. if (dev->sbuf[4] == 0)
  1052. nsend += 0x100;
  1053. }
  1054. }
  1055. } else
  1056. nsend = nr;
  1057. /* T0: output procedure byte */
  1058. if (test_bit(IS_INVREV, &dev->flags)) {
  1059. DEBUGP(4, dev, "T=0 set Procedure byte (inverse-reverse) "
  1060. "0x%.2x\n", invert_revert(dev->sbuf[1]));
  1061. xoutb(invert_revert(dev->sbuf[1]), REG_NUM_BYTES(iobase));
  1062. } else {
  1063. DEBUGP(4, dev, "T=0 set Procedure byte 0x%.2x\n", dev->sbuf[1]);
  1064. xoutb(dev->sbuf[1], REG_NUM_BYTES(iobase));
  1065. }
  1066. DEBUGP(1, dev, "set NumSendBytes = 0x%.2x\n",
  1067. (unsigned char)(nsend & 0xff));
  1068. xoutb((unsigned char)(nsend & 0xff), REG_NUM_SEND(iobase));
  1069. DEBUGP(1, dev, "Trigger CARDMAN CONTROLLER (0x%.2x)\n",
  1070. 0x40 /* SM_Active */
  1071. | (dev->flags0 & 2 ? 0 : 4) /* power on if needed */
  1072. |(dev->proto ? 0x10 : 0x08) /* T=1/T=0 */
  1073. |(nsend & 0x100) >> 8 /* MSB numSendBytes */ );
  1074. xoutb(0x40 /* SM_Active */
  1075. | (dev->flags0 & 2 ? 0 : 4) /* power on if needed */
  1076. |(dev->proto ? 0x10 : 0x08) /* T=1/T=0 */
  1077. |(nsend & 0x100) >> 8, /* MSB numSendBytes */
  1078. REG_FLAGS0(iobase));
  1079. /* wait for xmit done */
  1080. if (dev->proto == 1) {
  1081. DEBUGP(4, dev, "Wait for xmit done\n");
  1082. for (i = 0; i < 1000; i++) {
  1083. if (inb(REG_FLAGS0(iobase)) & 0x08)
  1084. break;
  1085. msleep_interruptible(10);
  1086. }
  1087. if (i == 1000) {
  1088. DEBUGP(4, dev, "timeout waiting for xmit done\n");
  1089. rc = -EIO;
  1090. goto release_io;
  1091. }
  1092. }
  1093. /* T=1: wait for infoLen */
  1094. infolen = 0;
  1095. if (dev->proto) {
  1096. /* wait until infoLen is valid */
  1097. for (i = 0; i < 6000; i++) { /* max waiting time of 1 min */
  1098. io_read_num_rec_bytes(iobase, &s);
  1099. if (s >= 3) {
  1100. infolen = inb(REG_FLAGS1(iobase));
  1101. DEBUGP(4, dev, "infolen=%d\n", infolen);
  1102. break;
  1103. }
  1104. msleep_interruptible(10);
  1105. }
  1106. if (i == 6000) {
  1107. DEBUGP(4, dev, "timeout waiting for infoLen\n");
  1108. rc = -EIO;
  1109. goto release_io;
  1110. }
  1111. } else
  1112. clear_bit(IS_PROCBYTE_PRESENT, &dev->flags);
  1113. /* numRecBytes | bit9 of numRecytes */
  1114. io_read_num_rec_bytes(iobase, &dev->rlen);
  1115. for (i = 0; i < 600; i++) { /* max waiting time of 2 sec */
  1116. if (dev->proto) {
  1117. if (dev->rlen >= infolen + 4)
  1118. break;
  1119. }
  1120. msleep_interruptible(10);
  1121. /* numRecBytes | bit9 of numRecytes */
  1122. io_read_num_rec_bytes(iobase, &s);
  1123. if (s > dev->rlen) {
  1124. DEBUGP(1, dev, "NumRecBytes inc (reset timeout)\n");
  1125. i = 0; /* reset timeout */
  1126. dev->rlen = s;
  1127. }
  1128. /* T=0: we are done when numRecBytes doesn't
  1129. * increment any more and NoProcedureByte
  1130. * is set and numRecBytes == bytes sent + 6
  1131. * (header bytes + data + 1 for sw2)
  1132. * except when the card replies an error
  1133. * which means, no data will be sent back.
  1134. */
  1135. else if (dev->proto == 0) {
  1136. if ((inb(REG_BUF_ADDR(iobase)) & 0x80)) {
  1137. /* no procedure byte received since last read */
  1138. DEBUGP(1, dev, "NoProcedure byte set\n");
  1139. /* i=0; */
  1140. } else {
  1141. /* procedure byte received since last read */
  1142. DEBUGP(1, dev, "NoProcedure byte unset "
  1143. "(reset timeout)\n");
  1144. dev->procbyte = inb(REG_FLAGS1(iobase));
  1145. DEBUGP(1, dev, "Read procedure byte 0x%.2x\n",
  1146. dev->procbyte);
  1147. i = 0; /* resettimeout */
  1148. }
  1149. if (inb(REG_FLAGS0(iobase)) & 0x08) {
  1150. DEBUGP(1, dev, "T0Done flag (read reply)\n");
  1151. break;
  1152. }
  1153. }
  1154. if (dev->proto)
  1155. infolen = inb(REG_FLAGS1(iobase));
  1156. }
  1157. if (i == 600) {
  1158. DEBUGP(1, dev, "timeout waiting for numRecBytes\n");
  1159. rc = -EIO;
  1160. goto release_io;
  1161. } else {
  1162. if (dev->proto == 0) {
  1163. DEBUGP(1, dev, "Wait for T0Done bit to be set\n");
  1164. for (i = 0; i < 1000; i++) {
  1165. if (inb(REG_FLAGS0(iobase)) & 0x08)
  1166. break;
  1167. msleep_interruptible(10);
  1168. }
  1169. if (i == 1000) {
  1170. DEBUGP(1, dev, "timeout waiting for T0Done\n");
  1171. rc = -EIO;
  1172. goto release_io;
  1173. }
  1174. dev->procbyte = inb(REG_FLAGS1(iobase));
  1175. DEBUGP(4, dev, "Read procedure byte 0x%.2x\n",
  1176. dev->procbyte);
  1177. io_read_num_rec_bytes(iobase, &dev->rlen);
  1178. DEBUGP(4, dev, "Read NumRecBytes = %i\n", dev->rlen);
  1179. }
  1180. }
  1181. /* T=1: read offset=zero, T=0: read offset=after challenge */
  1182. dev->rpos = dev->proto ? 0 : nr == 4 ? 5 : nr > dev->rlen ? 5 : nr;
  1183. DEBUGP(4, dev, "dev->rlen = %i, dev->rpos = %i, nr = %i\n",
  1184. dev->rlen, dev->rpos, nr);
  1185. release_io:
  1186. DEBUGP(4, dev, "Reset SM\n");
  1187. xoutb(0x80, REG_FLAGS0(iobase)); /* reset SM */
  1188. if (rc < 0) {
  1189. DEBUGP(4, dev, "Write failed but clear T_Active\n");
  1190. dev->flags1 &= 0xdf;
  1191. xoutb(dev->flags1, REG_FLAGS1(iobase));
  1192. }
  1193. clear_bit(LOCK_IO, &dev->flags);
  1194. wake_up_interruptible(&dev->ioq);
  1195. wake_up_interruptible(&dev->readq); /* tell read we have data */
  1196. /* ITSEC E2: clear write buffer */
  1197. memset((char *)dev->sbuf, 0, 512);
  1198. /* return error or actually written bytes */
  1199. DEBUGP(2, dev, "<- cmm_write\n");
  1200. return rc < 0 ? rc : nr;
  1201. }
  1202. static void start_monitor(struct cm4000_dev *dev)
  1203. {
  1204. DEBUGP(3, dev, "-> start_monitor\n");
  1205. if (!dev->monitor_running) {
  1206. DEBUGP(5, dev, "create, init and add timer\n");
  1207. setup_timer(&dev->timer, monitor_card, (unsigned long)dev);
  1208. dev->monitor_running = 1;
  1209. mod_timer(&dev->timer, jiffies);
  1210. } else
  1211. DEBUGP(5, dev, "monitor already running\n");
  1212. DEBUGP(3, dev, "<- start_monitor\n");
  1213. }
  1214. static void stop_monitor(struct cm4000_dev *dev)
  1215. {
  1216. DEBUGP(3, dev, "-> stop_monitor\n");
  1217. if (dev->monitor_running) {
  1218. DEBUGP(5, dev, "stopping monitor\n");
  1219. terminate_monitor(dev);
  1220. /* reset monitor SM */
  1221. clear_bit(IS_ATR_VALID, &dev->flags);
  1222. clear_bit(IS_ATR_PRESENT, &dev->flags);
  1223. } else
  1224. DEBUGP(5, dev, "monitor already stopped\n");
  1225. DEBUGP(3, dev, "<- stop_monitor\n");
  1226. }
  1227. static long cmm_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
  1228. {
  1229. struct cm4000_dev *dev = filp->private_data;
  1230. unsigned int iobase = dev->p_dev->io.BasePort1;
  1231. struct inode *inode = filp->f_path.dentry->d_inode;
  1232. struct pcmcia_device *link;
  1233. int size;
  1234. int rc;
  1235. void __user *argp = (void __user *)arg;
  1236. #ifdef CM4000_DEBUG
  1237. char *ioctl_names[CM_IOC_MAXNR + 1] = {
  1238. [_IOC_NR(CM_IOCGSTATUS)] "CM_IOCGSTATUS",
  1239. [_IOC_NR(CM_IOCGATR)] "CM_IOCGATR",
  1240. [_IOC_NR(CM_IOCARDOFF)] "CM_IOCARDOFF",
  1241. [_IOC_NR(CM_IOCSPTS)] "CM_IOCSPTS",
  1242. [_IOC_NR(CM_IOSDBGLVL)] "CM4000_DBGLVL",
  1243. };
  1244. DEBUGP(3, dev, "cmm_ioctl(device=%d.%d) %s\n", imajor(inode),
  1245. iminor(inode), ioctl_names[_IOC_NR(cmd)]);
  1246. #endif
  1247. lock_kernel();
  1248. rc = -ENODEV;
  1249. link = dev_table[iminor(inode)];
  1250. if (!pcmcia_dev_present(link)) {
  1251. DEBUGP(4, dev, "DEV_OK false\n");
  1252. goto out;
  1253. }
  1254. if (test_bit(IS_CMM_ABSENT, &dev->flags)) {
  1255. DEBUGP(4, dev, "CMM_ABSENT flag set\n");
  1256. goto out;
  1257. }
  1258. rc = -EINVAL;
  1259. if (_IOC_TYPE(cmd) != CM_IOC_MAGIC) {
  1260. DEBUGP(4, dev, "ioctype mismatch\n");
  1261. goto out;
  1262. }
  1263. if (_IOC_NR(cmd) > CM_IOC_MAXNR) {
  1264. DEBUGP(4, dev, "iocnr mismatch\n");
  1265. goto out;
  1266. }
  1267. size = _IOC_SIZE(cmd);
  1268. rc = -EFAULT;
  1269. DEBUGP(4, dev, "iocdir=%.4x iocr=%.4x iocw=%.4x iocsize=%d cmd=%.4x\n",
  1270. _IOC_DIR(cmd), _IOC_READ, _IOC_WRITE, size, cmd);
  1271. if (_IOC_DIR(cmd) & _IOC_READ) {
  1272. if (!access_ok(VERIFY_WRITE, argp, size))
  1273. goto out;
  1274. }
  1275. if (_IOC_DIR(cmd) & _IOC_WRITE) {
  1276. if (!access_ok(VERIFY_READ, argp, size))
  1277. goto out;
  1278. }
  1279. rc = 0;
  1280. switch (cmd) {
  1281. case CM_IOCGSTATUS:
  1282. DEBUGP(4, dev, " ... in CM_IOCGSTATUS\n");
  1283. {
  1284. int status;
  1285. /* clear other bits, but leave inserted & powered as
  1286. * they are */
  1287. status = dev->flags0 & 3;
  1288. if (test_bit(IS_ATR_PRESENT, &dev->flags))
  1289. status |= CM_ATR_PRESENT;
  1290. if (test_bit(IS_ATR_VALID, &dev->flags))
  1291. status |= CM_ATR_VALID;
  1292. if (test_bit(IS_CMM_ABSENT, &dev->flags))
  1293. status |= CM_NO_READER;
  1294. if (test_bit(IS_BAD_CARD, &dev->flags))
  1295. status |= CM_BAD_CARD;
  1296. if (copy_to_user(argp, &status, sizeof(int)))
  1297. rc = -EFAULT;
  1298. }
  1299. break;
  1300. case CM_IOCGATR:
  1301. DEBUGP(4, dev, "... in CM_IOCGATR\n");
  1302. {
  1303. struct atreq __user *atreq = argp;
  1304. int tmp;
  1305. /* allow nonblocking io and being interrupted */
  1306. if (wait_event_interruptible
  1307. (dev->atrq,
  1308. ((filp->f_flags & O_NONBLOCK)
  1309. || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags)
  1310. != 0)))) {
  1311. if (filp->f_flags & O_NONBLOCK)
  1312. rc = -EAGAIN;
  1313. else
  1314. rc = -ERESTARTSYS;
  1315. break;
  1316. }
  1317. rc = -EFAULT;
  1318. if (test_bit(IS_ATR_VALID, &dev->flags) == 0) {
  1319. tmp = -1;
  1320. if (copy_to_user(&(atreq->atr_len), &tmp,
  1321. sizeof(int)))
  1322. break;
  1323. } else {
  1324. if (copy_to_user(atreq->atr, dev->atr,
  1325. dev->atr_len))
  1326. break;
  1327. tmp = dev->atr_len;
  1328. if (copy_to_user(&(atreq->atr_len), &tmp, sizeof(int)))
  1329. break;
  1330. }
  1331. rc = 0;
  1332. break;
  1333. }
  1334. case CM_IOCARDOFF:
  1335. #ifdef CM4000_DEBUG
  1336. DEBUGP(4, dev, "... in CM_IOCARDOFF\n");
  1337. if (dev->flags0 & 0x01) {
  1338. DEBUGP(4, dev, " Card inserted\n");
  1339. } else {
  1340. DEBUGP(2, dev, " No card inserted\n");
  1341. }
  1342. if (dev->flags0 & 0x02) {
  1343. DEBUGP(4, dev, " Card powered\n");
  1344. } else {
  1345. DEBUGP(2, dev, " Card not powered\n");
  1346. }
  1347. #endif
  1348. /* is a card inserted and powered? */
  1349. if ((dev->flags0 & 0x01) && (dev->flags0 & 0x02)) {
  1350. /* get IO lock */
  1351. if (wait_event_interruptible
  1352. (dev->ioq,
  1353. ((filp->f_flags & O_NONBLOCK)
  1354. || (test_and_set_bit(LOCK_IO, (void *)&dev->flags)
  1355. == 0)))) {
  1356. if (filp->f_flags & O_NONBLOCK)
  1357. rc = -EAGAIN;
  1358. else
  1359. rc = -ERESTARTSYS;
  1360. break;
  1361. }
  1362. /* Set Flags0 = 0x42 */
  1363. DEBUGP(4, dev, "Set Flags0=0x42 \n");
  1364. xoutb(0x42, REG_FLAGS0(iobase));
  1365. clear_bit(IS_ATR_PRESENT, &dev->flags);
  1366. clear_bit(IS_ATR_VALID, &dev->flags);
  1367. dev->mstate = M_CARDOFF;
  1368. clear_bit(LOCK_IO, &dev->flags);
  1369. if (wait_event_interruptible
  1370. (dev->atrq,
  1371. ((filp->f_flags & O_NONBLOCK)
  1372. || (test_bit(IS_ATR_VALID, (void *)&dev->flags) !=
  1373. 0)))) {
  1374. if (filp->f_flags & O_NONBLOCK)
  1375. rc = -EAGAIN;
  1376. else
  1377. rc = -ERESTARTSYS;
  1378. break;
  1379. }
  1380. }
  1381. /* release lock */
  1382. clear_bit(LOCK_IO, &dev->flags);
  1383. wake_up_interruptible(&dev->ioq);
  1384. rc = 0;
  1385. break;
  1386. case CM_IOCSPTS:
  1387. {
  1388. struct ptsreq krnptsreq;
  1389. if (copy_from_user(&krnptsreq, argp,
  1390. sizeof(struct ptsreq))) {
  1391. rc = -EFAULT;
  1392. break;
  1393. }
  1394. rc = 0;
  1395. DEBUGP(4, dev, "... in CM_IOCSPTS\n");
  1396. /* wait for ATR to get valid */
  1397. if (wait_event_interruptible
  1398. (dev->atrq,
  1399. ((filp->f_flags & O_NONBLOCK)
  1400. || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags)
  1401. != 0)))) {
  1402. if (filp->f_flags & O_NONBLOCK)
  1403. rc = -EAGAIN;
  1404. else
  1405. rc = -ERESTARTSYS;
  1406. break;
  1407. }
  1408. /* get IO lock */
  1409. if (wait_event_interruptible
  1410. (dev->ioq,
  1411. ((filp->f_flags & O_NONBLOCK)
  1412. || (test_and_set_bit(LOCK_IO, (void *)&dev->flags)
  1413. == 0)))) {
  1414. if (filp->f_flags & O_NONBLOCK)
  1415. rc = -EAGAIN;
  1416. else
  1417. rc = -ERESTARTSYS;
  1418. break;
  1419. }
  1420. if ((rc = set_protocol(dev, &krnptsreq)) != 0) {
  1421. /* auto power_on again */
  1422. dev->mstate = M_FETCH_ATR;
  1423. clear_bit(IS_ATR_VALID, &dev->flags);
  1424. }
  1425. /* release lock */
  1426. clear_bit(LOCK_IO, &dev->flags);
  1427. wake_up_interruptible(&dev->ioq);
  1428. }
  1429. break;
  1430. #ifdef CM4000_DEBUG
  1431. case CM_IOSDBGLVL:
  1432. rc = -ENOTTY;
  1433. break;
  1434. #endif
  1435. default:
  1436. DEBUGP(4, dev, "... in default (unknown IOCTL code)\n");
  1437. rc = -ENOTTY;
  1438. }
  1439. out:
  1440. unlock_kernel();
  1441. return rc;
  1442. }
  1443. static int cmm_open(struct inode *inode, struct file *filp)
  1444. {
  1445. struct cm4000_dev *dev;
  1446. struct pcmcia_device *link;
  1447. int minor = iminor(inode);
  1448. int ret;
  1449. if (minor >= CM4000_MAX_DEV)
  1450. return -ENODEV;
  1451. lock_kernel();
  1452. link = dev_table[minor];
  1453. if (link == NULL || !pcmcia_dev_present(link)) {
  1454. ret = -ENODEV;
  1455. goto out;
  1456. }
  1457. if (link->open) {
  1458. ret = -EBUSY;
  1459. goto out;
  1460. }
  1461. dev = link->priv;
  1462. filp->private_data = dev;
  1463. DEBUGP(2, dev, "-> cmm_open(device=%d.%d process=%s,%d)\n",
  1464. imajor(inode), minor, current->comm, current->pid);
  1465. /* init device variables, they may be "polluted" after close
  1466. * or, the device may never have been closed (i.e. open failed)
  1467. */
  1468. ZERO_DEV(dev);
  1469. /* opening will always block since the
  1470. * monitor will be started by open, which
  1471. * means we have to wait for ATR becoming
  1472. * vaild = block until valid (or card
  1473. * inserted)
  1474. */
  1475. if (filp->f_flags & O_NONBLOCK) {
  1476. ret = -EAGAIN;
  1477. goto out;
  1478. }
  1479. dev->mdelay = T_50MSEC;
  1480. /* start monitoring the cardstatus */
  1481. start_monitor(dev);
  1482. link->open = 1; /* only one open per device */
  1483. DEBUGP(2, dev, "<- cmm_open\n");
  1484. ret = nonseekable_open(inode, filp);
  1485. out:
  1486. unlock_kernel();
  1487. return ret;
  1488. }
  1489. static int cmm_close(struct inode *inode, struct file *filp)
  1490. {
  1491. struct cm4000_dev *dev;
  1492. struct pcmcia_device *link;
  1493. int minor = iminor(inode);
  1494. if (minor >= CM4000_MAX_DEV)
  1495. return -ENODEV;
  1496. link = dev_table[minor];
  1497. if (link == NULL)
  1498. return -ENODEV;
  1499. dev = link->priv;
  1500. DEBUGP(2, dev, "-> cmm_close(maj/min=%d.%d)\n",
  1501. imajor(inode), minor);
  1502. stop_monitor(dev);
  1503. ZERO_DEV(dev);
  1504. link->open = 0; /* only one open per device */
  1505. wake_up(&dev->devq); /* socket removed? */
  1506. DEBUGP(2, dev, "cmm_close\n");
  1507. return 0;
  1508. }
  1509. static void cmm_cm4000_release(struct pcmcia_device * link)
  1510. {
  1511. struct cm4000_dev *dev = link->priv;
  1512. /* dont terminate the monitor, rather rely on
  1513. * close doing that for us.
  1514. */
  1515. DEBUGP(3, dev, "-> cmm_cm4000_release\n");
  1516. while (link->open) {
  1517. printk(KERN_INFO MODULE_NAME ": delaying release until "
  1518. "process has terminated\n");
  1519. /* note: don't interrupt us:
  1520. * close the applications which own
  1521. * the devices _first_ !
  1522. */
  1523. wait_event(dev->devq, (link->open == 0));
  1524. }
  1525. /* dev->devq=NULL; this cannot be zeroed earlier */
  1526. DEBUGP(3, dev, "<- cmm_cm4000_release\n");
  1527. return;
  1528. }
  1529. /*==== Interface to PCMCIA Layer =======================================*/
  1530. static int cm4000_config_check(struct pcmcia_device *p_dev,
  1531. cistpl_cftable_entry_t *cfg,
  1532. cistpl_cftable_entry_t *dflt,
  1533. unsigned int vcc,
  1534. void *priv_data)
  1535. {
  1536. if (!cfg->io.nwin)
  1537. return -ENODEV;
  1538. /* Get the IOaddr */
  1539. p_dev->io.BasePort1 = cfg->io.win[0].base;
  1540. p_dev->io.NumPorts1 = cfg->io.win[0].len;
  1541. p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  1542. if (!(cfg->io.flags & CISTPL_IO_8BIT))
  1543. p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  1544. if (!(cfg->io.flags & CISTPL_IO_16BIT))
  1545. p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  1546. p_dev->io.IOAddrLines = cfg->io.flags & CISTPL_IO_LINES_MASK;
  1547. return pcmcia_request_io(p_dev, &p_dev->io);
  1548. }
  1549. static int cm4000_config(struct pcmcia_device * link, int devno)
  1550. {
  1551. struct cm4000_dev *dev;
  1552. /* read the config-tuples */
  1553. if (pcmcia_loop_config(link, cm4000_config_check, NULL))
  1554. goto cs_release;
  1555. link->conf.IntType = 00000002;
  1556. if (pcmcia_request_configuration(link, &link->conf))
  1557. goto cs_release;
  1558. dev = link->priv;
  1559. return 0;
  1560. cs_release:
  1561. cm4000_release(link);
  1562. return -ENODEV;
  1563. }
  1564. static int cm4000_suspend(struct pcmcia_device *link)
  1565. {
  1566. struct cm4000_dev *dev;
  1567. dev = link->priv;
  1568. stop_monitor(dev);
  1569. return 0;
  1570. }
  1571. static int cm4000_resume(struct pcmcia_device *link)
  1572. {
  1573. struct cm4000_dev *dev;
  1574. dev = link->priv;
  1575. if (link->open)
  1576. start_monitor(dev);
  1577. return 0;
  1578. }
  1579. static void cm4000_release(struct pcmcia_device *link)
  1580. {
  1581. cmm_cm4000_release(link); /* delay release until device closed */
  1582. pcmcia_disable_device(link);
  1583. }
  1584. static int cm4000_probe(struct pcmcia_device *link)
  1585. {
  1586. struct cm4000_dev *dev;
  1587. int i, ret;
  1588. for (i = 0; i < CM4000_MAX_DEV; i++)
  1589. if (dev_table[i] == NULL)
  1590. break;
  1591. if (i == CM4000_MAX_DEV) {
  1592. printk(KERN_NOTICE MODULE_NAME ": all devices in use\n");
  1593. return -ENODEV;
  1594. }
  1595. /* create a new cm4000_cs device */
  1596. dev = kzalloc(sizeof(struct cm4000_dev), GFP_KERNEL);
  1597. if (dev == NULL)
  1598. return -ENOMEM;
  1599. dev->p_dev = link;
  1600. link->priv = dev;
  1601. link->conf.IntType = INT_MEMORY_AND_IO;
  1602. dev_table[i] = link;
  1603. init_waitqueue_head(&dev->devq);
  1604. init_waitqueue_head(&dev->ioq);
  1605. init_waitqueue_head(&dev->atrq);
  1606. init_waitqueue_head(&dev->readq);
  1607. ret = cm4000_config(link, i);
  1608. if (ret) {
  1609. dev_table[i] = NULL;
  1610. kfree(dev);
  1611. return ret;
  1612. }
  1613. device_create(cmm_class, NULL, MKDEV(major, i), NULL, "cmm%d", i);
  1614. return 0;
  1615. }
  1616. static void cm4000_detach(struct pcmcia_device *link)
  1617. {
  1618. struct cm4000_dev *dev = link->priv;
  1619. int devno;
  1620. /* find device */
  1621. for (devno = 0; devno < CM4000_MAX_DEV; devno++)
  1622. if (dev_table[devno] == link)
  1623. break;
  1624. if (devno == CM4000_MAX_DEV)
  1625. return;
  1626. stop_monitor(dev);
  1627. cm4000_release(link);
  1628. dev_table[devno] = NULL;
  1629. kfree(dev);
  1630. device_destroy(cmm_class, MKDEV(major, devno));
  1631. return;
  1632. }
  1633. static const struct file_operations cm4000_fops = {
  1634. .owner = THIS_MODULE,
  1635. .read = cmm_read,
  1636. .write = cmm_write,
  1637. .unlocked_ioctl = cmm_ioctl,
  1638. .open = cmm_open,
  1639. .release= cmm_close,
  1640. };
  1641. static struct pcmcia_device_id cm4000_ids[] = {
  1642. PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0002),
  1643. PCMCIA_DEVICE_PROD_ID12("CardMan", "4000", 0x2FB368CA, 0xA2BD8C39),
  1644. PCMCIA_DEVICE_NULL,
  1645. };
  1646. MODULE_DEVICE_TABLE(pcmcia, cm4000_ids);
  1647. static struct pcmcia_driver cm4000_driver = {
  1648. .owner = THIS_MODULE,
  1649. .drv = {
  1650. .name = "cm4000_cs",
  1651. },
  1652. .probe = cm4000_probe,
  1653. .remove = cm4000_detach,
  1654. .suspend = cm4000_suspend,
  1655. .resume = cm4000_resume,
  1656. .id_table = cm4000_ids,
  1657. };
  1658. static int __init cmm_init(void)
  1659. {
  1660. int rc;
  1661. printk(KERN_INFO "%s\n", version);
  1662. cmm_class = class_create(THIS_MODULE, "cardman_4000");
  1663. if (IS_ERR(cmm_class))
  1664. return PTR_ERR(cmm_class);
  1665. major = register_chrdev(0, DEVICE_NAME, &cm4000_fops);
  1666. if (major < 0) {
  1667. printk(KERN_WARNING MODULE_NAME
  1668. ": could not get major number\n");
  1669. class_destroy(cmm_class);
  1670. return major;
  1671. }
  1672. rc = pcmcia_register_driver(&cm4000_driver);
  1673. if (rc < 0) {
  1674. unregister_chrdev(major, DEVICE_NAME);
  1675. class_destroy(cmm_class);
  1676. return rc;
  1677. }
  1678. return 0;
  1679. }
  1680. static void __exit cmm_exit(void)
  1681. {
  1682. printk(KERN_INFO MODULE_NAME ": unloading\n");
  1683. pcmcia_unregister_driver(&cm4000_driver);
  1684. unregister_chrdev(major, DEVICE_NAME);
  1685. class_destroy(cmm_class);
  1686. };
  1687. module_init(cmm_init);
  1688. module_exit(cmm_exit);
  1689. MODULE_LICENSE("Dual BSD/GPL");