pci.c 8.6 KB

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  1. /*
  2. * New-style PCI core.
  3. *
  4. * Copyright (c) 2004 - 2009 Paul Mundt
  5. * Copyright (c) 2002 M. R. Brown
  6. *
  7. * Modelled after arch/mips/pci/pci.c:
  8. * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
  9. *
  10. * This file is subject to the terms and conditions of the GNU General Public
  11. * License. See the file "COPYING" in the main directory of this archive
  12. * for more details.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/mm.h>
  16. #include <linux/pci.h>
  17. #include <linux/init.h>
  18. #include <linux/types.h>
  19. #include <linux/dma-debug.h>
  20. #include <linux/io.h>
  21. #include <linux/mutex.h>
  22. unsigned long PCIBIOS_MIN_IO = 0x0000;
  23. unsigned long PCIBIOS_MIN_MEM = 0;
  24. /*
  25. * The PCI controller list.
  26. */
  27. static struct pci_channel *hose_head, **hose_tail = &hose_head;
  28. static int pci_initialized;
  29. static void __devinit pcibios_scanbus(struct pci_channel *hose)
  30. {
  31. static int next_busno;
  32. struct pci_bus *bus;
  33. bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
  34. if (bus) {
  35. next_busno = bus->subordinate + 1;
  36. /* Don't allow 8-bit bus number overflow inside the hose -
  37. reserve some space for bridges. */
  38. if (next_busno > 224)
  39. next_busno = 0;
  40. pci_bus_size_bridges(bus);
  41. pci_bus_assign_resources(bus);
  42. pci_enable_bridges(bus);
  43. }
  44. }
  45. static DEFINE_MUTEX(pci_scan_mutex);
  46. void __devinit register_pci_controller(struct pci_channel *hose)
  47. {
  48. if (request_resource(&iomem_resource, hose->mem_resource) < 0)
  49. goto out;
  50. if (request_resource(&ioport_resource, hose->io_resource) < 0) {
  51. release_resource(hose->mem_resource);
  52. goto out;
  53. }
  54. *hose_tail = hose;
  55. hose_tail = &hose->next;
  56. /*
  57. * Do not panic here but later - this might hapen before console init.
  58. */
  59. if (!hose->io_map_base) {
  60. printk(KERN_WARNING
  61. "registering PCI controller with io_map_base unset\n");
  62. }
  63. /*
  64. * Scan the bus if it is register after the PCI subsystem
  65. * initialization.
  66. */
  67. if (pci_initialized) {
  68. mutex_lock(&pci_scan_mutex);
  69. pcibios_scanbus(hose);
  70. mutex_unlock(&pci_scan_mutex);
  71. }
  72. out:
  73. printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
  74. }
  75. static int __init pcibios_init(void)
  76. {
  77. struct pci_channel *hose;
  78. /* Scan all of the recorded PCI controllers. */
  79. for (hose = hose_head; hose; hose = hose->next)
  80. pcibios_scanbus(hose);
  81. pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
  82. dma_debug_add_bus(&pci_bus_type);
  83. pci_initialized = 1;
  84. return 0;
  85. }
  86. subsys_initcall(pcibios_init);
  87. static void pcibios_fixup_device_resources(struct pci_dev *dev,
  88. struct pci_bus *bus)
  89. {
  90. /* Update device resources. */
  91. struct pci_channel *hose = bus->sysdata;
  92. unsigned long offset = 0;
  93. int i;
  94. for (i = 0; i < PCI_NUM_RESOURCES; i++) {
  95. if (!dev->resource[i].start)
  96. continue;
  97. if (dev->resource[i].flags & IORESOURCE_PCI_FIXED)
  98. continue;
  99. if (dev->resource[i].flags & IORESOURCE_IO)
  100. offset = hose->io_offset;
  101. else if (dev->resource[i].flags & IORESOURCE_MEM)
  102. offset = hose->mem_offset;
  103. dev->resource[i].start += offset;
  104. dev->resource[i].end += offset;
  105. }
  106. }
  107. /*
  108. * Called after each bus is probed, but before its children
  109. * are examined.
  110. */
  111. void __devinit pcibios_fixup_bus(struct pci_bus *bus)
  112. {
  113. struct pci_dev *dev = bus->self;
  114. struct list_head *ln;
  115. struct pci_channel *chan = bus->sysdata;
  116. if (!dev) {
  117. bus->resource[0] = chan->io_resource;
  118. bus->resource[1] = chan->mem_resource;
  119. }
  120. for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
  121. dev = pci_dev_b(ln);
  122. if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
  123. pcibios_fixup_device_resources(dev, bus);
  124. }
  125. }
  126. /*
  127. * We need to avoid collisions with `mirrored' VGA ports
  128. * and other strange ISA hardware, so we always want the
  129. * addresses to be allocated in the 0x000-0x0ff region
  130. * modulo 0x400.
  131. */
  132. void pcibios_align_resource(void *data, struct resource *res,
  133. resource_size_t size, resource_size_t align)
  134. {
  135. struct pci_dev *dev = data;
  136. struct pci_channel *chan = dev->sysdata;
  137. resource_size_t start = res->start;
  138. if (res->flags & IORESOURCE_IO) {
  139. if (start < PCIBIOS_MIN_IO + chan->io_resource->start)
  140. start = PCIBIOS_MIN_IO + chan->io_resource->start;
  141. /*
  142. * Put everything into 0x00-0xff region modulo 0x400.
  143. */
  144. if (start & 0x300)
  145. start = (start + 0x3ff) & ~0x3ff;
  146. } else if (res->flags & IORESOURCE_MEM) {
  147. if (start < PCIBIOS_MIN_MEM + chan->mem_resource->start)
  148. start = PCIBIOS_MIN_MEM + chan->mem_resource->start;
  149. }
  150. res->start = start;
  151. }
  152. void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
  153. struct resource *res)
  154. {
  155. struct pci_channel *hose = dev->sysdata;
  156. unsigned long offset = 0;
  157. if (res->flags & IORESOURCE_IO)
  158. offset = hose->io_offset;
  159. else if (res->flags & IORESOURCE_MEM)
  160. offset = hose->mem_offset;
  161. region->start = res->start - offset;
  162. region->end = res->end - offset;
  163. }
  164. void __devinit
  165. pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
  166. struct pci_bus_region *region)
  167. {
  168. struct pci_channel *hose = dev->sysdata;
  169. unsigned long offset = 0;
  170. if (res->flags & IORESOURCE_IO)
  171. offset = hose->io_offset;
  172. else if (res->flags & IORESOURCE_MEM)
  173. offset = hose->mem_offset;
  174. res->start = region->start + offset;
  175. res->end = region->end + offset;
  176. }
  177. int pcibios_enable_device(struct pci_dev *dev, int mask)
  178. {
  179. u16 cmd, old_cmd;
  180. int idx;
  181. struct resource *r;
  182. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  183. old_cmd = cmd;
  184. for (idx=0; idx < PCI_NUM_RESOURCES; idx++) {
  185. /* Only set up the requested stuff */
  186. if (!(mask & (1<<idx)))
  187. continue;
  188. r = &dev->resource[idx];
  189. if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
  190. continue;
  191. if ((idx == PCI_ROM_RESOURCE) &&
  192. (!(r->flags & IORESOURCE_ROM_ENABLE)))
  193. continue;
  194. if (!r->start && r->end) {
  195. printk(KERN_ERR "PCI: Device %s not available "
  196. "because of resource collisions\n",
  197. pci_name(dev));
  198. return -EINVAL;
  199. }
  200. if (r->flags & IORESOURCE_IO)
  201. cmd |= PCI_COMMAND_IO;
  202. if (r->flags & IORESOURCE_MEM)
  203. cmd |= PCI_COMMAND_MEMORY;
  204. }
  205. if (cmd != old_cmd) {
  206. printk("PCI: Enabling device %s (%04x -> %04x)\n",
  207. pci_name(dev), old_cmd, cmd);
  208. pci_write_config_word(dev, PCI_COMMAND, cmd);
  209. }
  210. return 0;
  211. }
  212. /*
  213. * If we set up a device for bus mastering, we need to check and set
  214. * the latency timer as it may not be properly set.
  215. */
  216. static unsigned int pcibios_max_latency = 255;
  217. void pcibios_set_master(struct pci_dev *dev)
  218. {
  219. u8 lat;
  220. pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
  221. if (lat < 16)
  222. lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
  223. else if (lat > pcibios_max_latency)
  224. lat = pcibios_max_latency;
  225. else
  226. return;
  227. printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n",
  228. pci_name(dev), lat);
  229. pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
  230. }
  231. void __init pcibios_update_irq(struct pci_dev *dev, int irq)
  232. {
  233. pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
  234. }
  235. char * __devinit pcibios_setup(char *str)
  236. {
  237. return str;
  238. }
  239. int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
  240. enum pci_mmap_state mmap_state, int write_combine)
  241. {
  242. /*
  243. * I/O space can be accessed via normal processor loads and stores on
  244. * this platform but for now we elect not to do this and portable
  245. * drivers should not do this anyway.
  246. */
  247. if (mmap_state == pci_mmap_io)
  248. return -EINVAL;
  249. /*
  250. * Ignore write-combine; for now only return uncached mappings.
  251. */
  252. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  253. return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  254. vma->vm_end - vma->vm_start,
  255. vma->vm_page_prot);
  256. }
  257. #ifndef CONFIG_GENERIC_IOMAP
  258. static void __iomem *ioport_map_pci(struct pci_dev *dev,
  259. unsigned long port, unsigned int nr)
  260. {
  261. struct pci_channel *chan = dev->sysdata;
  262. if (!chan->io_map_base)
  263. chan->io_map_base = generic_io_base;
  264. return (void __iomem *)(chan->io_map_base + port);
  265. }
  266. void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
  267. {
  268. resource_size_t start = pci_resource_start(dev, bar);
  269. resource_size_t len = pci_resource_len(dev, bar);
  270. unsigned long flags = pci_resource_flags(dev, bar);
  271. if (unlikely(!len || !start))
  272. return NULL;
  273. if (maxlen && len > maxlen)
  274. len = maxlen;
  275. if (flags & IORESOURCE_IO)
  276. return ioport_map_pci(dev, start, len);
  277. if (flags & IORESOURCE_MEM) {
  278. if (flags & IORESOURCE_CACHEABLE)
  279. return ioremap(start, len);
  280. return ioremap_nocache(start, len);
  281. }
  282. return NULL;
  283. }
  284. EXPORT_SYMBOL(pci_iomap);
  285. void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
  286. {
  287. iounmap(addr);
  288. }
  289. EXPORT_SYMBOL(pci_iounmap);
  290. #endif /* CONFIG_GENERIC_IOMAP */
  291. #ifdef CONFIG_HOTPLUG
  292. EXPORT_SYMBOL(pcibios_resource_to_bus);
  293. EXPORT_SYMBOL(pcibios_bus_to_resource);
  294. EXPORT_SYMBOL(PCIBIOS_MIN_IO);
  295. EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
  296. #endif