i2c-sis96x.c 8.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343
  1. /*
  2. sis96x.c - Part of lm_sensors, Linux kernel modules for hardware
  3. monitoring
  4. Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. */
  17. /*
  18. This module must be considered BETA unless and until
  19. the chipset manufacturer releases a datasheet.
  20. The register definitions are based on the SiS630.
  21. This module relies on quirk_sis_96x_smbus (drivers/pci/quirks.c)
  22. for just about every machine for which users have reported.
  23. If this module isn't detecting your 96x south bridge, have a
  24. look there.
  25. We assume there can only be one SiS96x with one SMBus interface.
  26. */
  27. #include <linux/module.h>
  28. #include <linux/pci.h>
  29. #include <linux/kernel.h>
  30. #include <linux/delay.h>
  31. #include <linux/stddef.h>
  32. #include <linux/ioport.h>
  33. #include <linux/i2c.h>
  34. #include <linux/init.h>
  35. #include <asm/io.h>
  36. /* base address register in PCI config space */
  37. #define SIS96x_BAR 0x04
  38. /* SiS96x SMBus registers */
  39. #define SMB_STS 0x00
  40. #define SMB_EN 0x01
  41. #define SMB_CNT 0x02
  42. #define SMB_HOST_CNT 0x03
  43. #define SMB_ADDR 0x04
  44. #define SMB_CMD 0x05
  45. #define SMB_PCOUNT 0x06
  46. #define SMB_COUNT 0x07
  47. #define SMB_BYTE 0x08
  48. #define SMB_DEV_ADDR 0x10
  49. #define SMB_DB0 0x11
  50. #define SMB_DB1 0x12
  51. #define SMB_SAA 0x13
  52. /* register count for request_region */
  53. #define SMB_IOSIZE 0x20
  54. /* Other settings */
  55. #define MAX_TIMEOUT 500
  56. /* SiS96x SMBus constants */
  57. #define SIS96x_QUICK 0x00
  58. #define SIS96x_BYTE 0x01
  59. #define SIS96x_BYTE_DATA 0x02
  60. #define SIS96x_WORD_DATA 0x03
  61. #define SIS96x_PROC_CALL 0x04
  62. #define SIS96x_BLOCK_DATA 0x05
  63. static struct pci_driver sis96x_driver;
  64. static struct i2c_adapter sis96x_adapter;
  65. static u16 sis96x_smbus_base;
  66. static inline u8 sis96x_read(u8 reg)
  67. {
  68. return inb(sis96x_smbus_base + reg) ;
  69. }
  70. static inline void sis96x_write(u8 reg, u8 data)
  71. {
  72. outb(data, sis96x_smbus_base + reg) ;
  73. }
  74. /* Execute a SMBus transaction.
  75. int size is from SIS96x_QUICK to SIS96x_BLOCK_DATA
  76. */
  77. static int sis96x_transaction(int size)
  78. {
  79. int temp;
  80. int result = 0;
  81. int timeout = 0;
  82. dev_dbg(&sis96x_adapter.dev, "SMBus transaction %d\n", size);
  83. /* Make sure the SMBus host is ready to start transmitting */
  84. if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
  85. dev_dbg(&sis96x_adapter.dev, "SMBus busy (0x%02x). "
  86. "Resetting...\n", temp);
  87. /* kill the transaction */
  88. sis96x_write(SMB_HOST_CNT, 0x20);
  89. /* check it again */
  90. if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
  91. dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp);
  92. return -EBUSY;
  93. } else {
  94. dev_dbg(&sis96x_adapter.dev, "Successful\n");
  95. }
  96. }
  97. /* Turn off timeout interrupts, set fast host clock */
  98. sis96x_write(SMB_CNT, 0x20);
  99. /* clear all (sticky) status flags */
  100. temp = sis96x_read(SMB_STS);
  101. sis96x_write(SMB_STS, temp & 0x1e);
  102. /* start the transaction by setting bit 4 and size bits */
  103. sis96x_write(SMB_HOST_CNT, 0x10 | (size & 0x07));
  104. /* We will always wait for a fraction of a second! */
  105. do {
  106. msleep(1);
  107. temp = sis96x_read(SMB_STS);
  108. } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));
  109. /* If the SMBus is still busy, we give up */
  110. if (timeout >= MAX_TIMEOUT) {
  111. dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp);
  112. result = -ETIMEDOUT;
  113. }
  114. /* device error - probably missing ACK */
  115. if (temp & 0x02) {
  116. dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n");
  117. result = -ENXIO;
  118. }
  119. /* bus collision */
  120. if (temp & 0x04) {
  121. dev_dbg(&sis96x_adapter.dev, "Bus collision!\n");
  122. result = -EIO;
  123. }
  124. /* Finish up by resetting the bus */
  125. sis96x_write(SMB_STS, temp);
  126. if ((temp = sis96x_read(SMB_STS))) {
  127. dev_dbg(&sis96x_adapter.dev, "Failed reset at "
  128. "end of transaction! (0x%02x)\n", temp);
  129. }
  130. return result;
  131. }
  132. /* Return negative errno on error. */
  133. static s32 sis96x_access(struct i2c_adapter * adap, u16 addr,
  134. unsigned short flags, char read_write,
  135. u8 command, int size, union i2c_smbus_data * data)
  136. {
  137. int status;
  138. switch (size) {
  139. case I2C_SMBUS_QUICK:
  140. sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
  141. size = SIS96x_QUICK;
  142. break;
  143. case I2C_SMBUS_BYTE:
  144. sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
  145. if (read_write == I2C_SMBUS_WRITE)
  146. sis96x_write(SMB_CMD, command);
  147. size = SIS96x_BYTE;
  148. break;
  149. case I2C_SMBUS_BYTE_DATA:
  150. sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
  151. sis96x_write(SMB_CMD, command);
  152. if (read_write == I2C_SMBUS_WRITE)
  153. sis96x_write(SMB_BYTE, data->byte);
  154. size = SIS96x_BYTE_DATA;
  155. break;
  156. case I2C_SMBUS_PROC_CALL:
  157. case I2C_SMBUS_WORD_DATA:
  158. sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
  159. sis96x_write(SMB_CMD, command);
  160. if (read_write == I2C_SMBUS_WRITE) {
  161. sis96x_write(SMB_BYTE, data->word & 0xff);
  162. sis96x_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
  163. }
  164. size = (size == I2C_SMBUS_PROC_CALL ?
  165. SIS96x_PROC_CALL : SIS96x_WORD_DATA);
  166. break;
  167. default:
  168. dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
  169. return -EOPNOTSUPP;
  170. }
  171. status = sis96x_transaction(size);
  172. if (status)
  173. return status;
  174. if ((size != SIS96x_PROC_CALL) &&
  175. ((read_write == I2C_SMBUS_WRITE) || (size == SIS96x_QUICK)))
  176. return 0;
  177. switch (size) {
  178. case SIS96x_BYTE:
  179. case SIS96x_BYTE_DATA:
  180. data->byte = sis96x_read(SMB_BYTE);
  181. break;
  182. case SIS96x_WORD_DATA:
  183. case SIS96x_PROC_CALL:
  184. data->word = sis96x_read(SMB_BYTE) +
  185. (sis96x_read(SMB_BYTE + 1) << 8);
  186. break;
  187. }
  188. return 0;
  189. }
  190. static u32 sis96x_func(struct i2c_adapter *adapter)
  191. {
  192. return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
  193. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
  194. I2C_FUNC_SMBUS_PROC_CALL;
  195. }
  196. static const struct i2c_algorithm smbus_algorithm = {
  197. .smbus_xfer = sis96x_access,
  198. .functionality = sis96x_func,
  199. };
  200. static struct i2c_adapter sis96x_adapter = {
  201. .owner = THIS_MODULE,
  202. .id = I2C_HW_SMBUS_SIS96X,
  203. .class = I2C_CLASS_HWMON,
  204. .algo = &smbus_algorithm,
  205. };
  206. static struct pci_device_id sis96x_ids[] = {
  207. { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) },
  208. { 0, }
  209. };
  210. MODULE_DEVICE_TABLE (pci, sis96x_ids);
  211. static int __devinit sis96x_probe(struct pci_dev *dev,
  212. const struct pci_device_id *id)
  213. {
  214. u16 ww = 0;
  215. int retval;
  216. if (sis96x_smbus_base) {
  217. dev_err(&dev->dev, "Only one device supported.\n");
  218. return -EBUSY;
  219. }
  220. pci_read_config_word(dev, PCI_CLASS_DEVICE, &ww);
  221. if (PCI_CLASS_SERIAL_SMBUS != ww) {
  222. dev_err(&dev->dev, "Unsupported device class 0x%04x!\n", ww);
  223. return -ENODEV;
  224. }
  225. sis96x_smbus_base = pci_resource_start(dev, SIS96x_BAR);
  226. if (!sis96x_smbus_base) {
  227. dev_err(&dev->dev, "SiS96x SMBus base address "
  228. "not initialized!\n");
  229. return -EINVAL;
  230. }
  231. dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n",
  232. sis96x_smbus_base);
  233. /* Everything is happy, let's grab the memory and set things up. */
  234. if (!request_region(sis96x_smbus_base, SMB_IOSIZE,
  235. sis96x_driver.name)) {
  236. dev_err(&dev->dev, "SMBus registers 0x%04x-0x%04x "
  237. "already in use!\n", sis96x_smbus_base,
  238. sis96x_smbus_base + SMB_IOSIZE - 1);
  239. sis96x_smbus_base = 0;
  240. return -EINVAL;
  241. }
  242. /* set up the sysfs linkage to our parent device */
  243. sis96x_adapter.dev.parent = &dev->dev;
  244. snprintf(sis96x_adapter.name, sizeof(sis96x_adapter.name),
  245. "SiS96x SMBus adapter at 0x%04x", sis96x_smbus_base);
  246. if ((retval = i2c_add_adapter(&sis96x_adapter))) {
  247. dev_err(&dev->dev, "Couldn't register adapter!\n");
  248. release_region(sis96x_smbus_base, SMB_IOSIZE);
  249. sis96x_smbus_base = 0;
  250. }
  251. return retval;
  252. }
  253. static void __devexit sis96x_remove(struct pci_dev *dev)
  254. {
  255. if (sis96x_smbus_base) {
  256. i2c_del_adapter(&sis96x_adapter);
  257. release_region(sis96x_smbus_base, SMB_IOSIZE);
  258. sis96x_smbus_base = 0;
  259. }
  260. }
  261. static struct pci_driver sis96x_driver = {
  262. .name = "sis96x_smbus",
  263. .id_table = sis96x_ids,
  264. .probe = sis96x_probe,
  265. .remove = __devexit_p(sis96x_remove),
  266. };
  267. static int __init i2c_sis96x_init(void)
  268. {
  269. return pci_register_driver(&sis96x_driver);
  270. }
  271. static void __exit i2c_sis96x_exit(void)
  272. {
  273. pci_unregister_driver(&sis96x_driver);
  274. }
  275. MODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>");
  276. MODULE_DESCRIPTION("SiS96x SMBus driver");
  277. MODULE_LICENSE("GPL");
  278. /* Register initialization functions using helper macros */
  279. module_init(i2c_sis96x_init);
  280. module_exit(i2c_sis96x_exit);