ixgbevf_main.c 90 KB

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  1. /*******************************************************************************
  2. Intel 82599 Virtual Function driver
  3. Copyright(c) 1999 - 2012 Intel Corporation.
  4. This program is free software; you can redistribute it and/or modify it
  5. under the terms and conditions of the GNU General Public License,
  6. version 2, as published by the Free Software Foundation.
  7. This program is distributed in the hope it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc.,
  13. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  14. The full GNU General Public License is included in this distribution in
  15. the file called "COPYING".
  16. Contact Information:
  17. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. /******************************************************************************
  21. Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
  22. ******************************************************************************/
  23. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  24. #include <linux/types.h>
  25. #include <linux/bitops.h>
  26. #include <linux/module.h>
  27. #include <linux/pci.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/vmalloc.h>
  30. #include <linux/string.h>
  31. #include <linux/in.h>
  32. #include <linux/ip.h>
  33. #include <linux/tcp.h>
  34. #include <linux/sctp.h>
  35. #include <linux/ipv6.h>
  36. #include <linux/slab.h>
  37. #include <net/checksum.h>
  38. #include <net/ip6_checksum.h>
  39. #include <linux/ethtool.h>
  40. #include <linux/if.h>
  41. #include <linux/if_vlan.h>
  42. #include <linux/prefetch.h>
  43. #include "ixgbevf.h"
  44. const char ixgbevf_driver_name[] = "ixgbevf";
  45. static const char ixgbevf_driver_string[] =
  46. "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
  47. #define DRV_VERSION "2.6.0-k"
  48. const char ixgbevf_driver_version[] = DRV_VERSION;
  49. static char ixgbevf_copyright[] =
  50. "Copyright (c) 2009 - 2012 Intel Corporation.";
  51. static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
  52. [board_82599_vf] = &ixgbevf_82599_vf_info,
  53. [board_X540_vf] = &ixgbevf_X540_vf_info,
  54. };
  55. /* ixgbevf_pci_tbl - PCI Device ID Table
  56. *
  57. * Wildcard entries (PCI_ANY_ID) should come last
  58. * Last entry must be all 0s
  59. *
  60. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  61. * Class, Class Mask, private data (not used) }
  62. */
  63. static struct pci_device_id ixgbevf_pci_tbl[] = {
  64. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
  65. board_82599_vf},
  66. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF),
  67. board_X540_vf},
  68. /* required last entry */
  69. {0, }
  70. };
  71. MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
  72. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  73. MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
  74. MODULE_LICENSE("GPL");
  75. MODULE_VERSION(DRV_VERSION);
  76. #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  77. static int debug = -1;
  78. module_param(debug, int, 0);
  79. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  80. /* forward decls */
  81. static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
  82. static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
  83. struct ixgbevf_ring *rx_ring,
  84. u32 val)
  85. {
  86. /*
  87. * Force memory writes to complete before letting h/w
  88. * know there are new descriptors to fetch. (Only
  89. * applicable for weak-ordered memory model archs,
  90. * such as IA-64).
  91. */
  92. wmb();
  93. IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
  94. }
  95. /**
  96. * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
  97. * @adapter: pointer to adapter struct
  98. * @direction: 0 for Rx, 1 for Tx, -1 for other causes
  99. * @queue: queue to map the corresponding interrupt to
  100. * @msix_vector: the vector to map to the corresponding queue
  101. *
  102. */
  103. static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
  104. u8 queue, u8 msix_vector)
  105. {
  106. u32 ivar, index;
  107. struct ixgbe_hw *hw = &adapter->hw;
  108. if (direction == -1) {
  109. /* other causes */
  110. msix_vector |= IXGBE_IVAR_ALLOC_VAL;
  111. ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
  112. ivar &= ~0xFF;
  113. ivar |= msix_vector;
  114. IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
  115. } else {
  116. /* tx or rx causes */
  117. msix_vector |= IXGBE_IVAR_ALLOC_VAL;
  118. index = ((16 * (queue & 1)) + (8 * direction));
  119. ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
  120. ivar &= ~(0xFF << index);
  121. ivar |= (msix_vector << index);
  122. IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
  123. }
  124. }
  125. static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
  126. struct ixgbevf_tx_buffer
  127. *tx_buffer_info)
  128. {
  129. if (tx_buffer_info->dma) {
  130. if (tx_buffer_info->mapped_as_page)
  131. dma_unmap_page(tx_ring->dev,
  132. tx_buffer_info->dma,
  133. tx_buffer_info->length,
  134. DMA_TO_DEVICE);
  135. else
  136. dma_unmap_single(tx_ring->dev,
  137. tx_buffer_info->dma,
  138. tx_buffer_info->length,
  139. DMA_TO_DEVICE);
  140. tx_buffer_info->dma = 0;
  141. }
  142. if (tx_buffer_info->skb) {
  143. dev_kfree_skb_any(tx_buffer_info->skb);
  144. tx_buffer_info->skb = NULL;
  145. }
  146. tx_buffer_info->time_stamp = 0;
  147. /* tx_buffer_info must be completely set up in the transmit path */
  148. }
  149. #define IXGBE_MAX_TXD_PWR 14
  150. #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
  151. /* Tx Descriptors needed, worst case */
  152. #define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
  153. #define DESC_NEEDED (MAX_SKB_FRAGS + 4)
  154. static void ixgbevf_tx_timeout(struct net_device *netdev);
  155. /**
  156. * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
  157. * @q_vector: board private structure
  158. * @tx_ring: tx ring to clean
  159. **/
  160. static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
  161. struct ixgbevf_ring *tx_ring)
  162. {
  163. struct ixgbevf_adapter *adapter = q_vector->adapter;
  164. union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
  165. struct ixgbevf_tx_buffer *tx_buffer_info;
  166. unsigned int i, eop, count = 0;
  167. unsigned int total_bytes = 0, total_packets = 0;
  168. if (test_bit(__IXGBEVF_DOWN, &adapter->state))
  169. return true;
  170. i = tx_ring->next_to_clean;
  171. eop = tx_ring->tx_buffer_info[i].next_to_watch;
  172. eop_desc = IXGBEVF_TX_DESC(tx_ring, eop);
  173. while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
  174. (count < tx_ring->count)) {
  175. bool cleaned = false;
  176. rmb(); /* read buffer_info after eop_desc */
  177. /* eop could change between read and DD-check */
  178. if (unlikely(eop != tx_ring->tx_buffer_info[i].next_to_watch))
  179. goto cont_loop;
  180. for ( ; !cleaned; count++) {
  181. struct sk_buff *skb;
  182. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  183. tx_buffer_info = &tx_ring->tx_buffer_info[i];
  184. cleaned = (i == eop);
  185. skb = tx_buffer_info->skb;
  186. if (cleaned && skb) {
  187. unsigned int segs, bytecount;
  188. /* gso_segs is currently only valid for tcp */
  189. segs = skb_shinfo(skb)->gso_segs ?: 1;
  190. /* multiply data chunks by size of headers */
  191. bytecount = ((segs - 1) * skb_headlen(skb)) +
  192. skb->len;
  193. total_packets += segs;
  194. total_bytes += bytecount;
  195. }
  196. ixgbevf_unmap_and_free_tx_resource(tx_ring,
  197. tx_buffer_info);
  198. tx_desc->wb.status = 0;
  199. i++;
  200. if (i == tx_ring->count)
  201. i = 0;
  202. }
  203. cont_loop:
  204. eop = tx_ring->tx_buffer_info[i].next_to_watch;
  205. eop_desc = IXGBEVF_TX_DESC(tx_ring, eop);
  206. }
  207. tx_ring->next_to_clean = i;
  208. #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
  209. if (unlikely(count && netif_carrier_ok(tx_ring->netdev) &&
  210. (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
  211. /* Make sure that anybody stopping the queue after this
  212. * sees the new next_to_clean.
  213. */
  214. smp_mb();
  215. if (__netif_subqueue_stopped(tx_ring->netdev,
  216. tx_ring->queue_index) &&
  217. !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
  218. netif_wake_subqueue(tx_ring->netdev,
  219. tx_ring->queue_index);
  220. ++adapter->restart_queue;
  221. }
  222. }
  223. u64_stats_update_begin(&tx_ring->syncp);
  224. tx_ring->total_bytes += total_bytes;
  225. tx_ring->total_packets += total_packets;
  226. u64_stats_update_end(&tx_ring->syncp);
  227. q_vector->tx.total_bytes += total_bytes;
  228. q_vector->tx.total_packets += total_packets;
  229. return count < tx_ring->count;
  230. }
  231. /**
  232. * ixgbevf_receive_skb - Send a completed packet up the stack
  233. * @q_vector: structure containing interrupt and ring information
  234. * @skb: packet to send up
  235. * @status: hardware indication of status of receive
  236. * @rx_desc: rx descriptor
  237. **/
  238. static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
  239. struct sk_buff *skb, u8 status,
  240. union ixgbe_adv_rx_desc *rx_desc)
  241. {
  242. struct ixgbevf_adapter *adapter = q_vector->adapter;
  243. bool is_vlan = (status & IXGBE_RXD_STAT_VP);
  244. u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
  245. if (is_vlan && test_bit(tag & VLAN_VID_MASK, adapter->active_vlans))
  246. __vlan_hwaccel_put_tag(skb, tag);
  247. napi_gro_receive(&q_vector->napi, skb);
  248. }
  249. /**
  250. * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
  251. * @adapter: address of board private structure
  252. * @status_err: hardware indication of status of receive
  253. * @skb: skb currently being received and modified
  254. **/
  255. static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
  256. struct ixgbevf_ring *ring,
  257. u32 status_err, struct sk_buff *skb)
  258. {
  259. skb_checksum_none_assert(skb);
  260. /* Rx csum disabled */
  261. if (!(ring->netdev->features & NETIF_F_RXCSUM))
  262. return;
  263. /* if IP and error */
  264. if ((status_err & IXGBE_RXD_STAT_IPCS) &&
  265. (status_err & IXGBE_RXDADV_ERR_IPE)) {
  266. adapter->hw_csum_rx_error++;
  267. return;
  268. }
  269. if (!(status_err & IXGBE_RXD_STAT_L4CS))
  270. return;
  271. if (status_err & IXGBE_RXDADV_ERR_TCPE) {
  272. adapter->hw_csum_rx_error++;
  273. return;
  274. }
  275. /* It must be a TCP or UDP packet with a valid checksum */
  276. skb->ip_summed = CHECKSUM_UNNECESSARY;
  277. adapter->hw_csum_rx_good++;
  278. }
  279. /**
  280. * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
  281. * @adapter: address of board private structure
  282. **/
  283. static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
  284. struct ixgbevf_ring *rx_ring,
  285. int cleaned_count)
  286. {
  287. struct pci_dev *pdev = adapter->pdev;
  288. union ixgbe_adv_rx_desc *rx_desc;
  289. struct ixgbevf_rx_buffer *bi;
  290. struct sk_buff *skb;
  291. unsigned int i = rx_ring->next_to_use;
  292. bi = &rx_ring->rx_buffer_info[i];
  293. while (cleaned_count--) {
  294. rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
  295. skb = bi->skb;
  296. if (!skb) {
  297. skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
  298. rx_ring->rx_buf_len);
  299. if (!skb) {
  300. adapter->alloc_rx_buff_failed++;
  301. goto no_buffers;
  302. }
  303. bi->skb = skb;
  304. }
  305. if (!bi->dma) {
  306. bi->dma = dma_map_single(&pdev->dev, skb->data,
  307. rx_ring->rx_buf_len,
  308. DMA_FROM_DEVICE);
  309. }
  310. rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
  311. i++;
  312. if (i == rx_ring->count)
  313. i = 0;
  314. bi = &rx_ring->rx_buffer_info[i];
  315. }
  316. no_buffers:
  317. if (rx_ring->next_to_use != i) {
  318. rx_ring->next_to_use = i;
  319. ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
  320. }
  321. }
  322. static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
  323. u32 qmask)
  324. {
  325. struct ixgbe_hw *hw = &adapter->hw;
  326. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
  327. }
  328. static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
  329. struct ixgbevf_ring *rx_ring,
  330. int budget)
  331. {
  332. struct ixgbevf_adapter *adapter = q_vector->adapter;
  333. struct pci_dev *pdev = adapter->pdev;
  334. union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
  335. struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
  336. struct sk_buff *skb;
  337. unsigned int i;
  338. u32 len, staterr;
  339. int cleaned_count = 0;
  340. unsigned int total_rx_bytes = 0, total_rx_packets = 0;
  341. i = rx_ring->next_to_clean;
  342. rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
  343. staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
  344. rx_buffer_info = &rx_ring->rx_buffer_info[i];
  345. while (staterr & IXGBE_RXD_STAT_DD) {
  346. if (!budget)
  347. break;
  348. budget--;
  349. rmb(); /* read descriptor and rx_buffer_info after status DD */
  350. len = le16_to_cpu(rx_desc->wb.upper.length);
  351. skb = rx_buffer_info->skb;
  352. prefetch(skb->data - NET_IP_ALIGN);
  353. rx_buffer_info->skb = NULL;
  354. if (rx_buffer_info->dma) {
  355. dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
  356. rx_ring->rx_buf_len,
  357. DMA_FROM_DEVICE);
  358. rx_buffer_info->dma = 0;
  359. skb_put(skb, len);
  360. }
  361. i++;
  362. if (i == rx_ring->count)
  363. i = 0;
  364. next_rxd = IXGBEVF_RX_DESC(rx_ring, i);
  365. prefetch(next_rxd);
  366. cleaned_count++;
  367. next_buffer = &rx_ring->rx_buffer_info[i];
  368. if (!(staterr & IXGBE_RXD_STAT_EOP)) {
  369. skb->next = next_buffer->skb;
  370. skb->next->prev = skb;
  371. adapter->non_eop_descs++;
  372. goto next_desc;
  373. }
  374. /* ERR_MASK will only have valid bits if EOP set */
  375. if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
  376. dev_kfree_skb_irq(skb);
  377. goto next_desc;
  378. }
  379. ixgbevf_rx_checksum(adapter, rx_ring, staterr, skb);
  380. /* probably a little skewed due to removing CRC */
  381. total_rx_bytes += skb->len;
  382. total_rx_packets++;
  383. /*
  384. * Work around issue of some types of VM to VM loop back
  385. * packets not getting split correctly
  386. */
  387. if (staterr & IXGBE_RXD_STAT_LB) {
  388. u32 header_fixup_len = skb_headlen(skb);
  389. if (header_fixup_len < 14)
  390. skb_push(skb, header_fixup_len);
  391. }
  392. skb->protocol = eth_type_trans(skb, rx_ring->netdev);
  393. ixgbevf_receive_skb(q_vector, skb, staterr, rx_desc);
  394. next_desc:
  395. rx_desc->wb.upper.status_error = 0;
  396. /* return some buffers to hardware, one at a time is too slow */
  397. if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
  398. ixgbevf_alloc_rx_buffers(adapter, rx_ring,
  399. cleaned_count);
  400. cleaned_count = 0;
  401. }
  402. /* use prefetched values */
  403. rx_desc = next_rxd;
  404. rx_buffer_info = &rx_ring->rx_buffer_info[i];
  405. staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
  406. }
  407. rx_ring->next_to_clean = i;
  408. cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
  409. if (cleaned_count)
  410. ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
  411. u64_stats_update_begin(&rx_ring->syncp);
  412. rx_ring->total_packets += total_rx_packets;
  413. rx_ring->total_bytes += total_rx_bytes;
  414. u64_stats_update_end(&rx_ring->syncp);
  415. q_vector->rx.total_packets += total_rx_packets;
  416. q_vector->rx.total_bytes += total_rx_bytes;
  417. return !!budget;
  418. }
  419. /**
  420. * ixgbevf_poll - NAPI polling calback
  421. * @napi: napi struct with our devices info in it
  422. * @budget: amount of work driver is allowed to do this pass, in packets
  423. *
  424. * This function will clean more than one or more rings associated with a
  425. * q_vector.
  426. **/
  427. static int ixgbevf_poll(struct napi_struct *napi, int budget)
  428. {
  429. struct ixgbevf_q_vector *q_vector =
  430. container_of(napi, struct ixgbevf_q_vector, napi);
  431. struct ixgbevf_adapter *adapter = q_vector->adapter;
  432. struct ixgbevf_ring *ring;
  433. int per_ring_budget;
  434. bool clean_complete = true;
  435. ixgbevf_for_each_ring(ring, q_vector->tx)
  436. clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring);
  437. /* attempt to distribute budget to each queue fairly, but don't allow
  438. * the budget to go below 1 because we'll exit polling */
  439. if (q_vector->rx.count > 1)
  440. per_ring_budget = max(budget/q_vector->rx.count, 1);
  441. else
  442. per_ring_budget = budget;
  443. ixgbevf_for_each_ring(ring, q_vector->rx)
  444. clean_complete &= ixgbevf_clean_rx_irq(q_vector, ring,
  445. per_ring_budget);
  446. /* If all work not completed, return budget and keep polling */
  447. if (!clean_complete)
  448. return budget;
  449. /* all work done, exit the polling mode */
  450. napi_complete(napi);
  451. if (adapter->rx_itr_setting & 1)
  452. ixgbevf_set_itr(q_vector);
  453. if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
  454. ixgbevf_irq_enable_queues(adapter,
  455. 1 << q_vector->v_idx);
  456. return 0;
  457. }
  458. /**
  459. * ixgbevf_write_eitr - write VTEITR register in hardware specific way
  460. * @q_vector: structure containing interrupt and ring information
  461. */
  462. static void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
  463. {
  464. struct ixgbevf_adapter *adapter = q_vector->adapter;
  465. struct ixgbe_hw *hw = &adapter->hw;
  466. int v_idx = q_vector->v_idx;
  467. u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
  468. /*
  469. * set the WDIS bit to not clear the timer bits and cause an
  470. * immediate assertion of the interrupt
  471. */
  472. itr_reg |= IXGBE_EITR_CNT_WDIS;
  473. IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
  474. }
  475. /**
  476. * ixgbevf_configure_msix - Configure MSI-X hardware
  477. * @adapter: board private structure
  478. *
  479. * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
  480. * interrupts.
  481. **/
  482. static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
  483. {
  484. struct ixgbevf_q_vector *q_vector;
  485. int q_vectors, v_idx;
  486. q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  487. adapter->eims_enable_mask = 0;
  488. /*
  489. * Populate the IVAR table and set the ITR values to the
  490. * corresponding register.
  491. */
  492. for (v_idx = 0; v_idx < q_vectors; v_idx++) {
  493. struct ixgbevf_ring *ring;
  494. q_vector = adapter->q_vector[v_idx];
  495. ixgbevf_for_each_ring(ring, q_vector->rx)
  496. ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
  497. ixgbevf_for_each_ring(ring, q_vector->tx)
  498. ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
  499. if (q_vector->tx.ring && !q_vector->rx.ring) {
  500. /* tx only vector */
  501. if (adapter->tx_itr_setting == 1)
  502. q_vector->itr = IXGBE_10K_ITR;
  503. else
  504. q_vector->itr = adapter->tx_itr_setting;
  505. } else {
  506. /* rx or rx/tx vector */
  507. if (adapter->rx_itr_setting == 1)
  508. q_vector->itr = IXGBE_20K_ITR;
  509. else
  510. q_vector->itr = adapter->rx_itr_setting;
  511. }
  512. /* add q_vector eims value to global eims_enable_mask */
  513. adapter->eims_enable_mask |= 1 << v_idx;
  514. ixgbevf_write_eitr(q_vector);
  515. }
  516. ixgbevf_set_ivar(adapter, -1, 1, v_idx);
  517. /* setup eims_other and add value to global eims_enable_mask */
  518. adapter->eims_other = 1 << v_idx;
  519. adapter->eims_enable_mask |= adapter->eims_other;
  520. }
  521. enum latency_range {
  522. lowest_latency = 0,
  523. low_latency = 1,
  524. bulk_latency = 2,
  525. latency_invalid = 255
  526. };
  527. /**
  528. * ixgbevf_update_itr - update the dynamic ITR value based on statistics
  529. * @q_vector: structure containing interrupt and ring information
  530. * @ring_container: structure containing ring performance data
  531. *
  532. * Stores a new ITR value based on packets and byte
  533. * counts during the last interrupt. The advantage of per interrupt
  534. * computation is faster updates and more accurate ITR for the current
  535. * traffic pattern. Constants in this function were computed
  536. * based on theoretical maximum wire speed and thresholds were set based
  537. * on testing data as well as attempting to minimize response time
  538. * while increasing bulk throughput.
  539. **/
  540. static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
  541. struct ixgbevf_ring_container *ring_container)
  542. {
  543. int bytes = ring_container->total_bytes;
  544. int packets = ring_container->total_packets;
  545. u32 timepassed_us;
  546. u64 bytes_perint;
  547. u8 itr_setting = ring_container->itr;
  548. if (packets == 0)
  549. return;
  550. /* simple throttlerate management
  551. * 0-20MB/s lowest (100000 ints/s)
  552. * 20-100MB/s low (20000 ints/s)
  553. * 100-1249MB/s bulk (8000 ints/s)
  554. */
  555. /* what was last interrupt timeslice? */
  556. timepassed_us = q_vector->itr >> 2;
  557. bytes_perint = bytes / timepassed_us; /* bytes/usec */
  558. switch (itr_setting) {
  559. case lowest_latency:
  560. if (bytes_perint > 10)
  561. itr_setting = low_latency;
  562. break;
  563. case low_latency:
  564. if (bytes_perint > 20)
  565. itr_setting = bulk_latency;
  566. else if (bytes_perint <= 10)
  567. itr_setting = lowest_latency;
  568. break;
  569. case bulk_latency:
  570. if (bytes_perint <= 20)
  571. itr_setting = low_latency;
  572. break;
  573. }
  574. /* clear work counters since we have the values we need */
  575. ring_container->total_bytes = 0;
  576. ring_container->total_packets = 0;
  577. /* write updated itr to ring container */
  578. ring_container->itr = itr_setting;
  579. }
  580. static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
  581. {
  582. u32 new_itr = q_vector->itr;
  583. u8 current_itr;
  584. ixgbevf_update_itr(q_vector, &q_vector->tx);
  585. ixgbevf_update_itr(q_vector, &q_vector->rx);
  586. current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
  587. switch (current_itr) {
  588. /* counts and packets in update_itr are dependent on these numbers */
  589. case lowest_latency:
  590. new_itr = IXGBE_100K_ITR;
  591. break;
  592. case low_latency:
  593. new_itr = IXGBE_20K_ITR;
  594. break;
  595. case bulk_latency:
  596. default:
  597. new_itr = IXGBE_8K_ITR;
  598. break;
  599. }
  600. if (new_itr != q_vector->itr) {
  601. /* do an exponential smoothing */
  602. new_itr = (10 * new_itr * q_vector->itr) /
  603. ((9 * new_itr) + q_vector->itr);
  604. /* save the algorithm value here */
  605. q_vector->itr = new_itr;
  606. ixgbevf_write_eitr(q_vector);
  607. }
  608. }
  609. static irqreturn_t ixgbevf_msix_other(int irq, void *data)
  610. {
  611. struct ixgbevf_adapter *adapter = data;
  612. struct ixgbe_hw *hw = &adapter->hw;
  613. hw->mac.get_link_status = 1;
  614. if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
  615. mod_timer(&adapter->watchdog_timer, jiffies);
  616. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
  617. return IRQ_HANDLED;
  618. }
  619. /**
  620. * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
  621. * @irq: unused
  622. * @data: pointer to our q_vector struct for this interrupt vector
  623. **/
  624. static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
  625. {
  626. struct ixgbevf_q_vector *q_vector = data;
  627. /* EIAM disabled interrupts (on this vector) for us */
  628. if (q_vector->rx.ring || q_vector->tx.ring)
  629. napi_schedule(&q_vector->napi);
  630. return IRQ_HANDLED;
  631. }
  632. static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
  633. int r_idx)
  634. {
  635. struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
  636. a->rx_ring[r_idx].next = q_vector->rx.ring;
  637. q_vector->rx.ring = &a->rx_ring[r_idx];
  638. q_vector->rx.count++;
  639. }
  640. static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
  641. int t_idx)
  642. {
  643. struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
  644. a->tx_ring[t_idx].next = q_vector->tx.ring;
  645. q_vector->tx.ring = &a->tx_ring[t_idx];
  646. q_vector->tx.count++;
  647. }
  648. /**
  649. * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
  650. * @adapter: board private structure to initialize
  651. *
  652. * This function maps descriptor rings to the queue-specific vectors
  653. * we were allotted through the MSI-X enabling code. Ideally, we'd have
  654. * one vector per ring/queue, but on a constrained vector budget, we
  655. * group the rings as "efficiently" as possible. You would add new
  656. * mapping configurations in here.
  657. **/
  658. static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
  659. {
  660. int q_vectors;
  661. int v_start = 0;
  662. int rxr_idx = 0, txr_idx = 0;
  663. int rxr_remaining = adapter->num_rx_queues;
  664. int txr_remaining = adapter->num_tx_queues;
  665. int i, j;
  666. int rqpv, tqpv;
  667. int err = 0;
  668. q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  669. /*
  670. * The ideal configuration...
  671. * We have enough vectors to map one per queue.
  672. */
  673. if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
  674. for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
  675. map_vector_to_rxq(adapter, v_start, rxr_idx);
  676. for (; txr_idx < txr_remaining; v_start++, txr_idx++)
  677. map_vector_to_txq(adapter, v_start, txr_idx);
  678. goto out;
  679. }
  680. /*
  681. * If we don't have enough vectors for a 1-to-1
  682. * mapping, we'll have to group them so there are
  683. * multiple queues per vector.
  684. */
  685. /* Re-adjusting *qpv takes care of the remainder. */
  686. for (i = v_start; i < q_vectors; i++) {
  687. rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
  688. for (j = 0; j < rqpv; j++) {
  689. map_vector_to_rxq(adapter, i, rxr_idx);
  690. rxr_idx++;
  691. rxr_remaining--;
  692. }
  693. }
  694. for (i = v_start; i < q_vectors; i++) {
  695. tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
  696. for (j = 0; j < tqpv; j++) {
  697. map_vector_to_txq(adapter, i, txr_idx);
  698. txr_idx++;
  699. txr_remaining--;
  700. }
  701. }
  702. out:
  703. return err;
  704. }
  705. /**
  706. * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
  707. * @adapter: board private structure
  708. *
  709. * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
  710. * interrupts from the kernel.
  711. **/
  712. static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
  713. {
  714. struct net_device *netdev = adapter->netdev;
  715. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  716. int vector, err;
  717. int ri = 0, ti = 0;
  718. for (vector = 0; vector < q_vectors; vector++) {
  719. struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
  720. struct msix_entry *entry = &adapter->msix_entries[vector];
  721. if (q_vector->tx.ring && q_vector->rx.ring) {
  722. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  723. "%s-%s-%d", netdev->name, "TxRx", ri++);
  724. ti++;
  725. } else if (q_vector->rx.ring) {
  726. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  727. "%s-%s-%d", netdev->name, "rx", ri++);
  728. } else if (q_vector->tx.ring) {
  729. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  730. "%s-%s-%d", netdev->name, "tx", ti++);
  731. } else {
  732. /* skip this unused q_vector */
  733. continue;
  734. }
  735. err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
  736. q_vector->name, q_vector);
  737. if (err) {
  738. hw_dbg(&adapter->hw,
  739. "request_irq failed for MSIX interrupt "
  740. "Error: %d\n", err);
  741. goto free_queue_irqs;
  742. }
  743. }
  744. err = request_irq(adapter->msix_entries[vector].vector,
  745. &ixgbevf_msix_other, 0, netdev->name, adapter);
  746. if (err) {
  747. hw_dbg(&adapter->hw,
  748. "request_irq for msix_other failed: %d\n", err);
  749. goto free_queue_irqs;
  750. }
  751. return 0;
  752. free_queue_irqs:
  753. while (vector) {
  754. vector--;
  755. free_irq(adapter->msix_entries[vector].vector,
  756. adapter->q_vector[vector]);
  757. }
  758. pci_disable_msix(adapter->pdev);
  759. kfree(adapter->msix_entries);
  760. adapter->msix_entries = NULL;
  761. return err;
  762. }
  763. static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
  764. {
  765. int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  766. for (i = 0; i < q_vectors; i++) {
  767. struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
  768. q_vector->rx.ring = NULL;
  769. q_vector->tx.ring = NULL;
  770. q_vector->rx.count = 0;
  771. q_vector->tx.count = 0;
  772. }
  773. }
  774. /**
  775. * ixgbevf_request_irq - initialize interrupts
  776. * @adapter: board private structure
  777. *
  778. * Attempts to configure interrupts using the best available
  779. * capabilities of the hardware and kernel.
  780. **/
  781. static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
  782. {
  783. int err = 0;
  784. err = ixgbevf_request_msix_irqs(adapter);
  785. if (err)
  786. hw_dbg(&adapter->hw,
  787. "request_irq failed, Error %d\n", err);
  788. return err;
  789. }
  790. static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
  791. {
  792. int i, q_vectors;
  793. q_vectors = adapter->num_msix_vectors;
  794. i = q_vectors - 1;
  795. free_irq(adapter->msix_entries[i].vector, adapter);
  796. i--;
  797. for (; i >= 0; i--) {
  798. /* free only the irqs that were actually requested */
  799. if (!adapter->q_vector[i]->rx.ring &&
  800. !adapter->q_vector[i]->tx.ring)
  801. continue;
  802. free_irq(adapter->msix_entries[i].vector,
  803. adapter->q_vector[i]);
  804. }
  805. ixgbevf_reset_q_vectors(adapter);
  806. }
  807. /**
  808. * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
  809. * @adapter: board private structure
  810. **/
  811. static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
  812. {
  813. struct ixgbe_hw *hw = &adapter->hw;
  814. int i;
  815. IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
  816. IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
  817. IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
  818. IXGBE_WRITE_FLUSH(hw);
  819. for (i = 0; i < adapter->num_msix_vectors; i++)
  820. synchronize_irq(adapter->msix_entries[i].vector);
  821. }
  822. /**
  823. * ixgbevf_irq_enable - Enable default interrupt generation settings
  824. * @adapter: board private structure
  825. **/
  826. static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
  827. {
  828. struct ixgbe_hw *hw = &adapter->hw;
  829. IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
  830. IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
  831. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
  832. }
  833. /**
  834. * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
  835. * @adapter: board private structure
  836. *
  837. * Configure the Tx unit of the MAC after a reset.
  838. **/
  839. static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
  840. {
  841. u64 tdba;
  842. struct ixgbe_hw *hw = &adapter->hw;
  843. u32 i, j, tdlen, txctrl;
  844. /* Setup the HW Tx Head and Tail descriptor pointers */
  845. for (i = 0; i < adapter->num_tx_queues; i++) {
  846. struct ixgbevf_ring *ring = &adapter->tx_ring[i];
  847. j = ring->reg_idx;
  848. tdba = ring->dma;
  849. tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
  850. IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
  851. (tdba & DMA_BIT_MASK(32)));
  852. IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
  853. IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
  854. IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
  855. IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
  856. adapter->tx_ring[i].head = IXGBE_VFTDH(j);
  857. adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
  858. /* Disable Tx Head Writeback RO bit, since this hoses
  859. * bookkeeping if things aren't delivered in order.
  860. */
  861. txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
  862. txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
  863. IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
  864. }
  865. }
  866. #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
  867. static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
  868. {
  869. struct ixgbevf_ring *rx_ring;
  870. struct ixgbe_hw *hw = &adapter->hw;
  871. u32 srrctl;
  872. rx_ring = &adapter->rx_ring[index];
  873. srrctl = IXGBE_SRRCTL_DROP_EN;
  874. srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
  875. srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >>
  876. IXGBE_SRRCTL_BSIZEPKT_SHIFT;
  877. IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
  878. }
  879. static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter)
  880. {
  881. struct ixgbe_hw *hw = &adapter->hw;
  882. struct net_device *netdev = adapter->netdev;
  883. int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
  884. int i;
  885. u16 rx_buf_len;
  886. /* notify the PF of our intent to use this size of frame */
  887. ixgbevf_rlpml_set_vf(hw, max_frame);
  888. /* PF will allow an extra 4 bytes past for vlan tagged frames */
  889. max_frame += VLAN_HLEN;
  890. /*
  891. * Make best use of allocation by using all but 1K of a
  892. * power of 2 allocation that will be used for skb->head.
  893. */
  894. if ((hw->mac.type == ixgbe_mac_X540_vf) &&
  895. (max_frame <= MAXIMUM_ETHERNET_VLAN_SIZE))
  896. rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  897. else if (max_frame <= IXGBEVF_RXBUFFER_3K)
  898. rx_buf_len = IXGBEVF_RXBUFFER_3K;
  899. else if (max_frame <= IXGBEVF_RXBUFFER_7K)
  900. rx_buf_len = IXGBEVF_RXBUFFER_7K;
  901. else if (max_frame <= IXGBEVF_RXBUFFER_15K)
  902. rx_buf_len = IXGBEVF_RXBUFFER_15K;
  903. else
  904. rx_buf_len = IXGBEVF_MAX_RXBUFFER;
  905. for (i = 0; i < adapter->num_rx_queues; i++)
  906. adapter->rx_ring[i].rx_buf_len = rx_buf_len;
  907. }
  908. /**
  909. * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
  910. * @adapter: board private structure
  911. *
  912. * Configure the Rx unit of the MAC after a reset.
  913. **/
  914. static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
  915. {
  916. u64 rdba;
  917. struct ixgbe_hw *hw = &adapter->hw;
  918. int i, j;
  919. u32 rdlen;
  920. /* PSRTYPE must be initialized in 82599 */
  921. IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
  922. /* set_rx_buffer_len must be called before ring initialization */
  923. ixgbevf_set_rx_buffer_len(adapter);
  924. rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
  925. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  926. * the Base and Length of the Rx Descriptor Ring */
  927. for (i = 0; i < adapter->num_rx_queues; i++) {
  928. rdba = adapter->rx_ring[i].dma;
  929. j = adapter->rx_ring[i].reg_idx;
  930. IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
  931. (rdba & DMA_BIT_MASK(32)));
  932. IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
  933. IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
  934. IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
  935. IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
  936. adapter->rx_ring[i].head = IXGBE_VFRDH(j);
  937. adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
  938. ixgbevf_configure_srrctl(adapter, j);
  939. }
  940. }
  941. static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
  942. {
  943. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  944. struct ixgbe_hw *hw = &adapter->hw;
  945. spin_lock(&adapter->mbx_lock);
  946. /* add VID to filter table */
  947. if (hw->mac.ops.set_vfta)
  948. hw->mac.ops.set_vfta(hw, vid, 0, true);
  949. spin_unlock(&adapter->mbx_lock);
  950. set_bit(vid, adapter->active_vlans);
  951. return 0;
  952. }
  953. static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
  954. {
  955. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  956. struct ixgbe_hw *hw = &adapter->hw;
  957. spin_lock(&adapter->mbx_lock);
  958. /* remove VID from filter table */
  959. if (hw->mac.ops.set_vfta)
  960. hw->mac.ops.set_vfta(hw, vid, 0, false);
  961. spin_unlock(&adapter->mbx_lock);
  962. clear_bit(vid, adapter->active_vlans);
  963. return 0;
  964. }
  965. static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
  966. {
  967. u16 vid;
  968. for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
  969. ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
  970. }
  971. static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
  972. {
  973. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  974. struct ixgbe_hw *hw = &adapter->hw;
  975. int count = 0;
  976. if ((netdev_uc_count(netdev)) > 10) {
  977. pr_err("Too many unicast filters - No Space\n");
  978. return -ENOSPC;
  979. }
  980. if (!netdev_uc_empty(netdev)) {
  981. struct netdev_hw_addr *ha;
  982. netdev_for_each_uc_addr(ha, netdev) {
  983. hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
  984. udelay(200);
  985. }
  986. } else {
  987. /*
  988. * If the list is empty then send message to PF driver to
  989. * clear all macvlans on this VF.
  990. */
  991. hw->mac.ops.set_uc_addr(hw, 0, NULL);
  992. }
  993. return count;
  994. }
  995. /**
  996. * ixgbevf_set_rx_mode - Multicast set
  997. * @netdev: network interface device structure
  998. *
  999. * The set_rx_method entry point is called whenever the multicast address
  1000. * list or the network interface flags are updated. This routine is
  1001. * responsible for configuring the hardware for proper multicast mode.
  1002. **/
  1003. static void ixgbevf_set_rx_mode(struct net_device *netdev)
  1004. {
  1005. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1006. struct ixgbe_hw *hw = &adapter->hw;
  1007. spin_lock(&adapter->mbx_lock);
  1008. /* reprogram multicast list */
  1009. if (hw->mac.ops.update_mc_addr_list)
  1010. hw->mac.ops.update_mc_addr_list(hw, netdev);
  1011. ixgbevf_write_uc_addr_list(netdev);
  1012. spin_unlock(&adapter->mbx_lock);
  1013. }
  1014. static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
  1015. {
  1016. int q_idx;
  1017. struct ixgbevf_q_vector *q_vector;
  1018. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1019. for (q_idx = 0; q_idx < q_vectors; q_idx++) {
  1020. q_vector = adapter->q_vector[q_idx];
  1021. napi_enable(&q_vector->napi);
  1022. }
  1023. }
  1024. static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
  1025. {
  1026. int q_idx;
  1027. struct ixgbevf_q_vector *q_vector;
  1028. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1029. for (q_idx = 0; q_idx < q_vectors; q_idx++) {
  1030. q_vector = adapter->q_vector[q_idx];
  1031. napi_disable(&q_vector->napi);
  1032. }
  1033. }
  1034. static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
  1035. {
  1036. struct net_device *netdev = adapter->netdev;
  1037. int i;
  1038. ixgbevf_set_rx_mode(netdev);
  1039. ixgbevf_restore_vlan(adapter);
  1040. ixgbevf_configure_tx(adapter);
  1041. ixgbevf_configure_rx(adapter);
  1042. for (i = 0; i < adapter->num_rx_queues; i++) {
  1043. struct ixgbevf_ring *ring = &adapter->rx_ring[i];
  1044. ixgbevf_alloc_rx_buffers(adapter, ring,
  1045. IXGBE_DESC_UNUSED(ring));
  1046. }
  1047. }
  1048. #define IXGBE_MAX_RX_DESC_POLL 10
  1049. static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
  1050. int rxr)
  1051. {
  1052. struct ixgbe_hw *hw = &adapter->hw;
  1053. int j = adapter->rx_ring[rxr].reg_idx;
  1054. int k;
  1055. for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
  1056. if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
  1057. break;
  1058. else
  1059. msleep(1);
  1060. }
  1061. if (k >= IXGBE_MAX_RX_DESC_POLL) {
  1062. hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
  1063. "not set within the polling period\n", rxr);
  1064. }
  1065. ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
  1066. (adapter->rx_ring[rxr].count - 1));
  1067. }
  1068. static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
  1069. {
  1070. /* Only save pre-reset stats if there are some */
  1071. if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
  1072. adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
  1073. adapter->stats.base_vfgprc;
  1074. adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
  1075. adapter->stats.base_vfgptc;
  1076. adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
  1077. adapter->stats.base_vfgorc;
  1078. adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
  1079. adapter->stats.base_vfgotc;
  1080. adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
  1081. adapter->stats.base_vfmprc;
  1082. }
  1083. }
  1084. static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
  1085. {
  1086. struct ixgbe_hw *hw = &adapter->hw;
  1087. adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
  1088. adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
  1089. adapter->stats.last_vfgorc |=
  1090. (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
  1091. adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
  1092. adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
  1093. adapter->stats.last_vfgotc |=
  1094. (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
  1095. adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
  1096. adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
  1097. adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
  1098. adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
  1099. adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
  1100. adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
  1101. }
  1102. static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
  1103. {
  1104. struct ixgbe_hw *hw = &adapter->hw;
  1105. int api[] = { ixgbe_mbox_api_10,
  1106. ixgbe_mbox_api_unknown };
  1107. int err = 0, idx = 0;
  1108. spin_lock(&adapter->mbx_lock);
  1109. while (api[idx] != ixgbe_mbox_api_unknown) {
  1110. err = ixgbevf_negotiate_api_version(hw, api[idx]);
  1111. if (!err)
  1112. break;
  1113. idx++;
  1114. }
  1115. spin_unlock(&adapter->mbx_lock);
  1116. }
  1117. static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
  1118. {
  1119. struct net_device *netdev = adapter->netdev;
  1120. struct ixgbe_hw *hw = &adapter->hw;
  1121. int i, j = 0;
  1122. int num_rx_rings = adapter->num_rx_queues;
  1123. u32 txdctl, rxdctl;
  1124. for (i = 0; i < adapter->num_tx_queues; i++) {
  1125. j = adapter->tx_ring[i].reg_idx;
  1126. txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
  1127. /* enable WTHRESH=8 descriptors, to encourage burst writeback */
  1128. txdctl |= (8 << 16);
  1129. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
  1130. }
  1131. for (i = 0; i < adapter->num_tx_queues; i++) {
  1132. j = adapter->tx_ring[i].reg_idx;
  1133. txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
  1134. txdctl |= IXGBE_TXDCTL_ENABLE;
  1135. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
  1136. }
  1137. for (i = 0; i < num_rx_rings; i++) {
  1138. j = adapter->rx_ring[i].reg_idx;
  1139. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
  1140. rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
  1141. if (hw->mac.type == ixgbe_mac_X540_vf) {
  1142. rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
  1143. rxdctl |= ((netdev->mtu + ETH_HLEN + ETH_FCS_LEN) |
  1144. IXGBE_RXDCTL_RLPML_EN);
  1145. }
  1146. IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
  1147. ixgbevf_rx_desc_queue_enable(adapter, i);
  1148. }
  1149. ixgbevf_configure_msix(adapter);
  1150. spin_lock(&adapter->mbx_lock);
  1151. if (hw->mac.ops.set_rar) {
  1152. if (is_valid_ether_addr(hw->mac.addr))
  1153. hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
  1154. else
  1155. hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
  1156. }
  1157. spin_unlock(&adapter->mbx_lock);
  1158. clear_bit(__IXGBEVF_DOWN, &adapter->state);
  1159. ixgbevf_napi_enable_all(adapter);
  1160. /* enable transmits */
  1161. netif_tx_start_all_queues(netdev);
  1162. ixgbevf_save_reset_stats(adapter);
  1163. ixgbevf_init_last_counter_stats(adapter);
  1164. hw->mac.get_link_status = 1;
  1165. mod_timer(&adapter->watchdog_timer, jiffies);
  1166. }
  1167. void ixgbevf_up(struct ixgbevf_adapter *adapter)
  1168. {
  1169. struct ixgbe_hw *hw = &adapter->hw;
  1170. ixgbevf_negotiate_api(adapter);
  1171. ixgbevf_configure(adapter);
  1172. ixgbevf_up_complete(adapter);
  1173. /* clear any pending interrupts, may auto mask */
  1174. IXGBE_READ_REG(hw, IXGBE_VTEICR);
  1175. ixgbevf_irq_enable(adapter);
  1176. }
  1177. /**
  1178. * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
  1179. * @adapter: board private structure
  1180. * @rx_ring: ring to free buffers from
  1181. **/
  1182. static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
  1183. struct ixgbevf_ring *rx_ring)
  1184. {
  1185. struct pci_dev *pdev = adapter->pdev;
  1186. unsigned long size;
  1187. unsigned int i;
  1188. if (!rx_ring->rx_buffer_info)
  1189. return;
  1190. /* Free all the Rx ring sk_buffs */
  1191. for (i = 0; i < rx_ring->count; i++) {
  1192. struct ixgbevf_rx_buffer *rx_buffer_info;
  1193. rx_buffer_info = &rx_ring->rx_buffer_info[i];
  1194. if (rx_buffer_info->dma) {
  1195. dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
  1196. rx_ring->rx_buf_len,
  1197. DMA_FROM_DEVICE);
  1198. rx_buffer_info->dma = 0;
  1199. }
  1200. if (rx_buffer_info->skb) {
  1201. struct sk_buff *skb = rx_buffer_info->skb;
  1202. rx_buffer_info->skb = NULL;
  1203. do {
  1204. struct sk_buff *this = skb;
  1205. skb = skb->prev;
  1206. dev_kfree_skb(this);
  1207. } while (skb);
  1208. }
  1209. }
  1210. size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
  1211. memset(rx_ring->rx_buffer_info, 0, size);
  1212. /* Zero out the descriptor ring */
  1213. memset(rx_ring->desc, 0, rx_ring->size);
  1214. rx_ring->next_to_clean = 0;
  1215. rx_ring->next_to_use = 0;
  1216. if (rx_ring->head)
  1217. writel(0, adapter->hw.hw_addr + rx_ring->head);
  1218. if (rx_ring->tail)
  1219. writel(0, adapter->hw.hw_addr + rx_ring->tail);
  1220. }
  1221. /**
  1222. * ixgbevf_clean_tx_ring - Free Tx Buffers
  1223. * @adapter: board private structure
  1224. * @tx_ring: ring to be cleaned
  1225. **/
  1226. static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
  1227. struct ixgbevf_ring *tx_ring)
  1228. {
  1229. struct ixgbevf_tx_buffer *tx_buffer_info;
  1230. unsigned long size;
  1231. unsigned int i;
  1232. if (!tx_ring->tx_buffer_info)
  1233. return;
  1234. /* Free all the Tx ring sk_buffs */
  1235. for (i = 0; i < tx_ring->count; i++) {
  1236. tx_buffer_info = &tx_ring->tx_buffer_info[i];
  1237. ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
  1238. }
  1239. size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
  1240. memset(tx_ring->tx_buffer_info, 0, size);
  1241. memset(tx_ring->desc, 0, tx_ring->size);
  1242. tx_ring->next_to_use = 0;
  1243. tx_ring->next_to_clean = 0;
  1244. if (tx_ring->head)
  1245. writel(0, adapter->hw.hw_addr + tx_ring->head);
  1246. if (tx_ring->tail)
  1247. writel(0, adapter->hw.hw_addr + tx_ring->tail);
  1248. }
  1249. /**
  1250. * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
  1251. * @adapter: board private structure
  1252. **/
  1253. static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
  1254. {
  1255. int i;
  1256. for (i = 0; i < adapter->num_rx_queues; i++)
  1257. ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1258. }
  1259. /**
  1260. * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
  1261. * @adapter: board private structure
  1262. **/
  1263. static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
  1264. {
  1265. int i;
  1266. for (i = 0; i < adapter->num_tx_queues; i++)
  1267. ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1268. }
  1269. void ixgbevf_down(struct ixgbevf_adapter *adapter)
  1270. {
  1271. struct net_device *netdev = adapter->netdev;
  1272. struct ixgbe_hw *hw = &adapter->hw;
  1273. u32 txdctl;
  1274. int i, j;
  1275. /* signal that we are down to the interrupt handler */
  1276. set_bit(__IXGBEVF_DOWN, &adapter->state);
  1277. /* disable receives */
  1278. netif_tx_disable(netdev);
  1279. msleep(10);
  1280. netif_tx_stop_all_queues(netdev);
  1281. ixgbevf_irq_disable(adapter);
  1282. ixgbevf_napi_disable_all(adapter);
  1283. del_timer_sync(&adapter->watchdog_timer);
  1284. /* can't call flush scheduled work here because it can deadlock
  1285. * if linkwatch_event tries to acquire the rtnl_lock which we are
  1286. * holding */
  1287. while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
  1288. msleep(1);
  1289. /* disable transmits in the hardware now that interrupts are off */
  1290. for (i = 0; i < adapter->num_tx_queues; i++) {
  1291. j = adapter->tx_ring[i].reg_idx;
  1292. txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
  1293. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
  1294. (txdctl & ~IXGBE_TXDCTL_ENABLE));
  1295. }
  1296. netif_carrier_off(netdev);
  1297. if (!pci_channel_offline(adapter->pdev))
  1298. ixgbevf_reset(adapter);
  1299. ixgbevf_clean_all_tx_rings(adapter);
  1300. ixgbevf_clean_all_rx_rings(adapter);
  1301. }
  1302. void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
  1303. {
  1304. WARN_ON(in_interrupt());
  1305. while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
  1306. msleep(1);
  1307. /*
  1308. * Check if PF is up before re-init. If not then skip until
  1309. * later when the PF is up and ready to service requests from
  1310. * the VF via mailbox. If the VF is up and running then the
  1311. * watchdog task will continue to schedule reset tasks until
  1312. * the PF is up and running.
  1313. */
  1314. ixgbevf_down(adapter);
  1315. ixgbevf_up(adapter);
  1316. clear_bit(__IXGBEVF_RESETTING, &adapter->state);
  1317. }
  1318. void ixgbevf_reset(struct ixgbevf_adapter *adapter)
  1319. {
  1320. struct ixgbe_hw *hw = &adapter->hw;
  1321. struct net_device *netdev = adapter->netdev;
  1322. spin_lock(&adapter->mbx_lock);
  1323. if (hw->mac.ops.reset_hw(hw))
  1324. hw_dbg(hw, "PF still resetting\n");
  1325. else
  1326. hw->mac.ops.init_hw(hw);
  1327. spin_unlock(&adapter->mbx_lock);
  1328. if (is_valid_ether_addr(adapter->hw.mac.addr)) {
  1329. memcpy(netdev->dev_addr, adapter->hw.mac.addr,
  1330. netdev->addr_len);
  1331. memcpy(netdev->perm_addr, adapter->hw.mac.addr,
  1332. netdev->addr_len);
  1333. }
  1334. }
  1335. static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
  1336. int vectors)
  1337. {
  1338. int err, vector_threshold;
  1339. /* We'll want at least 2 (vector_threshold):
  1340. * 1) TxQ[0] + RxQ[0] handler
  1341. * 2) Other (Link Status Change, etc.)
  1342. */
  1343. vector_threshold = MIN_MSIX_COUNT;
  1344. /* The more we get, the more we will assign to Tx/Rx Cleanup
  1345. * for the separate queues...where Rx Cleanup >= Tx Cleanup.
  1346. * Right now, we simply care about how many we'll get; we'll
  1347. * set them up later while requesting irq's.
  1348. */
  1349. while (vectors >= vector_threshold) {
  1350. err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1351. vectors);
  1352. if (!err) /* Success in acquiring all requested vectors. */
  1353. break;
  1354. else if (err < 0)
  1355. vectors = 0; /* Nasty failure, quit now */
  1356. else /* err == number of vectors we should try again with */
  1357. vectors = err;
  1358. }
  1359. if (vectors < vector_threshold) {
  1360. /* Can't allocate enough MSI-X interrupts? Oh well.
  1361. * This just means we'll go with either a single MSI
  1362. * vector or fall back to legacy interrupts.
  1363. */
  1364. hw_dbg(&adapter->hw,
  1365. "Unable to allocate MSI-X interrupts\n");
  1366. kfree(adapter->msix_entries);
  1367. adapter->msix_entries = NULL;
  1368. } else {
  1369. /*
  1370. * Adjust for only the vectors we'll use, which is minimum
  1371. * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
  1372. * vectors we were allocated.
  1373. */
  1374. adapter->num_msix_vectors = vectors;
  1375. }
  1376. }
  1377. /**
  1378. * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
  1379. * @adapter: board private structure to initialize
  1380. *
  1381. * This is the top level queue allocation routine. The order here is very
  1382. * important, starting with the "most" number of features turned on at once,
  1383. * and ending with the smallest set of features. This way large combinations
  1384. * can be allocated if they're turned on, and smaller combinations are the
  1385. * fallthrough conditions.
  1386. *
  1387. **/
  1388. static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
  1389. {
  1390. /* Start with base case */
  1391. adapter->num_rx_queues = 1;
  1392. adapter->num_tx_queues = 1;
  1393. }
  1394. /**
  1395. * ixgbevf_alloc_queues - Allocate memory for all rings
  1396. * @adapter: board private structure to initialize
  1397. *
  1398. * We allocate one ring per queue at run-time since we don't know the
  1399. * number of queues at compile-time. The polling_netdev array is
  1400. * intended for Multiqueue, but should work fine with a single queue.
  1401. **/
  1402. static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
  1403. {
  1404. int i;
  1405. adapter->tx_ring = kcalloc(adapter->num_tx_queues,
  1406. sizeof(struct ixgbevf_ring), GFP_KERNEL);
  1407. if (!adapter->tx_ring)
  1408. goto err_tx_ring_allocation;
  1409. adapter->rx_ring = kcalloc(adapter->num_rx_queues,
  1410. sizeof(struct ixgbevf_ring), GFP_KERNEL);
  1411. if (!adapter->rx_ring)
  1412. goto err_rx_ring_allocation;
  1413. for (i = 0; i < adapter->num_tx_queues; i++) {
  1414. adapter->tx_ring[i].count = adapter->tx_ring_count;
  1415. adapter->tx_ring[i].queue_index = i;
  1416. adapter->tx_ring[i].reg_idx = i;
  1417. adapter->tx_ring[i].dev = &adapter->pdev->dev;
  1418. adapter->tx_ring[i].netdev = adapter->netdev;
  1419. }
  1420. for (i = 0; i < adapter->num_rx_queues; i++) {
  1421. adapter->rx_ring[i].count = adapter->rx_ring_count;
  1422. adapter->rx_ring[i].queue_index = i;
  1423. adapter->rx_ring[i].reg_idx = i;
  1424. adapter->rx_ring[i].dev = &adapter->pdev->dev;
  1425. adapter->rx_ring[i].netdev = adapter->netdev;
  1426. }
  1427. return 0;
  1428. err_rx_ring_allocation:
  1429. kfree(adapter->tx_ring);
  1430. err_tx_ring_allocation:
  1431. return -ENOMEM;
  1432. }
  1433. /**
  1434. * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
  1435. * @adapter: board private structure to initialize
  1436. *
  1437. * Attempt to configure the interrupts using the best available
  1438. * capabilities of the hardware and the kernel.
  1439. **/
  1440. static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
  1441. {
  1442. int err = 0;
  1443. int vector, v_budget;
  1444. /*
  1445. * It's easy to be greedy for MSI-X vectors, but it really
  1446. * doesn't do us much good if we have a lot more vectors
  1447. * than CPU's. So let's be conservative and only ask for
  1448. * (roughly) the same number of vectors as there are CPU's.
  1449. * The default is to use pairs of vectors.
  1450. */
  1451. v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
  1452. v_budget = min_t(int, v_budget, num_online_cpus());
  1453. v_budget += NON_Q_VECTORS;
  1454. /* A failure in MSI-X entry allocation isn't fatal, but it does
  1455. * mean we disable MSI-X capabilities of the adapter. */
  1456. adapter->msix_entries = kcalloc(v_budget,
  1457. sizeof(struct msix_entry), GFP_KERNEL);
  1458. if (!adapter->msix_entries) {
  1459. err = -ENOMEM;
  1460. goto out;
  1461. }
  1462. for (vector = 0; vector < v_budget; vector++)
  1463. adapter->msix_entries[vector].entry = vector;
  1464. ixgbevf_acquire_msix_vectors(adapter, v_budget);
  1465. out:
  1466. return err;
  1467. }
  1468. /**
  1469. * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
  1470. * @adapter: board private structure to initialize
  1471. *
  1472. * We allocate one q_vector per queue interrupt. If allocation fails we
  1473. * return -ENOMEM.
  1474. **/
  1475. static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
  1476. {
  1477. int q_idx, num_q_vectors;
  1478. struct ixgbevf_q_vector *q_vector;
  1479. num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1480. for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
  1481. q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
  1482. if (!q_vector)
  1483. goto err_out;
  1484. q_vector->adapter = adapter;
  1485. q_vector->v_idx = q_idx;
  1486. netif_napi_add(adapter->netdev, &q_vector->napi,
  1487. ixgbevf_poll, 64);
  1488. adapter->q_vector[q_idx] = q_vector;
  1489. }
  1490. return 0;
  1491. err_out:
  1492. while (q_idx) {
  1493. q_idx--;
  1494. q_vector = adapter->q_vector[q_idx];
  1495. netif_napi_del(&q_vector->napi);
  1496. kfree(q_vector);
  1497. adapter->q_vector[q_idx] = NULL;
  1498. }
  1499. return -ENOMEM;
  1500. }
  1501. /**
  1502. * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
  1503. * @adapter: board private structure to initialize
  1504. *
  1505. * This function frees the memory allocated to the q_vectors. In addition if
  1506. * NAPI is enabled it will delete any references to the NAPI struct prior
  1507. * to freeing the q_vector.
  1508. **/
  1509. static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
  1510. {
  1511. int q_idx, num_q_vectors;
  1512. int napi_vectors;
  1513. num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1514. napi_vectors = adapter->num_rx_queues;
  1515. for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
  1516. struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
  1517. adapter->q_vector[q_idx] = NULL;
  1518. if (q_idx < napi_vectors)
  1519. netif_napi_del(&q_vector->napi);
  1520. kfree(q_vector);
  1521. }
  1522. }
  1523. /**
  1524. * ixgbevf_reset_interrupt_capability - Reset MSIX setup
  1525. * @adapter: board private structure
  1526. *
  1527. **/
  1528. static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
  1529. {
  1530. pci_disable_msix(adapter->pdev);
  1531. kfree(adapter->msix_entries);
  1532. adapter->msix_entries = NULL;
  1533. }
  1534. /**
  1535. * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
  1536. * @adapter: board private structure to initialize
  1537. *
  1538. **/
  1539. static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
  1540. {
  1541. int err;
  1542. /* Number of supported queues */
  1543. ixgbevf_set_num_queues(adapter);
  1544. err = ixgbevf_set_interrupt_capability(adapter);
  1545. if (err) {
  1546. hw_dbg(&adapter->hw,
  1547. "Unable to setup interrupt capabilities\n");
  1548. goto err_set_interrupt;
  1549. }
  1550. err = ixgbevf_alloc_q_vectors(adapter);
  1551. if (err) {
  1552. hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
  1553. "vectors\n");
  1554. goto err_alloc_q_vectors;
  1555. }
  1556. err = ixgbevf_alloc_queues(adapter);
  1557. if (err) {
  1558. pr_err("Unable to allocate memory for queues\n");
  1559. goto err_alloc_queues;
  1560. }
  1561. hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
  1562. "Tx Queue count = %u\n",
  1563. (adapter->num_rx_queues > 1) ? "Enabled" :
  1564. "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
  1565. set_bit(__IXGBEVF_DOWN, &adapter->state);
  1566. return 0;
  1567. err_alloc_queues:
  1568. ixgbevf_free_q_vectors(adapter);
  1569. err_alloc_q_vectors:
  1570. ixgbevf_reset_interrupt_capability(adapter);
  1571. err_set_interrupt:
  1572. return err;
  1573. }
  1574. /**
  1575. * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
  1576. * @adapter: board private structure to clear interrupt scheme on
  1577. *
  1578. * We go through and clear interrupt specific resources and reset the structure
  1579. * to pre-load conditions
  1580. **/
  1581. static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
  1582. {
  1583. adapter->num_tx_queues = 0;
  1584. adapter->num_rx_queues = 0;
  1585. ixgbevf_free_q_vectors(adapter);
  1586. ixgbevf_reset_interrupt_capability(adapter);
  1587. }
  1588. /**
  1589. * ixgbevf_sw_init - Initialize general software structures
  1590. * (struct ixgbevf_adapter)
  1591. * @adapter: board private structure to initialize
  1592. *
  1593. * ixgbevf_sw_init initializes the Adapter private data structure.
  1594. * Fields are initialized based on PCI device information and
  1595. * OS network device settings (MTU size).
  1596. **/
  1597. static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
  1598. {
  1599. struct ixgbe_hw *hw = &adapter->hw;
  1600. struct pci_dev *pdev = adapter->pdev;
  1601. int err;
  1602. /* PCI config space info */
  1603. hw->vendor_id = pdev->vendor;
  1604. hw->device_id = pdev->device;
  1605. hw->revision_id = pdev->revision;
  1606. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  1607. hw->subsystem_device_id = pdev->subsystem_device;
  1608. hw->mbx.ops.init_params(hw);
  1609. hw->mac.max_tx_queues = MAX_TX_QUEUES;
  1610. hw->mac.max_rx_queues = MAX_RX_QUEUES;
  1611. err = hw->mac.ops.reset_hw(hw);
  1612. if (err) {
  1613. dev_info(&pdev->dev,
  1614. "PF still in reset state, assigning new address\n");
  1615. eth_hw_addr_random(adapter->netdev);
  1616. memcpy(adapter->hw.mac.addr, adapter->netdev->dev_addr,
  1617. adapter->netdev->addr_len);
  1618. } else {
  1619. err = hw->mac.ops.init_hw(hw);
  1620. if (err) {
  1621. pr_err("init_shared_code failed: %d\n", err);
  1622. goto out;
  1623. }
  1624. memcpy(adapter->netdev->dev_addr, adapter->hw.mac.addr,
  1625. adapter->netdev->addr_len);
  1626. }
  1627. /* lock to protect mailbox accesses */
  1628. spin_lock_init(&adapter->mbx_lock);
  1629. /* Enable dynamic interrupt throttling rates */
  1630. adapter->rx_itr_setting = 1;
  1631. adapter->tx_itr_setting = 1;
  1632. /* set default ring sizes */
  1633. adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
  1634. adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
  1635. set_bit(__IXGBEVF_DOWN, &adapter->state);
  1636. return 0;
  1637. out:
  1638. return err;
  1639. }
  1640. #define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
  1641. { \
  1642. u32 current_counter = IXGBE_READ_REG(hw, reg); \
  1643. if (current_counter < last_counter) \
  1644. counter += 0x100000000LL; \
  1645. last_counter = current_counter; \
  1646. counter &= 0xFFFFFFFF00000000LL; \
  1647. counter |= current_counter; \
  1648. }
  1649. #define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
  1650. { \
  1651. u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
  1652. u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
  1653. u64 current_counter = (current_counter_msb << 32) | \
  1654. current_counter_lsb; \
  1655. if (current_counter < last_counter) \
  1656. counter += 0x1000000000LL; \
  1657. last_counter = current_counter; \
  1658. counter &= 0xFFFFFFF000000000LL; \
  1659. counter |= current_counter; \
  1660. }
  1661. /**
  1662. * ixgbevf_update_stats - Update the board statistics counters.
  1663. * @adapter: board private structure
  1664. **/
  1665. void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
  1666. {
  1667. struct ixgbe_hw *hw = &adapter->hw;
  1668. UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
  1669. adapter->stats.vfgprc);
  1670. UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
  1671. adapter->stats.vfgptc);
  1672. UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
  1673. adapter->stats.last_vfgorc,
  1674. adapter->stats.vfgorc);
  1675. UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
  1676. adapter->stats.last_vfgotc,
  1677. adapter->stats.vfgotc);
  1678. UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
  1679. adapter->stats.vfmprc);
  1680. }
  1681. /**
  1682. * ixgbevf_watchdog - Timer Call-back
  1683. * @data: pointer to adapter cast into an unsigned long
  1684. **/
  1685. static void ixgbevf_watchdog(unsigned long data)
  1686. {
  1687. struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
  1688. struct ixgbe_hw *hw = &adapter->hw;
  1689. u32 eics = 0;
  1690. int i;
  1691. /*
  1692. * Do the watchdog outside of interrupt context due to the lovely
  1693. * delays that some of the newer hardware requires
  1694. */
  1695. if (test_bit(__IXGBEVF_DOWN, &adapter->state))
  1696. goto watchdog_short_circuit;
  1697. /* get one bit for every active tx/rx interrupt vector */
  1698. for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
  1699. struct ixgbevf_q_vector *qv = adapter->q_vector[i];
  1700. if (qv->rx.ring || qv->tx.ring)
  1701. eics |= 1 << i;
  1702. }
  1703. IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
  1704. watchdog_short_circuit:
  1705. schedule_work(&adapter->watchdog_task);
  1706. }
  1707. /**
  1708. * ixgbevf_tx_timeout - Respond to a Tx Hang
  1709. * @netdev: network interface device structure
  1710. **/
  1711. static void ixgbevf_tx_timeout(struct net_device *netdev)
  1712. {
  1713. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1714. /* Do the reset outside of interrupt context */
  1715. schedule_work(&adapter->reset_task);
  1716. }
  1717. static void ixgbevf_reset_task(struct work_struct *work)
  1718. {
  1719. struct ixgbevf_adapter *adapter;
  1720. adapter = container_of(work, struct ixgbevf_adapter, reset_task);
  1721. /* If we're already down or resetting, just bail */
  1722. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  1723. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  1724. return;
  1725. adapter->tx_timeout_count++;
  1726. ixgbevf_reinit_locked(adapter);
  1727. }
  1728. /**
  1729. * ixgbevf_watchdog_task - worker thread to bring link up
  1730. * @work: pointer to work_struct containing our data
  1731. **/
  1732. static void ixgbevf_watchdog_task(struct work_struct *work)
  1733. {
  1734. struct ixgbevf_adapter *adapter = container_of(work,
  1735. struct ixgbevf_adapter,
  1736. watchdog_task);
  1737. struct net_device *netdev = adapter->netdev;
  1738. struct ixgbe_hw *hw = &adapter->hw;
  1739. u32 link_speed = adapter->link_speed;
  1740. bool link_up = adapter->link_up;
  1741. adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
  1742. /*
  1743. * Always check the link on the watchdog because we have
  1744. * no LSC interrupt
  1745. */
  1746. if (hw->mac.ops.check_link) {
  1747. s32 need_reset;
  1748. spin_lock(&adapter->mbx_lock);
  1749. need_reset = hw->mac.ops.check_link(hw, &link_speed,
  1750. &link_up, false);
  1751. spin_unlock(&adapter->mbx_lock);
  1752. if (need_reset) {
  1753. adapter->link_up = link_up;
  1754. adapter->link_speed = link_speed;
  1755. netif_carrier_off(netdev);
  1756. netif_tx_stop_all_queues(netdev);
  1757. schedule_work(&adapter->reset_task);
  1758. goto pf_has_reset;
  1759. }
  1760. } else {
  1761. /* always assume link is up, if no check link
  1762. * function */
  1763. link_speed = IXGBE_LINK_SPEED_10GB_FULL;
  1764. link_up = true;
  1765. }
  1766. adapter->link_up = link_up;
  1767. adapter->link_speed = link_speed;
  1768. if (link_up) {
  1769. if (!netif_carrier_ok(netdev)) {
  1770. hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n",
  1771. (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
  1772. 10 : 1);
  1773. netif_carrier_on(netdev);
  1774. netif_tx_wake_all_queues(netdev);
  1775. }
  1776. } else {
  1777. adapter->link_up = false;
  1778. adapter->link_speed = 0;
  1779. if (netif_carrier_ok(netdev)) {
  1780. hw_dbg(&adapter->hw, "NIC Link is Down\n");
  1781. netif_carrier_off(netdev);
  1782. netif_tx_stop_all_queues(netdev);
  1783. }
  1784. }
  1785. ixgbevf_update_stats(adapter);
  1786. pf_has_reset:
  1787. /* Reset the timer */
  1788. if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
  1789. mod_timer(&adapter->watchdog_timer,
  1790. round_jiffies(jiffies + (2 * HZ)));
  1791. adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
  1792. }
  1793. /**
  1794. * ixgbevf_free_tx_resources - Free Tx Resources per Queue
  1795. * @adapter: board private structure
  1796. * @tx_ring: Tx descriptor ring for a specific queue
  1797. *
  1798. * Free all transmit software resources
  1799. **/
  1800. void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
  1801. struct ixgbevf_ring *tx_ring)
  1802. {
  1803. struct pci_dev *pdev = adapter->pdev;
  1804. ixgbevf_clean_tx_ring(adapter, tx_ring);
  1805. vfree(tx_ring->tx_buffer_info);
  1806. tx_ring->tx_buffer_info = NULL;
  1807. dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
  1808. tx_ring->dma);
  1809. tx_ring->desc = NULL;
  1810. }
  1811. /**
  1812. * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
  1813. * @adapter: board private structure
  1814. *
  1815. * Free all transmit software resources
  1816. **/
  1817. static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
  1818. {
  1819. int i;
  1820. for (i = 0; i < adapter->num_tx_queues; i++)
  1821. if (adapter->tx_ring[i].desc)
  1822. ixgbevf_free_tx_resources(adapter,
  1823. &adapter->tx_ring[i]);
  1824. }
  1825. /**
  1826. * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
  1827. * @adapter: board private structure
  1828. * @tx_ring: tx descriptor ring (for a specific queue) to setup
  1829. *
  1830. * Return 0 on success, negative on failure
  1831. **/
  1832. int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
  1833. struct ixgbevf_ring *tx_ring)
  1834. {
  1835. struct pci_dev *pdev = adapter->pdev;
  1836. int size;
  1837. size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
  1838. tx_ring->tx_buffer_info = vzalloc(size);
  1839. if (!tx_ring->tx_buffer_info)
  1840. goto err;
  1841. /* round up to nearest 4K */
  1842. tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
  1843. tx_ring->size = ALIGN(tx_ring->size, 4096);
  1844. tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
  1845. &tx_ring->dma, GFP_KERNEL);
  1846. if (!tx_ring->desc)
  1847. goto err;
  1848. tx_ring->next_to_use = 0;
  1849. tx_ring->next_to_clean = 0;
  1850. return 0;
  1851. err:
  1852. vfree(tx_ring->tx_buffer_info);
  1853. tx_ring->tx_buffer_info = NULL;
  1854. hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
  1855. "descriptor ring\n");
  1856. return -ENOMEM;
  1857. }
  1858. /**
  1859. * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
  1860. * @adapter: board private structure
  1861. *
  1862. * If this function returns with an error, then it's possible one or
  1863. * more of the rings is populated (while the rest are not). It is the
  1864. * callers duty to clean those orphaned rings.
  1865. *
  1866. * Return 0 on success, negative on failure
  1867. **/
  1868. static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
  1869. {
  1870. int i, err = 0;
  1871. for (i = 0; i < adapter->num_tx_queues; i++) {
  1872. err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1873. if (!err)
  1874. continue;
  1875. hw_dbg(&adapter->hw,
  1876. "Allocation for Tx Queue %u failed\n", i);
  1877. break;
  1878. }
  1879. return err;
  1880. }
  1881. /**
  1882. * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
  1883. * @adapter: board private structure
  1884. * @rx_ring: rx descriptor ring (for a specific queue) to setup
  1885. *
  1886. * Returns 0 on success, negative on failure
  1887. **/
  1888. int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
  1889. struct ixgbevf_ring *rx_ring)
  1890. {
  1891. struct pci_dev *pdev = adapter->pdev;
  1892. int size;
  1893. size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
  1894. rx_ring->rx_buffer_info = vzalloc(size);
  1895. if (!rx_ring->rx_buffer_info)
  1896. goto alloc_failed;
  1897. /* Round up to nearest 4K */
  1898. rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
  1899. rx_ring->size = ALIGN(rx_ring->size, 4096);
  1900. rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
  1901. &rx_ring->dma, GFP_KERNEL);
  1902. if (!rx_ring->desc) {
  1903. hw_dbg(&adapter->hw,
  1904. "Unable to allocate memory for "
  1905. "the receive descriptor ring\n");
  1906. vfree(rx_ring->rx_buffer_info);
  1907. rx_ring->rx_buffer_info = NULL;
  1908. goto alloc_failed;
  1909. }
  1910. rx_ring->next_to_clean = 0;
  1911. rx_ring->next_to_use = 0;
  1912. return 0;
  1913. alloc_failed:
  1914. return -ENOMEM;
  1915. }
  1916. /**
  1917. * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
  1918. * @adapter: board private structure
  1919. *
  1920. * If this function returns with an error, then it's possible one or
  1921. * more of the rings is populated (while the rest are not). It is the
  1922. * callers duty to clean those orphaned rings.
  1923. *
  1924. * Return 0 on success, negative on failure
  1925. **/
  1926. static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
  1927. {
  1928. int i, err = 0;
  1929. for (i = 0; i < adapter->num_rx_queues; i++) {
  1930. err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1931. if (!err)
  1932. continue;
  1933. hw_dbg(&adapter->hw,
  1934. "Allocation for Rx Queue %u failed\n", i);
  1935. break;
  1936. }
  1937. return err;
  1938. }
  1939. /**
  1940. * ixgbevf_free_rx_resources - Free Rx Resources
  1941. * @adapter: board private structure
  1942. * @rx_ring: ring to clean the resources from
  1943. *
  1944. * Free all receive software resources
  1945. **/
  1946. void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
  1947. struct ixgbevf_ring *rx_ring)
  1948. {
  1949. struct pci_dev *pdev = adapter->pdev;
  1950. ixgbevf_clean_rx_ring(adapter, rx_ring);
  1951. vfree(rx_ring->rx_buffer_info);
  1952. rx_ring->rx_buffer_info = NULL;
  1953. dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
  1954. rx_ring->dma);
  1955. rx_ring->desc = NULL;
  1956. }
  1957. /**
  1958. * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
  1959. * @adapter: board private structure
  1960. *
  1961. * Free all receive software resources
  1962. **/
  1963. static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
  1964. {
  1965. int i;
  1966. for (i = 0; i < adapter->num_rx_queues; i++)
  1967. if (adapter->rx_ring[i].desc)
  1968. ixgbevf_free_rx_resources(adapter,
  1969. &adapter->rx_ring[i]);
  1970. }
  1971. /**
  1972. * ixgbevf_open - Called when a network interface is made active
  1973. * @netdev: network interface device structure
  1974. *
  1975. * Returns 0 on success, negative value on failure
  1976. *
  1977. * The open entry point is called when a network interface is made
  1978. * active by the system (IFF_UP). At this point all resources needed
  1979. * for transmit and receive operations are allocated, the interrupt
  1980. * handler is registered with the OS, the watchdog timer is started,
  1981. * and the stack is notified that the interface is ready.
  1982. **/
  1983. static int ixgbevf_open(struct net_device *netdev)
  1984. {
  1985. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1986. struct ixgbe_hw *hw = &adapter->hw;
  1987. int err;
  1988. /* disallow open during test */
  1989. if (test_bit(__IXGBEVF_TESTING, &adapter->state))
  1990. return -EBUSY;
  1991. if (hw->adapter_stopped) {
  1992. ixgbevf_reset(adapter);
  1993. /* if adapter is still stopped then PF isn't up and
  1994. * the vf can't start. */
  1995. if (hw->adapter_stopped) {
  1996. err = IXGBE_ERR_MBX;
  1997. pr_err("Unable to start - perhaps the PF Driver isn't "
  1998. "up yet\n");
  1999. goto err_setup_reset;
  2000. }
  2001. }
  2002. ixgbevf_negotiate_api(adapter);
  2003. /* allocate transmit descriptors */
  2004. err = ixgbevf_setup_all_tx_resources(adapter);
  2005. if (err)
  2006. goto err_setup_tx;
  2007. /* allocate receive descriptors */
  2008. err = ixgbevf_setup_all_rx_resources(adapter);
  2009. if (err)
  2010. goto err_setup_rx;
  2011. ixgbevf_configure(adapter);
  2012. /*
  2013. * Map the Tx/Rx rings to the vectors we were allotted.
  2014. * if request_irq will be called in this function map_rings
  2015. * must be called *before* up_complete
  2016. */
  2017. ixgbevf_map_rings_to_vectors(adapter);
  2018. ixgbevf_up_complete(adapter);
  2019. /* clear any pending interrupts, may auto mask */
  2020. IXGBE_READ_REG(hw, IXGBE_VTEICR);
  2021. err = ixgbevf_request_irq(adapter);
  2022. if (err)
  2023. goto err_req_irq;
  2024. ixgbevf_irq_enable(adapter);
  2025. return 0;
  2026. err_req_irq:
  2027. ixgbevf_down(adapter);
  2028. ixgbevf_free_irq(adapter);
  2029. err_setup_rx:
  2030. ixgbevf_free_all_rx_resources(adapter);
  2031. err_setup_tx:
  2032. ixgbevf_free_all_tx_resources(adapter);
  2033. ixgbevf_reset(adapter);
  2034. err_setup_reset:
  2035. return err;
  2036. }
  2037. /**
  2038. * ixgbevf_close - Disables a network interface
  2039. * @netdev: network interface device structure
  2040. *
  2041. * Returns 0, this is not allowed to fail
  2042. *
  2043. * The close entry point is called when an interface is de-activated
  2044. * by the OS. The hardware is still under the drivers control, but
  2045. * needs to be disabled. A global MAC reset is issued to stop the
  2046. * hardware, and all transmit and receive resources are freed.
  2047. **/
  2048. static int ixgbevf_close(struct net_device *netdev)
  2049. {
  2050. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2051. ixgbevf_down(adapter);
  2052. ixgbevf_free_irq(adapter);
  2053. ixgbevf_free_all_tx_resources(adapter);
  2054. ixgbevf_free_all_rx_resources(adapter);
  2055. return 0;
  2056. }
  2057. static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
  2058. u32 vlan_macip_lens, u32 type_tucmd,
  2059. u32 mss_l4len_idx)
  2060. {
  2061. struct ixgbe_adv_tx_context_desc *context_desc;
  2062. u16 i = tx_ring->next_to_use;
  2063. context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
  2064. i++;
  2065. tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
  2066. /* set bits to identify this as an advanced context descriptor */
  2067. type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
  2068. context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
  2069. context_desc->seqnum_seed = 0;
  2070. context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
  2071. context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
  2072. }
  2073. static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
  2074. struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
  2075. {
  2076. u32 vlan_macip_lens, type_tucmd;
  2077. u32 mss_l4len_idx, l4len;
  2078. if (!skb_is_gso(skb))
  2079. return 0;
  2080. if (skb_header_cloned(skb)) {
  2081. int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2082. if (err)
  2083. return err;
  2084. }
  2085. /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
  2086. type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
  2087. if (skb->protocol == htons(ETH_P_IP)) {
  2088. struct iphdr *iph = ip_hdr(skb);
  2089. iph->tot_len = 0;
  2090. iph->check = 0;
  2091. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  2092. iph->daddr, 0,
  2093. IPPROTO_TCP,
  2094. 0);
  2095. type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
  2096. } else if (skb_is_gso_v6(skb)) {
  2097. ipv6_hdr(skb)->payload_len = 0;
  2098. tcp_hdr(skb)->check =
  2099. ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  2100. &ipv6_hdr(skb)->daddr,
  2101. 0, IPPROTO_TCP, 0);
  2102. }
  2103. /* compute header lengths */
  2104. l4len = tcp_hdrlen(skb);
  2105. *hdr_len += l4len;
  2106. *hdr_len = skb_transport_offset(skb) + l4len;
  2107. /* mss_l4len_id: use 1 as index for TSO */
  2108. mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
  2109. mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
  2110. mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
  2111. /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
  2112. vlan_macip_lens = skb_network_header_len(skb);
  2113. vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
  2114. vlan_macip_lens |= tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
  2115. ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
  2116. type_tucmd, mss_l4len_idx);
  2117. return 1;
  2118. }
  2119. static bool ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
  2120. struct sk_buff *skb, u32 tx_flags)
  2121. {
  2122. u32 vlan_macip_lens = 0;
  2123. u32 mss_l4len_idx = 0;
  2124. u32 type_tucmd = 0;
  2125. if (skb->ip_summed == CHECKSUM_PARTIAL) {
  2126. u8 l4_hdr = 0;
  2127. switch (skb->protocol) {
  2128. case __constant_htons(ETH_P_IP):
  2129. vlan_macip_lens |= skb_network_header_len(skb);
  2130. type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
  2131. l4_hdr = ip_hdr(skb)->protocol;
  2132. break;
  2133. case __constant_htons(ETH_P_IPV6):
  2134. vlan_macip_lens |= skb_network_header_len(skb);
  2135. l4_hdr = ipv6_hdr(skb)->nexthdr;
  2136. break;
  2137. default:
  2138. if (unlikely(net_ratelimit())) {
  2139. dev_warn(tx_ring->dev,
  2140. "partial checksum but proto=%x!\n",
  2141. skb->protocol);
  2142. }
  2143. break;
  2144. }
  2145. switch (l4_hdr) {
  2146. case IPPROTO_TCP:
  2147. type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
  2148. mss_l4len_idx = tcp_hdrlen(skb) <<
  2149. IXGBE_ADVTXD_L4LEN_SHIFT;
  2150. break;
  2151. case IPPROTO_SCTP:
  2152. type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
  2153. mss_l4len_idx = sizeof(struct sctphdr) <<
  2154. IXGBE_ADVTXD_L4LEN_SHIFT;
  2155. break;
  2156. case IPPROTO_UDP:
  2157. mss_l4len_idx = sizeof(struct udphdr) <<
  2158. IXGBE_ADVTXD_L4LEN_SHIFT;
  2159. break;
  2160. default:
  2161. if (unlikely(net_ratelimit())) {
  2162. dev_warn(tx_ring->dev,
  2163. "partial checksum but l4 proto=%x!\n",
  2164. l4_hdr);
  2165. }
  2166. break;
  2167. }
  2168. }
  2169. /* vlan_macip_lens: MACLEN, VLAN tag */
  2170. vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
  2171. vlan_macip_lens |= tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
  2172. ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
  2173. type_tucmd, mss_l4len_idx);
  2174. return (skb->ip_summed == CHECKSUM_PARTIAL);
  2175. }
  2176. static int ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
  2177. struct sk_buff *skb, u32 tx_flags,
  2178. unsigned int first)
  2179. {
  2180. struct ixgbevf_tx_buffer *tx_buffer_info;
  2181. unsigned int len;
  2182. unsigned int total = skb->len;
  2183. unsigned int offset = 0, size;
  2184. int count = 0;
  2185. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  2186. unsigned int f;
  2187. int i;
  2188. i = tx_ring->next_to_use;
  2189. len = min(skb_headlen(skb), total);
  2190. while (len) {
  2191. tx_buffer_info = &tx_ring->tx_buffer_info[i];
  2192. size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
  2193. tx_buffer_info->length = size;
  2194. tx_buffer_info->mapped_as_page = false;
  2195. tx_buffer_info->dma = dma_map_single(tx_ring->dev,
  2196. skb->data + offset,
  2197. size, DMA_TO_DEVICE);
  2198. if (dma_mapping_error(tx_ring->dev, tx_buffer_info->dma))
  2199. goto dma_error;
  2200. tx_buffer_info->next_to_watch = i;
  2201. len -= size;
  2202. total -= size;
  2203. offset += size;
  2204. count++;
  2205. i++;
  2206. if (i == tx_ring->count)
  2207. i = 0;
  2208. }
  2209. for (f = 0; f < nr_frags; f++) {
  2210. const struct skb_frag_struct *frag;
  2211. frag = &skb_shinfo(skb)->frags[f];
  2212. len = min((unsigned int)skb_frag_size(frag), total);
  2213. offset = 0;
  2214. while (len) {
  2215. tx_buffer_info = &tx_ring->tx_buffer_info[i];
  2216. size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
  2217. tx_buffer_info->length = size;
  2218. tx_buffer_info->dma =
  2219. skb_frag_dma_map(tx_ring->dev, frag,
  2220. offset, size, DMA_TO_DEVICE);
  2221. tx_buffer_info->mapped_as_page = true;
  2222. if (dma_mapping_error(tx_ring->dev,
  2223. tx_buffer_info->dma))
  2224. goto dma_error;
  2225. tx_buffer_info->next_to_watch = i;
  2226. len -= size;
  2227. total -= size;
  2228. offset += size;
  2229. count++;
  2230. i++;
  2231. if (i == tx_ring->count)
  2232. i = 0;
  2233. }
  2234. if (total == 0)
  2235. break;
  2236. }
  2237. if (i == 0)
  2238. i = tx_ring->count - 1;
  2239. else
  2240. i = i - 1;
  2241. tx_ring->tx_buffer_info[i].skb = skb;
  2242. tx_ring->tx_buffer_info[first].next_to_watch = i;
  2243. tx_ring->tx_buffer_info[first].time_stamp = jiffies;
  2244. return count;
  2245. dma_error:
  2246. dev_err(tx_ring->dev, "TX DMA map failed\n");
  2247. /* clear timestamp and dma mappings for failed tx_buffer_info map */
  2248. tx_buffer_info->dma = 0;
  2249. tx_buffer_info->next_to_watch = 0;
  2250. count--;
  2251. /* clear timestamp and dma mappings for remaining portion of packet */
  2252. while (count >= 0) {
  2253. count--;
  2254. i--;
  2255. if (i < 0)
  2256. i += tx_ring->count;
  2257. tx_buffer_info = &tx_ring->tx_buffer_info[i];
  2258. ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
  2259. }
  2260. return count;
  2261. }
  2262. static void ixgbevf_tx_queue(struct ixgbevf_ring *tx_ring, int tx_flags,
  2263. int count, u32 paylen, u8 hdr_len)
  2264. {
  2265. union ixgbe_adv_tx_desc *tx_desc = NULL;
  2266. struct ixgbevf_tx_buffer *tx_buffer_info;
  2267. u32 olinfo_status = 0, cmd_type_len = 0;
  2268. unsigned int i;
  2269. u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
  2270. cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
  2271. cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
  2272. if (tx_flags & IXGBE_TX_FLAGS_VLAN)
  2273. cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
  2274. if (tx_flags & IXGBE_TX_FLAGS_CSUM)
  2275. olinfo_status |= IXGBE_ADVTXD_POPTS_TXSM;
  2276. if (tx_flags & IXGBE_TX_FLAGS_TSO) {
  2277. cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
  2278. /* use index 1 context for tso */
  2279. olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
  2280. if (tx_flags & IXGBE_TX_FLAGS_IPV4)
  2281. olinfo_status |= IXGBE_ADVTXD_POPTS_IXSM;
  2282. }
  2283. /*
  2284. * Check Context must be set if Tx switch is enabled, which it
  2285. * always is for case where virtual functions are running
  2286. */
  2287. olinfo_status |= IXGBE_ADVTXD_CC;
  2288. olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
  2289. i = tx_ring->next_to_use;
  2290. while (count--) {
  2291. tx_buffer_info = &tx_ring->tx_buffer_info[i];
  2292. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  2293. tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
  2294. tx_desc->read.cmd_type_len =
  2295. cpu_to_le32(cmd_type_len | tx_buffer_info->length);
  2296. tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
  2297. i++;
  2298. if (i == tx_ring->count)
  2299. i = 0;
  2300. }
  2301. tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
  2302. tx_ring->next_to_use = i;
  2303. }
  2304. static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
  2305. {
  2306. struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev);
  2307. netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
  2308. /* Herbert's original patch had:
  2309. * smp_mb__after_netif_stop_queue();
  2310. * but since that doesn't exist yet, just open code it. */
  2311. smp_mb();
  2312. /* We need to check again in a case another CPU has just
  2313. * made room available. */
  2314. if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
  2315. return -EBUSY;
  2316. /* A reprieve! - use start_queue because it doesn't call schedule */
  2317. netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
  2318. ++adapter->restart_queue;
  2319. return 0;
  2320. }
  2321. static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
  2322. {
  2323. if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
  2324. return 0;
  2325. return __ixgbevf_maybe_stop_tx(tx_ring, size);
  2326. }
  2327. static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2328. {
  2329. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2330. struct ixgbevf_ring *tx_ring;
  2331. unsigned int first;
  2332. unsigned int tx_flags = 0;
  2333. u8 hdr_len = 0;
  2334. int r_idx = 0, tso;
  2335. u16 count = TXD_USE_COUNT(skb_headlen(skb));
  2336. #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
  2337. unsigned short f;
  2338. #endif
  2339. tx_ring = &adapter->tx_ring[r_idx];
  2340. /*
  2341. * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
  2342. * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
  2343. * + 2 desc gap to keep tail from touching head,
  2344. * + 1 desc for context descriptor,
  2345. * otherwise try next time
  2346. */
  2347. #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
  2348. for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
  2349. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
  2350. #else
  2351. count += skb_shinfo(skb)->nr_frags;
  2352. #endif
  2353. if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
  2354. adapter->tx_busy++;
  2355. return NETDEV_TX_BUSY;
  2356. }
  2357. if (vlan_tx_tag_present(skb)) {
  2358. tx_flags |= vlan_tx_tag_get(skb);
  2359. tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
  2360. tx_flags |= IXGBE_TX_FLAGS_VLAN;
  2361. }
  2362. first = tx_ring->next_to_use;
  2363. if (skb->protocol == htons(ETH_P_IP))
  2364. tx_flags |= IXGBE_TX_FLAGS_IPV4;
  2365. tso = ixgbevf_tso(tx_ring, skb, tx_flags, &hdr_len);
  2366. if (tso < 0) {
  2367. dev_kfree_skb_any(skb);
  2368. return NETDEV_TX_OK;
  2369. }
  2370. if (tso)
  2371. tx_flags |= IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_CSUM;
  2372. else if (ixgbevf_tx_csum(tx_ring, skb, tx_flags))
  2373. tx_flags |= IXGBE_TX_FLAGS_CSUM;
  2374. ixgbevf_tx_queue(tx_ring, tx_flags,
  2375. ixgbevf_tx_map(tx_ring, skb, tx_flags, first),
  2376. skb->len, hdr_len);
  2377. /*
  2378. * Force memory writes to complete before letting h/w
  2379. * know there are new descriptors to fetch. (Only
  2380. * applicable for weak-ordered memory model archs,
  2381. * such as IA-64).
  2382. */
  2383. wmb();
  2384. writel(tx_ring->next_to_use, adapter->hw.hw_addr + tx_ring->tail);
  2385. ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
  2386. return NETDEV_TX_OK;
  2387. }
  2388. /**
  2389. * ixgbevf_set_mac - Change the Ethernet Address of the NIC
  2390. * @netdev: network interface device structure
  2391. * @p: pointer to an address structure
  2392. *
  2393. * Returns 0 on success, negative on failure
  2394. **/
  2395. static int ixgbevf_set_mac(struct net_device *netdev, void *p)
  2396. {
  2397. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2398. struct ixgbe_hw *hw = &adapter->hw;
  2399. struct sockaddr *addr = p;
  2400. if (!is_valid_ether_addr(addr->sa_data))
  2401. return -EADDRNOTAVAIL;
  2402. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  2403. memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
  2404. spin_lock(&adapter->mbx_lock);
  2405. if (hw->mac.ops.set_rar)
  2406. hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
  2407. spin_unlock(&adapter->mbx_lock);
  2408. return 0;
  2409. }
  2410. /**
  2411. * ixgbevf_change_mtu - Change the Maximum Transfer Unit
  2412. * @netdev: network interface device structure
  2413. * @new_mtu: new value for maximum frame size
  2414. *
  2415. * Returns 0 on success, negative on failure
  2416. **/
  2417. static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
  2418. {
  2419. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2420. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
  2421. int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
  2422. if (adapter->hw.mac.type == ixgbe_mac_X540_vf)
  2423. max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
  2424. /* MTU < 68 is an error and causes problems on some kernels */
  2425. if ((new_mtu < 68) || (max_frame > max_possible_frame))
  2426. return -EINVAL;
  2427. hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
  2428. netdev->mtu, new_mtu);
  2429. /* must set new MTU before calling down or up */
  2430. netdev->mtu = new_mtu;
  2431. if (netif_running(netdev))
  2432. ixgbevf_reinit_locked(adapter);
  2433. return 0;
  2434. }
  2435. static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
  2436. {
  2437. struct net_device *netdev = pci_get_drvdata(pdev);
  2438. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2439. #ifdef CONFIG_PM
  2440. int retval = 0;
  2441. #endif
  2442. netif_device_detach(netdev);
  2443. if (netif_running(netdev)) {
  2444. rtnl_lock();
  2445. ixgbevf_down(adapter);
  2446. ixgbevf_free_irq(adapter);
  2447. ixgbevf_free_all_tx_resources(adapter);
  2448. ixgbevf_free_all_rx_resources(adapter);
  2449. rtnl_unlock();
  2450. }
  2451. ixgbevf_clear_interrupt_scheme(adapter);
  2452. #ifdef CONFIG_PM
  2453. retval = pci_save_state(pdev);
  2454. if (retval)
  2455. return retval;
  2456. #endif
  2457. pci_disable_device(pdev);
  2458. return 0;
  2459. }
  2460. #ifdef CONFIG_PM
  2461. static int ixgbevf_resume(struct pci_dev *pdev)
  2462. {
  2463. struct ixgbevf_adapter *adapter = pci_get_drvdata(pdev);
  2464. struct net_device *netdev = adapter->netdev;
  2465. u32 err;
  2466. pci_set_power_state(pdev, PCI_D0);
  2467. pci_restore_state(pdev);
  2468. /*
  2469. * pci_restore_state clears dev->state_saved so call
  2470. * pci_save_state to restore it.
  2471. */
  2472. pci_save_state(pdev);
  2473. err = pci_enable_device_mem(pdev);
  2474. if (err) {
  2475. dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
  2476. return err;
  2477. }
  2478. pci_set_master(pdev);
  2479. rtnl_lock();
  2480. err = ixgbevf_init_interrupt_scheme(adapter);
  2481. rtnl_unlock();
  2482. if (err) {
  2483. dev_err(&pdev->dev, "Cannot initialize interrupts\n");
  2484. return err;
  2485. }
  2486. ixgbevf_reset(adapter);
  2487. if (netif_running(netdev)) {
  2488. err = ixgbevf_open(netdev);
  2489. if (err)
  2490. return err;
  2491. }
  2492. netif_device_attach(netdev);
  2493. return err;
  2494. }
  2495. #endif /* CONFIG_PM */
  2496. static void ixgbevf_shutdown(struct pci_dev *pdev)
  2497. {
  2498. ixgbevf_suspend(pdev, PMSG_SUSPEND);
  2499. }
  2500. static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
  2501. struct rtnl_link_stats64 *stats)
  2502. {
  2503. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2504. unsigned int start;
  2505. u64 bytes, packets;
  2506. const struct ixgbevf_ring *ring;
  2507. int i;
  2508. ixgbevf_update_stats(adapter);
  2509. stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
  2510. for (i = 0; i < adapter->num_rx_queues; i++) {
  2511. ring = &adapter->rx_ring[i];
  2512. do {
  2513. start = u64_stats_fetch_begin_bh(&ring->syncp);
  2514. bytes = ring->total_bytes;
  2515. packets = ring->total_packets;
  2516. } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
  2517. stats->rx_bytes += bytes;
  2518. stats->rx_packets += packets;
  2519. }
  2520. for (i = 0; i < adapter->num_tx_queues; i++) {
  2521. ring = &adapter->tx_ring[i];
  2522. do {
  2523. start = u64_stats_fetch_begin_bh(&ring->syncp);
  2524. bytes = ring->total_bytes;
  2525. packets = ring->total_packets;
  2526. } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
  2527. stats->tx_bytes += bytes;
  2528. stats->tx_packets += packets;
  2529. }
  2530. return stats;
  2531. }
  2532. static const struct net_device_ops ixgbevf_netdev_ops = {
  2533. .ndo_open = ixgbevf_open,
  2534. .ndo_stop = ixgbevf_close,
  2535. .ndo_start_xmit = ixgbevf_xmit_frame,
  2536. .ndo_set_rx_mode = ixgbevf_set_rx_mode,
  2537. .ndo_get_stats64 = ixgbevf_get_stats,
  2538. .ndo_validate_addr = eth_validate_addr,
  2539. .ndo_set_mac_address = ixgbevf_set_mac,
  2540. .ndo_change_mtu = ixgbevf_change_mtu,
  2541. .ndo_tx_timeout = ixgbevf_tx_timeout,
  2542. .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
  2543. .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
  2544. };
  2545. static void ixgbevf_assign_netdev_ops(struct net_device *dev)
  2546. {
  2547. dev->netdev_ops = &ixgbevf_netdev_ops;
  2548. ixgbevf_set_ethtool_ops(dev);
  2549. dev->watchdog_timeo = 5 * HZ;
  2550. }
  2551. /**
  2552. * ixgbevf_probe - Device Initialization Routine
  2553. * @pdev: PCI device information struct
  2554. * @ent: entry in ixgbevf_pci_tbl
  2555. *
  2556. * Returns 0 on success, negative on failure
  2557. *
  2558. * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
  2559. * The OS initialization, configuring of the adapter private structure,
  2560. * and a hardware reset occur.
  2561. **/
  2562. static int __devinit ixgbevf_probe(struct pci_dev *pdev,
  2563. const struct pci_device_id *ent)
  2564. {
  2565. struct net_device *netdev;
  2566. struct ixgbevf_adapter *adapter = NULL;
  2567. struct ixgbe_hw *hw = NULL;
  2568. const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
  2569. static int cards_found;
  2570. int err, pci_using_dac;
  2571. err = pci_enable_device(pdev);
  2572. if (err)
  2573. return err;
  2574. if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
  2575. !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
  2576. pci_using_dac = 1;
  2577. } else {
  2578. err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
  2579. if (err) {
  2580. err = dma_set_coherent_mask(&pdev->dev,
  2581. DMA_BIT_MASK(32));
  2582. if (err) {
  2583. dev_err(&pdev->dev, "No usable DMA "
  2584. "configuration, aborting\n");
  2585. goto err_dma;
  2586. }
  2587. }
  2588. pci_using_dac = 0;
  2589. }
  2590. err = pci_request_regions(pdev, ixgbevf_driver_name);
  2591. if (err) {
  2592. dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
  2593. goto err_pci_reg;
  2594. }
  2595. pci_set_master(pdev);
  2596. netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
  2597. MAX_TX_QUEUES);
  2598. if (!netdev) {
  2599. err = -ENOMEM;
  2600. goto err_alloc_etherdev;
  2601. }
  2602. SET_NETDEV_DEV(netdev, &pdev->dev);
  2603. pci_set_drvdata(pdev, netdev);
  2604. adapter = netdev_priv(netdev);
  2605. adapter->netdev = netdev;
  2606. adapter->pdev = pdev;
  2607. hw = &adapter->hw;
  2608. hw->back = adapter;
  2609. adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  2610. /*
  2611. * call save state here in standalone driver because it relies on
  2612. * adapter struct to exist, and needs to call netdev_priv
  2613. */
  2614. pci_save_state(pdev);
  2615. hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
  2616. pci_resource_len(pdev, 0));
  2617. if (!hw->hw_addr) {
  2618. err = -EIO;
  2619. goto err_ioremap;
  2620. }
  2621. ixgbevf_assign_netdev_ops(netdev);
  2622. adapter->bd_number = cards_found;
  2623. /* Setup hw api */
  2624. memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
  2625. hw->mac.type = ii->mac;
  2626. memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
  2627. sizeof(struct ixgbe_mbx_operations));
  2628. /* setup the private structure */
  2629. err = ixgbevf_sw_init(adapter);
  2630. if (err)
  2631. goto err_sw_init;
  2632. /* The HW MAC address was set and/or determined in sw_init */
  2633. memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
  2634. if (!is_valid_ether_addr(netdev->dev_addr)) {
  2635. pr_err("invalid MAC address\n");
  2636. err = -EIO;
  2637. goto err_sw_init;
  2638. }
  2639. netdev->hw_features = NETIF_F_SG |
  2640. NETIF_F_IP_CSUM |
  2641. NETIF_F_IPV6_CSUM |
  2642. NETIF_F_TSO |
  2643. NETIF_F_TSO6 |
  2644. NETIF_F_RXCSUM;
  2645. netdev->features = netdev->hw_features |
  2646. NETIF_F_HW_VLAN_TX |
  2647. NETIF_F_HW_VLAN_RX |
  2648. NETIF_F_HW_VLAN_FILTER;
  2649. netdev->vlan_features |= NETIF_F_TSO;
  2650. netdev->vlan_features |= NETIF_F_TSO6;
  2651. netdev->vlan_features |= NETIF_F_IP_CSUM;
  2652. netdev->vlan_features |= NETIF_F_IPV6_CSUM;
  2653. netdev->vlan_features |= NETIF_F_SG;
  2654. if (pci_using_dac)
  2655. netdev->features |= NETIF_F_HIGHDMA;
  2656. netdev->priv_flags |= IFF_UNICAST_FLT;
  2657. init_timer(&adapter->watchdog_timer);
  2658. adapter->watchdog_timer.function = ixgbevf_watchdog;
  2659. adapter->watchdog_timer.data = (unsigned long)adapter;
  2660. INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
  2661. INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
  2662. err = ixgbevf_init_interrupt_scheme(adapter);
  2663. if (err)
  2664. goto err_sw_init;
  2665. /* pick up the PCI bus settings for reporting later */
  2666. if (hw->mac.ops.get_bus_info)
  2667. hw->mac.ops.get_bus_info(hw);
  2668. strcpy(netdev->name, "eth%d");
  2669. err = register_netdev(netdev);
  2670. if (err)
  2671. goto err_register;
  2672. netif_carrier_off(netdev);
  2673. ixgbevf_init_last_counter_stats(adapter);
  2674. /* print the MAC address */
  2675. hw_dbg(hw, "%pM\n", netdev->dev_addr);
  2676. hw_dbg(hw, "MAC: %d\n", hw->mac.type);
  2677. hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
  2678. cards_found++;
  2679. return 0;
  2680. err_register:
  2681. ixgbevf_clear_interrupt_scheme(adapter);
  2682. err_sw_init:
  2683. ixgbevf_reset_interrupt_capability(adapter);
  2684. iounmap(hw->hw_addr);
  2685. err_ioremap:
  2686. free_netdev(netdev);
  2687. err_alloc_etherdev:
  2688. pci_release_regions(pdev);
  2689. err_pci_reg:
  2690. err_dma:
  2691. pci_disable_device(pdev);
  2692. return err;
  2693. }
  2694. /**
  2695. * ixgbevf_remove - Device Removal Routine
  2696. * @pdev: PCI device information struct
  2697. *
  2698. * ixgbevf_remove is called by the PCI subsystem to alert the driver
  2699. * that it should release a PCI device. The could be caused by a
  2700. * Hot-Plug event, or because the driver is going to be removed from
  2701. * memory.
  2702. **/
  2703. static void __devexit ixgbevf_remove(struct pci_dev *pdev)
  2704. {
  2705. struct net_device *netdev = pci_get_drvdata(pdev);
  2706. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2707. set_bit(__IXGBEVF_DOWN, &adapter->state);
  2708. del_timer_sync(&adapter->watchdog_timer);
  2709. cancel_work_sync(&adapter->reset_task);
  2710. cancel_work_sync(&adapter->watchdog_task);
  2711. if (netdev->reg_state == NETREG_REGISTERED)
  2712. unregister_netdev(netdev);
  2713. ixgbevf_clear_interrupt_scheme(adapter);
  2714. ixgbevf_reset_interrupt_capability(adapter);
  2715. iounmap(adapter->hw.hw_addr);
  2716. pci_release_regions(pdev);
  2717. hw_dbg(&adapter->hw, "Remove complete\n");
  2718. kfree(adapter->tx_ring);
  2719. kfree(adapter->rx_ring);
  2720. free_netdev(netdev);
  2721. pci_disable_device(pdev);
  2722. }
  2723. /**
  2724. * ixgbevf_io_error_detected - called when PCI error is detected
  2725. * @pdev: Pointer to PCI device
  2726. * @state: The current pci connection state
  2727. *
  2728. * This function is called after a PCI bus error affecting
  2729. * this device has been detected.
  2730. */
  2731. static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
  2732. pci_channel_state_t state)
  2733. {
  2734. struct net_device *netdev = pci_get_drvdata(pdev);
  2735. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2736. netif_device_detach(netdev);
  2737. if (state == pci_channel_io_perm_failure)
  2738. return PCI_ERS_RESULT_DISCONNECT;
  2739. if (netif_running(netdev))
  2740. ixgbevf_down(adapter);
  2741. pci_disable_device(pdev);
  2742. /* Request a slot slot reset. */
  2743. return PCI_ERS_RESULT_NEED_RESET;
  2744. }
  2745. /**
  2746. * ixgbevf_io_slot_reset - called after the pci bus has been reset.
  2747. * @pdev: Pointer to PCI device
  2748. *
  2749. * Restart the card from scratch, as if from a cold-boot. Implementation
  2750. * resembles the first-half of the ixgbevf_resume routine.
  2751. */
  2752. static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
  2753. {
  2754. struct net_device *netdev = pci_get_drvdata(pdev);
  2755. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2756. if (pci_enable_device_mem(pdev)) {
  2757. dev_err(&pdev->dev,
  2758. "Cannot re-enable PCI device after reset.\n");
  2759. return PCI_ERS_RESULT_DISCONNECT;
  2760. }
  2761. pci_set_master(pdev);
  2762. ixgbevf_reset(adapter);
  2763. return PCI_ERS_RESULT_RECOVERED;
  2764. }
  2765. /**
  2766. * ixgbevf_io_resume - called when traffic can start flowing again.
  2767. * @pdev: Pointer to PCI device
  2768. *
  2769. * This callback is called when the error recovery driver tells us that
  2770. * its OK to resume normal operation. Implementation resembles the
  2771. * second-half of the ixgbevf_resume routine.
  2772. */
  2773. static void ixgbevf_io_resume(struct pci_dev *pdev)
  2774. {
  2775. struct net_device *netdev = pci_get_drvdata(pdev);
  2776. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2777. if (netif_running(netdev))
  2778. ixgbevf_up(adapter);
  2779. netif_device_attach(netdev);
  2780. }
  2781. /* PCI Error Recovery (ERS) */
  2782. static struct pci_error_handlers ixgbevf_err_handler = {
  2783. .error_detected = ixgbevf_io_error_detected,
  2784. .slot_reset = ixgbevf_io_slot_reset,
  2785. .resume = ixgbevf_io_resume,
  2786. };
  2787. static struct pci_driver ixgbevf_driver = {
  2788. .name = ixgbevf_driver_name,
  2789. .id_table = ixgbevf_pci_tbl,
  2790. .probe = ixgbevf_probe,
  2791. .remove = __devexit_p(ixgbevf_remove),
  2792. #ifdef CONFIG_PM
  2793. /* Power Management Hooks */
  2794. .suspend = ixgbevf_suspend,
  2795. .resume = ixgbevf_resume,
  2796. #endif
  2797. .shutdown = ixgbevf_shutdown,
  2798. .err_handler = &ixgbevf_err_handler
  2799. };
  2800. /**
  2801. * ixgbevf_init_module - Driver Registration Routine
  2802. *
  2803. * ixgbevf_init_module is the first routine called when the driver is
  2804. * loaded. All it does is register with the PCI subsystem.
  2805. **/
  2806. static int __init ixgbevf_init_module(void)
  2807. {
  2808. int ret;
  2809. pr_info("%s - version %s\n", ixgbevf_driver_string,
  2810. ixgbevf_driver_version);
  2811. pr_info("%s\n", ixgbevf_copyright);
  2812. ret = pci_register_driver(&ixgbevf_driver);
  2813. return ret;
  2814. }
  2815. module_init(ixgbevf_init_module);
  2816. /**
  2817. * ixgbevf_exit_module - Driver Exit Cleanup Routine
  2818. *
  2819. * ixgbevf_exit_module is called just before the driver is removed
  2820. * from memory.
  2821. **/
  2822. static void __exit ixgbevf_exit_module(void)
  2823. {
  2824. pci_unregister_driver(&ixgbevf_driver);
  2825. }
  2826. #ifdef DEBUG
  2827. /**
  2828. * ixgbevf_get_hw_dev_name - return device name string
  2829. * used by hardware layer to print debugging information
  2830. **/
  2831. char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
  2832. {
  2833. struct ixgbevf_adapter *adapter = hw->back;
  2834. return adapter->netdev->name;
  2835. }
  2836. #endif
  2837. module_exit(ixgbevf_exit_module);
  2838. /* ixgbevf_main.c */