setup.c 13 KB

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  1. /*
  2. * Copyright (C) 2009 Renesas Solutions Corp.
  3. *
  4. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/io.h>
  17. #include <linux/delay.h>
  18. #include <linux/usb/r8a66597.h>
  19. #include <video/sh_mobile_lcdc.h>
  20. #include <media/sh_mobile_ceu.h>
  21. #include <asm/heartbeat.h>
  22. #include <asm/sh_eth.h>
  23. #include <cpu/sh7724.h>
  24. /*
  25. * Address Interface BusWidth
  26. *-----------------------------------------
  27. * 0x0000_0000 uboot 16bit
  28. * 0x0004_0000 Linux romImage 16bit
  29. * 0x0014_0000 MTD for Linux 16bit
  30. * 0x0400_0000 Internal I/O 16/32bit
  31. * 0x0800_0000 DRAM 32bit
  32. * 0x1800_0000 MFI 16bit
  33. */
  34. /* Heartbeat */
  35. static unsigned char led_pos[] = { 0, 1, 2, 3 };
  36. static struct heartbeat_data heartbeat_data = {
  37. .regsize = 8,
  38. .nr_bits = 4,
  39. .bit_pos = led_pos,
  40. };
  41. static struct resource heartbeat_resources[] = {
  42. [0] = {
  43. .start = 0xA405012C, /* PTG */
  44. .end = 0xA405012E - 1,
  45. .flags = IORESOURCE_MEM,
  46. },
  47. };
  48. static struct platform_device heartbeat_device = {
  49. .name = "heartbeat",
  50. .id = -1,
  51. .dev = {
  52. .platform_data = &heartbeat_data,
  53. },
  54. .num_resources = ARRAY_SIZE(heartbeat_resources),
  55. .resource = heartbeat_resources,
  56. };
  57. /* MTD */
  58. static struct mtd_partition nor_flash_partitions[] = {
  59. {
  60. .name = "boot loader",
  61. .offset = 0,
  62. .size = (5 * 1024 * 1024),
  63. .mask_flags = MTD_CAP_ROM,
  64. }, {
  65. .name = "free-area",
  66. .offset = MTDPART_OFS_APPEND,
  67. .size = MTDPART_SIZ_FULL,
  68. },
  69. };
  70. static struct physmap_flash_data nor_flash_data = {
  71. .width = 2,
  72. .parts = nor_flash_partitions,
  73. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  74. };
  75. static struct resource nor_flash_resources[] = {
  76. [0] = {
  77. .name = "NOR Flash",
  78. .start = 0x00000000,
  79. .end = 0x03ffffff,
  80. .flags = IORESOURCE_MEM,
  81. }
  82. };
  83. static struct platform_device nor_flash_device = {
  84. .name = "physmap-flash",
  85. .resource = nor_flash_resources,
  86. .num_resources = ARRAY_SIZE(nor_flash_resources),
  87. .dev = {
  88. .platform_data = &nor_flash_data,
  89. },
  90. };
  91. /* SH Eth */
  92. #define SH_ETH_ADDR (0xA4600000)
  93. #define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0)
  94. #define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8)
  95. static struct resource sh_eth_resources[] = {
  96. [0] = {
  97. .start = SH_ETH_ADDR,
  98. .end = SH_ETH_ADDR + 0x1FC,
  99. .flags = IORESOURCE_MEM,
  100. },
  101. [1] = {
  102. .start = 91,
  103. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  104. },
  105. };
  106. struct sh_eth_plat_data sh_eth_plat = {
  107. .phy = 0x1f, /* SMSC LAN8700 */
  108. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  109. };
  110. static struct platform_device sh_eth_device = {
  111. .name = "sh-eth",
  112. .id = 0,
  113. .dev = {
  114. .platform_data = &sh_eth_plat,
  115. },
  116. .num_resources = ARRAY_SIZE(sh_eth_resources),
  117. .resource = sh_eth_resources,
  118. };
  119. /* USB0 host */
  120. void usb0_port_power(int port, int power)
  121. {
  122. gpio_set_value(GPIO_PTB4, power);
  123. }
  124. static struct r8a66597_platdata usb0_host_data = {
  125. .on_chip = 1,
  126. .port_power = usb0_port_power,
  127. };
  128. static struct resource usb0_host_resources[] = {
  129. [0] = {
  130. .start = 0xa4d80000,
  131. .end = 0xa4d80124 - 1,
  132. .flags = IORESOURCE_MEM,
  133. },
  134. [1] = {
  135. .start = 65,
  136. .end = 65,
  137. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  138. },
  139. };
  140. static struct platform_device usb0_host_device = {
  141. .name = "r8a66597_hcd",
  142. .id = 0,
  143. .dev = {
  144. .dma_mask = NULL, /* not use dma */
  145. .coherent_dma_mask = 0xffffffff,
  146. .platform_data = &usb0_host_data,
  147. },
  148. .num_resources = ARRAY_SIZE(usb0_host_resources),
  149. .resource = usb0_host_resources,
  150. };
  151. /*
  152. * USB1
  153. *
  154. * CN5 can use both host/function,
  155. * and we can determine it by checking PTB[3]
  156. *
  157. * This time only USB1 host is supported.
  158. */
  159. void usb1_port_power(int port, int power)
  160. {
  161. if (!gpio_get_value(GPIO_PTB3)) {
  162. printk(KERN_ERR "USB1 function is not supported\n");
  163. return;
  164. }
  165. gpio_set_value(GPIO_PTB5, power);
  166. }
  167. static struct r8a66597_platdata usb1_host_data = {
  168. .on_chip = 1,
  169. .port_power = usb1_port_power,
  170. };
  171. static struct resource usb1_host_resources[] = {
  172. [0] = {
  173. .start = 0xa4d90000,
  174. .end = 0xa4d90124 - 1,
  175. .flags = IORESOURCE_MEM,
  176. },
  177. [1] = {
  178. .start = 66,
  179. .end = 66,
  180. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  181. },
  182. };
  183. static struct platform_device usb1_host_device = {
  184. .name = "r8a66597_hcd",
  185. .id = 1,
  186. .dev = {
  187. .dma_mask = NULL, /* not use dma */
  188. .coherent_dma_mask = 0xffffffff,
  189. .platform_data = &usb1_host_data,
  190. },
  191. .num_resources = ARRAY_SIZE(usb1_host_resources),
  192. .resource = usb1_host_resources,
  193. };
  194. /* LCDC */
  195. static struct sh_mobile_lcdc_info lcdc_info = {
  196. .ch[0] = {
  197. .interface_type = RGB18,
  198. .chan = LCDC_CHAN_MAINLCD,
  199. .bpp = 16,
  200. .lcd_cfg = {
  201. .sync = 0, /* hsync and vsync are active low */
  202. },
  203. .lcd_size_cfg = { /* 7.0 inch */
  204. .width = 152,
  205. .height = 91,
  206. },
  207. .board_cfg = {
  208. },
  209. }
  210. };
  211. static struct resource lcdc_resources[] = {
  212. [0] = {
  213. .name = "LCDC",
  214. .start = 0xfe940000,
  215. .end = 0xfe941fff,
  216. .flags = IORESOURCE_MEM,
  217. },
  218. [1] = {
  219. .start = 106,
  220. .flags = IORESOURCE_IRQ,
  221. },
  222. };
  223. static struct platform_device lcdc_device = {
  224. .name = "sh_mobile_lcdc_fb",
  225. .num_resources = ARRAY_SIZE(lcdc_resources),
  226. .resource = lcdc_resources,
  227. .dev = {
  228. .platform_data = &lcdc_info,
  229. },
  230. .archdata = {
  231. .hwblk_id = HWBLK_LCDC,
  232. },
  233. };
  234. /* CEU0 */
  235. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  236. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  237. };
  238. static struct resource ceu0_resources[] = {
  239. [0] = {
  240. .name = "CEU0",
  241. .start = 0xfe910000,
  242. .end = 0xfe91009f,
  243. .flags = IORESOURCE_MEM,
  244. },
  245. [1] = {
  246. .start = 52,
  247. .flags = IORESOURCE_IRQ,
  248. },
  249. [2] = {
  250. /* place holder for contiguous memory */
  251. },
  252. };
  253. static struct platform_device ceu0_device = {
  254. .name = "sh_mobile_ceu",
  255. .id = 0, /* "ceu0" clock */
  256. .num_resources = ARRAY_SIZE(ceu0_resources),
  257. .resource = ceu0_resources,
  258. .dev = {
  259. .platform_data = &sh_mobile_ceu0_info,
  260. },
  261. .archdata = {
  262. .hwblk_id = HWBLK_CEU0,
  263. },
  264. };
  265. /* CEU1 */
  266. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  267. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  268. };
  269. static struct resource ceu1_resources[] = {
  270. [0] = {
  271. .name = "CEU1",
  272. .start = 0xfe914000,
  273. .end = 0xfe91409f,
  274. .flags = IORESOURCE_MEM,
  275. },
  276. [1] = {
  277. .start = 63,
  278. .flags = IORESOURCE_IRQ,
  279. },
  280. [2] = {
  281. /* place holder for contiguous memory */
  282. },
  283. };
  284. static struct platform_device ceu1_device = {
  285. .name = "sh_mobile_ceu",
  286. .id = 1, /* "ceu1" clock */
  287. .num_resources = ARRAY_SIZE(ceu1_resources),
  288. .resource = ceu1_resources,
  289. .dev = {
  290. .platform_data = &sh_mobile_ceu1_info,
  291. },
  292. .archdata = {
  293. .hwblk_id = HWBLK_CEU1,
  294. },
  295. };
  296. static struct platform_device *ecovec_devices[] __initdata = {
  297. &heartbeat_device,
  298. &nor_flash_device,
  299. &sh_eth_device,
  300. &usb0_host_device,
  301. &usb1_host_device, /* USB1 host support */
  302. &lcdc_device,
  303. &ceu0_device,
  304. &ceu1_device,
  305. };
  306. #define PORT_HIZA 0xA4050158
  307. #define IODRIVEA 0xA405018A
  308. static int __init devices_setup(void)
  309. {
  310. /* enable SCIFA0 */
  311. gpio_request(GPIO_FN_SCIF0_TXD, NULL);
  312. gpio_request(GPIO_FN_SCIF0_RXD, NULL);
  313. /* enable debug LED */
  314. gpio_request(GPIO_PTG0, NULL);
  315. gpio_request(GPIO_PTG1, NULL);
  316. gpio_request(GPIO_PTG2, NULL);
  317. gpio_request(GPIO_PTG3, NULL);
  318. gpio_direction_output(GPIO_PTG0, 0);
  319. gpio_direction_output(GPIO_PTG1, 0);
  320. gpio_direction_output(GPIO_PTG2, 0);
  321. gpio_direction_output(GPIO_PTG3, 0);
  322. /* enable SH-Eth */
  323. gpio_request(GPIO_PTA1, NULL);
  324. gpio_direction_output(GPIO_PTA1, 1);
  325. mdelay(20);
  326. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  327. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  328. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  329. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  330. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  331. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  332. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  333. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  334. gpio_request(GPIO_FN_MDIO, NULL);
  335. gpio_request(GPIO_FN_MDC, NULL);
  336. gpio_request(GPIO_FN_LNKSTA, NULL);
  337. /* enable USB */
  338. gpio_request(GPIO_PTB3, NULL);
  339. gpio_request(GPIO_PTB4, NULL);
  340. gpio_request(GPIO_PTB5, NULL);
  341. gpio_direction_input(GPIO_PTB3);
  342. gpio_direction_output(GPIO_PTB4, 0);
  343. gpio_direction_output(GPIO_PTB5, 0);
  344. ctrl_outw(0x0600, 0xa40501d4);
  345. ctrl_outw(0x0600, 0xa4050192);
  346. /* enable LCDC */
  347. gpio_request(GPIO_FN_LCDD23, NULL);
  348. gpio_request(GPIO_FN_LCDD22, NULL);
  349. gpio_request(GPIO_FN_LCDD21, NULL);
  350. gpio_request(GPIO_FN_LCDD20, NULL);
  351. gpio_request(GPIO_FN_LCDD19, NULL);
  352. gpio_request(GPIO_FN_LCDD18, NULL);
  353. gpio_request(GPIO_FN_LCDD17, NULL);
  354. gpio_request(GPIO_FN_LCDD16, NULL);
  355. gpio_request(GPIO_FN_LCDD15, NULL);
  356. gpio_request(GPIO_FN_LCDD14, NULL);
  357. gpio_request(GPIO_FN_LCDD13, NULL);
  358. gpio_request(GPIO_FN_LCDD12, NULL);
  359. gpio_request(GPIO_FN_LCDD11, NULL);
  360. gpio_request(GPIO_FN_LCDD10, NULL);
  361. gpio_request(GPIO_FN_LCDD9, NULL);
  362. gpio_request(GPIO_FN_LCDD8, NULL);
  363. gpio_request(GPIO_FN_LCDD7, NULL);
  364. gpio_request(GPIO_FN_LCDD6, NULL);
  365. gpio_request(GPIO_FN_LCDD5, NULL);
  366. gpio_request(GPIO_FN_LCDD4, NULL);
  367. gpio_request(GPIO_FN_LCDD3, NULL);
  368. gpio_request(GPIO_FN_LCDD2, NULL);
  369. gpio_request(GPIO_FN_LCDD1, NULL);
  370. gpio_request(GPIO_FN_LCDD0, NULL);
  371. gpio_request(GPIO_FN_LCDDISP, NULL);
  372. gpio_request(GPIO_FN_LCDHSYN, NULL);
  373. gpio_request(GPIO_FN_LCDDCK, NULL);
  374. gpio_request(GPIO_FN_LCDVSYN, NULL);
  375. gpio_request(GPIO_FN_LCDDON, NULL);
  376. gpio_request(GPIO_FN_LCDLCLK, NULL);
  377. ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  378. gpio_request(GPIO_PTE6, NULL);
  379. gpio_request(GPIO_PTU1, NULL);
  380. gpio_request(GPIO_PTR1, NULL);
  381. gpio_request(GPIO_PTA2, NULL);
  382. gpio_direction_input(GPIO_PTE6);
  383. gpio_direction_output(GPIO_PTU1, 0);
  384. gpio_direction_output(GPIO_PTR1, 0);
  385. gpio_direction_output(GPIO_PTA2, 0);
  386. /* I/O buffer drive ability is low */
  387. ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA);
  388. if (gpio_get_value(GPIO_PTE6)) {
  389. /* DVI */
  390. lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
  391. lcdc_info.ch[0].clock_divider = 1,
  392. lcdc_info.ch[0].lcd_cfg.name = "DVI";
  393. lcdc_info.ch[0].lcd_cfg.xres = 1280;
  394. lcdc_info.ch[0].lcd_cfg.yres = 720;
  395. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  396. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  397. lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
  398. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  399. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  400. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  401. gpio_set_value(GPIO_PTA2, 1);
  402. gpio_set_value(GPIO_PTU1, 1);
  403. } else {
  404. /* Panel */
  405. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  406. lcdc_info.ch[0].clock_divider = 2,
  407. lcdc_info.ch[0].lcd_cfg.name = "Panel";
  408. lcdc_info.ch[0].lcd_cfg.xres = 800;
  409. lcdc_info.ch[0].lcd_cfg.yres = 480;
  410. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  411. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  412. lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
  413. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  414. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  415. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  416. gpio_set_value(GPIO_PTR1, 1);
  417. /* FIXME
  418. *
  419. * LCDDON control is needed for Panel,
  420. * but current sh_mobile_lcdc driver doesn't control it.
  421. * It is temporary correspondence
  422. */
  423. gpio_request(GPIO_PTF4, NULL);
  424. gpio_direction_output(GPIO_PTF4, 1);
  425. }
  426. /* enable CEU0 */
  427. gpio_request(GPIO_FN_VIO0_D15, NULL);
  428. gpio_request(GPIO_FN_VIO0_D14, NULL);
  429. gpio_request(GPIO_FN_VIO0_D13, NULL);
  430. gpio_request(GPIO_FN_VIO0_D12, NULL);
  431. gpio_request(GPIO_FN_VIO0_D11, NULL);
  432. gpio_request(GPIO_FN_VIO0_D10, NULL);
  433. gpio_request(GPIO_FN_VIO0_D9, NULL);
  434. gpio_request(GPIO_FN_VIO0_D8, NULL);
  435. gpio_request(GPIO_FN_VIO0_D7, NULL);
  436. gpio_request(GPIO_FN_VIO0_D6, NULL);
  437. gpio_request(GPIO_FN_VIO0_D5, NULL);
  438. gpio_request(GPIO_FN_VIO0_D4, NULL);
  439. gpio_request(GPIO_FN_VIO0_D3, NULL);
  440. gpio_request(GPIO_FN_VIO0_D2, NULL);
  441. gpio_request(GPIO_FN_VIO0_D1, NULL);
  442. gpio_request(GPIO_FN_VIO0_D0, NULL);
  443. gpio_request(GPIO_FN_VIO0_VD, NULL);
  444. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  445. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  446. gpio_request(GPIO_FN_VIO0_HD, NULL);
  447. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  448. /* enable CEU1 */
  449. gpio_request(GPIO_FN_VIO1_D7, NULL);
  450. gpio_request(GPIO_FN_VIO1_D6, NULL);
  451. gpio_request(GPIO_FN_VIO1_D5, NULL);
  452. gpio_request(GPIO_FN_VIO1_D4, NULL);
  453. gpio_request(GPIO_FN_VIO1_D3, NULL);
  454. gpio_request(GPIO_FN_VIO1_D2, NULL);
  455. gpio_request(GPIO_FN_VIO1_D1, NULL);
  456. gpio_request(GPIO_FN_VIO1_D0, NULL);
  457. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  458. gpio_request(GPIO_FN_VIO1_HD, NULL);
  459. gpio_request(GPIO_FN_VIO1_VD, NULL);
  460. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  461. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  462. return platform_add_devices(ecovec_devices,
  463. ARRAY_SIZE(ecovec_devices));
  464. }
  465. device_initcall(devices_setup);
  466. static struct sh_machine_vector mv_ecovec __initmv = {
  467. .mv_name = "R0P7724 (EcoVec)",
  468. };