pxa.c 21 KB

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  1. /*
  2. * linux/drivers/serial/pxa.c
  3. *
  4. * Based on drivers/serial/8250.c by Russell King.
  5. *
  6. * Author: Nicolas Pitre
  7. * Created: Feb 20, 2003
  8. * Copyright: (C) 2003 Monta Vista Software, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * Note 1: This driver is made separate from the already too overloaded
  16. * 8250.c because it needs some kirks of its own and that'll make it
  17. * easier to add DMA support.
  18. *
  19. * Note 2: I'm too sick of device allocation policies for serial ports.
  20. * If someone else wants to request an "official" allocation of major/minor
  21. * for this driver please be my guest. And don't forget that new hardware
  22. * to come from Intel might have more than 3 or 4 of those UARTs. Let's
  23. * hope for a better port registration and dynamic device allocation scheme
  24. * with the serial core maintainer satisfaction to appear soon.
  25. */
  26. #include <linux/config.h>
  27. #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  28. #define SUPPORT_SYSRQ
  29. #endif
  30. #include <linux/module.h>
  31. #include <linux/ioport.h>
  32. #include <linux/init.h>
  33. #include <linux/console.h>
  34. #include <linux/sysrq.h>
  35. #include <linux/serial_reg.h>
  36. #include <linux/circ_buf.h>
  37. #include <linux/delay.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/platform_device.h>
  40. #include <linux/tty.h>
  41. #include <linux/tty_flip.h>
  42. #include <linux/serial_core.h>
  43. #include <asm/io.h>
  44. #include <asm/hardware.h>
  45. #include <asm/irq.h>
  46. #include <asm/arch/pxa-regs.h>
  47. struct uart_pxa_port {
  48. struct uart_port port;
  49. unsigned char ier;
  50. unsigned char lcr;
  51. unsigned char mcr;
  52. unsigned int lsr_break_flag;
  53. unsigned int cken;
  54. char *name;
  55. };
  56. static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  57. {
  58. offset <<= 2;
  59. return readl(up->port.membase + offset);
  60. }
  61. static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  62. {
  63. offset <<= 2;
  64. writel(value, up->port.membase + offset);
  65. }
  66. static void serial_pxa_enable_ms(struct uart_port *port)
  67. {
  68. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  69. up->ier |= UART_IER_MSI;
  70. serial_out(up, UART_IER, up->ier);
  71. }
  72. static void serial_pxa_stop_tx(struct uart_port *port)
  73. {
  74. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  75. if (up->ier & UART_IER_THRI) {
  76. up->ier &= ~UART_IER_THRI;
  77. serial_out(up, UART_IER, up->ier);
  78. }
  79. }
  80. static void serial_pxa_stop_rx(struct uart_port *port)
  81. {
  82. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  83. up->ier &= ~UART_IER_RLSI;
  84. up->port.read_status_mask &= ~UART_LSR_DR;
  85. serial_out(up, UART_IER, up->ier);
  86. }
  87. static inline void
  88. receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs)
  89. {
  90. struct tty_struct *tty = up->port.info->tty;
  91. unsigned int ch, flag;
  92. int max_count = 256;
  93. do {
  94. if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
  95. if (tty->low_latency)
  96. tty_flip_buffer_push(tty);
  97. /*
  98. * If this failed then we will throw away the
  99. * bytes but must do so to clear interrupts
  100. */
  101. }
  102. ch = serial_in(up, UART_RX);
  103. flag = TTY_NORMAL;
  104. up->port.icount.rx++;
  105. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  106. UART_LSR_FE | UART_LSR_OE))) {
  107. /*
  108. * For statistics only
  109. */
  110. if (*status & UART_LSR_BI) {
  111. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  112. up->port.icount.brk++;
  113. /*
  114. * We do the SysRQ and SAK checking
  115. * here because otherwise the break
  116. * may get masked by ignore_status_mask
  117. * or read_status_mask.
  118. */
  119. if (uart_handle_break(&up->port))
  120. goto ignore_char;
  121. } else if (*status & UART_LSR_PE)
  122. up->port.icount.parity++;
  123. else if (*status & UART_LSR_FE)
  124. up->port.icount.frame++;
  125. if (*status & UART_LSR_OE)
  126. up->port.icount.overrun++;
  127. /*
  128. * Mask off conditions which should be ignored.
  129. */
  130. *status &= up->port.read_status_mask;
  131. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  132. if (up->port.line == up->port.cons->index) {
  133. /* Recover the break flag from console xmit */
  134. *status |= up->lsr_break_flag;
  135. up->lsr_break_flag = 0;
  136. }
  137. #endif
  138. if (*status & UART_LSR_BI) {
  139. flag = TTY_BREAK;
  140. } else if (*status & UART_LSR_PE)
  141. flag = TTY_PARITY;
  142. else if (*status & UART_LSR_FE)
  143. flag = TTY_FRAME;
  144. }
  145. if (uart_handle_sysrq_char(&up->port, ch, regs))
  146. goto ignore_char;
  147. uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
  148. ignore_char:
  149. *status = serial_in(up, UART_LSR);
  150. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  151. tty_flip_buffer_push(tty);
  152. }
  153. static void transmit_chars(struct uart_pxa_port *up)
  154. {
  155. struct circ_buf *xmit = &up->port.info->xmit;
  156. int count;
  157. if (up->port.x_char) {
  158. serial_out(up, UART_TX, up->port.x_char);
  159. up->port.icount.tx++;
  160. up->port.x_char = 0;
  161. return;
  162. }
  163. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  164. serial_pxa_stop_tx(&up->port);
  165. return;
  166. }
  167. count = up->port.fifosize / 2;
  168. do {
  169. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  170. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  171. up->port.icount.tx++;
  172. if (uart_circ_empty(xmit))
  173. break;
  174. } while (--count > 0);
  175. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  176. uart_write_wakeup(&up->port);
  177. if (uart_circ_empty(xmit))
  178. serial_pxa_stop_tx(&up->port);
  179. }
  180. static void serial_pxa_start_tx(struct uart_port *port)
  181. {
  182. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  183. if (!(up->ier & UART_IER_THRI)) {
  184. up->ier |= UART_IER_THRI;
  185. serial_out(up, UART_IER, up->ier);
  186. }
  187. }
  188. static inline void check_modem_status(struct uart_pxa_port *up)
  189. {
  190. int status;
  191. status = serial_in(up, UART_MSR);
  192. if ((status & UART_MSR_ANY_DELTA) == 0)
  193. return;
  194. if (status & UART_MSR_TERI)
  195. up->port.icount.rng++;
  196. if (status & UART_MSR_DDSR)
  197. up->port.icount.dsr++;
  198. if (status & UART_MSR_DDCD)
  199. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  200. if (status & UART_MSR_DCTS)
  201. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  202. wake_up_interruptible(&up->port.info->delta_msr_wait);
  203. }
  204. /*
  205. * This handles the interrupt from one port.
  206. */
  207. static inline irqreturn_t
  208. serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs)
  209. {
  210. struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id;
  211. unsigned int iir, lsr;
  212. iir = serial_in(up, UART_IIR);
  213. if (iir & UART_IIR_NO_INT)
  214. return IRQ_NONE;
  215. lsr = serial_in(up, UART_LSR);
  216. if (lsr & UART_LSR_DR)
  217. receive_chars(up, &lsr, regs);
  218. check_modem_status(up);
  219. if (lsr & UART_LSR_THRE)
  220. transmit_chars(up);
  221. return IRQ_HANDLED;
  222. }
  223. static unsigned int serial_pxa_tx_empty(struct uart_port *port)
  224. {
  225. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  226. unsigned long flags;
  227. unsigned int ret;
  228. spin_lock_irqsave(&up->port.lock, flags);
  229. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  230. spin_unlock_irqrestore(&up->port.lock, flags);
  231. return ret;
  232. }
  233. static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
  234. {
  235. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  236. unsigned char status;
  237. unsigned int ret;
  238. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  239. status = serial_in(up, UART_MSR);
  240. ret = 0;
  241. if (status & UART_MSR_DCD)
  242. ret |= TIOCM_CAR;
  243. if (status & UART_MSR_RI)
  244. ret |= TIOCM_RNG;
  245. if (status & UART_MSR_DSR)
  246. ret |= TIOCM_DSR;
  247. if (status & UART_MSR_CTS)
  248. ret |= TIOCM_CTS;
  249. return ret;
  250. }
  251. static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
  252. {
  253. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  254. unsigned char mcr = 0;
  255. if (mctrl & TIOCM_RTS)
  256. mcr |= UART_MCR_RTS;
  257. if (mctrl & TIOCM_DTR)
  258. mcr |= UART_MCR_DTR;
  259. if (mctrl & TIOCM_OUT1)
  260. mcr |= UART_MCR_OUT1;
  261. if (mctrl & TIOCM_OUT2)
  262. mcr |= UART_MCR_OUT2;
  263. if (mctrl & TIOCM_LOOP)
  264. mcr |= UART_MCR_LOOP;
  265. mcr |= up->mcr;
  266. serial_out(up, UART_MCR, mcr);
  267. }
  268. static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
  269. {
  270. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  271. unsigned long flags;
  272. spin_lock_irqsave(&up->port.lock, flags);
  273. if (break_state == -1)
  274. up->lcr |= UART_LCR_SBC;
  275. else
  276. up->lcr &= ~UART_LCR_SBC;
  277. serial_out(up, UART_LCR, up->lcr);
  278. spin_unlock_irqrestore(&up->port.lock, flags);
  279. }
  280. #if 0
  281. static void serial_pxa_dma_init(struct pxa_uart *up)
  282. {
  283. up->rxdma =
  284. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
  285. if (up->rxdma < 0)
  286. goto out;
  287. up->txdma =
  288. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
  289. if (up->txdma < 0)
  290. goto err_txdma;
  291. up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
  292. if (!up->dmadesc)
  293. goto err_alloc;
  294. /* ... */
  295. err_alloc:
  296. pxa_free_dma(up->txdma);
  297. err_rxdma:
  298. pxa_free_dma(up->rxdma);
  299. out:
  300. return;
  301. }
  302. #endif
  303. static int serial_pxa_startup(struct uart_port *port)
  304. {
  305. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  306. unsigned long flags;
  307. int retval;
  308. if (port->line == 3) /* HWUART */
  309. up->mcr |= UART_MCR_AFE;
  310. else
  311. up->mcr = 0;
  312. /*
  313. * Allocate the IRQ
  314. */
  315. retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
  316. if (retval)
  317. return retval;
  318. /*
  319. * Clear the FIFO buffers and disable them.
  320. * (they will be reenabled in set_termios())
  321. */
  322. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  323. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  324. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  325. serial_out(up, UART_FCR, 0);
  326. /*
  327. * Clear the interrupt registers.
  328. */
  329. (void) serial_in(up, UART_LSR);
  330. (void) serial_in(up, UART_RX);
  331. (void) serial_in(up, UART_IIR);
  332. (void) serial_in(up, UART_MSR);
  333. /*
  334. * Now, initialize the UART
  335. */
  336. serial_out(up, UART_LCR, UART_LCR_WLEN8);
  337. spin_lock_irqsave(&up->port.lock, flags);
  338. up->port.mctrl |= TIOCM_OUT2;
  339. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  340. spin_unlock_irqrestore(&up->port.lock, flags);
  341. /*
  342. * Finally, enable interrupts. Note: Modem status interrupts
  343. * are set via set_termios(), which will be occuring imminently
  344. * anyway, so we don't enable them here.
  345. */
  346. up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
  347. serial_out(up, UART_IER, up->ier);
  348. /*
  349. * And clear the interrupt registers again for luck.
  350. */
  351. (void) serial_in(up, UART_LSR);
  352. (void) serial_in(up, UART_RX);
  353. (void) serial_in(up, UART_IIR);
  354. (void) serial_in(up, UART_MSR);
  355. return 0;
  356. }
  357. static void serial_pxa_shutdown(struct uart_port *port)
  358. {
  359. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  360. unsigned long flags;
  361. free_irq(up->port.irq, up);
  362. /*
  363. * Disable interrupts from this port
  364. */
  365. up->ier = 0;
  366. serial_out(up, UART_IER, 0);
  367. spin_lock_irqsave(&up->port.lock, flags);
  368. up->port.mctrl &= ~TIOCM_OUT2;
  369. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  370. spin_unlock_irqrestore(&up->port.lock, flags);
  371. /*
  372. * Disable break condition and FIFOs
  373. */
  374. serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
  375. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  376. UART_FCR_CLEAR_RCVR |
  377. UART_FCR_CLEAR_XMIT);
  378. serial_out(up, UART_FCR, 0);
  379. }
  380. static void
  381. serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
  382. struct termios *old)
  383. {
  384. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  385. unsigned char cval, fcr = 0;
  386. unsigned long flags;
  387. unsigned int baud, quot;
  388. switch (termios->c_cflag & CSIZE) {
  389. case CS5:
  390. cval = UART_LCR_WLEN5;
  391. break;
  392. case CS6:
  393. cval = UART_LCR_WLEN6;
  394. break;
  395. case CS7:
  396. cval = UART_LCR_WLEN7;
  397. break;
  398. default:
  399. case CS8:
  400. cval = UART_LCR_WLEN8;
  401. break;
  402. }
  403. if (termios->c_cflag & CSTOPB)
  404. cval |= UART_LCR_STOP;
  405. if (termios->c_cflag & PARENB)
  406. cval |= UART_LCR_PARITY;
  407. if (!(termios->c_cflag & PARODD))
  408. cval |= UART_LCR_EPAR;
  409. /*
  410. * Ask the core to calculate the divisor for us.
  411. */
  412. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  413. quot = uart_get_divisor(port, baud);
  414. if ((up->port.uartclk / quot) < (2400 * 16))
  415. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
  416. else if ((up->port.uartclk / quot) < (230400 * 16))
  417. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
  418. else
  419. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
  420. /*
  421. * Ok, we're now changing the port state. Do it with
  422. * interrupts disabled.
  423. */
  424. spin_lock_irqsave(&up->port.lock, flags);
  425. /*
  426. * Ensure the port will be enabled.
  427. * This is required especially for serial console.
  428. */
  429. up->ier |= IER_UUE;
  430. /*
  431. * Update the per-port timeout.
  432. */
  433. uart_update_timeout(port, termios->c_cflag, baud);
  434. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  435. if (termios->c_iflag & INPCK)
  436. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  437. if (termios->c_iflag & (BRKINT | PARMRK))
  438. up->port.read_status_mask |= UART_LSR_BI;
  439. /*
  440. * Characters to ignore
  441. */
  442. up->port.ignore_status_mask = 0;
  443. if (termios->c_iflag & IGNPAR)
  444. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  445. if (termios->c_iflag & IGNBRK) {
  446. up->port.ignore_status_mask |= UART_LSR_BI;
  447. /*
  448. * If we're ignoring parity and break indicators,
  449. * ignore overruns too (for real raw support).
  450. */
  451. if (termios->c_iflag & IGNPAR)
  452. up->port.ignore_status_mask |= UART_LSR_OE;
  453. }
  454. /*
  455. * ignore all characters if CREAD is not set
  456. */
  457. if ((termios->c_cflag & CREAD) == 0)
  458. up->port.ignore_status_mask |= UART_LSR_DR;
  459. /*
  460. * CTS flow control flag and modem status interrupts
  461. */
  462. up->ier &= ~UART_IER_MSI;
  463. if (UART_ENABLE_MS(&up->port, termios->c_cflag))
  464. up->ier |= UART_IER_MSI;
  465. serial_out(up, UART_IER, up->ier);
  466. serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  467. serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
  468. serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
  469. serial_out(up, UART_LCR, cval); /* reset DLAB */
  470. up->lcr = cval; /* Save LCR */
  471. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  472. serial_out(up, UART_FCR, fcr);
  473. spin_unlock_irqrestore(&up->port.lock, flags);
  474. }
  475. static void
  476. serial_pxa_pm(struct uart_port *port, unsigned int state,
  477. unsigned int oldstate)
  478. {
  479. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  480. pxa_set_cken(up->cken, !state);
  481. if (!state)
  482. udelay(1);
  483. }
  484. static void serial_pxa_release_port(struct uart_port *port)
  485. {
  486. }
  487. static int serial_pxa_request_port(struct uart_port *port)
  488. {
  489. return 0;
  490. }
  491. static void serial_pxa_config_port(struct uart_port *port, int flags)
  492. {
  493. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  494. up->port.type = PORT_PXA;
  495. }
  496. static int
  497. serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
  498. {
  499. /* we don't want the core code to modify any port params */
  500. return -EINVAL;
  501. }
  502. static const char *
  503. serial_pxa_type(struct uart_port *port)
  504. {
  505. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  506. return up->name;
  507. }
  508. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  509. static struct uart_pxa_port serial_pxa_ports[];
  510. static struct uart_driver serial_pxa_reg;
  511. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  512. /*
  513. * Wait for transmitter & holding register to empty
  514. */
  515. static inline void wait_for_xmitr(struct uart_pxa_port *up)
  516. {
  517. unsigned int status, tmout = 10000;
  518. /* Wait up to 10ms for the character(s) to be sent. */
  519. do {
  520. status = serial_in(up, UART_LSR);
  521. if (status & UART_LSR_BI)
  522. up->lsr_break_flag = UART_LSR_BI;
  523. if (--tmout == 0)
  524. break;
  525. udelay(1);
  526. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  527. /* Wait up to 1s for flow control if necessary */
  528. if (up->port.flags & UPF_CONS_FLOW) {
  529. tmout = 1000000;
  530. while (--tmout &&
  531. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  532. udelay(1);
  533. }
  534. }
  535. /*
  536. * Print a string to the serial port trying not to disturb
  537. * any possible real use of the port...
  538. *
  539. * The console_lock must be held when we get here.
  540. */
  541. static void
  542. serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
  543. {
  544. struct uart_pxa_port *up = &serial_pxa_ports[co->index];
  545. unsigned int ier;
  546. int i;
  547. /*
  548. * First save the IER then disable the interrupts
  549. */
  550. ier = serial_in(up, UART_IER);
  551. serial_out(up, UART_IER, UART_IER_UUE);
  552. /*
  553. * Now, do each character
  554. */
  555. for (i = 0; i < count; i++, s++) {
  556. wait_for_xmitr(up);
  557. /*
  558. * Send the character out.
  559. * If a LF, also do CR...
  560. */
  561. serial_out(up, UART_TX, *s);
  562. if (*s == 10) {
  563. wait_for_xmitr(up);
  564. serial_out(up, UART_TX, 13);
  565. }
  566. }
  567. /*
  568. * Finally, wait for transmitter to become empty
  569. * and restore the IER
  570. */
  571. wait_for_xmitr(up);
  572. serial_out(up, UART_IER, ier);
  573. }
  574. static int __init
  575. serial_pxa_console_setup(struct console *co, char *options)
  576. {
  577. struct uart_pxa_port *up;
  578. int baud = 9600;
  579. int bits = 8;
  580. int parity = 'n';
  581. int flow = 'n';
  582. if (co->index == -1 || co->index >= serial_pxa_reg.nr)
  583. co->index = 0;
  584. up = &serial_pxa_ports[co->index];
  585. if (options)
  586. uart_parse_options(options, &baud, &parity, &bits, &flow);
  587. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  588. }
  589. static struct console serial_pxa_console = {
  590. .name = "ttyS",
  591. .write = serial_pxa_console_write,
  592. .device = uart_console_device,
  593. .setup = serial_pxa_console_setup,
  594. .flags = CON_PRINTBUFFER,
  595. .index = -1,
  596. .data = &serial_pxa_reg,
  597. };
  598. static int __init
  599. serial_pxa_console_init(void)
  600. {
  601. register_console(&serial_pxa_console);
  602. return 0;
  603. }
  604. console_initcall(serial_pxa_console_init);
  605. #define PXA_CONSOLE &serial_pxa_console
  606. #else
  607. #define PXA_CONSOLE NULL
  608. #endif
  609. struct uart_ops serial_pxa_pops = {
  610. .tx_empty = serial_pxa_tx_empty,
  611. .set_mctrl = serial_pxa_set_mctrl,
  612. .get_mctrl = serial_pxa_get_mctrl,
  613. .stop_tx = serial_pxa_stop_tx,
  614. .start_tx = serial_pxa_start_tx,
  615. .stop_rx = serial_pxa_stop_rx,
  616. .enable_ms = serial_pxa_enable_ms,
  617. .break_ctl = serial_pxa_break_ctl,
  618. .startup = serial_pxa_startup,
  619. .shutdown = serial_pxa_shutdown,
  620. .set_termios = serial_pxa_set_termios,
  621. .pm = serial_pxa_pm,
  622. .type = serial_pxa_type,
  623. .release_port = serial_pxa_release_port,
  624. .request_port = serial_pxa_request_port,
  625. .config_port = serial_pxa_config_port,
  626. .verify_port = serial_pxa_verify_port,
  627. };
  628. static struct uart_pxa_port serial_pxa_ports[] = {
  629. { /* FFUART */
  630. .name = "FFUART",
  631. .cken = CKEN6_FFUART,
  632. .port = {
  633. .type = PORT_PXA,
  634. .iotype = UPIO_MEM,
  635. .membase = (void *)&FFUART,
  636. .mapbase = __PREG(FFUART),
  637. .irq = IRQ_FFUART,
  638. .uartclk = 921600 * 16,
  639. .fifosize = 64,
  640. .ops = &serial_pxa_pops,
  641. .line = 0,
  642. },
  643. }, { /* BTUART */
  644. .name = "BTUART",
  645. .cken = CKEN7_BTUART,
  646. .port = {
  647. .type = PORT_PXA,
  648. .iotype = UPIO_MEM,
  649. .membase = (void *)&BTUART,
  650. .mapbase = __PREG(BTUART),
  651. .irq = IRQ_BTUART,
  652. .uartclk = 921600 * 16,
  653. .fifosize = 64,
  654. .ops = &serial_pxa_pops,
  655. .line = 1,
  656. },
  657. }, { /* STUART */
  658. .name = "STUART",
  659. .cken = CKEN5_STUART,
  660. .port = {
  661. .type = PORT_PXA,
  662. .iotype = UPIO_MEM,
  663. .membase = (void *)&STUART,
  664. .mapbase = __PREG(STUART),
  665. .irq = IRQ_STUART,
  666. .uartclk = 921600 * 16,
  667. .fifosize = 64,
  668. .ops = &serial_pxa_pops,
  669. .line = 2,
  670. },
  671. }, { /* HWUART */
  672. .name = "HWUART",
  673. .cken = CKEN4_HWUART,
  674. .port = {
  675. .type = PORT_PXA,
  676. .iotype = UPIO_MEM,
  677. .membase = (void *)&HWUART,
  678. .mapbase = __PREG(HWUART),
  679. .irq = IRQ_HWUART,
  680. .uartclk = 921600 * 16,
  681. .fifosize = 64,
  682. .ops = &serial_pxa_pops,
  683. .line = 3,
  684. },
  685. }
  686. };
  687. static struct uart_driver serial_pxa_reg = {
  688. .owner = THIS_MODULE,
  689. .driver_name = "PXA serial",
  690. .devfs_name = "tts/",
  691. .dev_name = "ttyS",
  692. .major = TTY_MAJOR,
  693. .minor = 64,
  694. .nr = ARRAY_SIZE(serial_pxa_ports),
  695. .cons = PXA_CONSOLE,
  696. };
  697. static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state)
  698. {
  699. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  700. if (sport)
  701. uart_suspend_port(&serial_pxa_reg, &sport->port);
  702. return 0;
  703. }
  704. static int serial_pxa_resume(struct platform_device *dev)
  705. {
  706. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  707. if (sport)
  708. uart_resume_port(&serial_pxa_reg, &sport->port);
  709. return 0;
  710. }
  711. static int serial_pxa_probe(struct platform_device *dev)
  712. {
  713. serial_pxa_ports[dev->id].port.dev = &dev->dev;
  714. uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port);
  715. platform_set_drvdata(dev, &serial_pxa_ports[dev->id]);
  716. return 0;
  717. }
  718. static int serial_pxa_remove(struct platform_device *dev)
  719. {
  720. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  721. platform_set_drvdata(dev, NULL);
  722. if (sport)
  723. uart_remove_one_port(&serial_pxa_reg, &sport->port);
  724. return 0;
  725. }
  726. static struct platform_driver serial_pxa_driver = {
  727. .probe = serial_pxa_probe,
  728. .remove = serial_pxa_remove,
  729. .suspend = serial_pxa_suspend,
  730. .resume = serial_pxa_resume,
  731. .driver = {
  732. .name = "pxa2xx-uart",
  733. },
  734. };
  735. int __init serial_pxa_init(void)
  736. {
  737. int ret;
  738. ret = uart_register_driver(&serial_pxa_reg);
  739. if (ret != 0)
  740. return ret;
  741. ret = platform_driver_register(&serial_pxa_driver);
  742. if (ret != 0)
  743. uart_unregister_driver(&serial_pxa_reg);
  744. return ret;
  745. }
  746. void __exit serial_pxa_exit(void)
  747. {
  748. platform_driver_unregister(&serial_pxa_driver);
  749. uart_unregister_driver(&serial_pxa_reg);
  750. }
  751. module_init(serial_pxa_init);
  752. module_exit(serial_pxa_exit);
  753. MODULE_LICENSE("GPL");