mtd-nand-omap2.h 2.4 KB

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  1. /*
  2. * arch/arm/plat-omap/include/mach/nand.h
  3. *
  4. * Copyright (C) 2006 Micron Technology Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #ifndef _MTD_NAND_OMAP2_H
  11. #define _MTD_NAND_OMAP2_H
  12. #include <linux/mtd/partitions.h>
  13. #define GPMC_BCH_NUM_REMAINDER 8
  14. enum nand_io {
  15. NAND_OMAP_PREFETCH_POLLED = 0, /* prefetch polled mode, default */
  16. NAND_OMAP_POLLED, /* polled mode, without prefetch */
  17. NAND_OMAP_PREFETCH_DMA, /* prefetch enabled sDMA mode */
  18. NAND_OMAP_PREFETCH_IRQ /* prefetch enabled irq mode */
  19. };
  20. enum omap_ecc {
  21. /* 1-bit ecc: stored at end of spare area */
  22. OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
  23. OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
  24. /* 1-bit ecc: stored at beginning of spare area as romcode */
  25. OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
  26. /* 1-bit ECC calculation by GPMC, Error detection by Software */
  27. OMAP_ECC_HAM1_CODE_HW,
  28. /* 4-bit ECC calculation by GPMC, Error detection by Software */
  29. OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
  30. /* 4-bit ECC calculation by GPMC, Error detection by ELM */
  31. OMAP_ECC_BCH4_CODE_HW,
  32. /* 8-bit ECC calculation by GPMC, Error detection by Software */
  33. OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
  34. /* 8-bit ECC calculation by GPMC, Error detection by ELM */
  35. OMAP_ECC_BCH8_CODE_HW,
  36. };
  37. struct gpmc_nand_regs {
  38. void __iomem *gpmc_status;
  39. void __iomem *gpmc_nand_command;
  40. void __iomem *gpmc_nand_address;
  41. void __iomem *gpmc_nand_data;
  42. void __iomem *gpmc_prefetch_config1;
  43. void __iomem *gpmc_prefetch_config2;
  44. void __iomem *gpmc_prefetch_control;
  45. void __iomem *gpmc_prefetch_status;
  46. void __iomem *gpmc_ecc_config;
  47. void __iomem *gpmc_ecc_control;
  48. void __iomem *gpmc_ecc_size_config;
  49. void __iomem *gpmc_ecc1_result;
  50. void __iomem *gpmc_bch_result0[GPMC_BCH_NUM_REMAINDER];
  51. void __iomem *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER];
  52. void __iomem *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER];
  53. void __iomem *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER];
  54. };
  55. struct omap_nand_platform_data {
  56. int cs;
  57. struct mtd_partition *parts;
  58. int nr_parts;
  59. bool dev_ready;
  60. enum nand_io xfer_type;
  61. int devsize;
  62. enum omap_ecc ecc_opt;
  63. struct gpmc_nand_regs reg;
  64. /* for passing the partitions */
  65. struct device_node *of_node;
  66. struct device_node *elm_of_node;
  67. };
  68. #endif