book3s_64_mmu_host.c 11 KB

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  1. /*
  2. * Copyright (C) 2009 SUSE Linux Products GmbH. All rights reserved.
  3. *
  4. * Authors:
  5. * Alexander Graf <agraf@suse.de>
  6. * Kevin Wolf <mail@kevin-wolf.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License, version 2, as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  20. */
  21. #include <linux/kvm_host.h>
  22. #include <asm/kvm_ppc.h>
  23. #include <asm/kvm_book3s.h>
  24. #include <asm/mmu-hash64.h>
  25. #include <asm/machdep.h>
  26. #include <asm/mmu_context.h>
  27. #include <asm/hw_irq.h>
  28. #define PTE_SIZE 12
  29. #define VSID_ALL 0
  30. /* #define DEBUG_MMU */
  31. /* #define DEBUG_SLB */
  32. #ifdef DEBUG_MMU
  33. #define dprintk_mmu(a, ...) printk(KERN_INFO a, __VA_ARGS__)
  34. #else
  35. #define dprintk_mmu(a, ...) do { } while(0)
  36. #endif
  37. #ifdef DEBUG_SLB
  38. #define dprintk_slb(a, ...) printk(KERN_INFO a, __VA_ARGS__)
  39. #else
  40. #define dprintk_slb(a, ...) do { } while(0)
  41. #endif
  42. static void invalidate_pte(struct hpte_cache *pte)
  43. {
  44. dprintk_mmu("KVM: Flushing SPT %d: 0x%llx (0x%llx) -> 0x%llx\n",
  45. i, pte->pte.eaddr, pte->pte.vpage, pte->host_va);
  46. ppc_md.hpte_invalidate(pte->slot, pte->host_va,
  47. MMU_PAGE_4K, MMU_SEGSIZE_256M,
  48. false);
  49. pte->host_va = 0;
  50. if (pte->pte.may_write)
  51. kvm_release_pfn_dirty(pte->pfn);
  52. else
  53. kvm_release_pfn_clean(pte->pfn);
  54. }
  55. void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong guest_ea, ulong ea_mask)
  56. {
  57. int i;
  58. dprintk_mmu("KVM: Flushing %d Shadow PTEs: 0x%llx & 0x%llx\n",
  59. vcpu->arch.hpte_cache_offset, guest_ea, ea_mask);
  60. BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM);
  61. guest_ea &= ea_mask;
  62. for (i = 0; i < vcpu->arch.hpte_cache_offset; i++) {
  63. struct hpte_cache *pte;
  64. pte = &vcpu->arch.hpte_cache[i];
  65. if (!pte->host_va)
  66. continue;
  67. if ((pte->pte.eaddr & ea_mask) == guest_ea) {
  68. invalidate_pte(pte);
  69. }
  70. }
  71. /* Doing a complete flush -> start from scratch */
  72. if (!ea_mask)
  73. vcpu->arch.hpte_cache_offset = 0;
  74. }
  75. void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 guest_vp, u64 vp_mask)
  76. {
  77. int i;
  78. dprintk_mmu("KVM: Flushing %d Shadow vPTEs: 0x%llx & 0x%llx\n",
  79. vcpu->arch.hpte_cache_offset, guest_vp, vp_mask);
  80. BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM);
  81. guest_vp &= vp_mask;
  82. for (i = 0; i < vcpu->arch.hpte_cache_offset; i++) {
  83. struct hpte_cache *pte;
  84. pte = &vcpu->arch.hpte_cache[i];
  85. if (!pte->host_va)
  86. continue;
  87. if ((pte->pte.vpage & vp_mask) == guest_vp) {
  88. invalidate_pte(pte);
  89. }
  90. }
  91. }
  92. void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, ulong pa_start, ulong pa_end)
  93. {
  94. int i;
  95. dprintk_mmu("KVM: Flushing %d Shadow pPTEs: 0x%llx & 0x%llx\n",
  96. vcpu->arch.hpte_cache_offset, guest_pa, pa_mask);
  97. BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM);
  98. for (i = 0; i < vcpu->arch.hpte_cache_offset; i++) {
  99. struct hpte_cache *pte;
  100. pte = &vcpu->arch.hpte_cache[i];
  101. if (!pte->host_va)
  102. continue;
  103. if ((pte->pte.raddr >= pa_start) &&
  104. (pte->pte.raddr < pa_end)) {
  105. invalidate_pte(pte);
  106. }
  107. }
  108. }
  109. struct kvmppc_pte *kvmppc_mmu_find_pte(struct kvm_vcpu *vcpu, u64 ea, bool data)
  110. {
  111. int i;
  112. u64 guest_vp;
  113. guest_vp = vcpu->arch.mmu.ea_to_vp(vcpu, ea, false);
  114. for (i=0; i<vcpu->arch.hpte_cache_offset; i++) {
  115. struct hpte_cache *pte;
  116. pte = &vcpu->arch.hpte_cache[i];
  117. if (!pte->host_va)
  118. continue;
  119. if (pte->pte.vpage == guest_vp)
  120. return &pte->pte;
  121. }
  122. return NULL;
  123. }
  124. static int kvmppc_mmu_hpte_cache_next(struct kvm_vcpu *vcpu)
  125. {
  126. if (vcpu->arch.hpte_cache_offset == HPTEG_CACHE_NUM)
  127. kvmppc_mmu_pte_flush(vcpu, 0, 0);
  128. return vcpu->arch.hpte_cache_offset++;
  129. }
  130. /* We keep 512 gvsid->hvsid entries, mapping the guest ones to the array using
  131. * a hash, so we don't waste cycles on looping */
  132. static u16 kvmppc_sid_hash(struct kvm_vcpu *vcpu, u64 gvsid)
  133. {
  134. return (u16)(((gvsid >> (SID_MAP_BITS * 7)) & SID_MAP_MASK) ^
  135. ((gvsid >> (SID_MAP_BITS * 6)) & SID_MAP_MASK) ^
  136. ((gvsid >> (SID_MAP_BITS * 5)) & SID_MAP_MASK) ^
  137. ((gvsid >> (SID_MAP_BITS * 4)) & SID_MAP_MASK) ^
  138. ((gvsid >> (SID_MAP_BITS * 3)) & SID_MAP_MASK) ^
  139. ((gvsid >> (SID_MAP_BITS * 2)) & SID_MAP_MASK) ^
  140. ((gvsid >> (SID_MAP_BITS * 1)) & SID_MAP_MASK) ^
  141. ((gvsid >> (SID_MAP_BITS * 0)) & SID_MAP_MASK));
  142. }
  143. static struct kvmppc_sid_map *find_sid_vsid(struct kvm_vcpu *vcpu, u64 gvsid)
  144. {
  145. struct kvmppc_sid_map *map;
  146. u16 sid_map_mask;
  147. if (vcpu->arch.msr & MSR_PR)
  148. gvsid |= VSID_PR;
  149. sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
  150. map = &to_book3s(vcpu)->sid_map[sid_map_mask];
  151. if (map->guest_vsid == gvsid) {
  152. dprintk_slb("SLB: Searching 0x%llx -> 0x%llx\n",
  153. gvsid, map->host_vsid);
  154. return map;
  155. }
  156. map = &to_book3s(vcpu)->sid_map[SID_MAP_MASK - sid_map_mask];
  157. if (map->guest_vsid == gvsid) {
  158. dprintk_slb("SLB: Searching 0x%llx -> 0x%llx\n",
  159. gvsid, map->host_vsid);
  160. return map;
  161. }
  162. dprintk_slb("SLB: Searching 0x%llx -> not found\n", gvsid);
  163. return NULL;
  164. }
  165. int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte)
  166. {
  167. pfn_t hpaddr;
  168. ulong hash, hpteg, va;
  169. u64 vsid;
  170. int ret;
  171. int rflags = 0x192;
  172. int vflags = 0;
  173. int attempt = 0;
  174. struct kvmppc_sid_map *map;
  175. /* Get host physical address for gpa */
  176. hpaddr = gfn_to_pfn(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT);
  177. if (kvm_is_error_hva(hpaddr)) {
  178. printk(KERN_INFO "Couldn't get guest page for gfn %lx!\n", orig_pte->eaddr);
  179. return -EINVAL;
  180. }
  181. hpaddr <<= PAGE_SHIFT;
  182. #if PAGE_SHIFT == 12
  183. #elif PAGE_SHIFT == 16
  184. hpaddr |= orig_pte->raddr & 0xf000;
  185. #else
  186. #error Unknown page size
  187. #endif
  188. /* and write the mapping ea -> hpa into the pt */
  189. vcpu->arch.mmu.esid_to_vsid(vcpu, orig_pte->eaddr >> SID_SHIFT, &vsid);
  190. map = find_sid_vsid(vcpu, vsid);
  191. if (!map) {
  192. ret = kvmppc_mmu_map_segment(vcpu, orig_pte->eaddr);
  193. WARN_ON(ret < 0);
  194. map = find_sid_vsid(vcpu, vsid);
  195. }
  196. if (!map) {
  197. printk(KERN_ERR "KVM: Segment map for 0x%llx (0x%lx) failed\n",
  198. vsid, orig_pte->eaddr);
  199. WARN_ON(true);
  200. return -EINVAL;
  201. }
  202. vsid = map->host_vsid;
  203. va = hpt_va(orig_pte->eaddr, vsid, MMU_SEGSIZE_256M);
  204. if (!orig_pte->may_write)
  205. rflags |= HPTE_R_PP;
  206. else
  207. mark_page_dirty(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT);
  208. if (!orig_pte->may_execute)
  209. rflags |= HPTE_R_N;
  210. hash = hpt_hash(va, PTE_SIZE, MMU_SEGSIZE_256M);
  211. map_again:
  212. hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
  213. /* In case we tried normal mapping already, let's nuke old entries */
  214. if (attempt > 1)
  215. if (ppc_md.hpte_remove(hpteg) < 0)
  216. return -1;
  217. ret = ppc_md.hpte_insert(hpteg, va, hpaddr, rflags, vflags, MMU_PAGE_4K, MMU_SEGSIZE_256M);
  218. if (ret < 0) {
  219. /* If we couldn't map a primary PTE, try a secondary */
  220. hash = ~hash;
  221. vflags ^= HPTE_V_SECONDARY;
  222. attempt++;
  223. goto map_again;
  224. } else {
  225. int hpte_id = kvmppc_mmu_hpte_cache_next(vcpu);
  226. struct hpte_cache *pte = &vcpu->arch.hpte_cache[hpte_id];
  227. dprintk_mmu("KVM: %c%c Map 0x%llx: [%lx] 0x%lx (0x%llx) -> %lx\n",
  228. ((rflags & HPTE_R_PP) == 3) ? '-' : 'w',
  229. (rflags & HPTE_R_N) ? '-' : 'x',
  230. orig_pte->eaddr, hpteg, va, orig_pte->vpage, hpaddr);
  231. /* The ppc_md code may give us a secondary entry even though we
  232. asked for a primary. Fix up. */
  233. if ((ret & _PTEIDX_SECONDARY) && !(vflags & HPTE_V_SECONDARY)) {
  234. hash = ~hash;
  235. hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
  236. }
  237. pte->slot = hpteg + (ret & 7);
  238. pte->host_va = va;
  239. pte->pte = *orig_pte;
  240. pte->pfn = hpaddr >> PAGE_SHIFT;
  241. }
  242. return 0;
  243. }
  244. static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
  245. {
  246. struct kvmppc_sid_map *map;
  247. struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
  248. u16 sid_map_mask;
  249. static int backwards_map = 0;
  250. if (vcpu->arch.msr & MSR_PR)
  251. gvsid |= VSID_PR;
  252. /* We might get collisions that trap in preceding order, so let's
  253. map them differently */
  254. sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
  255. if (backwards_map)
  256. sid_map_mask = SID_MAP_MASK - sid_map_mask;
  257. map = &to_book3s(vcpu)->sid_map[sid_map_mask];
  258. /* Make sure we're taking the other map next time */
  259. backwards_map = !backwards_map;
  260. /* Uh-oh ... out of mappings. Let's flush! */
  261. if (vcpu_book3s->vsid_next == vcpu_book3s->vsid_max) {
  262. vcpu_book3s->vsid_next = vcpu_book3s->vsid_first;
  263. memset(vcpu_book3s->sid_map, 0,
  264. sizeof(struct kvmppc_sid_map) * SID_MAP_NUM);
  265. kvmppc_mmu_pte_flush(vcpu, 0, 0);
  266. kvmppc_mmu_flush_segments(vcpu);
  267. }
  268. map->host_vsid = vcpu_book3s->vsid_next++;
  269. map->guest_vsid = gvsid;
  270. map->valid = true;
  271. return map;
  272. }
  273. static int kvmppc_mmu_next_segment(struct kvm_vcpu *vcpu, ulong esid)
  274. {
  275. int i;
  276. int max_slb_size = 64;
  277. int found_inval = -1;
  278. int r;
  279. if (!to_svcpu(vcpu)->slb_max)
  280. to_svcpu(vcpu)->slb_max = 1;
  281. /* Are we overwriting? */
  282. for (i = 1; i < to_svcpu(vcpu)->slb_max; i++) {
  283. if (!(to_svcpu(vcpu)->slb[i].esid & SLB_ESID_V))
  284. found_inval = i;
  285. else if ((to_svcpu(vcpu)->slb[i].esid & ESID_MASK) == esid)
  286. return i;
  287. }
  288. /* Found a spare entry that was invalidated before */
  289. if (found_inval > 0)
  290. return found_inval;
  291. /* No spare invalid entry, so create one */
  292. if (mmu_slb_size < 64)
  293. max_slb_size = mmu_slb_size;
  294. /* Overflowing -> purge */
  295. if ((to_svcpu(vcpu)->slb_max) == max_slb_size)
  296. kvmppc_mmu_flush_segments(vcpu);
  297. r = to_svcpu(vcpu)->slb_max;
  298. to_svcpu(vcpu)->slb_max++;
  299. return r;
  300. }
  301. int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr)
  302. {
  303. u64 esid = eaddr >> SID_SHIFT;
  304. u64 slb_esid = (eaddr & ESID_MASK) | SLB_ESID_V;
  305. u64 slb_vsid = SLB_VSID_USER;
  306. u64 gvsid;
  307. int slb_index;
  308. struct kvmppc_sid_map *map;
  309. slb_index = kvmppc_mmu_next_segment(vcpu, eaddr & ESID_MASK);
  310. if (vcpu->arch.mmu.esid_to_vsid(vcpu, esid, &gvsid)) {
  311. /* Invalidate an entry */
  312. to_svcpu(vcpu)->slb[slb_index].esid = 0;
  313. return -ENOENT;
  314. }
  315. map = find_sid_vsid(vcpu, gvsid);
  316. if (!map)
  317. map = create_sid_map(vcpu, gvsid);
  318. map->guest_esid = esid;
  319. slb_vsid |= (map->host_vsid << 12);
  320. slb_vsid &= ~SLB_VSID_KP;
  321. slb_esid |= slb_index;
  322. to_svcpu(vcpu)->slb[slb_index].esid = slb_esid;
  323. to_svcpu(vcpu)->slb[slb_index].vsid = slb_vsid;
  324. dprintk_slb("slbmte %#llx, %#llx\n", slb_vsid, slb_esid);
  325. return 0;
  326. }
  327. void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu)
  328. {
  329. to_svcpu(vcpu)->slb_max = 1;
  330. to_svcpu(vcpu)->slb[0].esid = 0;
  331. }
  332. void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
  333. {
  334. kvmppc_mmu_pte_flush(vcpu, 0, 0);
  335. __destroy_context(to_book3s(vcpu)->context_id);
  336. }
  337. int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
  338. {
  339. struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
  340. int err;
  341. err = __init_new_context();
  342. if (err < 0)
  343. return -1;
  344. vcpu3s->context_id = err;
  345. vcpu3s->vsid_max = ((vcpu3s->context_id + 1) << USER_ESID_BITS) - 1;
  346. vcpu3s->vsid_first = vcpu3s->context_id << USER_ESID_BITS;
  347. vcpu3s->vsid_next = vcpu3s->vsid_first;
  348. return 0;
  349. }