imx-pcm-fiq.c 9.4 KB

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  1. /*
  2. * imx-pcm-fiq.c -- ALSA Soc Audio Layer
  3. *
  4. * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
  5. *
  6. * This code is based on code copyrighted by Freescale,
  7. * Liam Girdwood, Javier Martin and probably others.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/delay.h>
  16. #include <linux/device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/init.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/module.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/slab.h>
  23. #include <sound/core.h>
  24. #include <sound/dmaengine_pcm.h>
  25. #include <sound/initval.h>
  26. #include <sound/pcm.h>
  27. #include <sound/pcm_params.h>
  28. #include <sound/soc.h>
  29. #include <asm/fiq.h>
  30. #include <linux/platform_data/asoc-imx-ssi.h>
  31. #include "imx-ssi.h"
  32. #include "imx-pcm.h"
  33. struct imx_pcm_runtime_data {
  34. unsigned int period;
  35. int periods;
  36. unsigned long offset;
  37. struct hrtimer hrt;
  38. int poll_time_ns;
  39. struct snd_pcm_substream *substream;
  40. atomic_t playing;
  41. atomic_t capturing;
  42. };
  43. static enum hrtimer_restart snd_hrtimer_callback(struct hrtimer *hrt)
  44. {
  45. struct imx_pcm_runtime_data *iprtd =
  46. container_of(hrt, struct imx_pcm_runtime_data, hrt);
  47. struct snd_pcm_substream *substream = iprtd->substream;
  48. struct pt_regs regs;
  49. if (!atomic_read(&iprtd->playing) && !atomic_read(&iprtd->capturing))
  50. return HRTIMER_NORESTART;
  51. get_fiq_regs(&regs);
  52. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  53. iprtd->offset = regs.ARM_r8 & 0xffff;
  54. else
  55. iprtd->offset = regs.ARM_r9 & 0xffff;
  56. snd_pcm_period_elapsed(substream);
  57. hrtimer_forward_now(hrt, ns_to_ktime(iprtd->poll_time_ns));
  58. return HRTIMER_RESTART;
  59. }
  60. static struct fiq_handler fh = {
  61. .name = DRV_NAME,
  62. };
  63. static int snd_imx_pcm_hw_params(struct snd_pcm_substream *substream,
  64. struct snd_pcm_hw_params *params)
  65. {
  66. struct snd_pcm_runtime *runtime = substream->runtime;
  67. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  68. iprtd->periods = params_periods(params);
  69. iprtd->period = params_period_bytes(params);
  70. iprtd->offset = 0;
  71. iprtd->poll_time_ns = 1000000000 / params_rate(params) *
  72. params_period_size(params);
  73. snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
  74. return 0;
  75. }
  76. static int snd_imx_pcm_prepare(struct snd_pcm_substream *substream)
  77. {
  78. struct snd_pcm_runtime *runtime = substream->runtime;
  79. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  80. struct pt_regs regs;
  81. get_fiq_regs(&regs);
  82. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  83. regs.ARM_r8 = (iprtd->period * iprtd->periods - 1) << 16;
  84. else
  85. regs.ARM_r9 = (iprtd->period * iprtd->periods - 1) << 16;
  86. set_fiq_regs(&regs);
  87. return 0;
  88. }
  89. static int imx_pcm_fiq;
  90. static int snd_imx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  91. {
  92. struct snd_pcm_runtime *runtime = substream->runtime;
  93. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  94. switch (cmd) {
  95. case SNDRV_PCM_TRIGGER_START:
  96. case SNDRV_PCM_TRIGGER_RESUME:
  97. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  98. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  99. atomic_set(&iprtd->playing, 1);
  100. else
  101. atomic_set(&iprtd->capturing, 1);
  102. hrtimer_start(&iprtd->hrt, ns_to_ktime(iprtd->poll_time_ns),
  103. HRTIMER_MODE_REL);
  104. enable_fiq(imx_pcm_fiq);
  105. break;
  106. case SNDRV_PCM_TRIGGER_STOP:
  107. case SNDRV_PCM_TRIGGER_SUSPEND:
  108. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  109. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  110. atomic_set(&iprtd->playing, 0);
  111. else
  112. atomic_set(&iprtd->capturing, 0);
  113. if (!atomic_read(&iprtd->playing) &&
  114. !atomic_read(&iprtd->capturing))
  115. disable_fiq(imx_pcm_fiq);
  116. break;
  117. default:
  118. return -EINVAL;
  119. }
  120. return 0;
  121. }
  122. static snd_pcm_uframes_t snd_imx_pcm_pointer(struct snd_pcm_substream *substream)
  123. {
  124. struct snd_pcm_runtime *runtime = substream->runtime;
  125. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  126. return bytes_to_frames(substream->runtime, iprtd->offset);
  127. }
  128. static struct snd_pcm_hardware snd_imx_hardware = {
  129. .info = SNDRV_PCM_INFO_INTERLEAVED |
  130. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  131. SNDRV_PCM_INFO_MMAP |
  132. SNDRV_PCM_INFO_MMAP_VALID |
  133. SNDRV_PCM_INFO_PAUSE |
  134. SNDRV_PCM_INFO_RESUME,
  135. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  136. .rate_min = 8000,
  137. .channels_min = 2,
  138. .channels_max = 2,
  139. .buffer_bytes_max = IMX_SSI_DMABUF_SIZE,
  140. .period_bytes_min = 128,
  141. .period_bytes_max = 16 * 1024,
  142. .periods_min = 4,
  143. .periods_max = 255,
  144. .fifo_size = 0,
  145. };
  146. static int snd_imx_open(struct snd_pcm_substream *substream)
  147. {
  148. struct snd_pcm_runtime *runtime = substream->runtime;
  149. struct imx_pcm_runtime_data *iprtd;
  150. int ret;
  151. iprtd = kzalloc(sizeof(*iprtd), GFP_KERNEL);
  152. if (iprtd == NULL)
  153. return -ENOMEM;
  154. runtime->private_data = iprtd;
  155. iprtd->substream = substream;
  156. atomic_set(&iprtd->playing, 0);
  157. atomic_set(&iprtd->capturing, 0);
  158. hrtimer_init(&iprtd->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  159. iprtd->hrt.function = snd_hrtimer_callback;
  160. ret = snd_pcm_hw_constraint_integer(substream->runtime,
  161. SNDRV_PCM_HW_PARAM_PERIODS);
  162. if (ret < 0) {
  163. kfree(iprtd);
  164. return ret;
  165. }
  166. snd_soc_set_runtime_hwparams(substream, &snd_imx_hardware);
  167. return 0;
  168. }
  169. static int snd_imx_close(struct snd_pcm_substream *substream)
  170. {
  171. struct snd_pcm_runtime *runtime = substream->runtime;
  172. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  173. hrtimer_cancel(&iprtd->hrt);
  174. kfree(iprtd);
  175. return 0;
  176. }
  177. static int snd_imx_pcm_mmap(struct snd_pcm_substream *substream,
  178. struct vm_area_struct *vma)
  179. {
  180. struct snd_pcm_runtime *runtime = substream->runtime;
  181. int ret;
  182. ret = dma_mmap_writecombine(substream->pcm->card->dev, vma,
  183. runtime->dma_area, runtime->dma_addr, runtime->dma_bytes);
  184. pr_debug("%s: ret: %d %p 0x%08x 0x%08x\n", __func__, ret,
  185. runtime->dma_area,
  186. runtime->dma_addr,
  187. runtime->dma_bytes);
  188. return ret;
  189. }
  190. static struct snd_pcm_ops imx_pcm_ops = {
  191. .open = snd_imx_open,
  192. .close = snd_imx_close,
  193. .ioctl = snd_pcm_lib_ioctl,
  194. .hw_params = snd_imx_pcm_hw_params,
  195. .prepare = snd_imx_pcm_prepare,
  196. .trigger = snd_imx_pcm_trigger,
  197. .pointer = snd_imx_pcm_pointer,
  198. .mmap = snd_imx_pcm_mmap,
  199. };
  200. static int imx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
  201. {
  202. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  203. struct snd_dma_buffer *buf = &substream->dma_buffer;
  204. size_t size = IMX_SSI_DMABUF_SIZE;
  205. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  206. buf->dev.dev = pcm->card->dev;
  207. buf->private_data = NULL;
  208. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  209. &buf->addr, GFP_KERNEL);
  210. if (!buf->area)
  211. return -ENOMEM;
  212. buf->bytes = size;
  213. return 0;
  214. }
  215. static u64 imx_pcm_dmamask = DMA_BIT_MASK(32);
  216. static int imx_pcm_new(struct snd_soc_pcm_runtime *rtd)
  217. {
  218. struct snd_card *card = rtd->card->snd_card;
  219. struct snd_pcm *pcm = rtd->pcm;
  220. int ret = 0;
  221. if (!card->dev->dma_mask)
  222. card->dev->dma_mask = &imx_pcm_dmamask;
  223. if (!card->dev->coherent_dma_mask)
  224. card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
  225. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  226. ret = imx_pcm_preallocate_dma_buffer(pcm,
  227. SNDRV_PCM_STREAM_PLAYBACK);
  228. if (ret)
  229. goto out;
  230. }
  231. if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
  232. ret = imx_pcm_preallocate_dma_buffer(pcm,
  233. SNDRV_PCM_STREAM_CAPTURE);
  234. if (ret)
  235. goto out;
  236. }
  237. out:
  238. return ret;
  239. }
  240. static int ssi_irq = 0;
  241. static int imx_pcm_fiq_new(struct snd_soc_pcm_runtime *rtd)
  242. {
  243. struct snd_pcm *pcm = rtd->pcm;
  244. struct snd_pcm_substream *substream;
  245. int ret;
  246. ret = imx_pcm_new(rtd);
  247. if (ret)
  248. return ret;
  249. substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  250. if (substream) {
  251. struct snd_dma_buffer *buf = &substream->dma_buffer;
  252. imx_ssi_fiq_tx_buffer = (unsigned long)buf->area;
  253. }
  254. substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
  255. if (substream) {
  256. struct snd_dma_buffer *buf = &substream->dma_buffer;
  257. imx_ssi_fiq_rx_buffer = (unsigned long)buf->area;
  258. }
  259. set_fiq_handler(&imx_ssi_fiq_start,
  260. &imx_ssi_fiq_end - &imx_ssi_fiq_start);
  261. return 0;
  262. }
  263. static void imx_pcm_free(struct snd_pcm *pcm)
  264. {
  265. struct snd_pcm_substream *substream;
  266. struct snd_dma_buffer *buf;
  267. int stream;
  268. for (stream = 0; stream < 2; stream++) {
  269. substream = pcm->streams[stream].substream;
  270. if (!substream)
  271. continue;
  272. buf = &substream->dma_buffer;
  273. if (!buf->area)
  274. continue;
  275. dma_free_writecombine(pcm->card->dev, buf->bytes,
  276. buf->area, buf->addr);
  277. buf->area = NULL;
  278. }
  279. }
  280. static void imx_pcm_fiq_free(struct snd_pcm *pcm)
  281. {
  282. mxc_set_irq_fiq(ssi_irq, 0);
  283. release_fiq(&fh);
  284. imx_pcm_free(pcm);
  285. }
  286. static struct snd_soc_platform_driver imx_soc_platform_fiq = {
  287. .ops = &imx_pcm_ops,
  288. .pcm_new = imx_pcm_fiq_new,
  289. .pcm_free = imx_pcm_fiq_free,
  290. };
  291. int imx_pcm_fiq_init(struct platform_device *pdev,
  292. struct imx_pcm_fiq_params *params)
  293. {
  294. int ret;
  295. ret = claim_fiq(&fh);
  296. if (ret) {
  297. dev_err(&pdev->dev, "failed to claim fiq: %d", ret);
  298. return ret;
  299. }
  300. mxc_set_irq_fiq(params->irq, 1);
  301. ssi_irq = params->irq;
  302. imx_pcm_fiq = params->irq;
  303. imx_ssi_fiq_base = (unsigned long)params->base;
  304. params->dma_params_tx->maxburst = 4;
  305. params->dma_params_rx->maxburst = 6;
  306. ret = snd_soc_register_platform(&pdev->dev, &imx_soc_platform_fiq);
  307. if (ret)
  308. goto failed_register;
  309. return 0;
  310. failed_register:
  311. mxc_set_irq_fiq(ssi_irq, 0);
  312. release_fiq(&fh);
  313. return ret;
  314. }
  315. EXPORT_SYMBOL_GPL(imx_pcm_fiq_init);
  316. void imx_pcm_fiq_exit(struct platform_device *pdev)
  317. {
  318. snd_soc_unregister_platform(&pdev->dev);
  319. }
  320. EXPORT_SYMBOL_GPL(imx_pcm_fiq_exit);
  321. MODULE_LICENSE("GPL");